1 ; Show that we know how to translate mov (shifted register), which 2 ; are pseudo instructions for ASR, LSR, ROR, and RRX. 3 4 ; NOTE: We use -O2 to get rid of memory stores. 5 6 ; REQUIRES: allow_dump 7 8 ; Compile using standalone assembler. 9 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \ 10 ; RUN: | FileCheck %s --check-prefix=ASM 11 12 ; Show bytes in assembled standalone code. 13 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 14 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS 15 16 ; Compile using integrated assembler. 17 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ 18 ; RUN: | FileCheck %s --check-prefix=IASM 19 20 ; Show bytes in assembled integrated code. 21 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 22 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS 23 24 define internal i64 @testMovWithAsr(i32 %a) { 25 ; ASM-LABEL:testMovWithAsr: 26 ; DIS-LABEL:00000000 <testMovWithAsr>: 27 ; IASM-LABEL:testMovWithAsr: 28 29 entry: 30 ; ASM-NEXT:.LtestMovWithAsr$entry: 31 ; IASM-NEXT:.LtestMovWithAsr$entry: 32 33 %a.arg_trunc = trunc i32 %a to i8 34 %conv = sext i8 %a.arg_trunc to i64 35 ret i64 %conv 36 37 ; ASM-NEXT: sxtb r0, r0 38 ; DIS-NEXT: 0: e6af0070 39 ; IASM-NEXT: .byte 0x70 40 ; IASM-NEXT: .byte 0x0 41 ; IASM-NEXT: .byte 0xaf 42 ; IASM-NEXT: .byte 0xe6 43 44 ; ***** Example of mov pseudo instruction. 45 ; ASM-NEXT: mov r1, r0, asr #31 46 ; DIS-NEXT: 4: e1a01fc0 47 ; IASM-NEXT: .byte 0xc0 48 ; IASM-NEXT: .byte 0x1f 49 ; IASM-NEXT: .byte 0xa0 50 ; IASM-NEXT: .byte 0xe1 51 52 ; ASM-NEXT: bx lr 53 54 } 55
