1 /* 2 * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without modification, are permitted 5 * provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright notice, this list of 7 * conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright notice, this list of 9 * conditions and the following disclaimer in the documentation and/or other materials provided 10 * with the distribution. 11 * * Neither the name of The Linux Foundation nor the names of its contributors may be used to 12 * endorse or promote products derived from this software without specific prior written 13 * permission. 14 * 15 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 16 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 17 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 21 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 22 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 */ 24 25 #ifndef __HW_INFO_TYPES_H__ 26 #define __HW_INFO_TYPES_H__ 27 28 #include <stdint.h> 29 #include <core/display_interface.h> 30 #include <core/core_interface.h> 31 #include <vector> 32 #include <map> 33 #include <string> 34 #include <bitset> 35 36 namespace sdm { 37 const int kMaxSDELayers = 16; // Maximum number of layers that can be handled by hardware in a 38 // given layer stack. 39 #define MAX_PLANES 4 40 41 #define MAX_DETAIL_ENHANCE_CURVE 3 42 43 enum HWDeviceType { 44 kDevicePrimary, 45 kDeviceHDMI, 46 kDeviceVirtual, 47 kDeviceRotator, 48 kDeviceMax, 49 }; 50 51 enum HWBlockType { 52 kHWPrimary, 53 kHWHDMI, 54 kHWWriteback0, 55 kHWWriteback1, 56 kHWWriteback2, 57 kHWBlockMax 58 }; 59 60 enum HWDisplayMode { 61 kModeDefault, 62 kModeVideo, 63 kModeCommand, 64 }; 65 66 enum HWDisplayPort { 67 kPortDefault, 68 kPortDSI, 69 kPortDTv, 70 kPortWriteBack, 71 kPortLVDS, 72 kPortEDP, 73 }; 74 75 enum PipeType { 76 kPipeTypeUnused, 77 kPipeTypeVIG, 78 kPipeTypeRGB, 79 kPipeTypeDMA, 80 kPipeTypeCursor, 81 }; 82 83 enum HWSubBlockType { 84 kHWVIGPipe, 85 kHWRGBPipe, 86 kHWDMAPipe, 87 kHWCursorPipe, 88 kHWRotatorInput, 89 kHWRotatorOutput, 90 kHWWBIntfOutput, 91 kHWDestinationScalar, 92 kHWSubBlockMax, 93 }; 94 95 enum HWAlphaInterpolation { 96 kInterpolationPixelRepeat, 97 kInterpolationBilinear, 98 kInterpolationMax, 99 }; 100 101 enum HWBlendingFilter { 102 kBlendFilterCircular, 103 kBlendFilterSeparable, 104 kBlendFilterMax, 105 }; 106 107 enum HWPipeFlags { 108 kIGC = 0x01, 109 kMultiRect = 0x02, 110 kMultiRectParallelMode = 0x04, 111 }; 112 113 typedef std::map<HWSubBlockType, std::vector<LayerBufferFormat>> FormatsMap; 114 115 struct HWDynBwLimitInfo { 116 uint32_t cur_mode = kBwDefault; 117 uint32_t total_bw_limit[kBwModeMax] = { 0 }; 118 uint32_t pipe_bw_limit[kBwModeMax] = { 0 }; 119 }; 120 121 struct HWPipeCaps { 122 PipeType type = kPipeTypeUnused; 123 uint32_t id = 0; 124 uint32_t max_rects = 1; 125 }; 126 127 struct HWRotatorInfo { 128 enum { ROT_TYPE_MDSS, ROT_TYPE_V4L2 }; 129 uint32_t type = ROT_TYPE_MDSS; 130 uint32_t num_rotator = 0; 131 bool has_downscale = false; 132 std::string device_path = ""; 133 134 void Reset() { *this = HWRotatorInfo(); } 135 }; 136 137 struct HWDestScalarInfo { 138 uint32_t count = 0; 139 uint32_t max_input_width = 0; 140 uint32_t max_output_width = 0; 141 uint32_t max_scale_up = 1; 142 }; 143 144 struct HWResourceInfo { 145 uint32_t hw_version = 0; 146 uint32_t hw_revision = 0; 147 uint32_t num_dma_pipe = 0; 148 uint32_t num_vig_pipe = 0; 149 uint32_t num_rgb_pipe = 0; 150 uint32_t num_cursor_pipe = 0; 151 uint32_t num_blending_stages = 0; 152 uint32_t num_control = 0; 153 uint32_t num_mixer_to_disp = 0; 154 uint32_t smp_total = 0; 155 uint32_t smp_size = 0; 156 uint32_t num_smp_per_pipe = 0; 157 uint32_t max_scale_up = 1; 158 uint32_t max_scale_down = 1; 159 uint64_t max_bandwidth_low = 0; 160 uint64_t max_bandwidth_high = 0; 161 uint32_t max_mixer_width = 2048; 162 uint32_t max_pipe_width = 2048; 163 uint32_t max_cursor_size = 0; 164 uint32_t max_pipe_bw = 0; 165 uint32_t max_sde_clk = 0; 166 float clk_fudge_factor = 1.0f; 167 uint32_t macrotile_nv12_factor = 0; 168 uint32_t macrotile_factor = 0; 169 uint32_t linear_factor = 0; 170 uint32_t scale_factor = 0; 171 uint32_t extra_fudge_factor = 0; 172 uint32_t amortizable_threshold = 0; 173 uint32_t system_overhead_lines = 0; 174 bool has_bwc = false; 175 bool has_ubwc = false; 176 bool has_decimation = false; 177 bool has_macrotile = false; 178 bool has_non_scalar_rgb = false; 179 bool is_src_split = false; 180 bool perf_calc = false; 181 bool has_dyn_bw_support = false; 182 bool separate_rotator = false; 183 bool has_qseed3 = false; 184 bool has_concurrent_writeback = false; 185 uint32_t writeback_index = kHWBlockMax; 186 HWDynBwLimitInfo dyn_bw_info; 187 std::vector<HWPipeCaps> hw_pipes; 188 FormatsMap supported_formats_map; 189 HWRotatorInfo hw_rot_info; 190 HWDestScalarInfo hw_dest_scalar_info; 191 192 void Reset() { *this = HWResourceInfo(); } 193 }; 194 195 struct HWSplitInfo { 196 uint32_t left_split = 0; 197 uint32_t right_split = 0; 198 199 bool operator !=(const HWSplitInfo &split_info) { 200 return ((left_split != split_info.left_split) || (right_split != split_info.right_split)); 201 } 202 203 bool operator ==(const HWSplitInfo &split_info) { 204 return !(operator !=(split_info)); 205 } 206 }; 207 208 enum HWS3DMode { 209 kS3DModeNone, 210 kS3DModeLR, 211 kS3DModeRL, 212 kS3DModeTB, 213 kS3DModeFP, 214 kS3DModeMax, 215 }; 216 217 struct HWPanelInfo { 218 HWDisplayPort port = kPortDefault; // Display port 219 HWDisplayMode mode = kModeDefault; // Display mode 220 bool partial_update = false; // Partial update feature 221 int left_align = 0; // ROI left alignment restriction 222 int width_align = 0; // ROI width alignment restriction 223 int top_align = 0; // ROI top alignment restriction 224 int height_align = 0; // ROI height alignment restriction 225 int min_roi_width = 0; // Min width needed for ROI 226 int min_roi_height = 0; // Min height needed for ROI 227 bool needs_roi_merge = false; // Merge ROI's of both the DSI's 228 bool dynamic_fps = false; // Panel Supports dynamic fps 229 uint32_t min_fps = 0; // Min fps supported by panel 230 uint32_t max_fps = 0; // Max fps supported by panel 231 bool is_primary_panel = false; // Panel is primary display 232 bool is_pluggable = false; // Panel is pluggable 233 HWSplitInfo split_info; // Panel split configuration 234 char panel_name[256] = {0}; // Panel name 235 HWS3DMode s3d_mode = kS3DModeNone; // Panel's current s3d mode. 236 int panel_max_brightness = 0; // Max panel brightness 237 238 bool operator !=(const HWPanelInfo &panel_info) { 239 return ((port != panel_info.port) || (mode != panel_info.mode) || 240 (partial_update != panel_info.partial_update) || 241 (left_align != panel_info.left_align) || (width_align != panel_info.width_align) || 242 (top_align != panel_info.top_align) || (height_align != panel_info.height_align) || 243 (min_roi_width != panel_info.min_roi_width) || 244 (min_roi_height != panel_info.min_roi_height) || 245 (needs_roi_merge != panel_info.needs_roi_merge) || 246 (dynamic_fps != panel_info.dynamic_fps) || (min_fps != panel_info.min_fps) || 247 (max_fps != panel_info.max_fps) || (is_primary_panel != panel_info.is_primary_panel) || 248 (split_info != panel_info.split_info) || 249 (s3d_mode != panel_info.s3d_mode)); 250 } 251 252 bool operator ==(const HWPanelInfo &panel_info) { 253 return !(operator !=(panel_info)); 254 } 255 }; 256 257 struct HWSessionConfig { 258 LayerRect src_rect; 259 LayerRect dst_rect; 260 uint32_t buffer_count = 0; 261 bool secure = false; 262 uint32_t frame_rate = 0; 263 LayerTransform transform; 264 265 bool operator==(const HWSessionConfig& config) const { 266 return (src_rect == config.src_rect && 267 dst_rect == config.dst_rect && 268 buffer_count == config.buffer_count && 269 secure == config.secure && 270 frame_rate == config.frame_rate && 271 transform == config.transform); 272 } 273 274 bool operator!=(const HWSessionConfig& config) const { 275 return !operator==(config); 276 } 277 }; 278 279 struct HWRotateInfo { 280 int pipe_id = -1; // Not actual pipe id, but the relative DMA id 281 int writeback_id = -1; // Writeback block id, but this is the same as DMA id 282 LayerRect src_roi; // Source crop of each split 283 LayerRect dst_roi; // Destination crop of each split 284 bool valid = false; 285 int rotate_id = -1; // Actual rotator session id with driver 286 287 void Reset() { *this = HWRotateInfo(); } 288 }; 289 290 struct HWRotatorSession { 291 HWRotateInfo hw_rotate_info[kMaxRotatePerLayer]; 292 uint32_t hw_block_count = 0; // number of rotator hw blocks used by rotator session 293 int session_id = -1; // A handle with Session Manager 294 HWSessionConfig hw_session_config; 295 LayerBuffer input_buffer; // Input to rotator 296 LayerBuffer output_buffer; // Output of rotator, crop width and stride are same 297 float input_compression = 1.0f; 298 float output_compression = 1.0f; 299 bool is_buffer_cached = false; 300 }; 301 302 struct HWScaleLutInfo { 303 uint32_t dir_lut_size = 0; 304 uint32_t cir_lut_size = 0; 305 uint32_t sep_lut_size = 0; 306 uint64_t dir_lut = 0; 307 uint64_t cir_lut = 0; 308 uint64_t sep_lut = 0; 309 }; 310 311 struct HWDetailEnhanceData : DisplayDetailEnhancerData { 312 uint16_t prec_shift = 0; 313 int16_t adjust_a[MAX_DETAIL_ENHANCE_CURVE] = {0}; 314 int16_t adjust_b[MAX_DETAIL_ENHANCE_CURVE] = {0}; 315 int16_t adjust_c[MAX_DETAIL_ENHANCE_CURVE] = {0}; 316 }; 317 318 struct HWPixelExtension { 319 int32_t extension = 0; // Number of pixels extension in left, right, top and bottom directions 320 // for all color components. This pixel value for each color component 321 // should be sum of fetch and repeat pixels. 322 323 int32_t overfetch = 0; // Number of pixels need to be overfetched in left, right, top and bottom 324 // directions from source image for scaling. 325 326 int32_t repeat = 0; // Number of pixels need to be repeated in left, right, top and bottom 327 // directions for scaling. 328 }; 329 330 struct HWPlane { 331 int32_t init_phase_x = 0; 332 int32_t phase_step_x = 0; 333 int32_t init_phase_y = 0; 334 int32_t phase_step_y = 0; 335 HWPixelExtension left; 336 HWPixelExtension top; 337 HWPixelExtension right; 338 HWPixelExtension bottom; 339 uint32_t roi_width = 0; 340 int32_t preload_x = 0; 341 int32_t preload_y = 0; 342 uint32_t src_width = 0; 343 uint32_t src_height = 0; 344 }; 345 346 struct HWScaleData { 347 struct enable { 348 uint8_t scale = 0; 349 uint8_t direction_detection = 0; 350 uint8_t detail_enhance = 0; 351 } enable; 352 uint32_t dst_width = 0; 353 uint32_t dst_height = 0; 354 HWPlane plane[MAX_PLANES]; 355 // scale_v2_data fields 356 ScalingFilterConfig y_rgb_filter_cfg = kFilterEdgeDirected; 357 ScalingFilterConfig uv_filter_cfg = kFilterEdgeDirected; 358 HWAlphaInterpolation alpha_filter_cfg = kInterpolationPixelRepeat; 359 HWBlendingFilter blend_cfg = kBlendFilterCircular; 360 361 struct lut_flags { 362 uint8_t lut_swap = 0; 363 uint8_t lut_dir_wr = 0; 364 uint8_t lut_y_cir_wr = 0; 365 uint8_t lut_uv_cir_wr = 0; 366 uint8_t lut_y_sep_wr = 0; 367 uint8_t lut_uv_sep_wr = 0; 368 } lut_flag; 369 370 uint32_t dir_lut_idx = 0; 371 /* for Y(RGB) and UV planes*/ 372 uint32_t y_rgb_cir_lut_idx = 0; 373 uint32_t uv_cir_lut_idx = 0; 374 uint32_t y_rgb_sep_lut_idx = 0; 375 uint32_t uv_sep_lut_idx = 0; 376 377 HWDetailEnhanceData detail_enhance; 378 }; 379 380 struct HWDestScaleInfo { 381 uint32_t mixer_width = 0; 382 uint32_t mixer_height = 0; 383 bool scale_update = false; 384 HWScaleData scale_data = {}; 385 }; 386 387 typedef std::map<uint32_t, HWDestScaleInfo *> DestScaleInfoMap; 388 389 struct HWPipeInfo { 390 uint32_t pipe_id = 0; 391 HWSubBlockType sub_block_type = kHWSubBlockMax; 392 LayerRect src_roi; 393 LayerRect dst_roi; 394 uint8_t horizontal_decimation = 0; 395 uint8_t vertical_decimation = 0; 396 HWScaleData scale_data; 397 uint32_t z_order = 0; 398 uint8_t flags = 0; 399 bool valid = false; 400 401 void Reset() { *this = HWPipeInfo(); } 402 }; 403 404 struct HWLayerConfig { 405 HWPipeInfo left_pipe; // pipe for left side of output 406 HWPipeInfo right_pipe; // pipe for right side of output 407 HWRotatorSession hw_rotator_session; 408 float compression = 1.0f; 409 410 void Reset() { *this = HWLayerConfig(); } 411 }; 412 413 struct HWLayersInfo { 414 LayerStack *stack = NULL; // Input layer stack. Set by the caller. 415 416 uint32_t index[kMaxSDELayers]; // Indexes of the layers from the layer stack which need to be 417 // programmed on hardware. 418 LayerRect updated_src_rect[kMaxSDELayers]; // Updated layer src rects in s3d mode 419 LayerRect updated_dst_rect[kMaxSDELayers]; // Updated layer dst rects in s3d mode 420 bool updating[kMaxSDELayers] = {0}; // Updated by strategy, considering plane_alpha+updating 421 422 uint32_t count = 0; // Total number of layers which need to be set on hardware. 423 424 int sync_handle = -1; 425 426 LayerRect left_partial_update; // Left ROI. 427 LayerRect right_partial_update; // Right ROI. 428 429 bool use_hw_cursor = false; // Indicates that HWCursor pipe needs to be used for cursor layer 430 DestScaleInfoMap dest_scale_info_map = {}; 431 }; 432 433 struct HWLayers { 434 HWLayersInfo info; 435 HWLayerConfig config[kMaxSDELayers]; 436 float output_compression = 1.0f; 437 uint32_t bandwidth = 0; 438 uint32_t clock = 0; 439 }; 440 441 struct HWDisplayAttributes : DisplayConfigVariableInfo { 442 bool is_device_split = false; 443 uint32_t v_front_porch = 0; //!< Vertical front porch of panel 444 uint32_t v_back_porch = 0; //!< Vertical back porch of panel 445 uint32_t v_pulse_width = 0; //!< Vertical pulse width of panel 446 uint32_t h_total = 0; //!< Total width of panel (hActive + hFP + hBP + hPulseWidth) 447 std::bitset<32> s3d_config; //!< Stores the bit mask of S3D modes 448 449 void Reset() { *this = HWDisplayAttributes(); } 450 451 bool operator !=(const HWDisplayAttributes &display_attributes) { 452 return ((is_device_split != display_attributes.is_device_split) || 453 (x_pixels != display_attributes.x_pixels) || 454 (y_pixels != display_attributes.y_pixels) || 455 (x_dpi != display_attributes.x_dpi) || 456 (y_dpi != display_attributes.y_dpi) || 457 (fps != display_attributes.fps) || 458 (vsync_period_ns != display_attributes.vsync_period_ns) || 459 (v_front_porch != display_attributes.v_front_porch) || 460 (v_back_porch != display_attributes.v_back_porch) || 461 (v_pulse_width != display_attributes.v_pulse_width) || 462 (is_yuv != display_attributes.is_yuv)); 463 } 464 465 bool operator ==(const HWDisplayAttributes &display_attributes) { 466 return !(operator !=(display_attributes)); 467 } 468 }; 469 470 struct HWMixerAttributes { 471 uint32_t width = 0; // Layer mixer width 472 uint32_t height = 0; // Layer mixer height 473 uint32_t split_left = 0; 474 LayerBufferFormat output_format = kFormatRGB101010; // Layer mixer output format 475 476 bool operator !=(const HWMixerAttributes &mixer_attributes) { 477 return ((width != mixer_attributes.width) || 478 (height != mixer_attributes.height) || 479 (output_format != mixer_attributes.output_format) || 480 (split_left != mixer_attributes.split_left)); 481 } 482 483 bool operator ==(const HWMixerAttributes &mixer_attributes) { 484 return !(operator !=(mixer_attributes)); 485 } 486 487 bool IsValid() { 488 return (width > 0 && height > 0); 489 } 490 }; 491 492 } // namespace sdm 493 494 #endif // __HW_INFO_TYPES_H__ 495 496
