1 /* 2 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without modification, are permitted 5 * provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright notice, this list of 7 * conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright notice, this list of 9 * conditions and the following disclaimer in the documentation and/or other materials provided 10 * with the distribution. 11 * * Neither the name of The Linux Foundation nor the names of its contributors may be used to 12 * endorse or promote products derived from this software without specific prior written 13 * permission. 14 * 15 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 16 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 17 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 21 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 22 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 */ 24 25 #ifndef __HW_INFO_TYPES_H__ 26 #define __HW_INFO_TYPES_H__ 27 28 #include <stdint.h> 29 #include <core/display_interface.h> 30 #include <core/core_interface.h> 31 #include <vector> 32 #include <map> 33 #include <string> 34 #include <bitset> 35 36 namespace sdm { 37 using std::string; 38 39 const int kMaxSDELayers = 16; // Maximum number of layers that can be handled by MDP5 hardware 40 // in a given layer stack. 41 const int kMaxBlitLayers = 32; // Maximum number of layers that can be handled by MDP3 hardware 42 // in a given layer stack. 43 #define MAX_PLANES 4 44 45 #define MAX_DETAIL_ENHANCE_CURVE 3 46 47 enum HWDeviceType { 48 kDevicePrimary, 49 kDeviceHDMI, 50 kDeviceVirtual, 51 kDeviceRotator, 52 kDeviceMax, 53 }; 54 55 enum HWBlockType { 56 kHWPrimary, 57 kHWHDMI, 58 kHWWriteback0, 59 kHWWriteback1, 60 kHWWriteback2, 61 kHWBlockMax 62 }; 63 64 enum HWDisplayMode { 65 kModeDefault, 66 kModeVideo, 67 kModeCommand, 68 }; 69 70 enum PipeType { 71 kPipeTypeUnused, 72 kPipeTypeVIG, 73 kPipeTypeRGB, 74 kPipeTypeDMA, 75 kPipeTypeCursor, 76 }; 77 78 enum HWSubBlockType { 79 kHWVIGPipe, 80 kHWRGBPipe, 81 kHWDMAPipe, 82 kHWCursorPipe, 83 kHWRotatorInput, 84 kHWRotatorOutput, 85 kHWWBIntfOutput, 86 kHWDestinationScalar, 87 kHWSubBlockMax, 88 }; 89 90 enum HWAlphaInterpolation { 91 kInterpolationPixelRepeat, 92 kInterpolationBilinear, 93 kInterpolationMax, 94 }; 95 96 enum HWBlendingFilter { 97 kBlendFilterCircular, 98 kBlendFilterSeparable, 99 kBlendFilterMax, 100 }; 101 102 enum HWPipeFlags { 103 kIGC = 0x01, 104 kMultiRect = 0x02, 105 kMultiRectParallelMode = 0x04, 106 }; 107 108 enum HWAVRModes { 109 kContinuousMode, // Mode to enable AVR feature for every frame. 110 kOneShotMode, // Mode to enable AVR feature for particular frame. 111 }; 112 113 typedef std::map<HWSubBlockType, std::vector<LayerBufferFormat>> FormatsMap; 114 typedef std::map<LayerBufferFormat, float> CompRatioMap; 115 116 struct HWDynBwLimitInfo { 117 uint32_t cur_mode = kBwDefault; 118 uint64_t total_bw_limit[kBwModeMax] = { 0 }; 119 uint64_t pipe_bw_limit[kBwModeMax] = { 0 }; 120 }; 121 122 struct HWPipeCaps { 123 PipeType type = kPipeTypeUnused; 124 uint32_t id = 0; 125 uint32_t master_pipe_id = 0; 126 uint32_t max_rects = 1; 127 }; 128 129 struct HWRotatorInfo { 130 enum { ROT_TYPE_MDSS, ROT_TYPE_V4L2 }; 131 uint32_t type = ROT_TYPE_MDSS; 132 uint32_t num_rotator = 0; 133 bool has_downscale = false; 134 std::string device_path = ""; 135 float min_downscale = 2.0f; 136 bool downscale_compression = false; 137 138 void Reset() { *this = HWRotatorInfo(); } 139 }; 140 141 struct HWDestScalarInfo { 142 uint32_t count = 0; 143 uint32_t max_input_width = 0; 144 uint32_t max_output_width = 0; 145 uint32_t max_scale_up = 1; 146 uint32_t prefill_lines = 4; 147 }; 148 149 enum SmartDMARevision { 150 V1, 151 V2, 152 }; 153 154 struct HWResourceInfo { 155 uint32_t hw_version = 0; 156 uint32_t hw_revision = 0; 157 uint32_t num_dma_pipe = 0; 158 uint32_t num_vig_pipe = 0; 159 uint32_t num_rgb_pipe = 0; 160 uint32_t num_cursor_pipe = 0; 161 uint32_t num_blending_stages = 0; 162 uint32_t num_control = 0; 163 uint32_t num_mixer_to_disp = 0; 164 uint32_t smp_total = 0; 165 uint32_t smp_size = 0; 166 uint32_t num_smp_per_pipe = 0; 167 uint32_t max_scale_up = 1; 168 uint32_t max_scale_down = 1; 169 uint64_t max_bandwidth_low = 0; 170 uint64_t max_bandwidth_high = 0; 171 uint32_t max_mixer_width = 2048; 172 uint32_t max_pipe_width = 2048; 173 uint32_t max_cursor_size = 0; 174 uint64_t max_pipe_bw = 0; 175 uint32_t max_sde_clk = 0; 176 float clk_fudge_factor = 1.0f; 177 uint32_t macrotile_nv12_factor = 0; 178 uint32_t macrotile_factor = 0; 179 uint32_t linear_factor = 0; 180 uint32_t scale_factor = 0; 181 uint32_t extra_fudge_factor = 0; 182 uint32_t amortizable_threshold = 0; 183 uint32_t system_overhead_lines = 0; 184 bool has_bwc = false; 185 bool has_ubwc = false; 186 bool has_decimation = false; 187 bool has_macrotile = false; 188 bool has_non_scalar_rgb = false; 189 bool is_src_split = false; 190 bool has_dyn_bw_support = false; 191 bool separate_rotator = false; 192 bool has_qseed3 = false; 193 bool has_concurrent_writeback = false; 194 bool has_ppp = false; 195 uint32_t writeback_index = kHWBlockMax; 196 HWDynBwLimitInfo dyn_bw_info; 197 std::vector<HWPipeCaps> hw_pipes; 198 FormatsMap supported_formats_map; 199 HWRotatorInfo hw_rot_info; 200 HWDestScalarInfo hw_dest_scalar_info; 201 bool has_avr = false; 202 bool has_hdr = false; 203 SmartDMARevision smart_dma_rev = SmartDMARevision::V1; 204 float ib_fudge_factor = 1.0f; 205 uint32_t undersized_prefill_lines = 0; 206 CompRatioMap comp_ratio_rt_map; 207 CompRatioMap comp_ratio_nrt_map; 208 209 void Reset() { *this = HWResourceInfo(); } 210 }; 211 212 struct HWSplitInfo { 213 uint32_t left_split = 0; 214 uint32_t right_split = 0; 215 216 bool operator !=(const HWSplitInfo &split_info) { 217 return ((left_split != split_info.left_split) || (right_split != split_info.right_split)); 218 } 219 220 bool operator ==(const HWSplitInfo &split_info) { 221 return !(operator !=(split_info)); 222 } 223 }; 224 225 enum HWS3DMode { 226 kS3DModeNone, 227 kS3DModeLR, 228 kS3DModeRL, 229 kS3DModeTB, 230 kS3DModeFP, 231 kS3DModeMax, 232 }; 233 234 struct HWColorPrimaries { 235 uint32_t white_point[2] = {}; // White point 236 uint32_t red[2] = {}; // Red color primary 237 uint32_t green[2] = {}; // Green color primary 238 uint32_t blue[2] = {}; // Blue color primary 239 }; 240 241 struct HWPanelOrientation { 242 bool rotation = false; 243 bool flip_horizontal = false; 244 bool flip_vertical = false; 245 }; 246 247 struct HWPanelInfo { 248 DisplayPort port = kPortDefault; // Display port 249 HWDisplayMode mode = kModeDefault; // Display mode 250 bool partial_update = false; // Partial update feature 251 int left_align = 1; // ROI left alignment restriction 252 int width_align = 1; // ROI width alignment restriction 253 int top_align = 1; // ROI top alignment restriction 254 int height_align = 1; // ROI height alignment restriction 255 int min_roi_width = 1; // Min width needed for ROI 256 int min_roi_height = 1; // Min height needed for ROI 257 bool needs_roi_merge = false; // Merge ROI's of both the DSI's 258 bool dynamic_fps = false; // Panel Supports dynamic fps 259 bool dfps_porch_mode = false; // dynamic fps VFP or HFP mode 260 bool ping_pong_split = false; // Supports Ping pong split 261 uint32_t min_fps = 0; // Min fps supported by panel 262 uint32_t max_fps = 0; // Max fps supported by panel 263 bool is_primary_panel = false; // Panel is primary display 264 bool is_pluggable = false; // Panel is pluggable 265 HWSplitInfo split_info; // Panel split configuration 266 char panel_name[256] = {0}; // Panel name 267 HWS3DMode s3d_mode = kS3DModeNone; // Panel's current s3d mode. 268 int panel_max_brightness = 0; // Max panel brightness 269 uint32_t left_roi_count = 1; // Number if ROI supported on left panel 270 uint32_t right_roi_count = 1; // Number if ROI supported on right panel 271 bool hdr_enabled = false; // HDR feature supported 272 uint32_t peak_luminance = 0; // Panel's peak luminance level 273 uint32_t average_luminance = 0; // Panel's average luminance level 274 uint32_t blackness_level = 0; // Panel's blackness level 275 HWColorPrimaries primaries = {}; // WRGB color primaries 276 HWPanelOrientation panel_orientation = {}; // Panel Orientation 277 278 bool operator !=(const HWPanelInfo &panel_info) { 279 return ((port != panel_info.port) || (mode != panel_info.mode) || 280 (partial_update != panel_info.partial_update) || 281 (left_align != panel_info.left_align) || (width_align != panel_info.width_align) || 282 (top_align != panel_info.top_align) || (height_align != panel_info.height_align) || 283 (min_roi_width != panel_info.min_roi_width) || 284 (min_roi_height != panel_info.min_roi_height) || 285 (needs_roi_merge != panel_info.needs_roi_merge) || 286 (dynamic_fps != panel_info.dynamic_fps) || (min_fps != panel_info.min_fps) || 287 (dfps_porch_mode != panel_info.dfps_porch_mode) || 288 (ping_pong_split != panel_info.ping_pong_split) || 289 (max_fps != panel_info.max_fps) || (is_primary_panel != panel_info.is_primary_panel) || 290 (split_info != panel_info.split_info) || (s3d_mode != panel_info.s3d_mode) || 291 (left_roi_count != panel_info.left_roi_count) || 292 (right_roi_count != panel_info.right_roi_count)); 293 } 294 295 bool operator ==(const HWPanelInfo &panel_info) { 296 return !(operator !=(panel_info)); 297 } 298 }; 299 300 struct HWSessionConfig { 301 LayerRect src_rect; 302 LayerRect dst_rect; 303 uint32_t buffer_count = 0; 304 bool secure = false; 305 uint32_t frame_rate = 0; 306 LayerTransform transform; 307 bool secure_camera = false; 308 309 bool operator==(const HWSessionConfig& config) const { 310 return (src_rect == config.src_rect && 311 dst_rect == config.dst_rect && 312 buffer_count == config.buffer_count && 313 secure == config.secure && 314 frame_rate == config.frame_rate && 315 transform == config.transform && 316 secure_camera == config.secure_camera); 317 } 318 319 bool operator!=(const HWSessionConfig& config) const { 320 return !operator==(config); 321 } 322 }; 323 324 struct HWRotateInfo { 325 int pipe_id = -1; // Not actual pipe id, but the relative DMA id 326 int writeback_id = -1; // Writeback block id, but this is the same as DMA id 327 LayerRect src_roi; // Source crop of each split 328 LayerRect dst_roi; // Destination crop of each split 329 bool valid = false; 330 int rotate_id = -1; // Actual rotator session id with driver 331 332 void Reset() { *this = HWRotateInfo(); } 333 }; 334 335 struct HWRotatorSession { 336 HWRotateInfo hw_rotate_info[kMaxRotatePerLayer]; 337 uint32_t hw_block_count = 0; // number of rotator hw blocks used by rotator session 338 int session_id = -1; // A handle with Session Manager 339 HWSessionConfig hw_session_config; 340 LayerBuffer input_buffer; // Input to rotator 341 LayerBuffer output_buffer; // Output of rotator, crop width and stride are same 342 float input_compression = 1.0f; 343 float output_compression = 1.0f; 344 bool is_buffer_cached = false; 345 }; 346 347 struct HWScaleLutInfo { 348 uint32_t dir_lut_size = 0; 349 uint32_t cir_lut_size = 0; 350 uint32_t sep_lut_size = 0; 351 uint64_t dir_lut = 0; 352 uint64_t cir_lut = 0; 353 uint64_t sep_lut = 0; 354 }; 355 356 struct HWDetailEnhanceData : DisplayDetailEnhancerData { 357 uint16_t prec_shift = 0; 358 int16_t adjust_a[MAX_DETAIL_ENHANCE_CURVE] = {0}; 359 int16_t adjust_b[MAX_DETAIL_ENHANCE_CURVE] = {0}; 360 int16_t adjust_c[MAX_DETAIL_ENHANCE_CURVE] = {0}; 361 }; 362 363 struct HWPixelExtension { 364 int32_t extension = 0; // Number of pixels extension in left, right, top and bottom directions 365 // for all color components. This pixel value for each color component 366 // should be sum of fetch and repeat pixels. 367 368 int32_t overfetch = 0; // Number of pixels need to be overfetched in left, right, top and bottom 369 // directions from source image for scaling. 370 371 int32_t repeat = 0; // Number of pixels need to be repeated in left, right, top and bottom 372 // directions for scaling. 373 }; 374 375 struct HWPlane { 376 int32_t init_phase_x = 0; 377 int32_t phase_step_x = 0; 378 int32_t init_phase_y = 0; 379 int32_t phase_step_y = 0; 380 HWPixelExtension left; 381 HWPixelExtension top; 382 HWPixelExtension right; 383 HWPixelExtension bottom; 384 uint32_t roi_width = 0; 385 int32_t preload_x = 0; 386 int32_t preload_y = 0; 387 uint32_t src_width = 0; 388 uint32_t src_height = 0; 389 }; 390 391 struct HWScaleData { 392 struct enable { 393 uint8_t scale = 0; 394 uint8_t direction_detection = 0; 395 uint8_t detail_enhance = 0; 396 } enable; 397 uint32_t dst_width = 0; 398 uint32_t dst_height = 0; 399 HWPlane plane[MAX_PLANES]; 400 // scale_v2_data fields 401 ScalingFilterConfig y_rgb_filter_cfg = kFilterEdgeDirected; 402 ScalingFilterConfig uv_filter_cfg = kFilterEdgeDirected; 403 HWAlphaInterpolation alpha_filter_cfg = kInterpolationPixelRepeat; 404 HWBlendingFilter blend_cfg = kBlendFilterCircular; 405 406 struct lut_flags { 407 uint8_t lut_swap = 0; 408 uint8_t lut_dir_wr = 0; 409 uint8_t lut_y_cir_wr = 0; 410 uint8_t lut_uv_cir_wr = 0; 411 uint8_t lut_y_sep_wr = 0; 412 uint8_t lut_uv_sep_wr = 0; 413 } lut_flag; 414 415 uint32_t dir_lut_idx = 0; 416 /* for Y(RGB) and UV planes*/ 417 uint32_t y_rgb_cir_lut_idx = 0; 418 uint32_t uv_cir_lut_idx = 0; 419 uint32_t y_rgb_sep_lut_idx = 0; 420 uint32_t uv_sep_lut_idx = 0; 421 422 HWDetailEnhanceData detail_enhance; 423 }; 424 425 struct HWDestScaleInfo { 426 uint32_t mixer_width = 0; 427 uint32_t mixer_height = 0; 428 bool scale_update = false; 429 HWScaleData scale_data = {}; 430 LayerRect panel_roi = {}; 431 }; 432 433 typedef std::map<uint32_t, HWDestScaleInfo *> DestScaleInfoMap; 434 435 struct HWAVRInfo { 436 bool enable = false; // Flag to Enable AVR feature 437 HWAVRModes mode = kContinuousMode; // Specifies the AVR mode 438 }; 439 440 struct HWPipeInfo { 441 HWPipeInfo *pair = NULL; 442 uint8_t rect = 255; 443 uint32_t pipe_id = 0; 444 HWSubBlockType sub_block_type = kHWSubBlockMax; 445 LayerRect src_roi; 446 LayerRect dst_roi; 447 uint8_t horizontal_decimation = 0; 448 uint8_t vertical_decimation = 0; 449 HWScaleData scale_data; 450 uint32_t z_order = 0; 451 uint8_t flags = 0; 452 bool valid = false; 453 454 void Reset() { *this = HWPipeInfo(); } 455 }; 456 457 struct HWLayerConfig { 458 HWPipeInfo left_pipe; // pipe for left side of output 459 HWPipeInfo right_pipe; // pipe for right side of output 460 HWRotatorSession hw_rotator_session; 461 float compression = 1.0f; 462 463 void Reset() { *this = HWLayerConfig(); } 464 }; 465 466 struct HWHDRLayerInfo { 467 enum HDROperation { 468 kNoOp, // No-op. 469 kSet, // Sets the HDR MetaData - Start of HDR 470 kReset, // resets the previously set HDR Metadata, End of HDR 471 }; 472 473 int32_t layer_index = -1; 474 HDROperation operation = kNoOp; 475 }; 476 477 struct HWLayersInfo { 478 LayerStack *stack = NULL; // Input layer stack. Set by the caller. 479 uint32_t app_layer_count = 0; // Total number of app layers. Must not be 0. 480 uint32_t gpu_target_index = 0; // GPU target layer index. 0 if not present. 481 482 std::vector<Layer> hw_layers = {}; // Layers which need to be programmed on the HW 483 484 uint32_t index[kMaxSDELayers] = {}; // Indexes of the layers from the layer stack which need to 485 // be programmed on hardware. 486 uint32_t roi_index[kMaxSDELayers] = {0}; // Stores the ROI index where the layers are visible. 487 488 int sync_handle = -1; // Release fence id for current draw cycle. 489 int set_idle_time_ms = -1; // Set idle time to the new specified value. 490 // -1 indicates no change in idle time since last set value. 491 492 std::vector<LayerRect> left_frame_roi = {}; // Left ROI. 493 std::vector<LayerRect> right_frame_roi = {}; // Right ROI. 494 LayerRect partial_fb_roi = {}; // Damaged area in framebuffer. 495 bool roi_split = false; // Indicates separated left and right ROI 496 bool async_cursor_updates = false; // Cursor layer allowed to have async updates 497 DestScaleInfoMap dest_scale_info_map = {}; 498 HWHDRLayerInfo hdr_layer_info = {}; 499 Handle pvt_data = NULL; // Private data used by sdm extension only. 500 }; 501 502 struct HWLayers { 503 HWLayersInfo info; 504 HWLayerConfig config[kMaxSDELayers]; 505 float output_compression = 1.0f; 506 uint64_t ab_bps = 0; 507 uint64_t ib_bps = 0; 508 uint32_t clock_hz = 0; 509 HWAVRInfo hw_avr_info = {}; 510 }; 511 512 struct HWDisplayAttributes : DisplayConfigVariableInfo { 513 bool is_device_split = false; 514 uint32_t v_front_porch = 0; //!< Vertical front porch of panel 515 uint32_t v_back_porch = 0; //!< Vertical back porch of panel 516 uint32_t v_pulse_width = 0; //!< Vertical pulse width of panel 517 uint32_t h_total = 0; //!< Total width of panel (hActive + hFP + hBP + hPulseWidth) 518 uint32_t v_total = 0; //!< Total height of panel (vActive + vFP + vBP + vPulseWidth) 519 std::bitset<32> s3d_config; //!< Stores the bit mask of S3D modes 520 521 void Reset() { *this = HWDisplayAttributes(); } 522 523 bool operator !=(const HWDisplayAttributes &display_attributes) { 524 return ((is_device_split != display_attributes.is_device_split) || 525 (x_pixels != display_attributes.x_pixels) || 526 (y_pixels != display_attributes.y_pixels) || 527 (x_dpi != display_attributes.x_dpi) || 528 (y_dpi != display_attributes.y_dpi) || 529 (fps != display_attributes.fps) || 530 (vsync_period_ns != display_attributes.vsync_period_ns) || 531 (v_front_porch != display_attributes.v_front_porch) || 532 (v_back_porch != display_attributes.v_back_porch) || 533 (v_pulse_width != display_attributes.v_pulse_width) || 534 (h_total != display_attributes.h_total) || 535 (is_yuv != display_attributes.is_yuv)); 536 } 537 538 bool operator ==(const HWDisplayAttributes &display_attributes) { 539 return !(operator !=(display_attributes)); 540 } 541 }; 542 543 struct HWMixerAttributes { 544 uint32_t width = 0; // Layer mixer width 545 uint32_t height = 0; // Layer mixer height 546 uint32_t split_left = 0; 547 LayerBufferFormat output_format = kFormatRGB101010; // Layer mixer output format 548 549 bool operator !=(const HWMixerAttributes &mixer_attributes) { 550 return ((width != mixer_attributes.width) || 551 (height != mixer_attributes.height) || 552 (output_format != mixer_attributes.output_format) || 553 (split_left != mixer_attributes.split_left)); 554 } 555 556 bool operator ==(const HWMixerAttributes &mixer_attributes) { 557 return !(operator !=(mixer_attributes)); 558 } 559 560 bool IsValid() { 561 return (width > 0 && height > 0); 562 } 563 }; 564 565 } // namespace sdm 566 567 #endif // __HW_INFO_TYPES_H__ 568 569
