1 #ifndef _MSM_MDP_EXT_H_ 2 #define _MSM_MDP_EXT_H_ 3 4 #include <linux/msm_mdp.h> 5 6 #define MDP_IOCTL_MAGIC 'S' 7 /* atomic commit ioctl used for validate and commit request */ 8 #define MSMFB_ATOMIC_COMMIT _IOWR(MDP_IOCTL_MAGIC, 128, void *) 9 10 /* 11 * Ioctl for updating the layer position asynchronously. Initially, pipes 12 * should be configured with MDP_LAYER_ASYNC flag set during the atomic commit, 13 * after which any number of position update calls can be made. This would 14 * enable multiple position updates within a single vsync. However, the screen 15 * update would happen only after vsync, which would pick the latest update. 16 * 17 * Limitations: 18 * - Currently supported only for video mode panels with single LM or dual LM 19 * with source_split enabled. 20 * - Only position update is supported with no scaling/cropping. 21 * - Async layers should have unique z_order. 22 */ 23 #define MSMFB_ASYNC_POSITION_UPDATE _IOWR(MDP_IOCTL_MAGIC, 129, \ 24 struct mdp_position_update) 25 26 /* 27 * Ioctl for sending the config information. 28 * QSEED3 coefficeint LUT tables is passed by the user space using this IOCTL. 29 */ 30 #define MSMFB_MDP_SET_CFG _IOW(MDP_IOCTL_MAGIC, 130, \ 31 struct mdp_set_cfg) 32 33 /* 34 * To allow proper structure padding for 64bit/32bit target 35 */ 36 #ifdef __LP64 37 #define MDP_LAYER_COMMIT_V1_PAD 3 38 #else 39 #define MDP_LAYER_COMMIT_V1_PAD 4 40 #endif 41 42 /********************************************************************** 43 LAYER FLAG CONFIGURATION 44 **********************************************************************/ 45 /* left-right layer flip flag */ 46 #define MDP_LAYER_FLIP_LR 0x1 47 48 /* up-down layer flip flag */ 49 #define MDP_LAYER_FLIP_UD 0x2 50 51 /* 52 * This flag enables pixel extension for the current layer. Validate/commit 53 * call uses scale parameters when this flag is enabled. 54 */ 55 #define MDP_LAYER_ENABLE_PIXEL_EXT 0x4 56 57 /* Flag indicates that layer is foreground layer */ 58 #define MDP_LAYER_FORGROUND 0x8 59 60 /* Flag indicates that layer is associated with secure session */ 61 #define MDP_LAYER_SECURE_SESSION 0x10 62 63 /* 64 * Flag indicates that layer is drawing solid fill. Validate/commit call 65 * does not expect buffer when this flag is enabled. 66 */ 67 #define MDP_LAYER_SOLID_FILL 0x20 68 69 /* Layer format is deinterlace */ 70 #define MDP_LAYER_DEINTERLACE 0x40 71 72 /* layer contains bandwidth compressed format data */ 73 #define MDP_LAYER_BWC 0x80 74 75 /* layer is async position updatable */ 76 #define MDP_LAYER_ASYNC 0x100 77 78 /* layer contains postprocessing configuration data */ 79 #define MDP_LAYER_PP 0x200 80 81 /* Flag indicates that layer is associated with secure display session */ 82 #define MDP_LAYER_SECURE_DISPLAY_SESSION 0x400 83 84 /* Flag enabled qseed3 scaling for the current layer */ 85 #define MDP_LAYER_ENABLE_QSEED3_SCALE 0x800 86 87 /********************************************************************** 88 DESTINATION SCALER FLAG CONFIGURATION 89 **********************************************************************/ 90 91 /* Enable/disable Destination scaler */ 92 #define MDP_DESTSCALER_ENABLE 0x1 93 94 /* 95 * Indicating mdp_destination_scaler_data contains 96 * Scaling parameter update. Can be set anytime. 97 */ 98 #define MDP_DESTSCALER_SCALE_UPDATE 0x2 99 100 /* 101 * Indicating mdp_destination_scaler_data contains 102 * Detail enhancement setting update. Can be set anytime. 103 */ 104 #define MDP_DESTSCALER_ENHANCER_UPDATE 0x4 105 106 /* 107 * layer will work in multirect mode, where single hardware should 108 * fetch multiple rectangles with a single hardware 109 */ 110 #define MDP_LAYER_MULTIRECT_ENABLE 0x1000 111 112 /* 113 * if flag present and multirect is enabled, multirect will work in parallel 114 * fetch mode, otherwise it will default to serial fetch mode. 115 */ 116 #define MDP_LAYER_MULTIRECT_PARALLEL_MODE 0x2000 117 118 /********************************************************************** 119 VALIDATE/COMMIT FLAG CONFIGURATION 120 **********************************************************************/ 121 122 /* 123 * Client enables it to inform that call is to validate layers before commit. 124 * If this flag is not set then driver will use MSMFB_ATOMIC_COMMIT for commit. 125 */ 126 #define MDP_VALIDATE_LAYER 0x01 127 128 /* 129 * This flag is only valid for commit call. Commit behavior is synchronous 130 * when this flag is defined. It blocks current call till processing is 131 * complete. Behavior is asynchronous otherwise. 132 */ 133 #define MDP_COMMIT_WAIT_FOR_FINISH 0x02 134 135 /* 136 * This flag is only valid for commit call and used for debugging purpose. It 137 * forces the to wait for sync fences. 138 */ 139 #define MDP_COMMIT_SYNC_FENCE_WAIT 0x04 140 141 #define MDP_COMMIT_VERSION_1_0 0x00010000 142 143 #define OUT_LAYER_COLOR_SPACE 144 145 /********************************************************************** 146 Configuration structures 147 All parameters are input to driver unless mentioned output parameter 148 explicitly. 149 **********************************************************************/ 150 struct mdp_layer_plane { 151 /* DMA buffer file descriptor information. */ 152 int fd; 153 154 /* Pixel offset in the dma buffer. */ 155 uint32_t offset; 156 157 /* Number of bytes in one scan line including padding bytes. */ 158 uint32_t stride; 159 }; 160 161 struct mdp_layer_buffer { 162 /* layer width in pixels. */ 163 uint32_t width; 164 165 /* layer height in pixels. */ 166 uint32_t height; 167 168 /* 169 * layer format in DRM-style fourcc, refer drm_fourcc.h for 170 * standard formats 171 */ 172 uint32_t format; 173 174 /* plane to hold the fd, offset, etc for all color components */ 175 struct mdp_layer_plane planes[MAX_PLANES]; 176 177 /* valid planes count in layer planes list */ 178 uint32_t plane_count; 179 180 /* compression ratio factor, value depends on the pixel format */ 181 struct mult_factor comp_ratio; 182 183 /* 184 * SyncFence associated with this buffer. It is used in two ways. 185 * 186 * 1. Driver waits to consume the buffer till producer signals in case 187 * of primary and external display. 188 * 189 * 2. Writeback device uses buffer structure for output buffer where 190 * driver is producer. However, client sends the fence with buffer to 191 * indicate that consumer is still using the buffer and it is not ready 192 * for new content. 193 */ 194 int fence; 195 196 /* 32bits reserved value for future usage. */ 197 uint32_t reserved; 198 }; 199 200 /* 201 * One layer holds configuration for one pipe. If client wants to stage single 202 * layer on two pipes then it should send two different layers with relative 203 * (x,y) information. Client must send same information during validate and 204 * commit call. Commit call may fail if client sends different layer information 205 * attached to same pipe during validate and commit. Device invalidate the pipe 206 * once it receives the vsync for that commit. 207 */ 208 struct mdp_input_layer { 209 /* 210 * Flag to enable/disable properties for layer configuration. Refer 211 * layer flag configuration section for all possible flags. 212 */ 213 uint32_t flags; 214 215 /* 216 * Pipe selection for this layer by client. Client provides the index 217 * in validate and commit call. Device reserves the pipe once validate 218 * is successful. Device only uses validated pipe during commit call. 219 * If client sends different layer/pipe configuration in validate & 220 * commit then commit may fail. 221 */ 222 uint32_t pipe_ndx; 223 224 /* 225 * Horizontal decimation value, this indicates the amount of pixels 226 * dropped for each pixel that is fetched from a line. It does not 227 * result in bandwidth reduction because pixels are still fetched from 228 * memory but dropped internally by hardware. 229 * The decimation value given should be power of two of decimation 230 * amount. 231 * 0: no decimation 232 * 1: decimate by 2 (drop 1 pixel for each pixel fetched) 233 * 2: decimate by 4 (drop 3 pixels for each pixel fetched) 234 * 3: decimate by 8 (drop 7 pixels for each pixel fetched) 235 * 4: decimate by 16 (drop 15 pixels for each pixel fetched) 236 */ 237 uint8_t horz_deci; 238 239 /* 240 * Vertical decimation value, this indicates the amount of lines 241 * dropped for each line that is fetched from overlay. It saves 242 * bandwidth because decimated pixels are not fetched. 243 * The decimation value given should be power of two of decimation 244 * amount. 245 * 0: no decimation 246 * 1: decimation by 2 (drop 1 line for each line fetched) 247 * 2: decimation by 4 (drop 3 lines for each line fetched) 248 * 3: decimation by 8 (drop 7 lines for each line fetched) 249 * 4: decimation by 16 (drop 15 lines for each line fetched) 250 */ 251 uint8_t vert_deci; 252 253 /* 254 * Used to set plane opacity. The range can be from 0-255, where 255 * 0 means completely transparent and 255 means fully opaque. 256 */ 257 uint8_t alpha; 258 259 /* 260 * Blending stage to occupy in display, if multiple layers are present, 261 * highest z_order usually means the top most visible layer. The range 262 * acceptable is from 0-7 to support blending up to 8 layers. 263 */ 264 uint16_t z_order; 265 266 /* 267 * Color used as color key for transparency. Any pixel in fetched 268 * image matching this color will be transparent when blending. 269 * The color should be in same format as the source image format. 270 */ 271 uint32_t transp_mask; 272 273 /* 274 * Solid color used to fill the overlay surface when no source 275 * buffer is provided. 276 */ 277 uint32_t bg_color; 278 279 /* blend operation defined in "mdss_mdp_blend_op" enum. */ 280 enum mdss_mdp_blend_op blend_op; 281 282 /* color space of the source */ 283 enum mdp_color_space color_space; 284 285 /* 286 * Source crop rectangle, portion of image that will be fetched. This 287 * should always be within boundaries of source image. 288 */ 289 struct mdp_rect src_rect; 290 291 /* 292 * Destination rectangle, the position and size of image on screen. 293 * This should always be within panel boundaries. 294 */ 295 struct mdp_rect dst_rect; 296 297 /* Scaling parameters. */ 298 void __user *scale; 299 300 /* Buffer attached with each layer. Device uses it for commit call. */ 301 struct mdp_layer_buffer buffer; 302 303 /* 304 * Source side post processing configuration information for each 305 * layer. 306 */ 307 void __user *pp_info; 308 309 /* 310 * This is an output parameter. 311 * 312 * Only for validate call. Frame buffer device sets error code 313 * based on validate call failure scenario. 314 */ 315 int error_code; 316 317 /* 32bits reserved value for future usage. */ 318 uint32_t reserved[6]; 319 }; 320 321 struct mdp_output_layer { 322 /* 323 * Flag to enable/disable properties for layer configuration. Refer 324 * layer flag config section for all possible flags. 325 */ 326 uint32_t flags; 327 328 /* 329 * Writeback destination selection for output. Client provides the index 330 * in validate and commit call. 331 */ 332 uint32_t writeback_ndx; 333 334 /* Buffer attached with output layer. Device uses it for commit call */ 335 struct mdp_layer_buffer buffer; 336 337 /* color space of the destination */ 338 enum mdp_color_space color_space; 339 340 /* 32bits reserved value for future usage. */ 341 uint32_t reserved[5]; 342 }; 343 344 /* 345 * Destination scaling info structure holds setup paramaters for upscaling 346 * setting in the destination scaling block. 347 */ 348 struct mdp_destination_scaler_data { 349 /* 350 * Flag to switch between mode for destination scaler. Please Refer to 351 * destination scaler flag config for all possible setting. 352 */ 353 uint32_t flags; 354 355 /* 356 * Destination scaler selection index. Client provides the index in 357 * validate and commit call. 358 */ 359 uint32_t dest_scaler_ndx; 360 361 /* 362 * LM width configuration per Destination scaling updates 363 */ 364 uint32_t lm_width; 365 366 /* 367 * LM height configuration per Destination scaling updates 368 */ 369 uint32_t lm_height; 370 371 /* 372 * The scaling parameters for all the mode except disable. For 373 * disabling the scaler, there is no need to provide the scale. 374 * A userspace pointer points to struct mdp_scale_data_v2. 375 */ 376 uint64_t __user scale; 377 }; 378 379 /* 380 * Commit structure holds layer stack send by client for validate and commit 381 * call. If layers are different between validate and commit call then commit 382 * call will also do validation. In such case, commit may fail. 383 */ 384 struct mdp_layer_commit_v1 { 385 /* 386 * Flag to enable/disable properties for commit/validate call. Refer 387 * validate/commit flag config section for all possible flags. 388 */ 389 uint32_t flags; 390 391 /* 392 * This is an output parameter. 393 * 394 * Frame buffer device provides release fence handle to client. It 395 * triggers release fence when display hardware has consumed all the 396 * buffers attached to this commit call and buffer is ready for reuse 397 * for primary and external. For writeback case, it triggers it when 398 * output buffer is ready for consumer. 399 */ 400 int release_fence; 401 402 /* 403 * Left_roi is optional configuration. Client configures it only when 404 * partial update is enabled. It defines the "region of interest" on 405 * left part of panel when it is split display. For non-split display, 406 * it defines the "region of interest" on the panel. 407 */ 408 struct mdp_rect left_roi; 409 410 /* 411 * Right_roi is optional configuration. Client configures it only when 412 * partial update is enabled. It defines the "region of interest" on 413 * right part of panel for split display configuration. It is not 414 * required for non-split display. 415 */ 416 struct mdp_rect right_roi; 417 418 /* Pointer to a list of input layers for composition. */ 419 struct mdp_input_layer __user *input_layers; 420 421 /* Input layer count present in input list */ 422 uint32_t input_layer_cnt; 423 424 /* 425 * Output layer for writeback display. It supports only one 426 * layer as output layer. This is not required for primary 427 * and external displays 428 */ 429 struct mdp_output_layer __user *output_layer; 430 431 /* 432 * This is an output parameter. 433 * 434 * Frame buffer device provides retire fence handle if 435 * COMMIT_RETIRE_FENCE flag is set in commit call. It triggers 436 * retire fence when current layers are swapped with new layers 437 * on display hardware. For video mode panel and writeback, 438 * retire fence and release fences are triggered at the same 439 * time while command mode panel triggers release fence first 440 * (on pingpong done) and retire fence (on rdptr done) 441 * after that. 442 */ 443 int retire_fence; 444 445 /* 446 * Scaler data and control for setting up destination scaler. 447 * A userspace pointer that points to a list of 448 * struct mdp_destination_scaler_data. 449 */ 450 void __user *dest_scaler; 451 452 /* 453 * Represents number of Destination scaler data provied by userspace. 454 */ 455 uint32_t dest_scaler_cnt; 456 457 /* 32-bits reserved value for future usage. */ 458 uint32_t reserved[MDP_LAYER_COMMIT_V1_PAD]; 459 }; 460 461 /* 462 * mdp_overlay_list - argument for ioctl MSMFB_ATOMIC_COMMIT 463 */ 464 struct mdp_layer_commit { 465 /* 466 * 32bit version indicates the commit structure selection 467 * from union. Lower 16bits indicates the minor version while 468 * higher 16bits indicates the major version. It selects the 469 * commit structure based on major version selection. Minor version 470 * indicates that reserved fields are in use. 471 * 472 * Current supported version is 1.0 (Major:1 Minor:0) 473 */ 474 uint32_t version; 475 union { 476 /* Layer commit/validate definition for V1 */ 477 struct mdp_layer_commit_v1 commit_v1; 478 }; 479 }; 480 481 struct mdp_point { 482 uint32_t x; 483 uint32_t y; 484 }; 485 486 /* 487 * Async updatable layers. One layer holds configuration for one pipe. 488 */ 489 struct mdp_async_layer { 490 /* 491 * Flag to enable/disable properties for layer configuration. Refer 492 * layer flag config section for all possible flags. 493 */ 494 uint32_t flags; 495 496 /* 497 * Pipe selection for this layer by client. Client provides the 498 * pipe index that the device reserved during ATOMIC_COMMIT. 499 */ 500 uint32_t pipe_ndx; 501 502 /* Source start x,y. */ 503 struct mdp_point src; 504 505 /* Destination start x,y. */ 506 struct mdp_point dst; 507 508 /* 509 * This is an output parameter. 510 * 511 * Frame buffer device sets error code based on the failure. 512 */ 513 int error_code; 514 515 uint32_t reserved[3]; 516 }; 517 518 /* 519 * mdp_position_update - argument for ioctl MSMFB_ASYNC_POSITION_UPDATE 520 */ 521 struct mdp_position_update { 522 /* Pointer to a list of async updatable input layers */ 523 struct mdp_async_layer __user *input_layers; 524 525 /* Input layer count present in input list */ 526 uint32_t input_layer_cnt; 527 }; 528 529 #define MAX_DET_CURVES 3 530 struct mdp_det_enhance_data { 531 uint32_t enable; 532 int16_t sharpen_level1; 533 int16_t sharpen_level2; 534 uint16_t clip; 535 uint16_t limit; 536 uint16_t thr_quiet; 537 uint16_t thr_dieout; 538 uint16_t thr_low; 539 uint16_t thr_high; 540 uint16_t prec_shift; 541 int16_t adjust_a[MAX_DET_CURVES]; 542 int16_t adjust_b[MAX_DET_CURVES]; 543 int16_t adjust_c[MAX_DET_CURVES]; 544 }; 545 546 /* Flags to enable Scaler and its sub components */ 547 #define ENABLE_SCALE 0x1 548 #define ENABLE_DETAIL_ENHANCE 0x2 549 #define ENABLE_DIRECTION_DETECTION 0x4 550 551 /* LUT configuration flags */ 552 #define SCALER_LUT_SWAP 0x1 553 #define SCALER_LUT_DIR_WR 0x2 554 #define SCALER_LUT_Y_CIR_WR 0x4 555 #define SCALER_LUT_UV_CIR_WR 0x8 556 #define SCALER_LUT_Y_SEP_WR 0x10 557 #define SCALER_LUT_UV_SEP_WR 0x20 558 559 /* Y/RGB and UV filter configuration */ 560 #define FILTER_EDGE_DIRECTED_2D 0x0 561 #define FILTER_CIRCULAR_2D 0x1 562 #define FILTER_SEPARABLE_1D 0x2 563 #define FILTER_BILINEAR 0x3 564 565 /* Alpha filters */ 566 #define FILTER_ALPHA_DROP_REPEAT 0x0 567 #define FILTER_ALPHA_BILINEAR 0x1 568 569 /** 570 * struct mdp_scale_data_v2 571 * Driver uses this new Data structure for storing all scaling params 572 * This structure contains all pixel extension data and QSEED3 filter 573 * configuration and coefficient table indices 574 */ 575 struct mdp_scale_data_v2 { 576 uint32_t enable; 577 578 /* Init phase values */ 579 int32_t init_phase_x[MAX_PLANES]; 580 int32_t phase_step_x[MAX_PLANES]; 581 int32_t init_phase_y[MAX_PLANES]; 582 int32_t phase_step_y[MAX_PLANES]; 583 584 /* This should be set to toal horizontal pixels 585 * left + right + width */ 586 uint32_t num_ext_pxls_left[MAX_PLANES]; 587 588 /* Unused param for backward compatibility */ 589 uint32_t num_ext_pxls_right[MAX_PLANES]; 590 591 /* This should be set to vertical pixels 592 * top + bottom + height */ 593 uint32_t num_ext_pxls_top[MAX_PLANES]; 594 595 /* Unused param for backward compatibility */ 596 uint32_t num_ext_pxls_btm[MAX_PLANES]; 597 598 /* over fetch pixels */ 599 int32_t left_ftch[MAX_PLANES]; 600 int32_t left_rpt[MAX_PLANES]; 601 int32_t right_ftch[MAX_PLANES]; 602 int32_t right_rpt[MAX_PLANES]; 603 604 /* Repeat pixels */ 605 uint32_t top_rpt[MAX_PLANES]; 606 uint32_t btm_rpt[MAX_PLANES]; 607 uint32_t top_ftch[MAX_PLANES]; 608 uint32_t btm_ftch[MAX_PLANES]; 609 610 uint32_t roi_w[MAX_PLANES]; 611 612 /* alpha plane can only be scaled using bilinear or pixel 613 * repeat/drop, specify these for Y and UV planes only */ 614 uint32_t preload_x[MAX_PLANES]; 615 uint32_t preload_y[MAX_PLANES]; 616 uint32_t src_width[MAX_PLANES]; 617 uint32_t src_height[MAX_PLANES]; 618 619 uint32_t dst_width; 620 uint32_t dst_height; 621 622 uint32_t y_rgb_filter_cfg; 623 uint32_t uv_filter_cfg; 624 uint32_t alpha_filter_cfg; 625 uint32_t blend_cfg; 626 627 uint32_t lut_flag; 628 uint32_t dir_lut_idx; 629 630 /* for Y(RGB) and UV planes*/ 631 uint32_t y_rgb_cir_lut_idx; 632 uint32_t uv_cir_lut_idx; 633 uint32_t y_rgb_sep_lut_idx; 634 uint32_t uv_sep_lut_idx; 635 636 struct mdp_det_enhance_data detail_enhance; 637 638 /* reserved value for future usage. */ 639 uint64_t reserved[8]; 640 }; 641 642 /** 643 * struct mdp_scale_luts_info 644 * This struct pointer is received as payload in SET_CFG_IOCTL when the flags 645 * is set to MDP_QSEED3_LUT_CFG 646 * @dir_lut: Direction detection coefficients table 647 * @cir_lut: Circular coefficeints table 648 * @sep_lut: Separable coefficeints table 649 * @dir_lut_size: Size of direction coefficients table 650 * @cir_lut_size: Size of circular coefficients table 651 * @sep_lut_size: Size of separable coefficients table 652 */ 653 struct mdp_scale_luts_info { 654 uint64_t __user dir_lut; 655 uint64_t __user cir_lut; 656 uint64_t __user sep_lut; 657 uint32_t dir_lut_size; 658 uint32_t cir_lut_size; 659 uint32_t sep_lut_size; 660 }; 661 662 #define MDP_QSEED3_LUT_CFG 0x1 663 664 struct mdp_set_cfg { 665 uint64_t flags; 666 uint32_t len; 667 uint64_t __user payload; 668 }; 669 #endif 670
