1 /* ===-------- intrin.h ---------------------------------------------------=== 2 * 3 * Permission is hereby granted, free of charge, to any person obtaining a copy 4 * of this software and associated documentation files (the "Software"), to deal 5 * in the Software without restriction, including without limitation the rights 6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 7 * copies of the Software, and to permit persons to whom the Software is 8 * furnished to do so, subject to the following conditions: 9 * 10 * The above copyright notice and this permission notice shall be included in 11 * all copies or substantial portions of the Software. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 19 * THE SOFTWARE. 20 * 21 *===-----------------------------------------------------------------------=== 22 */ 23 24 /* Only include this if we're compiling for the windows platform. */ 25 #ifndef _MSC_VER 26 #include_next <intrin.h> 27 #else 28 29 #ifndef __INTRIN_H 30 #define __INTRIN_H 31 32 /* First include the standard intrinsics. */ 33 #if defined(__i386__) || defined(__x86_64__) 34 #include <x86intrin.h> 35 #endif 36 37 #if defined(__arm__) 38 #include <armintr.h> 39 #endif 40 41 /* For the definition of jmp_buf. */ 42 #if __STDC_HOSTED__ 43 #include <setjmp.h> 44 #endif 45 46 /* Define the default attributes for the functions in this file. */ 47 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) 48 49 #ifdef __cplusplus 50 extern "C" { 51 #endif 52 53 #if defined(__MMX__) 54 /* And the random ones that aren't in those files. */ 55 __m64 _m_from_float(float); 56 float _m_to_float(__m64); 57 #endif 58 59 /* Other assorted instruction intrinsics. */ 60 void __addfsbyte(unsigned long, unsigned char); 61 void __addfsdword(unsigned long, unsigned long); 62 void __addfsword(unsigned long, unsigned short); 63 void __code_seg(const char *); 64 static __inline__ 65 void __cpuid(int[4], int); 66 static __inline__ 67 void __cpuidex(int[4], int, int); 68 static __inline__ 69 __int64 __emul(int, int); 70 static __inline__ 71 unsigned __int64 __emulu(unsigned int, unsigned int); 72 unsigned int __getcallerseflags(void); 73 static __inline__ 74 void __halt(void); 75 unsigned char __inbyte(unsigned short); 76 void __inbytestring(unsigned short, unsigned char *, unsigned long); 77 void __incfsbyte(unsigned long); 78 void __incfsdword(unsigned long); 79 void __incfsword(unsigned long); 80 unsigned long __indword(unsigned short); 81 void __indwordstring(unsigned short, unsigned long *, unsigned long); 82 void __invlpg(void *); 83 unsigned short __inword(unsigned short); 84 void __inwordstring(unsigned short, unsigned short *, unsigned long); 85 void __lidt(void *); 86 unsigned __int64 __ll_lshift(unsigned __int64, int); 87 __int64 __ll_rshift(__int64, int); 88 void __llwpcb(void *); 89 unsigned char __lwpins32(unsigned int, unsigned int, unsigned int); 90 void __lwpval32(unsigned int, unsigned int, unsigned int); 91 unsigned int __lzcnt(unsigned int); 92 unsigned short __lzcnt16(unsigned short); 93 static __inline__ 94 void __movsb(unsigned char *, unsigned char const *, size_t); 95 static __inline__ 96 void __movsd(unsigned long *, unsigned long const *, size_t); 97 static __inline__ 98 void __movsw(unsigned short *, unsigned short const *, size_t); 99 static __inline__ 100 void __nop(void); 101 void __nvreg_restore_fence(void); 102 void __nvreg_save_fence(void); 103 void __outbyte(unsigned short, unsigned char); 104 void __outbytestring(unsigned short, unsigned char *, unsigned long); 105 void __outdword(unsigned short, unsigned long); 106 void __outdwordstring(unsigned short, unsigned long *, unsigned long); 107 void __outword(unsigned short, unsigned short); 108 void __outwordstring(unsigned short, unsigned short *, unsigned long); 109 unsigned long __readcr0(void); 110 unsigned long __readcr2(void); 111 static __inline__ 112 unsigned long __readcr3(void); 113 unsigned long __readcr4(void); 114 unsigned long __readcr8(void); 115 unsigned int __readdr(unsigned int); 116 #ifdef __i386__ 117 static __inline__ 118 unsigned char __readfsbyte(unsigned long); 119 static __inline__ 120 unsigned __int64 __readfsqword(unsigned long); 121 static __inline__ 122 unsigned short __readfsword(unsigned long); 123 #endif 124 static __inline__ 125 unsigned __int64 __readmsr(unsigned long); 126 unsigned __int64 __readpmc(unsigned long); 127 unsigned long __segmentlimit(unsigned long); 128 void __sidt(void *); 129 void *__slwpcb(void); 130 static __inline__ 131 void __stosb(unsigned char *, unsigned char, size_t); 132 static __inline__ 133 void __stosd(unsigned long *, unsigned long, size_t); 134 static __inline__ 135 void __stosw(unsigned short *, unsigned short, size_t); 136 void __svm_clgi(void); 137 void __svm_invlpga(void *, int); 138 void __svm_skinit(int); 139 void __svm_stgi(void); 140 void __svm_vmload(size_t); 141 void __svm_vmrun(size_t); 142 void __svm_vmsave(size_t); 143 unsigned __int64 __ull_rshift(unsigned __int64, int); 144 void __vmx_off(void); 145 void __vmx_vmptrst(unsigned __int64 *); 146 void __wbinvd(void); 147 void __writecr0(unsigned int); 148 static __inline__ 149 void __writecr3(unsigned int); 150 void __writecr4(unsigned int); 151 void __writecr8(unsigned int); 152 void __writedr(unsigned int, unsigned int); 153 void __writefsbyte(unsigned long, unsigned char); 154 void __writefsdword(unsigned long, unsigned long); 155 void __writefsqword(unsigned long, unsigned __int64); 156 void __writefsword(unsigned long, unsigned short); 157 void __writemsr(unsigned long, unsigned __int64); 158 static __inline__ 159 void *_AddressOfReturnAddress(void); 160 static __inline__ 161 unsigned char _BitScanForward(unsigned long *_Index, unsigned long _Mask); 162 static __inline__ 163 unsigned char _BitScanReverse(unsigned long *_Index, unsigned long _Mask); 164 static __inline__ 165 unsigned char _bittest(long const *, long); 166 static __inline__ 167 unsigned char _bittestandcomplement(long *, long); 168 static __inline__ 169 unsigned char _bittestandreset(long *, long); 170 static __inline__ 171 unsigned char _bittestandset(long *, long); 172 void __cdecl _disable(void); 173 void __cdecl _enable(void); 174 long _InterlockedAddLargeStatistic(__int64 volatile *_Addend, long _Value); 175 unsigned char _interlockedbittestandreset(long volatile *, long); 176 unsigned char _interlockedbittestandset(long volatile *, long); 177 long _InterlockedCompareExchange_HLEAcquire(long volatile *, long, long); 178 long _InterlockedCompareExchange_HLERelease(long volatile *, long, long); 179 __int64 _InterlockedcompareExchange64_HLEAcquire(__int64 volatile *, __int64, 180 __int64); 181 __int64 _InterlockedCompareExchange64_HLERelease(__int64 volatile *, __int64, 182 __int64); 183 void *_InterlockedCompareExchangePointer_HLEAcquire(void *volatile *, void *, 184 void *); 185 void *_InterlockedCompareExchangePointer_HLERelease(void *volatile *, void *, 186 void *); 187 long _InterlockedExchangeAdd_HLEAcquire(long volatile *, long); 188 long _InterlockedExchangeAdd_HLERelease(long volatile *, long); 189 __int64 _InterlockedExchangeAdd64_HLEAcquire(__int64 volatile *, __int64); 190 __int64 _InterlockedExchangeAdd64_HLERelease(__int64 volatile *, __int64); 191 void __cdecl _invpcid(unsigned int, void *); 192 static __inline__ void 193 __attribute__((__deprecated__("use other intrinsics or C++11 atomics instead"))) 194 _ReadBarrier(void); 195 static __inline__ void 196 __attribute__((__deprecated__("use other intrinsics or C++11 atomics instead"))) 197 _ReadWriteBarrier(void); 198 unsigned int _rorx_u32(unsigned int, const unsigned int); 199 int _sarx_i32(int, unsigned int); 200 #if __STDC_HOSTED__ 201 int __cdecl _setjmp(jmp_buf); 202 #endif 203 unsigned int _shlx_u32(unsigned int, unsigned int); 204 unsigned int _shrx_u32(unsigned int, unsigned int); 205 void _Store_HLERelease(long volatile *, long); 206 void _Store64_HLERelease(__int64 volatile *, __int64); 207 void _StorePointer_HLERelease(void *volatile *, void *); 208 static __inline__ void 209 __attribute__((__deprecated__("use other intrinsics or C++11 atomics instead"))) 210 _WriteBarrier(void); 211 unsigned __int32 xbegin(void); 212 void _xend(void); 213 static __inline__ 214 #define _XCR_XFEATURE_ENABLED_MASK 0 215 unsigned __int64 __cdecl _xgetbv(unsigned int); 216 void __cdecl _xsetbv(unsigned int, unsigned __int64); 217 218 /* These additional intrinsics are turned on in x64/amd64/x86_64 mode. */ 219 #ifdef __x86_64__ 220 void __addgsbyte(unsigned long, unsigned char); 221 void __addgsdword(unsigned long, unsigned long); 222 void __addgsqword(unsigned long, unsigned __int64); 223 void __addgsword(unsigned long, unsigned short); 224 static __inline__ 225 void __faststorefence(void); 226 void __incgsbyte(unsigned long); 227 void __incgsdword(unsigned long); 228 void __incgsqword(unsigned long); 229 void __incgsword(unsigned long); 230 unsigned char __lwpins64(unsigned __int64, unsigned int, unsigned int); 231 void __lwpval64(unsigned __int64, unsigned int, unsigned int); 232 unsigned __int64 __lzcnt64(unsigned __int64); 233 static __inline__ 234 void __movsq(unsigned long long *, unsigned long long const *, size_t); 235 static __inline__ 236 unsigned char __readgsbyte(unsigned long); 237 static __inline__ 238 unsigned long __readgsdword(unsigned long); 239 static __inline__ 240 unsigned __int64 __readgsqword(unsigned long); 241 unsigned short __readgsword(unsigned long); 242 unsigned __int64 __shiftleft128(unsigned __int64 _LowPart, 243 unsigned __int64 _HighPart, 244 unsigned char _Shift); 245 unsigned __int64 __shiftright128(unsigned __int64 _LowPart, 246 unsigned __int64 _HighPart, 247 unsigned char _Shift); 248 static __inline__ 249 void __stosq(unsigned __int64 *, unsigned __int64, size_t); 250 unsigned char __vmx_on(unsigned __int64 *); 251 unsigned char __vmx_vmclear(unsigned __int64 *); 252 unsigned char __vmx_vmlaunch(void); 253 unsigned char __vmx_vmptrld(unsigned __int64 *); 254 unsigned char __vmx_vmread(size_t, size_t *); 255 unsigned char __vmx_vmresume(void); 256 unsigned char __vmx_vmwrite(size_t, size_t); 257 void __writegsbyte(unsigned long, unsigned char); 258 void __writegsdword(unsigned long, unsigned long); 259 void __writegsqword(unsigned long, unsigned __int64); 260 void __writegsword(unsigned long, unsigned short); 261 static __inline__ 262 unsigned char _BitScanForward64(unsigned long *_Index, unsigned __int64 _Mask); 263 static __inline__ 264 unsigned char _BitScanReverse64(unsigned long *_Index, unsigned __int64 _Mask); 265 static __inline__ 266 unsigned char _bittest64(__int64 const *, __int64); 267 static __inline__ 268 unsigned char _bittestandcomplement64(__int64 *, __int64); 269 static __inline__ 270 unsigned char _bittestandreset64(__int64 *, __int64); 271 static __inline__ 272 unsigned char _bittestandset64(__int64 *, __int64); 273 long _InterlockedAnd_np(long volatile *_Value, long _Mask); 274 short _InterlockedAnd16_np(short volatile *_Value, short _Mask); 275 __int64 _InterlockedAnd64_np(__int64 volatile *_Value, __int64 _Mask); 276 char _InterlockedAnd8_np(char volatile *_Value, char _Mask); 277 unsigned char _interlockedbittestandreset64(__int64 volatile *, __int64); 278 static __inline__ 279 unsigned char _interlockedbittestandset64(__int64 volatile *, __int64); 280 long _InterlockedCompareExchange_np(long volatile *_Destination, long _Exchange, 281 long _Comparand); 282 unsigned char _InterlockedCompareExchange128(__int64 volatile *_Destination, 283 __int64 _ExchangeHigh, 284 __int64 _ExchangeLow, 285 __int64 *_CompareandResult); 286 unsigned char _InterlockedCompareExchange128_np(__int64 volatile *_Destination, 287 __int64 _ExchangeHigh, 288 __int64 _ExchangeLow, 289 __int64 *_ComparandResult); 290 short _InterlockedCompareExchange16_np(short volatile *_Destination, 291 short _Exchange, short _Comparand); 292 __int64 _InterlockedCompareExchange64_HLEAcquire(__int64 volatile *, __int64, 293 __int64); 294 __int64 _InterlockedCompareExchange64_HLERelease(__int64 volatile *, __int64, 295 __int64); 296 __int64 _InterlockedCompareExchange64_np(__int64 volatile *_Destination, 297 __int64 _Exchange, __int64 _Comparand); 298 void *_InterlockedCompareExchangePointer_np(void *volatile *_Destination, 299 void *_Exchange, void *_Comparand); 300 long _InterlockedOr_np(long volatile *_Value, long _Mask); 301 short _InterlockedOr16_np(short volatile *_Value, short _Mask); 302 __int64 _InterlockedOr64_np(__int64 volatile *_Value, __int64 _Mask); 303 char _InterlockedOr8_np(char volatile *_Value, char _Mask); 304 long _InterlockedXor_np(long volatile *_Value, long _Mask); 305 short _InterlockedXor16_np(short volatile *_Value, short _Mask); 306 __int64 _InterlockedXor64_np(__int64 volatile *_Value, __int64 _Mask); 307 char _InterlockedXor8_np(char volatile *_Value, char _Mask); 308 unsigned __int64 _rorx_u64(unsigned __int64, const unsigned int); 309 __int64 _sarx_i64(__int64, unsigned int); 310 unsigned __int64 _shlx_u64(unsigned __int64, unsigned int); 311 unsigned __int64 _shrx_u64(unsigned __int64, unsigned int); 312 static __inline__ 313 __int64 __mulh(__int64, __int64); 314 static __inline__ 315 unsigned __int64 __umulh(unsigned __int64, unsigned __int64); 316 static __inline__ 317 __int64 _mul128(__int64, __int64, __int64*); 318 static __inline__ 319 unsigned __int64 _umul128(unsigned __int64, 320 unsigned __int64, 321 unsigned __int64*); 322 323 #endif /* __x86_64__ */ 324 325 #if defined(__x86_64__) || defined(__arm__) 326 327 static __inline__ 328 __int64 _InterlockedDecrement64(__int64 volatile *_Addend); 329 static __inline__ 330 __int64 _InterlockedExchange64(__int64 volatile *_Target, __int64 _Value); 331 static __inline__ 332 __int64 _InterlockedExchangeAdd64(__int64 volatile *_Addend, __int64 _Value); 333 static __inline__ 334 __int64 _InterlockedExchangeSub64(__int64 volatile *_Subend, __int64 _Value); 335 static __inline__ 336 __int64 _InterlockedIncrement64(__int64 volatile *_Addend); 337 static __inline__ 338 __int64 _InterlockedOr64(__int64 volatile *_Value, __int64 _Mask); 339 static __inline__ 340 __int64 _InterlockedXor64(__int64 volatile *_Value, __int64 _Mask); 341 static __inline__ 342 __int64 _InterlockedAnd64(__int64 volatile *_Value, __int64 _Mask); 343 344 #endif 345 346 /*----------------------------------------------------------------------------*\ 347 |* Bit Counting and Testing 348 \*----------------------------------------------------------------------------*/ 349 static __inline__ unsigned char __DEFAULT_FN_ATTRS 350 _bittest(long const *_BitBase, long _BitPos) { 351 return (*_BitBase >> _BitPos) & 1; 352 } 353 static __inline__ unsigned char __DEFAULT_FN_ATTRS 354 _bittestandcomplement(long *_BitBase, long _BitPos) { 355 unsigned char _Res = (*_BitBase >> _BitPos) & 1; 356 *_BitBase = *_BitBase ^ (1 << _BitPos); 357 return _Res; 358 } 359 static __inline__ unsigned char __DEFAULT_FN_ATTRS 360 _bittestandreset(long *_BitBase, long _BitPos) { 361 unsigned char _Res = (*_BitBase >> _BitPos) & 1; 362 *_BitBase = *_BitBase & ~(1 << _BitPos); 363 return _Res; 364 } 365 static __inline__ unsigned char __DEFAULT_FN_ATTRS 366 _bittestandset(long *_BitBase, long _BitPos) { 367 unsigned char _Res = (*_BitBase >> _BitPos) & 1; 368 *_BitBase = *_BitBase | (1 << _BitPos); 369 return _Res; 370 } 371 #if defined(__arm__) || defined(__aarch64__) 372 static __inline__ unsigned char __DEFAULT_FN_ATTRS 373 _interlockedbittestandset_acq(long volatile *_BitBase, long _BitPos) { 374 long _PrevVal = __atomic_fetch_or(_BitBase, 1l << _BitPos, __ATOMIC_ACQUIRE); 375 return (_PrevVal >> _BitPos) & 1; 376 } 377 static __inline__ unsigned char __DEFAULT_FN_ATTRS 378 _interlockedbittestandset_nf(long volatile *_BitBase, long _BitPos) { 379 long _PrevVal = __atomic_fetch_or(_BitBase, 1l << _BitPos, __ATOMIC_RELAXED); 380 return (_PrevVal >> _BitPos) & 1; 381 } 382 static __inline__ unsigned char __DEFAULT_FN_ATTRS 383 _interlockedbittestandset_rel(long volatile *_BitBase, long _BitPos) { 384 long _PrevVal = __atomic_fetch_or(_BitBase, 1l << _BitPos, __ATOMIC_RELEASE); 385 return (_PrevVal >> _BitPos) & 1; 386 } 387 #endif 388 #ifdef __x86_64__ 389 static __inline__ unsigned char __DEFAULT_FN_ATTRS 390 _bittest64(__int64 const *_BitBase, __int64 _BitPos) { 391 return (*_BitBase >> _BitPos) & 1; 392 } 393 static __inline__ unsigned char __DEFAULT_FN_ATTRS 394 _bittestandcomplement64(__int64 *_BitBase, __int64 _BitPos) { 395 unsigned char _Res = (*_BitBase >> _BitPos) & 1; 396 *_BitBase = *_BitBase ^ (1ll << _BitPos); 397 return _Res; 398 } 399 static __inline__ unsigned char __DEFAULT_FN_ATTRS 400 _bittestandreset64(__int64 *_BitBase, __int64 _BitPos) { 401 unsigned char _Res = (*_BitBase >> _BitPos) & 1; 402 *_BitBase = *_BitBase & ~(1ll << _BitPos); 403 return _Res; 404 } 405 static __inline__ unsigned char __DEFAULT_FN_ATTRS 406 _bittestandset64(__int64 *_BitBase, __int64 _BitPos) { 407 unsigned char _Res = (*_BitBase >> _BitPos) & 1; 408 *_BitBase = *_BitBase | (1ll << _BitPos); 409 return _Res; 410 } 411 static __inline__ unsigned char __DEFAULT_FN_ATTRS 412 _interlockedbittestandset64(__int64 volatile *_BitBase, __int64 _BitPos) { 413 long long _PrevVal = 414 __atomic_fetch_or(_BitBase, 1ll << _BitPos, __ATOMIC_SEQ_CST); 415 return (_PrevVal >> _BitPos) & 1; 416 } 417 #endif 418 /*----------------------------------------------------------------------------*\ 419 |* Interlocked Exchange Add 420 \*----------------------------------------------------------------------------*/ 421 #if defined(__arm__) || defined(__aarch64__) 422 static __inline__ char __DEFAULT_FN_ATTRS 423 _InterlockedExchangeAdd8_acq(char volatile *_Addend, char _Value) { 424 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_ACQUIRE); 425 } 426 static __inline__ char __DEFAULT_FN_ATTRS 427 _InterlockedExchangeAdd8_nf(char volatile *_Addend, char _Value) { 428 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_RELAXED); 429 } 430 static __inline__ char __DEFAULT_FN_ATTRS 431 _InterlockedExchangeAdd8_rel(char volatile *_Addend, char _Value) { 432 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_RELAXED); 433 } 434 static __inline__ short __DEFAULT_FN_ATTRS 435 _InterlockedExchangeAdd16_acq(short volatile *_Addend, short _Value) { 436 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_ACQUIRE); 437 } 438 static __inline__ short __DEFAULT_FN_ATTRS 439 _InterlockedExchangeAdd16_nf(short volatile *_Addend, short _Value) { 440 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_RELAXED); 441 } 442 static __inline__ short __DEFAULT_FN_ATTRS 443 _InterlockedExchangeAdd16_rel(short volatile *_Addend, short _Value) { 444 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_RELEASE); 445 } 446 static __inline__ long __DEFAULT_FN_ATTRS 447 _InterlockedExchangeAdd_acq(long volatile *_Addend, long _Value) { 448 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_ACQUIRE); 449 } 450 static __inline__ long __DEFAULT_FN_ATTRS 451 _InterlockedExchangeAdd_nf(long volatile *_Addend, long _Value) { 452 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_RELAXED); 453 } 454 static __inline__ long __DEFAULT_FN_ATTRS 455 _InterlockedExchangeAdd_rel(long volatile *_Addend, long _Value) { 456 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_RELEASE); 457 } 458 static __inline__ __int64 __DEFAULT_FN_ATTRS 459 _InterlockedExchangeAdd64_acq(__int64 volatile *_Addend, __int64 _Value) { 460 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_ACQUIRE); 461 } 462 static __inline__ __int64 __DEFAULT_FN_ATTRS 463 _InterlockedExchangeAdd64_nf(__int64 volatile *_Addend, __int64 _Value) { 464 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_RELAXED); 465 } 466 static __inline__ __int64 __DEFAULT_FN_ATTRS 467 _InterlockedExchangeAdd64_rel(__int64 volatile *_Addend, __int64 _Value) { 468 return __atomic_fetch_add(_Addend, _Value, __ATOMIC_RELEASE); 469 } 470 #endif 471 /*----------------------------------------------------------------------------*\ 472 |* Interlocked Increment 473 \*----------------------------------------------------------------------------*/ 474 #if defined(__arm__) || defined(__aarch64__) 475 static __inline__ short __DEFAULT_FN_ATTRS 476 _InterlockedIncrement16_acq(short volatile *_Value) { 477 return __atomic_add_fetch(_Value, 1, __ATOMIC_ACQUIRE); 478 } 479 static __inline__ short __DEFAULT_FN_ATTRS 480 _InterlockedIncrement16_nf(short volatile *_Value) { 481 return __atomic_add_fetch(_Value, 1, __ATOMIC_RELAXED); 482 } 483 static __inline__ short __DEFAULT_FN_ATTRS 484 _InterlockedIncrement16_rel(short volatile *_Value) { 485 return __atomic_add_fetch(_Value, 1, __ATOMIC_RELEASE); 486 } 487 static __inline__ long __DEFAULT_FN_ATTRS 488 _InterlockedIncrement_acq(long volatile *_Value) { 489 return __atomic_add_fetch(_Value, 1, __ATOMIC_ACQUIRE); 490 } 491 static __inline__ long __DEFAULT_FN_ATTRS 492 _InterlockedIncrement_nf(long volatile *_Value) { 493 return __atomic_add_fetch(_Value, 1, __ATOMIC_RELAXED); 494 } 495 static __inline__ long __DEFAULT_FN_ATTRS 496 _InterlockedIncrement_rel(long volatile *_Value) { 497 return __atomic_add_fetch(_Value, 1, __ATOMIC_RELEASE); 498 } 499 static __inline__ __int64 __DEFAULT_FN_ATTRS 500 _InterlockedIncrement64_acq(__int64 volatile *_Value) { 501 return __atomic_add_fetch(_Value, 1, __ATOMIC_ACQUIRE); 502 } 503 static __inline__ __int64 __DEFAULT_FN_ATTRS 504 _InterlockedIncrement64_nf(__int64 volatile *_Value) { 505 return __atomic_add_fetch(_Value, 1, __ATOMIC_RELAXED); 506 } 507 static __inline__ __int64 __DEFAULT_FN_ATTRS 508 _InterlockedIncrement64_rel(__int64 volatile *_Value) { 509 return __atomic_add_fetch(_Value, 1, __ATOMIC_RELEASE); 510 } 511 #endif 512 /*----------------------------------------------------------------------------*\ 513 |* Interlocked Decrement 514 \*----------------------------------------------------------------------------*/ 515 #if defined(__arm__) || defined(__aarch64__) 516 static __inline__ short __DEFAULT_FN_ATTRS 517 _InterlockedDecrement16_acq(short volatile *_Value) { 518 return __atomic_sub_fetch(_Value, 1, __ATOMIC_ACQUIRE); 519 } 520 static __inline__ short __DEFAULT_FN_ATTRS 521 _InterlockedDecrement16_nf(short volatile *_Value) { 522 return __atomic_sub_fetch(_Value, 1, __ATOMIC_RELAXED); 523 } 524 static __inline__ short __DEFAULT_FN_ATTRS 525 _InterlockedDecrement16_rel(short volatile *_Value) { 526 return __atomic_sub_fetch(_Value, 1, __ATOMIC_RELEASE); 527 } 528 static __inline__ long __DEFAULT_FN_ATTRS 529 _InterlockedDecrement_acq(long volatile *_Value) { 530 return __atomic_sub_fetch(_Value, 1, __ATOMIC_ACQUIRE); 531 } 532 static __inline__ long __DEFAULT_FN_ATTRS 533 _InterlockedDecrement_nf(long volatile *_Value) { 534 return __atomic_sub_fetch(_Value, 1, __ATOMIC_RELAXED); 535 } 536 static __inline__ long __DEFAULT_FN_ATTRS 537 _InterlockedDecrement_rel(long volatile *_Value) { 538 return __atomic_sub_fetch(_Value, 1, __ATOMIC_RELEASE); 539 } 540 static __inline__ __int64 __DEFAULT_FN_ATTRS 541 _InterlockedDecrement64_acq(__int64 volatile *_Value) { 542 return __atomic_sub_fetch(_Value, 1, __ATOMIC_ACQUIRE); 543 } 544 static __inline__ __int64 __DEFAULT_FN_ATTRS 545 _InterlockedDecrement64_nf(__int64 volatile *_Value) { 546 return __atomic_sub_fetch(_Value, 1, __ATOMIC_RELAXED); 547 } 548 static __inline__ __int64 __DEFAULT_FN_ATTRS 549 _InterlockedDecrement64_rel(__int64 volatile *_Value) { 550 return __atomic_sub_fetch(_Value, 1, __ATOMIC_RELEASE); 551 } 552 #endif 553 /*----------------------------------------------------------------------------*\ 554 |* Interlocked And 555 \*----------------------------------------------------------------------------*/ 556 #if defined(__arm__) || defined(__aarch64__) 557 static __inline__ char __DEFAULT_FN_ATTRS 558 _InterlockedAnd8_acq(char volatile *_Value, char _Mask) { 559 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_ACQUIRE); 560 } 561 static __inline__ char __DEFAULT_FN_ATTRS 562 _InterlockedAnd8_nf(char volatile *_Value, char _Mask) { 563 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_RELAXED); 564 } 565 static __inline__ char __DEFAULT_FN_ATTRS 566 _InterlockedAnd8_rel(char volatile *_Value, char _Mask) { 567 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_RELEASE); 568 } 569 static __inline__ short __DEFAULT_FN_ATTRS 570 _InterlockedAnd16_acq(short volatile *_Value, short _Mask) { 571 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_ACQUIRE); 572 } 573 static __inline__ short __DEFAULT_FN_ATTRS 574 _InterlockedAnd16_nf(short volatile *_Value, short _Mask) { 575 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_RELAXED); 576 } 577 static __inline__ short __DEFAULT_FN_ATTRS 578 _InterlockedAnd16_rel(short volatile *_Value, short _Mask) { 579 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_RELEASE); 580 } 581 static __inline__ long __DEFAULT_FN_ATTRS 582 _InterlockedAnd_acq(long volatile *_Value, long _Mask) { 583 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_ACQUIRE); 584 } 585 static __inline__ long __DEFAULT_FN_ATTRS 586 _InterlockedAnd_nf(long volatile *_Value, long _Mask) { 587 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_RELAXED); 588 } 589 static __inline__ long __DEFAULT_FN_ATTRS 590 _InterlockedAnd_rel(long volatile *_Value, long _Mask) { 591 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_RELEASE); 592 } 593 static __inline__ __int64 __DEFAULT_FN_ATTRS 594 _InterlockedAnd64_acq(__int64 volatile *_Value, __int64 _Mask) { 595 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_ACQUIRE); 596 } 597 static __inline__ __int64 __DEFAULT_FN_ATTRS 598 _InterlockedAnd64_nf(__int64 volatile *_Value, __int64 _Mask) { 599 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_RELAXED); 600 } 601 static __inline__ __int64 __DEFAULT_FN_ATTRS 602 _InterlockedAnd64_rel(__int64 volatile *_Value, __int64 _Mask) { 603 return __atomic_fetch_and(_Value, _Mask, __ATOMIC_RELEASE); 604 } 605 #endif 606 /*----------------------------------------------------------------------------*\ 607 |* Interlocked Or 608 \*----------------------------------------------------------------------------*/ 609 #if defined(__arm__) || defined(__aarch64__) 610 static __inline__ char __DEFAULT_FN_ATTRS 611 _InterlockedOr8_acq(char volatile *_Value, char _Mask) { 612 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_ACQUIRE); 613 } 614 static __inline__ char __DEFAULT_FN_ATTRS 615 _InterlockedOr8_nf(char volatile *_Value, char _Mask) { 616 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_RELAXED); 617 } 618 static __inline__ char __DEFAULT_FN_ATTRS 619 _InterlockedOr8_rel(char volatile *_Value, char _Mask) { 620 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_RELEASE); 621 } 622 static __inline__ short __DEFAULT_FN_ATTRS 623 _InterlockedOr16_acq(short volatile *_Value, short _Mask) { 624 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_ACQUIRE); 625 } 626 static __inline__ short __DEFAULT_FN_ATTRS 627 _InterlockedOr16_nf(short volatile *_Value, short _Mask) { 628 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_RELAXED); 629 } 630 static __inline__ short __DEFAULT_FN_ATTRS 631 _InterlockedOr16_rel(short volatile *_Value, short _Mask) { 632 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_RELEASE); 633 } 634 static __inline__ long __DEFAULT_FN_ATTRS 635 _InterlockedOr_acq(long volatile *_Value, long _Mask) { 636 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_ACQUIRE); 637 } 638 static __inline__ long __DEFAULT_FN_ATTRS 639 _InterlockedOr_nf(long volatile *_Value, long _Mask) { 640 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_RELAXED); 641 } 642 static __inline__ long __DEFAULT_FN_ATTRS 643 _InterlockedOr_rel(long volatile *_Value, long _Mask) { 644 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_RELEASE); 645 } 646 static __inline__ __int64 __DEFAULT_FN_ATTRS 647 _InterlockedOr64_acq(__int64 volatile *_Value, __int64 _Mask) { 648 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_ACQUIRE); 649 } 650 static __inline__ __int64 __DEFAULT_FN_ATTRS 651 _InterlockedOr64_nf(__int64 volatile *_Value, __int64 _Mask) { 652 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_RELAXED); 653 } 654 static __inline__ __int64 __DEFAULT_FN_ATTRS 655 _InterlockedOr64_rel(__int64 volatile *_Value, __int64 _Mask) { 656 return __atomic_fetch_or(_Value, _Mask, __ATOMIC_RELEASE); 657 } 658 #endif 659 /*----------------------------------------------------------------------------*\ 660 |* Interlocked Xor 661 \*----------------------------------------------------------------------------*/ 662 #if defined(__arm__) || defined(__aarch64__) 663 static __inline__ char __DEFAULT_FN_ATTRS 664 _InterlockedXor8_acq(char volatile *_Value, char _Mask) { 665 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_ACQUIRE); 666 } 667 static __inline__ char __DEFAULT_FN_ATTRS 668 _InterlockedXor8_nf(char volatile *_Value, char _Mask) { 669 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_RELAXED); 670 } 671 static __inline__ char __DEFAULT_FN_ATTRS 672 _InterlockedXor8_rel(char volatile *_Value, char _Mask) { 673 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_RELEASE); 674 } 675 static __inline__ short __DEFAULT_FN_ATTRS 676 _InterlockedXor16_acq(short volatile *_Value, short _Mask) { 677 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_ACQUIRE); 678 } 679 static __inline__ short __DEFAULT_FN_ATTRS 680 _InterlockedXor16_nf(short volatile *_Value, short _Mask) { 681 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_RELAXED); 682 } 683 static __inline__ short __DEFAULT_FN_ATTRS 684 _InterlockedXor16_rel(short volatile *_Value, short _Mask) { 685 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_RELEASE); 686 } 687 static __inline__ long __DEFAULT_FN_ATTRS 688 _InterlockedXor_acq(long volatile *_Value, long _Mask) { 689 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_ACQUIRE); 690 } 691 static __inline__ long __DEFAULT_FN_ATTRS 692 _InterlockedXor_nf(long volatile *_Value, long _Mask) { 693 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_RELAXED); 694 } 695 static __inline__ long __DEFAULT_FN_ATTRS 696 _InterlockedXor_rel(long volatile *_Value, long _Mask) { 697 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_RELEASE); 698 } 699 static __inline__ __int64 __DEFAULT_FN_ATTRS 700 _InterlockedXor64_acq(__int64 volatile *_Value, __int64 _Mask) { 701 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_ACQUIRE); 702 } 703 static __inline__ __int64 __DEFAULT_FN_ATTRS 704 _InterlockedXor64_nf(__int64 volatile *_Value, __int64 _Mask) { 705 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_RELAXED); 706 } 707 static __inline__ __int64 __DEFAULT_FN_ATTRS 708 _InterlockedXor64_rel(__int64 volatile *_Value, __int64 _Mask) { 709 return __atomic_fetch_xor(_Value, _Mask, __ATOMIC_RELEASE); 710 } 711 #endif 712 /*----------------------------------------------------------------------------*\ 713 |* Interlocked Exchange 714 \*----------------------------------------------------------------------------*/ 715 #if defined(__arm__) || defined(__aarch64__) 716 static __inline__ char __DEFAULT_FN_ATTRS 717 _InterlockedExchange8_acq(char volatile *_Target, char _Value) { 718 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_ACQUIRE); 719 return _Value; 720 } 721 static __inline__ char __DEFAULT_FN_ATTRS 722 _InterlockedExchange8_nf(char volatile *_Target, char _Value) { 723 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_RELAXED); 724 return _Value; 725 } 726 static __inline__ char __DEFAULT_FN_ATTRS 727 _InterlockedExchange8_rel(char volatile *_Target, char _Value) { 728 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_RELEASE); 729 return _Value; 730 } 731 static __inline__ short __DEFAULT_FN_ATTRS 732 _InterlockedExchange16_acq(short volatile *_Target, short _Value) { 733 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_ACQUIRE); 734 return _Value; 735 } 736 static __inline__ short __DEFAULT_FN_ATTRS 737 _InterlockedExchange16_nf(short volatile *_Target, short _Value) { 738 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_RELAXED); 739 return _Value; 740 } 741 static __inline__ short __DEFAULT_FN_ATTRS 742 _InterlockedExchange16_rel(short volatile *_Target, short _Value) { 743 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_RELEASE); 744 return _Value; 745 } 746 static __inline__ long __DEFAULT_FN_ATTRS 747 _InterlockedExchange_acq(long volatile *_Target, long _Value) { 748 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_ACQUIRE); 749 return _Value; 750 } 751 static __inline__ long __DEFAULT_FN_ATTRS 752 _InterlockedExchange_nf(long volatile *_Target, long _Value) { 753 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_RELAXED); 754 return _Value; 755 } 756 static __inline__ long __DEFAULT_FN_ATTRS 757 _InterlockedExchange_rel(long volatile *_Target, long _Value) { 758 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_RELEASE); 759 return _Value; 760 } 761 static __inline__ __int64 __DEFAULT_FN_ATTRS 762 _InterlockedExchange64_acq(__int64 volatile *_Target, __int64 _Value) { 763 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_ACQUIRE); 764 return _Value; 765 } 766 static __inline__ __int64 __DEFAULT_FN_ATTRS 767 _InterlockedExchange64_nf(__int64 volatile *_Target, __int64 _Value) { 768 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_RELAXED); 769 return _Value; 770 } 771 static __inline__ __int64 __DEFAULT_FN_ATTRS 772 _InterlockedExchange64_rel(__int64 volatile *_Target, __int64 _Value) { 773 __atomic_exchange(_Target, &_Value, &_Value, __ATOMIC_RELEASE); 774 return _Value; 775 } 776 #endif 777 /*----------------------------------------------------------------------------*\ 778 |* Interlocked Compare Exchange 779 \*----------------------------------------------------------------------------*/ 780 #if defined(__arm__) || defined(__aarch64__) 781 static __inline__ char __DEFAULT_FN_ATTRS 782 _InterlockedCompareExchange8_acq(char volatile *_Destination, 783 char _Exchange, char _Comparand) { 784 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 785 __ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE); 786 return _Comparand; 787 } 788 static __inline__ char __DEFAULT_FN_ATTRS 789 _InterlockedCompareExchange8_nf(char volatile *_Destination, 790 char _Exchange, char _Comparand) { 791 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 792 __ATOMIC_SEQ_CST, __ATOMIC_RELAXED); 793 return _Comparand; 794 } 795 static __inline__ char __DEFAULT_FN_ATTRS 796 _InterlockedCompareExchange8_rel(char volatile *_Destination, 797 char _Exchange, char _Comparand) { 798 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 799 __ATOMIC_SEQ_CST, __ATOMIC_RELEASE); 800 return _Comparand; 801 } 802 static __inline__ short __DEFAULT_FN_ATTRS 803 _InterlockedCompareExchange16_acq(short volatile *_Destination, 804 short _Exchange, short _Comparand) { 805 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 806 __ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE); 807 return _Comparand; 808 } 809 static __inline__ short __DEFAULT_FN_ATTRS 810 _InterlockedCompareExchange16_nf(short volatile *_Destination, 811 short _Exchange, short _Comparand) { 812 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 813 __ATOMIC_SEQ_CST, __ATOMIC_RELAXED); 814 return _Comparand; 815 } 816 static __inline__ short __DEFAULT_FN_ATTRS 817 _InterlockedCompareExchange16_rel(short volatile *_Destination, 818 short _Exchange, short _Comparand) { 819 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 820 __ATOMIC_SEQ_CST, __ATOMIC_RELEASE); 821 return _Comparand; 822 } 823 static __inline__ long __DEFAULT_FN_ATTRS 824 _InterlockedCompareExchange_acq(long volatile *_Destination, 825 long _Exchange, long _Comparand) { 826 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 827 __ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE); 828 return _Comparand; 829 } 830 static __inline__ long __DEFAULT_FN_ATTRS 831 _InterlockedCompareExchange_nf(long volatile *_Destination, 832 long _Exchange, long _Comparand) { 833 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 834 __ATOMIC_SEQ_CST, __ATOMIC_RELAXED); 835 return _Comparand; 836 } 837 static __inline__ short __DEFAULT_FN_ATTRS 838 _InterlockedCompareExchange_rel(long volatile *_Destination, 839 long _Exchange, long _Comparand) { 840 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 841 __ATOMIC_SEQ_CST, __ATOMIC_RELEASE); 842 return _Comparand; 843 } 844 static __inline__ __int64 __DEFAULT_FN_ATTRS 845 _InterlockedCompareExchange64_acq(__int64 volatile *_Destination, 846 __int64 _Exchange, __int64 _Comparand) { 847 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 848 __ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE); 849 return _Comparand; 850 } 851 static __inline__ __int64 __DEFAULT_FN_ATTRS 852 _InterlockedCompareExchange64_nf(__int64 volatile *_Destination, 853 __int64 _Exchange, __int64 _Comparand) { 854 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 855 __ATOMIC_SEQ_CST, __ATOMIC_RELAXED); 856 return _Comparand; 857 } 858 static __inline__ __int64 __DEFAULT_FN_ATTRS 859 _InterlockedCompareExchange64_rel(__int64 volatile *_Destination, 860 __int64 _Exchange, __int64 _Comparand) { 861 __atomic_compare_exchange(_Destination, &_Comparand, &_Exchange, 0, 862 __ATOMIC_SEQ_CST, __ATOMIC_RELEASE); 863 return _Comparand; 864 } 865 #endif 866 867 /*----------------------------------------------------------------------------*\ 868 |* movs, stos 869 \*----------------------------------------------------------------------------*/ 870 #if defined(__i386__) || defined(__x86_64__) 871 static __inline__ void __DEFAULT_FN_ATTRS 872 __movsb(unsigned char *__dst, unsigned char const *__src, size_t __n) { 873 __asm__("rep movsb" : : "D"(__dst), "S"(__src), "c"(__n)); 874 } 875 static __inline__ void __DEFAULT_FN_ATTRS 876 __movsd(unsigned long *__dst, unsigned long const *__src, size_t __n) { 877 __asm__("rep movsl" : : "D"(__dst), "S"(__src), "c"(__n)); 878 } 879 static __inline__ void __DEFAULT_FN_ATTRS 880 __movsw(unsigned short *__dst, unsigned short const *__src, size_t __n) { 881 __asm__("rep movsw" : : "D"(__dst), "S"(__src), "c"(__n)); 882 } 883 static __inline__ void __DEFAULT_FN_ATTRS 884 __stosd(unsigned long *__dst, unsigned long __x, size_t __n) { 885 __asm__("rep stosl" : : "D"(__dst), "a"(__x), "c"(__n)); 886 } 887 static __inline__ void __DEFAULT_FN_ATTRS 888 __stosw(unsigned short *__dst, unsigned short __x, size_t __n) { 889 __asm__("rep stosw" : : "D"(__dst), "a"(__x), "c"(__n)); 890 } 891 #endif 892 #ifdef __x86_64__ 893 static __inline__ void __DEFAULT_FN_ATTRS 894 __movsq(unsigned long long *__dst, unsigned long long const *__src, size_t __n) { 895 __asm__("rep movsq" : : "D"(__dst), "S"(__src), "c"(__n)); 896 } 897 static __inline__ void __DEFAULT_FN_ATTRS 898 __stosq(unsigned __int64 *__dst, unsigned __int64 __x, size_t __n) { 899 __asm__("rep stosq" : : "D"(__dst), "a"(__x), "c"(__n)); 900 } 901 #endif 902 903 /*----------------------------------------------------------------------------*\ 904 |* Misc 905 \*----------------------------------------------------------------------------*/ 906 #if defined(__i386__) || defined(__x86_64__) 907 static __inline__ void __DEFAULT_FN_ATTRS 908 __cpuid(int __info[4], int __level) { 909 __asm__ ("cpuid" : "=a"(__info[0]), "=b" (__info[1]), "=c"(__info[2]), "=d"(__info[3]) 910 : "a"(__level)); 911 } 912 static __inline__ void __DEFAULT_FN_ATTRS 913 __cpuidex(int __info[4], int __level, int __ecx) { 914 __asm__ ("cpuid" : "=a"(__info[0]), "=b" (__info[1]), "=c"(__info[2]), "=d"(__info[3]) 915 : "a"(__level), "c"(__ecx)); 916 } 917 static __inline__ unsigned __int64 __cdecl __DEFAULT_FN_ATTRS 918 _xgetbv(unsigned int __xcr_no) { 919 unsigned int __eax, __edx; 920 __asm__ ("xgetbv" : "=a" (__eax), "=d" (__edx) : "c" (__xcr_no)); 921 return ((unsigned __int64)__edx << 32) | __eax; 922 } 923 static __inline__ void __DEFAULT_FN_ATTRS 924 __halt(void) { 925 __asm__ volatile ("hlt"); 926 } 927 static __inline__ void __DEFAULT_FN_ATTRS 928 __nop(void) { 929 __asm__ volatile ("nop"); 930 } 931 #endif 932 933 /*----------------------------------------------------------------------------*\ 934 |* Privileged intrinsics 935 \*----------------------------------------------------------------------------*/ 936 #if defined(__i386__) || defined(__x86_64__) 937 static __inline__ unsigned __int64 __DEFAULT_FN_ATTRS 938 __readmsr(unsigned long __register) { 939 // Loads the contents of a 64-bit model specific register (MSR) specified in 940 // the ECX register into registers EDX:EAX. The EDX register is loaded with 941 // the high-order 32 bits of the MSR and the EAX register is loaded with the 942 // low-order 32 bits. If less than 64 bits are implemented in the MSR being 943 // read, the values returned to EDX:EAX in unimplemented bit locations are 944 // undefined. 945 unsigned long __edx; 946 unsigned long __eax; 947 __asm__ ("rdmsr" : "=d"(__edx), "=a"(__eax) : "c"(__register)); 948 return (((unsigned __int64)__edx) << 32) | (unsigned __int64)__eax; 949 } 950 951 static __inline__ unsigned long __DEFAULT_FN_ATTRS 952 __readcr3(void) { 953 unsigned long __cr3_val; 954 __asm__ __volatile__ ("mov %%cr3, %0" : "=q"(__cr3_val) : : "memory"); 955 return __cr3_val; 956 } 957 958 static __inline__ void __DEFAULT_FN_ATTRS 959 __writecr3(unsigned int __cr3_val) { 960 __asm__ ("mov %0, %%cr3" : : "q"(__cr3_val) : "memory"); 961 } 962 #endif 963 964 #ifdef __cplusplus 965 } 966 #endif 967 968 #undef __DEFAULT_FN_ATTRS 969 970 #endif /* __INTRIN_H */ 971 #endif /* _MSC_VER */ 972
