1 // Copyright 2016 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 (AddPtr x y) -> (ADD x y) 6 (Add64 x y) -> (ADD x y) 7 (Add32 x y) -> (ADD x y) 8 (Add16 x y) -> (ADD x y) 9 (Add8 x y) -> (ADD x y) 10 (Add32F x y) -> (FADDS x y) 11 (Add64F x y) -> (FADDD x y) 12 13 (SubPtr x y) -> (SUB x y) 14 (Sub64 x y) -> (SUB x y) 15 (Sub32 x y) -> (SUB x y) 16 (Sub16 x y) -> (SUB x y) 17 (Sub8 x y) -> (SUB x y) 18 (Sub32F x y) -> (FSUBS x y) 19 (Sub64F x y) -> (FSUBD x y) 20 21 (Mul64 x y) -> (MUL x y) 22 (Mul32 x y) -> (MULW x y) 23 (Mul16 x y) -> (MULW x y) 24 (Mul8 x y) -> (MULW x y) 25 (Mul32F x y) -> (FMULS x y) 26 (Mul64F x y) -> (FMULD x y) 27 28 (Hmul64 x y) -> (MULH x y) 29 (Hmul64u x y) -> (UMULH x y) 30 (Hmul32 x y) -> (SRAconst (MULL <config.fe.TypeInt64()> x y) [32]) 31 (Hmul32u x y) -> (SRAconst (UMULL <config.fe.TypeUInt64()> x y) [32]) 32 (Hmul16 x y) -> (SRAconst (MULW <config.fe.TypeInt32()> (SignExt16to32 x) (SignExt16to32 y)) [16]) 33 (Hmul16u x y) -> (SRLconst (MUL <config.fe.TypeUInt32()> (ZeroExt16to32 x) (ZeroExt16to32 y)) [16]) 34 (Hmul8 x y) -> (SRAconst (MULW <config.fe.TypeInt16()> (SignExt8to32 x) (SignExt8to32 y)) [8]) 35 (Hmul8u x y) -> (SRLconst (MUL <config.fe.TypeUInt16()> (ZeroExt8to32 x) (ZeroExt8to32 y)) [8]) 36 37 (Div64 x y) -> (DIV x y) 38 (Div64u x y) -> (UDIV x y) 39 (Div32 x y) -> (DIVW x y) 40 (Div32u x y) -> (UDIVW x y) 41 (Div16 x y) -> (DIVW (SignExt16to32 x) (SignExt16to32 y)) 42 (Div16u x y) -> (UDIVW (ZeroExt16to32 x) (ZeroExt16to32 y)) 43 (Div8 x y) -> (DIVW (SignExt8to32 x) (SignExt8to32 y)) 44 (Div8u x y) -> (UDIVW (ZeroExt8to32 x) (ZeroExt8to32 y)) 45 (Div32F x y) -> (FDIVS x y) 46 (Div64F x y) -> (FDIVD x y) 47 48 (Mod64 x y) -> (MOD x y) 49 (Mod64u x y) -> (UMOD x y) 50 (Mod32 x y) -> (MODW x y) 51 (Mod32u x y) -> (UMODW x y) 52 (Mod16 x y) -> (MODW (SignExt16to32 x) (SignExt16to32 y)) 53 (Mod16u x y) -> (UMODW (ZeroExt16to32 x) (ZeroExt16to32 y)) 54 (Mod8 x y) -> (MODW (SignExt8to32 x) (SignExt8to32 y)) 55 (Mod8u x y) -> (UMODW (ZeroExt8to32 x) (ZeroExt8to32 y)) 56 57 (Avg64u <t> x y) -> (ADD (ADD <t> (SRLconst <t> x [1]) (SRLconst <t> y [1])) (AND <t> (AND <t> x y) (MOVDconst [1]))) 58 59 (And64 x y) -> (AND x y) 60 (And32 x y) -> (AND x y) 61 (And16 x y) -> (AND x y) 62 (And8 x y) -> (AND x y) 63 64 (Or64 x y) -> (OR x y) 65 (Or32 x y) -> (OR x y) 66 (Or16 x y) -> (OR x y) 67 (Or8 x y) -> (OR x y) 68 69 (Xor64 x y) -> (XOR x y) 70 (Xor32 x y) -> (XOR x y) 71 (Xor16 x y) -> (XOR x y) 72 (Xor8 x y) -> (XOR x y) 73 74 // unary ops 75 (Neg64 x) -> (NEG x) 76 (Neg32 x) -> (NEG x) 77 (Neg16 x) -> (NEG x) 78 (Neg8 x) -> (NEG x) 79 (Neg32F x) -> (FNEGS x) 80 (Neg64F x) -> (FNEGD x) 81 82 (Com64 x) -> (MVN x) 83 (Com32 x) -> (MVN x) 84 (Com16 x) -> (MVN x) 85 (Com8 x) -> (MVN x) 86 87 (Sqrt x) -> (FSQRTD x) 88 89 (Ctz64 <t> x) -> (CLZ (RBIT <t> x)) 90 (Ctz32 <t> x) -> (CLZW (RBITW <t> x)) 91 92 (Bswap64 x) -> (REV x) 93 (Bswap32 x) -> (REVW x) 94 95 // boolean ops -- booleans are represented with 0=false, 1=true 96 (AndB x y) -> (AND x y) 97 (OrB x y) -> (OR x y) 98 (EqB x y) -> (XOR (MOVDconst [1]) (XOR <config.fe.TypeBool()> x y)) 99 (NeqB x y) -> (XOR x y) 100 (Not x) -> (XOR (MOVDconst [1]) x) 101 102 // constant shifts 103 (Lsh64x64 x (MOVDconst [c])) && uint64(c) < 64 -> (SLLconst x [c]) 104 (Rsh64x64 x (MOVDconst [c])) && uint64(c) < 64 -> (SRAconst x [c]) 105 (Rsh64Ux64 x (MOVDconst [c])) && uint64(c) < 64 -> (SRLconst x [c]) 106 (Lsh32x64 x (MOVDconst [c])) && uint64(c) < 32 -> (SLLconst x [c]) 107 (Rsh32x64 x (MOVDconst [c])) && uint64(c) < 32 -> (SRAconst (SignExt32to64 x) [c]) 108 (Rsh32Ux64 x (MOVDconst [c])) && uint64(c) < 32 -> (SRLconst (ZeroExt32to64 x) [c]) 109 (Lsh16x64 x (MOVDconst [c])) && uint64(c) < 16 -> (SLLconst x [c]) 110 (Rsh16x64 x (MOVDconst [c])) && uint64(c) < 16 -> (SRAconst (SignExt16to64 x) [c]) 111 (Rsh16Ux64 x (MOVDconst [c])) && uint64(c) < 16 -> (SRLconst (ZeroExt16to64 x) [c]) 112 (Lsh8x64 x (MOVDconst [c])) && uint64(c) < 8 -> (SLLconst x [c]) 113 (Rsh8x64 x (MOVDconst [c])) && uint64(c) < 8 -> (SRAconst (SignExt8to64 x) [c]) 114 (Rsh8Ux64 x (MOVDconst [c])) && uint64(c) < 8 -> (SRLconst (ZeroExt8to64 x) [c]) 115 116 // large constant shifts 117 (Lsh64x64 _ (MOVDconst [c])) && uint64(c) >= 64 -> (MOVDconst [0]) 118 (Rsh64Ux64 _ (MOVDconst [c])) && uint64(c) >= 64 -> (MOVDconst [0]) 119 (Lsh32x64 _ (MOVDconst [c])) && uint64(c) >= 32 -> (MOVDconst [0]) 120 (Rsh32Ux64 _ (MOVDconst [c])) && uint64(c) >= 32 -> (MOVDconst [0]) 121 (Lsh16x64 _ (MOVDconst [c])) && uint64(c) >= 16 -> (MOVDconst [0]) 122 (Rsh16Ux64 _ (MOVDconst [c])) && uint64(c) >= 16 -> (MOVDconst [0]) 123 (Lsh8x64 _ (MOVDconst [c])) && uint64(c) >= 8 -> (MOVDconst [0]) 124 (Rsh8Ux64 _ (MOVDconst [c])) && uint64(c) >= 8 -> (MOVDconst [0]) 125 126 // large constant signed right shift, we leave the sign bit 127 (Rsh64x64 x (MOVDconst [c])) && uint64(c) >= 64 -> (SRAconst x [63]) 128 (Rsh32x64 x (MOVDconst [c])) && uint64(c) >= 32 -> (SRAconst (SignExt32to64 x) [63]) 129 (Rsh16x64 x (MOVDconst [c])) && uint64(c) >= 16 -> (SRAconst (SignExt16to64 x) [63]) 130 (Rsh8x64 x (MOVDconst [c])) && uint64(c) >= 8 -> (SRAconst (SignExt8to64 x) [63]) 131 132 // shifts 133 // hardware instruction uses only the low 6 bits of the shift 134 // we compare to 64 to ensure Go semantics for large shifts 135 (Lsh64x64 <t> x y) -> (CSELULT (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y)) 136 (Lsh64x32 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 137 (Lsh64x16 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 138 (Lsh64x8 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 139 140 (Lsh32x64 <t> x y) -> (CSELULT (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y)) 141 (Lsh32x32 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 142 (Lsh32x16 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 143 (Lsh32x8 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 144 145 (Lsh16x64 <t> x y) -> (CSELULT (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y)) 146 (Lsh16x32 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 147 (Lsh16x16 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 148 (Lsh16x8 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 149 150 (Lsh8x64 <t> x y) -> (CSELULT (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y)) 151 (Lsh8x32 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 152 (Lsh8x16 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 153 (Lsh8x8 <t> x y) -> (CSELULT (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 154 155 (Rsh64Ux64 <t> x y) -> (CSELULT (SRL <t> x y) (Const64 <t> [0]) (CMPconst [64] y)) 156 (Rsh64Ux32 <t> x y) -> (CSELULT (SRL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 157 (Rsh64Ux16 <t> x y) -> (CSELULT (SRL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 158 (Rsh64Ux8 <t> x y) -> (CSELULT (SRL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 159 160 (Rsh32Ux64 <t> x y) -> (CSELULT (SRL <t> (ZeroExt32to64 x) y) (Const64 <t> [0]) (CMPconst [64] y)) 161 (Rsh32Ux32 <t> x y) -> (CSELULT (SRL <t> (ZeroExt32to64 x) (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 162 (Rsh32Ux16 <t> x y) -> (CSELULT (SRL <t> (ZeroExt32to64 x) (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 163 (Rsh32Ux8 <t> x y) -> (CSELULT (SRL <t> (ZeroExt32to64 x) (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 164 165 (Rsh16Ux64 <t> x y) -> (CSELULT (SRL <t> (ZeroExt16to64 x) y) (Const64 <t> [0]) (CMPconst [64] y)) 166 (Rsh16Ux32 <t> x y) -> (CSELULT (SRL <t> (ZeroExt16to64 x) (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 167 (Rsh16Ux16 <t> x y) -> (CSELULT (SRL <t> (ZeroExt16to64 x) (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 168 (Rsh16Ux8 <t> x y) -> (CSELULT (SRL <t> (ZeroExt16to64 x) (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 169 170 (Rsh8Ux64 <t> x y) -> (CSELULT (SRL <t> (ZeroExt8to64 x) y) (Const64 <t> [0]) (CMPconst [64] y)) 171 (Rsh8Ux32 <t> x y) -> (CSELULT (SRL <t> (ZeroExt8to64 x) (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y))) 172 (Rsh8Ux16 <t> x y) -> (CSELULT (SRL <t> (ZeroExt8to64 x) (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y))) 173 (Rsh8Ux8 <t> x y) -> (CSELULT (SRL <t> (ZeroExt8to64 x) (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y))) 174 175 (Rsh64x64 x y) -> (SRA x (CSELULT <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y))) 176 (Rsh64x32 x y) -> (SRA x (CSELULT <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y)))) 177 (Rsh64x16 x y) -> (SRA x (CSELULT <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y)))) 178 (Rsh64x8 x y) -> (SRA x (CSELULT <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y)))) 179 180 (Rsh32x64 x y) -> (SRA (SignExt32to64 x) (CSELULT <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y))) 181 (Rsh32x32 x y) -> (SRA (SignExt32to64 x) (CSELULT <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y)))) 182 (Rsh32x16 x y) -> (SRA (SignExt32to64 x) (CSELULT <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y)))) 183 (Rsh32x8 x y) -> (SRA (SignExt32to64 x) (CSELULT <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y)))) 184 185 (Rsh16x64 x y) -> (SRA (SignExt16to64 x) (CSELULT <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y))) 186 (Rsh16x32 x y) -> (SRA (SignExt16to64 x) (CSELULT <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y)))) 187 (Rsh16x16 x y) -> (SRA (SignExt16to64 x) (CSELULT <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y)))) 188 (Rsh16x8 x y) -> (SRA (SignExt16to64 x) (CSELULT <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y)))) 189 190 (Rsh8x64 x y) -> (SRA (SignExt8to64 x) (CSELULT <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y))) 191 (Rsh8x32 x y) -> (SRA (SignExt8to64 x) (CSELULT <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y)))) 192 (Rsh8x16 x y) -> (SRA (SignExt8to64 x) (CSELULT <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y)))) 193 (Rsh8x8 x y) -> (SRA (SignExt8to64 x) (CSELULT <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y)))) 194 195 (Lrot64 x [c]) -> (RORconst x [64-c&63]) 196 (Lrot32 x [c]) -> (RORWconst x [32-c&31]) 197 (Lrot16 <t> x [c]) -> (OR (SLLconst <t> x [c&15]) (SRLconst <t> (ZeroExt16to64 x) [16-c&15])) 198 (Lrot8 <t> x [c]) -> (OR (SLLconst <t> x [c&7]) (SRLconst <t> (ZeroExt8to64 x) [8-c&7])) 199 200 // constants 201 (Const64 [val]) -> (MOVDconst [val]) 202 (Const32 [val]) -> (MOVDconst [val]) 203 (Const16 [val]) -> (MOVDconst [val]) 204 (Const8 [val]) -> (MOVDconst [val]) 205 (Const32F [val]) -> (FMOVSconst [val]) 206 (Const64F [val]) -> (FMOVDconst [val]) 207 (ConstNil) -> (MOVDconst [0]) 208 (ConstBool [b]) -> (MOVDconst [b]) 209 210 (Slicemask <t> x) -> (MVN (SRAconst <t> (SUBconst <t> x [1]) [63])) 211 212 // truncations 213 // Because we ignore high parts of registers, truncates are just copies. 214 (Trunc16to8 x) -> x 215 (Trunc32to8 x) -> x 216 (Trunc32to16 x) -> x 217 (Trunc64to8 x) -> x 218 (Trunc64to16 x) -> x 219 (Trunc64to32 x) -> x 220 221 // Zero-/Sign-extensions 222 (ZeroExt8to16 x) -> (MOVBUreg x) 223 (ZeroExt8to32 x) -> (MOVBUreg x) 224 (ZeroExt16to32 x) -> (MOVHUreg x) 225 (ZeroExt8to64 x) -> (MOVBUreg x) 226 (ZeroExt16to64 x) -> (MOVHUreg x) 227 (ZeroExt32to64 x) -> (MOVWUreg x) 228 229 (SignExt8to16 x) -> (MOVBreg x) 230 (SignExt8to32 x) -> (MOVBreg x) 231 (SignExt16to32 x) -> (MOVHreg x) 232 (SignExt8to64 x) -> (MOVBreg x) 233 (SignExt16to64 x) -> (MOVHreg x) 234 (SignExt32to64 x) -> (MOVWreg x) 235 236 // float <-> int conversion 237 (Cvt32to32F x) -> (SCVTFWS x) 238 (Cvt32to64F x) -> (SCVTFWD x) 239 (Cvt64to32F x) -> (SCVTFS x) 240 (Cvt64to64F x) -> (SCVTFD x) 241 (Cvt32Uto32F x) -> (UCVTFWS x) 242 (Cvt32Uto64F x) -> (UCVTFWD x) 243 (Cvt64Uto32F x) -> (UCVTFS x) 244 (Cvt64Uto64F x) -> (UCVTFD x) 245 (Cvt32Fto32 x) -> (FCVTZSSW x) 246 (Cvt64Fto32 x) -> (FCVTZSDW x) 247 (Cvt32Fto64 x) -> (FCVTZSS x) 248 (Cvt64Fto64 x) -> (FCVTZSD x) 249 (Cvt32Fto32U x) -> (FCVTZUSW x) 250 (Cvt64Fto32U x) -> (FCVTZUDW x) 251 (Cvt32Fto64U x) -> (FCVTZUS x) 252 (Cvt64Fto64U x) -> (FCVTZUD x) 253 (Cvt32Fto64F x) -> (FCVTSD x) 254 (Cvt64Fto32F x) -> (FCVTDS x) 255 256 // comparisons 257 (Eq8 x y) -> (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 258 (Eq16 x y) -> (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 259 (Eq32 x y) -> (Equal (CMPW x y)) 260 (Eq64 x y) -> (Equal (CMP x y)) 261 (EqPtr x y) -> (Equal (CMP x y)) 262 (Eq32F x y) -> (Equal (FCMPS x y)) 263 (Eq64F x y) -> (Equal (FCMPD x y)) 264 265 (Neq8 x y) -> (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 266 (Neq16 x y) -> (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 267 (Neq32 x y) -> (NotEqual (CMPW x y)) 268 (Neq64 x y) -> (NotEqual (CMP x y)) 269 (NeqPtr x y) -> (NotEqual (CMP x y)) 270 (Neq32F x y) -> (NotEqual (FCMPS x y)) 271 (Neq64F x y) -> (NotEqual (FCMPD x y)) 272 273 (Less8 x y) -> (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y))) 274 (Less16 x y) -> (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y))) 275 (Less32 x y) -> (LessThan (CMPW x y)) 276 (Less64 x y) -> (LessThan (CMP x y)) 277 (Less32F x y) -> (GreaterThan (FCMPS y x)) // reverse operands to work around NaN 278 (Less64F x y) -> (GreaterThan (FCMPD y x)) // reverse operands to work around NaN 279 280 (Less8U x y) -> (LessThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 281 (Less16U x y) -> (LessThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 282 (Less32U x y) -> (LessThanU (CMPW x y)) 283 (Less64U x y) -> (LessThanU (CMP x y)) 284 285 (Leq8 x y) -> (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y))) 286 (Leq16 x y) -> (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y))) 287 (Leq32 x y) -> (LessEqual (CMPW x y)) 288 (Leq64 x y) -> (LessEqual (CMP x y)) 289 (Leq32F x y) -> (GreaterEqual (FCMPS y x)) // reverse operands to work around NaN 290 (Leq64F x y) -> (GreaterEqual (FCMPD y x)) // reverse operands to work around NaN 291 292 (Leq8U x y) -> (LessEqualU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 293 (Leq16U x y) -> (LessEqualU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 294 (Leq32U x y) -> (LessEqualU (CMPW x y)) 295 (Leq64U x y) -> (LessEqualU (CMP x y)) 296 297 (Greater8 x y) -> (GreaterThan (CMPW (SignExt8to32 x) (SignExt8to32 y))) 298 (Greater16 x y) -> (GreaterThan (CMPW (SignExt16to32 x) (SignExt16to32 y))) 299 (Greater32 x y) -> (GreaterThan (CMPW x y)) 300 (Greater64 x y) -> (GreaterThan (CMP x y)) 301 (Greater32F x y) -> (GreaterThan (FCMPS x y)) 302 (Greater64F x y) -> (GreaterThan (FCMPD x y)) 303 304 (Greater8U x y) -> (GreaterThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 305 (Greater16U x y) -> (GreaterThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 306 (Greater32U x y) -> (GreaterThanU (CMPW x y)) 307 (Greater64U x y) -> (GreaterThanU (CMP x y)) 308 309 (Geq8 x y) -> (GreaterEqual (CMPW (SignExt8to32 x) (SignExt8to32 y))) 310 (Geq16 x y) -> (GreaterEqual (CMPW (SignExt16to32 x) (SignExt16to32 y))) 311 (Geq32 x y) -> (GreaterEqual (CMPW x y)) 312 (Geq64 x y) -> (GreaterEqual (CMP x y)) 313 (Geq32F x y) -> (GreaterEqual (FCMPS x y)) 314 (Geq64F x y) -> (GreaterEqual (FCMPD x y)) 315 316 (Geq8U x y) -> (GreaterEqualU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y))) 317 (Geq16U x y) -> (GreaterEqualU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y))) 318 (Geq32U x y) -> (GreaterEqualU (CMPW x y)) 319 (Geq64U x y) -> (GreaterEqualU (CMP x y)) 320 321 (OffPtr [off] ptr:(SP)) -> (MOVDaddr [off] ptr) 322 (OffPtr [off] ptr) -> (ADDconst [off] ptr) 323 324 (Addr {sym} base) -> (MOVDaddr {sym} base) 325 326 // loads 327 (Load <t> ptr mem) && t.IsBoolean() -> (MOVBUload ptr mem) 328 (Load <t> ptr mem) && (is8BitInt(t) && isSigned(t)) -> (MOVBload ptr mem) 329 (Load <t> ptr mem) && (is8BitInt(t) && !isSigned(t)) -> (MOVBUload ptr mem) 330 (Load <t> ptr mem) && (is16BitInt(t) && isSigned(t)) -> (MOVHload ptr mem) 331 (Load <t> ptr mem) && (is16BitInt(t) && !isSigned(t)) -> (MOVHUload ptr mem) 332 (Load <t> ptr mem) && (is32BitInt(t) && isSigned(t)) -> (MOVWload ptr mem) 333 (Load <t> ptr mem) && (is32BitInt(t) && !isSigned(t)) -> (MOVWUload ptr mem) 334 (Load <t> ptr mem) && (is64BitInt(t) || isPtr(t)) -> (MOVDload ptr mem) 335 (Load <t> ptr mem) && is32BitFloat(t) -> (FMOVSload ptr mem) 336 (Load <t> ptr mem) && is64BitFloat(t) -> (FMOVDload ptr mem) 337 338 // stores 339 (Store [1] ptr val mem) -> (MOVBstore ptr val mem) 340 (Store [2] ptr val mem) -> (MOVHstore ptr val mem) 341 (Store [4] ptr val mem) && !is32BitFloat(val.Type) -> (MOVWstore ptr val mem) 342 (Store [8] ptr val mem) && !is64BitFloat(val.Type) -> (MOVDstore ptr val mem) 343 (Store [4] ptr val mem) && is32BitFloat(val.Type) -> (FMOVSstore ptr val mem) 344 (Store [8] ptr val mem) && is64BitFloat(val.Type) -> (FMOVDstore ptr val mem) 345 346 // zeroing 347 (Zero [s] _ mem) && SizeAndAlign(s).Size() == 0 -> mem 348 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 1 -> (MOVBstore ptr (MOVDconst [0]) mem) 349 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 2 -> (MOVHstore ptr (MOVDconst [0]) mem) 350 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 4 -> (MOVWstore ptr (MOVDconst [0]) mem) 351 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 8 -> (MOVDstore ptr (MOVDconst [0]) mem) 352 353 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 3 -> 354 (MOVBstore [2] ptr (MOVDconst [0]) 355 (MOVHstore ptr (MOVDconst [0]) mem)) 356 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 5 -> 357 (MOVBstore [4] ptr (MOVDconst [0]) 358 (MOVWstore ptr (MOVDconst [0]) mem)) 359 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 6 -> 360 (MOVHstore [4] ptr (MOVDconst [0]) 361 (MOVWstore ptr (MOVDconst [0]) mem)) 362 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 7 -> 363 (MOVBstore [6] ptr (MOVDconst [0]) 364 (MOVHstore [4] ptr (MOVDconst [0]) 365 (MOVWstore ptr (MOVDconst [0]) mem))) 366 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 12 -> 367 (MOVWstore [8] ptr (MOVDconst [0]) 368 (MOVDstore ptr (MOVDconst [0]) mem)) 369 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 16 -> 370 (MOVDstore [8] ptr (MOVDconst [0]) 371 (MOVDstore ptr (MOVDconst [0]) mem)) 372 (Zero [s] ptr mem) && SizeAndAlign(s).Size() == 24 -> 373 (MOVDstore [16] ptr (MOVDconst [0]) 374 (MOVDstore [8] ptr (MOVDconst [0]) 375 (MOVDstore ptr (MOVDconst [0]) mem))) 376 377 // strip off fractional word zeroing 378 (Zero [s] ptr mem) && SizeAndAlign(s).Size()%8 != 0 && SizeAndAlign(s).Size() > 8 -> 379 (Zero [MakeSizeAndAlign(SizeAndAlign(s).Size()%8, 1).Int64()] 380 (OffPtr <ptr.Type> ptr [SizeAndAlign(s).Size()-SizeAndAlign(s).Size()%8]) 381 (Zero [MakeSizeAndAlign(SizeAndAlign(s).Size()-SizeAndAlign(s).Size()%8, 1).Int64()] ptr mem)) 382 383 // medium zeroing uses a duff device 384 // 4, 8, and 128 are magic constants, see runtime/mkduff.go 385 (Zero [s] ptr mem) 386 && SizeAndAlign(s).Size()%8 == 0 && SizeAndAlign(s).Size() > 24 && SizeAndAlign(s).Size() <= 8*128 387 && !config.noDuffDevice -> 388 (DUFFZERO [4 * (128 - int64(SizeAndAlign(s).Size()/8))] ptr mem) 389 390 // large zeroing uses a loop 391 (Zero [s] ptr mem) 392 && SizeAndAlign(s).Size()%8 == 0 && (SizeAndAlign(s).Size() > 8*128 || config.noDuffDevice) -> 393 (LoweredZero 394 ptr 395 (ADDconst <ptr.Type> [SizeAndAlign(s).Size()-moveSize(SizeAndAlign(s).Align(), config)] ptr) 396 mem) 397 398 // moves 399 (Move [s] _ _ mem) && SizeAndAlign(s).Size() == 0 -> mem 400 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 1 -> (MOVBstore dst (MOVBUload src mem) mem) 401 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 2 -> (MOVHstore dst (MOVHUload src mem) mem) 402 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 4 -> (MOVWstore dst (MOVWUload src mem) mem) 403 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 8 -> (MOVDstore dst (MOVDload src mem) mem) 404 405 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 3 -> 406 (MOVBstore [2] dst (MOVBUload [2] src mem) 407 (MOVHstore dst (MOVHUload src mem) mem)) 408 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 5 -> 409 (MOVBstore [4] dst (MOVBUload [4] src mem) 410 (MOVWstore dst (MOVWUload src mem) mem)) 411 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 6 -> 412 (MOVHstore [4] dst (MOVHUload [4] src mem) 413 (MOVWstore dst (MOVWUload src mem) mem)) 414 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 7 -> 415 (MOVBstore [6] dst (MOVBUload [6] src mem) 416 (MOVHstore [4] dst (MOVHUload [4] src mem) 417 (MOVWstore dst (MOVWUload src mem) mem))) 418 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 12 -> 419 (MOVWstore [8] dst (MOVWUload [8] src mem) 420 (MOVDstore dst (MOVDload src mem) mem)) 421 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 16 -> 422 (MOVDstore [8] dst (MOVDload [8] src mem) 423 (MOVDstore dst (MOVDload src mem) mem)) 424 (Move [s] dst src mem) && SizeAndAlign(s).Size() == 24 -> 425 (MOVDstore [16] dst (MOVDload [16] src mem) 426 (MOVDstore [8] dst (MOVDload [8] src mem) 427 (MOVDstore dst (MOVDload src mem) mem))) 428 429 // strip off fractional word move 430 (Move [s] dst src mem) && SizeAndAlign(s).Size()%8 != 0 && SizeAndAlign(s).Size() > 8 -> 431 (Move [MakeSizeAndAlign(SizeAndAlign(s).Size()%8, 1).Int64()] 432 (OffPtr <dst.Type> dst [SizeAndAlign(s).Size()-SizeAndAlign(s).Size()%8]) 433 (OffPtr <src.Type> src [SizeAndAlign(s).Size()-SizeAndAlign(s).Size()%8]) 434 (Move [MakeSizeAndAlign(SizeAndAlign(s).Size()-SizeAndAlign(s).Size()%8, 1).Int64()] dst src mem)) 435 436 // medium move uses a duff device 437 // 8 and 128 are magic constants, see runtime/mkduff.go 438 (Move [s] dst src mem) 439 && SizeAndAlign(s).Size()%8 == 0 && SizeAndAlign(s).Size() > 24 && SizeAndAlign(s).Size() <= 8*128 440 && !config.noDuffDevice -> 441 (DUFFCOPY [8 * (128 - int64(SizeAndAlign(s).Size()/8))] dst src mem) 442 443 // large move uses a loop 444 (Move [s] dst src mem) 445 && SizeAndAlign(s).Size() > 24 && SizeAndAlign(s).Size()%8 == 0 -> 446 (LoweredMove 447 dst 448 src 449 (ADDconst <src.Type> src [SizeAndAlign(s).Size()-moveSize(SizeAndAlign(s).Align(), config)]) 450 mem) 451 452 // calls 453 (StaticCall [argwid] {target} mem) -> (CALLstatic [argwid] {target} mem) 454 (ClosureCall [argwid] entry closure mem) -> (CALLclosure [argwid] entry closure mem) 455 (DeferCall [argwid] mem) -> (CALLdefer [argwid] mem) 456 (GoCall [argwid] mem) -> (CALLgo [argwid] mem) 457 (InterCall [argwid] entry mem) -> (CALLinter [argwid] entry mem) 458 459 // checks 460 (NilCheck ptr mem) -> (LoweredNilCheck ptr mem) 461 (IsNonNil ptr) -> (NotEqual (CMPconst [0] ptr)) 462 (IsInBounds idx len) -> (LessThanU (CMP idx len)) 463 (IsSliceInBounds idx len) -> (LessEqualU (CMP idx len)) 464 465 // pseudo-ops 466 (GetClosurePtr) -> (LoweredGetClosurePtr) 467 (Convert x mem) -> (MOVDconvert x mem) 468 469 // Absorb pseudo-ops into blocks. 470 (If (Equal cc) yes no) -> (EQ cc yes no) 471 (If (NotEqual cc) yes no) -> (NE cc yes no) 472 (If (LessThan cc) yes no) -> (LT cc yes no) 473 (If (LessThanU cc) yes no) -> (ULT cc yes no) 474 (If (LessEqual cc) yes no) -> (LE cc yes no) 475 (If (LessEqualU cc) yes no) -> (ULE cc yes no) 476 (If (GreaterThan cc) yes no) -> (GT cc yes no) 477 (If (GreaterThanU cc) yes no) -> (UGT cc yes no) 478 (If (GreaterEqual cc) yes no) -> (GE cc yes no) 479 (If (GreaterEqualU cc) yes no) -> (UGE cc yes no) 480 481 (If cond yes no) -> (NZ cond yes no) 482 483 // atomic intrinsics 484 // Note: these ops do not accept offset. 485 (AtomicLoad32 ptr mem) -> (LDARW ptr mem) 486 (AtomicLoad64 ptr mem) -> (LDAR ptr mem) 487 (AtomicLoadPtr ptr mem) -> (LDAR ptr mem) 488 489 (AtomicStore32 ptr val mem) -> (STLRW ptr val mem) 490 (AtomicStore64 ptr val mem) -> (STLR ptr val mem) 491 (AtomicStorePtrNoWB ptr val mem) -> (STLR ptr val mem) 492 493 (AtomicExchange32 ptr val mem) -> (LoweredAtomicExchange32 ptr val mem) 494 (AtomicExchange64 ptr val mem) -> (LoweredAtomicExchange64 ptr val mem) 495 496 (AtomicAdd32 ptr val mem) -> (LoweredAtomicAdd32 ptr val mem) 497 (AtomicAdd64 ptr val mem) -> (LoweredAtomicAdd64 ptr val mem) 498 499 (AtomicCompareAndSwap32 ptr old new_ mem) -> (LoweredAtomicCas32 ptr old new_ mem) 500 (AtomicCompareAndSwap64 ptr old new_ mem) -> (LoweredAtomicCas64 ptr old new_ mem) 501 502 (AtomicAnd8 ptr val mem) -> (LoweredAtomicAnd8 ptr val mem) 503 (AtomicOr8 ptr val mem) -> (LoweredAtomicOr8 ptr val mem) 504 505 // Optimizations 506 507 // Absorb boolean tests into block 508 (NZ (Equal cc) yes no) -> (EQ cc yes no) 509 (NZ (NotEqual cc) yes no) -> (NE cc yes no) 510 (NZ (LessThan cc) yes no) -> (LT cc yes no) 511 (NZ (LessThanU cc) yes no) -> (ULT cc yes no) 512 (NZ (LessEqual cc) yes no) -> (LE cc yes no) 513 (NZ (LessEqualU cc) yes no) -> (ULE cc yes no) 514 (NZ (GreaterThan cc) yes no) -> (GT cc yes no) 515 (NZ (GreaterThanU cc) yes no) -> (UGT cc yes no) 516 (NZ (GreaterEqual cc) yes no) -> (GE cc yes no) 517 (NZ (GreaterEqualU cc) yes no) -> (UGE cc yes no) 518 519 (EQ (CMPconst [0] x) yes no) -> (Z x yes no) 520 (NE (CMPconst [0] x) yes no) -> (NZ x yes no) 521 (EQ (CMPWconst [0] x) yes no) -> (ZW x yes no) 522 (NE (CMPWconst [0] x) yes no) -> (NZW x yes no) 523 524 // fold offset into address 525 (ADDconst [off1] (MOVDaddr [off2] {sym} ptr)) -> (MOVDaddr [off1+off2] {sym} ptr) 526 527 // fold address into load/store 528 // only small offset (between -256 and 256) or offset that is a multiple of data size 529 // can be encoded in the instructions 530 // since this rewriting takes place before stack allocation, the offset to SP is unknown, 531 // so don't do it for args and locals with unaligned offset 532 (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) && is32Bit(off1+off2) -> 533 (MOVBload [off1+off2] {sym} ptr mem) 534 (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem) && is32Bit(off1+off2) -> 535 (MOVBUload [off1+off2] {sym} ptr mem) 536 (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) 537 && is32Bit(off1+off2) 538 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 539 (MOVHload [off1+off2] {sym} ptr mem) 540 (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem) 541 && is32Bit(off1+off2) 542 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 543 (MOVHUload [off1+off2] {sym} ptr mem) 544 (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) 545 && is32Bit(off1+off2) 546 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 547 (MOVWload [off1+off2] {sym} ptr mem) 548 (MOVWUload [off1] {sym} (ADDconst [off2] ptr) mem) 549 && is32Bit(off1+off2) 550 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 551 (MOVWUload [off1+off2] {sym} ptr mem) 552 (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 553 && is32Bit(off1+off2) 554 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 555 (MOVDload [off1+off2] {sym} ptr mem) 556 (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem) 557 && is32Bit(off1+off2) 558 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 559 (FMOVSload [off1+off2] {sym} ptr mem) 560 (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 561 && is32Bit(off1+off2) 562 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 563 (FMOVDload [off1+off2] {sym} ptr mem) 564 565 (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) && is32Bit(off1+off2) -> 566 (MOVBstore [off1+off2] {sym} ptr val mem) 567 (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) 568 && is32Bit(off1+off2) 569 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 570 (MOVHstore [off1+off2] {sym} ptr val mem) 571 (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) 572 && is32Bit(off1+off2) 573 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 574 (MOVWstore [off1+off2] {sym} ptr val mem) 575 (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 576 && is32Bit(off1+off2) 577 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 578 (MOVDstore [off1+off2] {sym} ptr val mem) 579 (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem) 580 && is32Bit(off1+off2) 581 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 582 (FMOVSstore [off1+off2] {sym} ptr val mem) 583 (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 584 && is32Bit(off1+off2) 585 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 586 (FMOVDstore [off1+off2] {sym} ptr val mem) 587 (MOVBstorezero [off1] {sym} (ADDconst [off2] ptr) mem) && is32Bit(off1+off2) -> 588 (MOVBstorezero [off1+off2] {sym} ptr mem) 589 (MOVHstorezero [off1] {sym} (ADDconst [off2] ptr) mem) 590 && is32Bit(off1+off2) 591 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 592 (MOVHstorezero [off1+off2] {sym} ptr mem) 593 (MOVWstorezero [off1] {sym} (ADDconst [off2] ptr) mem) 594 && is32Bit(off1+off2) 595 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 596 (MOVWstorezero [off1+off2] {sym} ptr mem) 597 (MOVDstorezero [off1] {sym} (ADDconst [off2] ptr) mem) 598 && is32Bit(off1+off2) 599 && ((off1+off2)%2==8 || off1+off2<256 && off1+off2>-256 && !isArg(sym) && !isAuto(sym)) -> 600 (MOVDstorezero [off1+off2] {sym} ptr mem) 601 602 (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 603 && is32Bit(off1+off2) -> 604 (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 605 (MOVBUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 606 && is32Bit(off1+off2) -> 607 (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 608 (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 609 && is32Bit(off1+off2) 610 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 611 (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 612 (MOVHUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 613 && is32Bit(off1+off2) 614 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 615 (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 616 (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 617 && is32Bit(off1+off2) 618 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 619 (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 620 (MOVWUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 621 && is32Bit(off1+off2) 622 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 623 (MOVWUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 624 (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 625 && is32Bit(off1+off2) 626 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 627 (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 628 (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 629 && is32Bit(off1+off2) 630 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 631 (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 632 (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 633 && is32Bit(off1+off2) 634 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 635 (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 636 637 (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 638 && is32Bit(off1+off2) -> 639 (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 640 (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 641 && is32Bit(off1+off2) 642 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 643 (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 644 (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 645 && is32Bit(off1+off2) 646 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 647 (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 648 (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 649 && is32Bit(off1+off2) 650 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 651 (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 652 (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 653 && is32Bit(off1+off2) 654 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 655 (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 656 (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem) && canMergeSym(sym1,sym2) 657 && is32Bit(off1+off2) 658 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 659 (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem) 660 (MOVBstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 661 && is32Bit(off1+off2) -> 662 (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 663 (MOVHstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 664 && is32Bit(off1+off2) 665 && ((off1+off2)%2==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 666 (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 667 (MOVWstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 668 && is32Bit(off1+off2) 669 && ((off1+off2)%4==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 670 (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 671 (MOVDstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem) && canMergeSym(sym1,sym2) 672 && is32Bit(off1+off2) 673 && ((off1+off2)%8==0 || off1+off2<256 && off1+off2>-256 && !isArg(sym1) && !isAuto(sym1)) -> 674 (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem) 675 676 // store zero 677 (MOVBstore [off] {sym} ptr (MOVDconst [0]) mem) -> (MOVBstorezero [off] {sym} ptr mem) 678 (MOVHstore [off] {sym} ptr (MOVDconst [0]) mem) -> (MOVHstorezero [off] {sym} ptr mem) 679 (MOVWstore [off] {sym} ptr (MOVDconst [0]) mem) -> (MOVWstorezero [off] {sym} ptr mem) 680 (MOVDstore [off] {sym} ptr (MOVDconst [0]) mem) -> (MOVDstorezero [off] {sym} ptr mem) 681 682 // replace load from same location as preceding store with copy 683 // these seem to have bad interaction with other rules, resulting in slower code 684 //(MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 685 //(MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 686 //(MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 687 //(MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 688 //(MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 689 //(MOVWUload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 690 //(MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 691 //(FMOVSload [off] {sym} ptr (FMOVSstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 692 //(FMOVDload [off] {sym} ptr (FMOVDstore [off2] {sym2} ptr2 x _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> x 693 694 (MOVBload [off] {sym} ptr (MOVBstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 695 (MOVBUload [off] {sym} ptr (MOVBstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 696 (MOVHload [off] {sym} ptr (MOVHstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 697 (MOVHUload [off] {sym} ptr (MOVHstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 698 (MOVWload [off] {sym} ptr (MOVWstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 699 (MOVWUload [off] {sym} ptr (MOVWstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 700 (MOVDload [off] {sym} ptr (MOVDstorezero [off2] {sym2} ptr2 _)) && sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) -> (MOVDconst [0]) 701 702 // don't extend after proper load 703 (MOVBreg x:(MOVBload _ _)) -> (MOVDreg x) 704 (MOVBUreg x:(MOVBUload _ _)) -> (MOVDreg x) 705 (MOVHreg x:(MOVBload _ _)) -> (MOVDreg x) 706 (MOVHreg x:(MOVBUload _ _)) -> (MOVDreg x) 707 (MOVHreg x:(MOVHload _ _)) -> (MOVDreg x) 708 (MOVHUreg x:(MOVBUload _ _)) -> (MOVDreg x) 709 (MOVHUreg x:(MOVHUload _ _)) -> (MOVDreg x) 710 (MOVWreg x:(MOVBload _ _)) -> (MOVDreg x) 711 (MOVWreg x:(MOVBUload _ _)) -> (MOVDreg x) 712 (MOVWreg x:(MOVHload _ _)) -> (MOVDreg x) 713 (MOVWreg x:(MOVHUload _ _)) -> (MOVDreg x) 714 (MOVWreg x:(MOVWload _ _)) -> (MOVDreg x) 715 (MOVWUreg x:(MOVBUload _ _)) -> (MOVDreg x) 716 (MOVWUreg x:(MOVHUload _ _)) -> (MOVDreg x) 717 (MOVWUreg x:(MOVWUload _ _)) -> (MOVDreg x) 718 719 // fold double extensions 720 (MOVBreg x:(MOVBreg _)) -> (MOVDreg x) 721 (MOVBUreg x:(MOVBUreg _)) -> (MOVDreg x) 722 (MOVHreg x:(MOVBreg _)) -> (MOVDreg x) 723 (MOVHreg x:(MOVBUreg _)) -> (MOVDreg x) 724 (MOVHreg x:(MOVHreg _)) -> (MOVDreg x) 725 (MOVHUreg x:(MOVBUreg _)) -> (MOVDreg x) 726 (MOVHUreg x:(MOVHUreg _)) -> (MOVDreg x) 727 (MOVWreg x:(MOVBreg _)) -> (MOVDreg x) 728 (MOVWreg x:(MOVBUreg _)) -> (MOVDreg x) 729 (MOVWreg x:(MOVHreg _)) -> (MOVDreg x) 730 (MOVWreg x:(MOVHreg _)) -> (MOVDreg x) 731 (MOVWreg x:(MOVWreg _)) -> (MOVDreg x) 732 (MOVWUreg x:(MOVBUreg _)) -> (MOVDreg x) 733 (MOVWUreg x:(MOVHUreg _)) -> (MOVDreg x) 734 (MOVWUreg x:(MOVWUreg _)) -> (MOVDreg x) 735 736 // don't extend before store 737 (MOVBstore [off] {sym} ptr (MOVBreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 738 (MOVBstore [off] {sym} ptr (MOVBUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 739 (MOVBstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 740 (MOVBstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 741 (MOVBstore [off] {sym} ptr (MOVWreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 742 (MOVBstore [off] {sym} ptr (MOVWUreg x) mem) -> (MOVBstore [off] {sym} ptr x mem) 743 (MOVHstore [off] {sym} ptr (MOVHreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 744 (MOVHstore [off] {sym} ptr (MOVHUreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 745 (MOVHstore [off] {sym} ptr (MOVWreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 746 (MOVHstore [off] {sym} ptr (MOVWUreg x) mem) -> (MOVHstore [off] {sym} ptr x mem) 747 (MOVWstore [off] {sym} ptr (MOVWreg x) mem) -> (MOVWstore [off] {sym} ptr x mem) 748 (MOVWstore [off] {sym} ptr (MOVWUreg x) mem) -> (MOVWstore [off] {sym} ptr x mem) 749 750 // if a register move has only 1 use, just use the same register without emitting instruction 751 // MOVDnop doesn't emit instruction, only for ensuring the type. 752 (MOVDreg x) && x.Uses == 1 -> (MOVDnop x) 753 754 // fold constant into arithmatic ops 755 (ADD (MOVDconst [c]) x) -> (ADDconst [c] x) 756 (ADD x (MOVDconst [c])) -> (ADDconst [c] x) 757 (SUB x (MOVDconst [c])) -> (SUBconst [c] x) 758 (AND (MOVDconst [c]) x) -> (ANDconst [c] x) 759 (AND x (MOVDconst [c])) -> (ANDconst [c] x) 760 (OR (MOVDconst [c]) x) -> (ORconst [c] x) 761 (OR x (MOVDconst [c])) -> (ORconst [c] x) 762 (XOR (MOVDconst [c]) x) -> (XORconst [c] x) 763 (XOR x (MOVDconst [c])) -> (XORconst [c] x) 764 (BIC x (MOVDconst [c])) -> (BICconst [c] x) 765 766 (SLL x (MOVDconst [c])) -> (SLLconst x [c&63]) // Note: I don't think we ever generate bad constant shifts (i.e. c>=64) 767 (SRL x (MOVDconst [c])) -> (SRLconst x [c&63]) 768 (SRA x (MOVDconst [c])) -> (SRAconst x [c&63]) 769 770 (CMP x (MOVDconst [c])) -> (CMPconst [c] x) 771 (CMP (MOVDconst [c]) x) -> (InvertFlags (CMPconst [c] x)) 772 (CMPW x (MOVDconst [c])) -> (CMPWconst [int64(int32(c))] x) 773 (CMPW (MOVDconst [c]) x) -> (InvertFlags (CMPWconst [int64(int32(c))] x)) 774 775 // mul by constant 776 (MUL x (MOVDconst [-1])) -> (NEG x) 777 (MUL _ (MOVDconst [0])) -> (MOVDconst [0]) 778 (MUL x (MOVDconst [1])) -> x 779 (MUL x (MOVDconst [c])) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 780 (MUL x (MOVDconst [c])) && isPowerOfTwo(c-1) && c >= 3 -> (ADDshiftLL x x [log2(c-1)]) 781 (MUL x (MOVDconst [c])) && isPowerOfTwo(c+1) && c >= 7 -> (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)]) 782 (MUL x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 783 (MUL x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 784 (MUL x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) -> (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])) 785 (MUL x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 786 787 (MUL (MOVDconst [-1]) x) -> (NEG x) 788 (MUL (MOVDconst [0]) _) -> (MOVDconst [0]) 789 (MUL (MOVDconst [1]) x) -> x 790 (MUL (MOVDconst [c]) x) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 791 (MUL (MOVDconst [c]) x) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 792 (MUL (MOVDconst [c]) x) && isPowerOfTwo(c-1) && c >= 3 -> (ADDshiftLL x x [log2(c-1)]) 793 (MUL (MOVDconst [c]) x) && isPowerOfTwo(c+1) && c >= 7 -> (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)]) 794 (MUL (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 795 (MUL (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 796 (MUL (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) -> (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])) 797 (MUL (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 798 799 (MULW x (MOVDconst [c])) && int32(c)==-1 -> (NEG x) 800 (MULW _ (MOVDconst [c])) && int32(c)==0 -> (MOVDconst [0]) 801 (MULW x (MOVDconst [c])) && int32(c)==1 -> x 802 (MULW x (MOVDconst [c])) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 803 (MULW x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)]) 804 (MULW x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)]) 805 (MULW x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 806 (MULW x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 807 (MULW x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])) 808 (MULW x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 809 810 (MULW (MOVDconst [c]) x) && int32(c)==-1 -> (NEG x) 811 (MULW (MOVDconst [c]) _) && int32(c)==0 -> (MOVDconst [0]) 812 (MULW (MOVDconst [c]) x) && int32(c)==1 -> x 813 (MULW (MOVDconst [c]) x) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x) 814 (MULW (MOVDconst [c]) x) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)]) 815 (MULW (MOVDconst [c]) x) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)]) 816 (MULW (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) 817 (MULW (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) 818 (MULW (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3])) 819 (MULW (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) 820 821 // div by constant 822 (UDIV x (MOVDconst [1])) -> x 823 (UDIV x (MOVDconst [c])) && isPowerOfTwo(c) -> (SRLconst [log2(c)] x) 824 (UDIVW x (MOVDconst [c])) && uint32(c)==1 -> x 825 (UDIVW x (MOVDconst [c])) && isPowerOfTwo(c) && is32Bit(c) -> (SRLconst [log2(c)] x) 826 (UMOD _ (MOVDconst [1])) -> (MOVDconst [0]) 827 (UMOD x (MOVDconst [c])) && isPowerOfTwo(c) -> (ANDconst [c-1] x) 828 (UMODW _ (MOVDconst [c])) && uint32(c)==1 -> (MOVDconst [0]) 829 (UMODW x (MOVDconst [c])) && isPowerOfTwo(c) && is32Bit(c) -> (ANDconst [c-1] x) 830 831 // generic simplifications 832 (ADD x (NEG y)) -> (SUB x y) 833 (ADD (NEG y) x) -> (SUB x y) 834 (SUB x x) -> (MOVDconst [0]) 835 (AND x x) -> x 836 (OR x x) -> x 837 (XOR x x) -> (MOVDconst [0]) 838 (BIC x x) -> (MOVDconst [0]) 839 (AND x (MVN y)) -> (BIC x y) 840 (CSELULT x (MOVDconst [0]) flag) -> (CSELULT0 x flag) 841 842 // remove redundant *const ops 843 (ADDconst [0] x) -> x 844 (SUBconst [0] x) -> x 845 (ANDconst [0] _) -> (MOVDconst [0]) 846 (ANDconst [-1] x) -> x 847 (ORconst [0] x) -> x 848 (ORconst [-1] _) -> (MOVDconst [-1]) 849 (XORconst [0] x) -> x 850 (XORconst [-1] x) -> (MVN x) 851 (BICconst [0] x) -> x 852 (BICconst [-1] _) -> (MOVDconst [0]) 853 854 // generic constant folding 855 (ADDconst [c] (MOVDconst [d])) -> (MOVDconst [c+d]) 856 (ADDconst [c] (ADDconst [d] x)) -> (ADDconst [c+d] x) 857 (ADDconst [c] (SUBconst [d] x)) -> (ADDconst [c-d] x) 858 (SUBconst [c] (MOVDconst [d])) -> (MOVDconst [d-c]) 859 (SUBconst [c] (SUBconst [d] x)) -> (ADDconst [-c-d] x) 860 (SUBconst [c] (ADDconst [d] x)) -> (ADDconst [-c+d] x) 861 (SLLconst [c] (MOVDconst [d])) -> (MOVDconst [int64(d)<<uint64(c)]) 862 (SRLconst [c] (MOVDconst [d])) -> (MOVDconst [int64(uint64(d)>>uint64(c))]) 863 (SRAconst [c] (MOVDconst [d])) -> (MOVDconst [int64(d)>>uint64(c)]) 864 (MUL (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c*d]) 865 (MULW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)*int32(d))]) 866 (DIV (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(c)/int64(d)]) 867 (UDIV (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint64(c)/uint64(d))]) 868 (DIVW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)/int32(d))]) 869 (UDIVW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint32(c)/uint32(d))]) 870 (MOD (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(c)%int64(d)]) 871 (UMOD (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint64(c)%uint64(d))]) 872 (MODW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)%int32(d))]) 873 (UMODW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint32(c)%uint32(d))]) 874 (ANDconst [c] (MOVDconst [d])) -> (MOVDconst [c&d]) 875 (ANDconst [c] (ANDconst [d] x)) -> (ANDconst [c&d] x) 876 (ORconst [c] (MOVDconst [d])) -> (MOVDconst [c|d]) 877 (ORconst [c] (ORconst [d] x)) -> (ORconst [c|d] x) 878 (XORconst [c] (MOVDconst [d])) -> (MOVDconst [c^d]) 879 (XORconst [c] (XORconst [d] x)) -> (XORconst [c^d] x) 880 (BICconst [c] (MOVDconst [d])) -> (MOVDconst [d&^c]) 881 (MVN (MOVDconst [c])) -> (MOVDconst [^c]) 882 (NEG (MOVDconst [c])) -> (MOVDconst [-c]) 883 (MOVBreg (MOVDconst [c])) -> (MOVDconst [int64(int8(c))]) 884 (MOVBUreg (MOVDconst [c])) -> (MOVDconst [int64(uint8(c))]) 885 (MOVHreg (MOVDconst [c])) -> (MOVDconst [int64(int16(c))]) 886 (MOVHUreg (MOVDconst [c])) -> (MOVDconst [int64(uint16(c))]) 887 (MOVWreg (MOVDconst [c])) -> (MOVDconst [int64(int32(c))]) 888 (MOVWUreg (MOVDconst [c])) -> (MOVDconst [int64(uint32(c))]) 889 (MOVDreg (MOVDconst [c])) -> (MOVDconst [c]) 890 891 // constant comparisons 892 (CMPconst (MOVDconst [x]) [y]) && x==y -> (FlagEQ) 893 (CMPconst (MOVDconst [x]) [y]) && int64(x)<int64(y) && uint64(x)<uint64(y) -> (FlagLT_ULT) 894 (CMPconst (MOVDconst [x]) [y]) && int64(x)<int64(y) && uint64(x)>uint64(y) -> (FlagLT_UGT) 895 (CMPconst (MOVDconst [x]) [y]) && int64(x)>int64(y) && uint64(x)<uint64(y) -> (FlagGT_ULT) 896 (CMPconst (MOVDconst [x]) [y]) && int64(x)>int64(y) && uint64(x)>uint64(y) -> (FlagGT_UGT) 897 (CMPWconst (MOVDconst [x]) [y]) && int32(x)==int32(y) -> (FlagEQ) 898 (CMPWconst (MOVDconst [x]) [y]) && int32(x)<int32(y) && uint32(x)<uint32(y) -> (FlagLT_ULT) 899 (CMPWconst (MOVDconst [x]) [y]) && int32(x)<int32(y) && uint32(x)>uint32(y) -> (FlagLT_UGT) 900 (CMPWconst (MOVDconst [x]) [y]) && int32(x)>int32(y) && uint32(x)<uint32(y) -> (FlagGT_ULT) 901 (CMPWconst (MOVDconst [x]) [y]) && int32(x)>int32(y) && uint32(x)>uint32(y) -> (FlagGT_UGT) 902 903 // other known comparisons 904 (CMPconst (MOVBUreg _) [c]) && 0xff < c -> (FlagLT_ULT) 905 (CMPconst (MOVHUreg _) [c]) && 0xffff < c -> (FlagLT_ULT) 906 (CMPconst (MOVWUreg _) [c]) && 0xffffffff < c -> (FlagLT_ULT) 907 (CMPconst (ANDconst _ [m]) [n]) && 0 <= m && m < n -> (FlagLT_ULT) 908 (CMPconst (SRLconst _ [c]) [n]) && 0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n) -> (FlagLT_ULT) 909 (CMPWconst (MOVBUreg _) [c]) && 0xff < int32(c) -> (FlagLT_ULT) 910 (CMPWconst (MOVHUreg _) [c]) && 0xffff < int32(c) -> (FlagLT_ULT) 911 912 // absorb flag constants into branches 913 (EQ (FlagEQ) yes no) -> (First nil yes no) 914 (EQ (FlagLT_ULT) yes no) -> (First nil no yes) 915 (EQ (FlagLT_UGT) yes no) -> (First nil no yes) 916 (EQ (FlagGT_ULT) yes no) -> (First nil no yes) 917 (EQ (FlagGT_UGT) yes no) -> (First nil no yes) 918 919 (NE (FlagEQ) yes no) -> (First nil no yes) 920 (NE (FlagLT_ULT) yes no) -> (First nil yes no) 921 (NE (FlagLT_UGT) yes no) -> (First nil yes no) 922 (NE (FlagGT_ULT) yes no) -> (First nil yes no) 923 (NE (FlagGT_UGT) yes no) -> (First nil yes no) 924 925 (LT (FlagEQ) yes no) -> (First nil no yes) 926 (LT (FlagLT_ULT) yes no) -> (First nil yes no) 927 (LT (FlagLT_UGT) yes no) -> (First nil yes no) 928 (LT (FlagGT_ULT) yes no) -> (First nil no yes) 929 (LT (FlagGT_UGT) yes no) -> (First nil no yes) 930 931 (LE (FlagEQ) yes no) -> (First nil yes no) 932 (LE (FlagLT_ULT) yes no) -> (First nil yes no) 933 (LE (FlagLT_UGT) yes no) -> (First nil yes no) 934 (LE (FlagGT_ULT) yes no) -> (First nil no yes) 935 (LE (FlagGT_UGT) yes no) -> (First nil no yes) 936 937 (GT (FlagEQ) yes no) -> (First nil no yes) 938 (GT (FlagLT_ULT) yes no) -> (First nil no yes) 939 (GT (FlagLT_UGT) yes no) -> (First nil no yes) 940 (GT (FlagGT_ULT) yes no) -> (First nil yes no) 941 (GT (FlagGT_UGT) yes no) -> (First nil yes no) 942 943 (GE (FlagEQ) yes no) -> (First nil yes no) 944 (GE (FlagLT_ULT) yes no) -> (First nil no yes) 945 (GE (FlagLT_UGT) yes no) -> (First nil no yes) 946 (GE (FlagGT_ULT) yes no) -> (First nil yes no) 947 (GE (FlagGT_UGT) yes no) -> (First nil yes no) 948 949 (ULT (FlagEQ) yes no) -> (First nil no yes) 950 (ULT (FlagLT_ULT) yes no) -> (First nil yes no) 951 (ULT (FlagLT_UGT) yes no) -> (First nil no yes) 952 (ULT (FlagGT_ULT) yes no) -> (First nil yes no) 953 (ULT (FlagGT_UGT) yes no) -> (First nil no yes) 954 955 (ULE (FlagEQ) yes no) -> (First nil yes no) 956 (ULE (FlagLT_ULT) yes no) -> (First nil yes no) 957 (ULE (FlagLT_UGT) yes no) -> (First nil no yes) 958 (ULE (FlagGT_ULT) yes no) -> (First nil yes no) 959 (ULE (FlagGT_UGT) yes no) -> (First nil no yes) 960 961 (UGT (FlagEQ) yes no) -> (First nil no yes) 962 (UGT (FlagLT_ULT) yes no) -> (First nil no yes) 963 (UGT (FlagLT_UGT) yes no) -> (First nil yes no) 964 (UGT (FlagGT_ULT) yes no) -> (First nil no yes) 965 (UGT (FlagGT_UGT) yes no) -> (First nil yes no) 966 967 (UGE (FlagEQ) yes no) -> (First nil yes no) 968 (UGE (FlagLT_ULT) yes no) -> (First nil no yes) 969 (UGE (FlagLT_UGT) yes no) -> (First nil yes no) 970 (UGE (FlagGT_ULT) yes no) -> (First nil no yes) 971 (UGE (FlagGT_UGT) yes no) -> (First nil yes no) 972 973 (Z (MOVDconst [0]) yes no) -> (First nil yes no) 974 (Z (MOVDconst [c]) yes no) && c != 0 -> (First nil no yes) 975 (NZ (MOVDconst [0]) yes no) -> (First nil no yes) 976 (NZ (MOVDconst [c]) yes no) && c != 0 -> (First nil yes no) 977 (ZW (MOVDconst [c]) yes no) && int32(c) == 0 -> (First nil yes no) 978 (ZW (MOVDconst [c]) yes no) && int32(c) != 0 -> (First nil no yes) 979 (NZW (MOVDconst [c]) yes no) && int32(c) == 0 -> (First nil no yes) 980 (NZW (MOVDconst [c]) yes no) && int32(c) != 0 -> (First nil yes no) 981 982 // absorb InvertFlags into branches 983 (LT (InvertFlags cmp) yes no) -> (GT cmp yes no) 984 (GT (InvertFlags cmp) yes no) -> (LT cmp yes no) 985 (LE (InvertFlags cmp) yes no) -> (GE cmp yes no) 986 (GE (InvertFlags cmp) yes no) -> (LE cmp yes no) 987 (ULT (InvertFlags cmp) yes no) -> (UGT cmp yes no) 988 (UGT (InvertFlags cmp) yes no) -> (ULT cmp yes no) 989 (ULE (InvertFlags cmp) yes no) -> (UGE cmp yes no) 990 (UGE (InvertFlags cmp) yes no) -> (ULE cmp yes no) 991 (EQ (InvertFlags cmp) yes no) -> (EQ cmp yes no) 992 (NE (InvertFlags cmp) yes no) -> (NE cmp yes no) 993 994 // absorb flag constants into boolean values 995 (Equal (FlagEQ)) -> (MOVDconst [1]) 996 (Equal (FlagLT_ULT)) -> (MOVDconst [0]) 997 (Equal (FlagLT_UGT)) -> (MOVDconst [0]) 998 (Equal (FlagGT_ULT)) -> (MOVDconst [0]) 999 (Equal (FlagGT_UGT)) -> (MOVDconst [0]) 1000 1001 (NotEqual (FlagEQ)) -> (MOVDconst [0]) 1002 (NotEqual (FlagLT_ULT)) -> (MOVDconst [1]) 1003 (NotEqual (FlagLT_UGT)) -> (MOVDconst [1]) 1004 (NotEqual (FlagGT_ULT)) -> (MOVDconst [1]) 1005 (NotEqual (FlagGT_UGT)) -> (MOVDconst [1]) 1006 1007 (LessThan (FlagEQ)) -> (MOVDconst [0]) 1008 (LessThan (FlagLT_ULT)) -> (MOVDconst [1]) 1009 (LessThan (FlagLT_UGT)) -> (MOVDconst [1]) 1010 (LessThan (FlagGT_ULT)) -> (MOVDconst [0]) 1011 (LessThan (FlagGT_UGT)) -> (MOVDconst [0]) 1012 1013 (LessThanU (FlagEQ)) -> (MOVDconst [0]) 1014 (LessThanU (FlagLT_ULT)) -> (MOVDconst [1]) 1015 (LessThanU (FlagLT_UGT)) -> (MOVDconst [0]) 1016 (LessThanU (FlagGT_ULT)) -> (MOVDconst [1]) 1017 (LessThanU (FlagGT_UGT)) -> (MOVDconst [0]) 1018 1019 (LessEqual (FlagEQ)) -> (MOVDconst [1]) 1020 (LessEqual (FlagLT_ULT)) -> (MOVDconst [1]) 1021 (LessEqual (FlagLT_UGT)) -> (MOVDconst [1]) 1022 (LessEqual (FlagGT_ULT)) -> (MOVDconst [0]) 1023 (LessEqual (FlagGT_UGT)) -> (MOVDconst [0]) 1024 1025 (LessEqualU (FlagEQ)) -> (MOVDconst [1]) 1026 (LessEqualU (FlagLT_ULT)) -> (MOVDconst [1]) 1027 (LessEqualU (FlagLT_UGT)) -> (MOVDconst [0]) 1028 (LessEqualU (FlagGT_ULT)) -> (MOVDconst [1]) 1029 (LessEqualU (FlagGT_UGT)) -> (MOVDconst [0]) 1030 1031 (GreaterThan (FlagEQ)) -> (MOVDconst [0]) 1032 (GreaterThan (FlagLT_ULT)) -> (MOVDconst [0]) 1033 (GreaterThan (FlagLT_UGT)) -> (MOVDconst [0]) 1034 (GreaterThan (FlagGT_ULT)) -> (MOVDconst [1]) 1035 (GreaterThan (FlagGT_UGT)) -> (MOVDconst [1]) 1036 1037 (GreaterThanU (FlagEQ)) -> (MOVDconst [0]) 1038 (GreaterThanU (FlagLT_ULT)) -> (MOVDconst [0]) 1039 (GreaterThanU (FlagLT_UGT)) -> (MOVDconst [1]) 1040 (GreaterThanU (FlagGT_ULT)) -> (MOVDconst [0]) 1041 (GreaterThanU (FlagGT_UGT)) -> (MOVDconst [1]) 1042 1043 (GreaterEqual (FlagEQ)) -> (MOVDconst [1]) 1044 (GreaterEqual (FlagLT_ULT)) -> (MOVDconst [0]) 1045 (GreaterEqual (FlagLT_UGT)) -> (MOVDconst [0]) 1046 (GreaterEqual (FlagGT_ULT)) -> (MOVDconst [1]) 1047 (GreaterEqual (FlagGT_UGT)) -> (MOVDconst [1]) 1048 1049 (GreaterEqualU (FlagEQ)) -> (MOVDconst [1]) 1050 (GreaterEqualU (FlagLT_ULT)) -> (MOVDconst [0]) 1051 (GreaterEqualU (FlagLT_UGT)) -> (MOVDconst [1]) 1052 (GreaterEqualU (FlagGT_ULT)) -> (MOVDconst [0]) 1053 (GreaterEqualU (FlagGT_UGT)) -> (MOVDconst [1]) 1054 1055 // absorb InvertFlags into boolean values 1056 (Equal (InvertFlags x)) -> (Equal x) 1057 (NotEqual (InvertFlags x)) -> (NotEqual x) 1058 (LessThan (InvertFlags x)) -> (GreaterThan x) 1059 (LessThanU (InvertFlags x)) -> (GreaterThanU x) 1060 (GreaterThan (InvertFlags x)) -> (LessThan x) 1061 (GreaterThanU (InvertFlags x)) -> (LessThanU x) 1062 (LessEqual (InvertFlags x)) -> (GreaterEqual x) 1063 (LessEqualU (InvertFlags x)) -> (GreaterEqualU x) 1064 (GreaterEqual (InvertFlags x)) -> (LessEqual x) 1065 (GreaterEqualU (InvertFlags x)) -> (LessEqualU x) 1066 1067 // absorb flag constants into conditional instructions 1068 (CSELULT _ y (FlagEQ)) -> y 1069 (CSELULT x _ (FlagLT_ULT)) -> x 1070 (CSELULT _ y (FlagLT_UGT)) -> y 1071 (CSELULT x _ (FlagGT_ULT)) -> x 1072 (CSELULT _ y (FlagGT_UGT)) -> y 1073 (CSELULT0 _ (FlagEQ)) -> (MOVDconst [0]) 1074 (CSELULT0 x (FlagLT_ULT)) -> x 1075 (CSELULT0 _ (FlagLT_UGT)) -> (MOVDconst [0]) 1076 (CSELULT0 x (FlagGT_ULT)) -> x 1077 (CSELULT0 _ (FlagGT_UGT)) -> (MOVDconst [0]) 1078 1079 // absorb shifts into ops 1080 (ADD x (SLLconst [c] y)) -> (ADDshiftLL x y [c]) 1081 (ADD (SLLconst [c] y) x) -> (ADDshiftLL x y [c]) 1082 (ADD x (SRLconst [c] y)) -> (ADDshiftRL x y [c]) 1083 (ADD (SRLconst [c] y) x) -> (ADDshiftRL x y [c]) 1084 (ADD x (SRAconst [c] y)) -> (ADDshiftRA x y [c]) 1085 (ADD (SRAconst [c] y) x) -> (ADDshiftRA x y [c]) 1086 (SUB x (SLLconst [c] y)) -> (SUBshiftLL x y [c]) 1087 (SUB x (SRLconst [c] y)) -> (SUBshiftRL x y [c]) 1088 (SUB x (SRAconst [c] y)) -> (SUBshiftRA x y [c]) 1089 (AND x (SLLconst [c] y)) -> (ANDshiftLL x y [c]) 1090 (AND (SLLconst [c] y) x) -> (ANDshiftLL x y [c]) 1091 (AND x (SRLconst [c] y)) -> (ANDshiftRL x y [c]) 1092 (AND (SRLconst [c] y) x) -> (ANDshiftRL x y [c]) 1093 (AND x (SRAconst [c] y)) -> (ANDshiftRA x y [c]) 1094 (AND (SRAconst [c] y) x) -> (ANDshiftRA x y [c]) 1095 (OR x s:(SLLconst [c] y)) && s.Uses == 1 && clobber(s) -> (ORshiftLL x y [c]) // useful for combined load 1096 (OR s:(SLLconst [c] y) x) && s.Uses == 1 && clobber(s) -> (ORshiftLL x y [c]) 1097 (OR x (SLLconst [c] y)) -> (ORshiftLL x y [c]) 1098 (OR (SLLconst [c] y) x) -> (ORshiftLL x y [c]) 1099 (OR x (SRLconst [c] y)) -> (ORshiftRL x y [c]) 1100 (OR (SRLconst [c] y) x) -> (ORshiftRL x y [c]) 1101 (OR x (SRAconst [c] y)) -> (ORshiftRA x y [c]) 1102 (OR (SRAconst [c] y) x) -> (ORshiftRA x y [c]) 1103 (XOR x (SLLconst [c] y)) -> (XORshiftLL x y [c]) 1104 (XOR (SLLconst [c] y) x) -> (XORshiftLL x y [c]) 1105 (XOR x (SRLconst [c] y)) -> (XORshiftRL x y [c]) 1106 (XOR (SRLconst [c] y) x) -> (XORshiftRL x y [c]) 1107 (XOR x (SRAconst [c] y)) -> (XORshiftRA x y [c]) 1108 (XOR (SRAconst [c] y) x) -> (XORshiftRA x y [c]) 1109 (BIC x (SLLconst [c] y)) -> (BICshiftLL x y [c]) 1110 (BIC x (SRLconst [c] y)) -> (BICshiftRL x y [c]) 1111 (BIC x (SRAconst [c] y)) -> (BICshiftRA x y [c]) 1112 (CMP x (SLLconst [c] y)) -> (CMPshiftLL x y [c]) 1113 (CMP (SLLconst [c] y) x) -> (InvertFlags (CMPshiftLL x y [c])) 1114 (CMP x (SRLconst [c] y)) -> (CMPshiftRL x y [c]) 1115 (CMP (SRLconst [c] y) x) -> (InvertFlags (CMPshiftRL x y [c])) 1116 (CMP x (SRAconst [c] y)) -> (CMPshiftRA x y [c]) 1117 (CMP (SRAconst [c] y) x) -> (InvertFlags (CMPshiftRA x y [c])) 1118 1119 // prefer *const ops to *shift ops 1120 (ADDshiftLL (MOVDconst [c]) x [d]) -> (ADDconst [c] (SLLconst <x.Type> x [d])) 1121 (ADDshiftRL (MOVDconst [c]) x [d]) -> (ADDconst [c] (SRLconst <x.Type> x [d])) 1122 (ADDshiftRA (MOVDconst [c]) x [d]) -> (ADDconst [c] (SRAconst <x.Type> x [d])) 1123 (ANDshiftLL (MOVDconst [c]) x [d]) -> (ANDconst [c] (SLLconst <x.Type> x [d])) 1124 (ANDshiftRL (MOVDconst [c]) x [d]) -> (ANDconst [c] (SRLconst <x.Type> x [d])) 1125 (ANDshiftRA (MOVDconst [c]) x [d]) -> (ANDconst [c] (SRAconst <x.Type> x [d])) 1126 (ORshiftLL (MOVDconst [c]) x [d]) -> (ORconst [c] (SLLconst <x.Type> x [d])) 1127 (ORshiftRL (MOVDconst [c]) x [d]) -> (ORconst [c] (SRLconst <x.Type> x [d])) 1128 (ORshiftRA (MOVDconst [c]) x [d]) -> (ORconst [c] (SRAconst <x.Type> x [d])) 1129 (XORshiftLL (MOVDconst [c]) x [d]) -> (XORconst [c] (SLLconst <x.Type> x [d])) 1130 (XORshiftRL (MOVDconst [c]) x [d]) -> (XORconst [c] (SRLconst <x.Type> x [d])) 1131 (XORshiftRA (MOVDconst [c]) x [d]) -> (XORconst [c] (SRAconst <x.Type> x [d])) 1132 (CMPshiftLL (MOVDconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d]))) 1133 (CMPshiftRL (MOVDconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d]))) 1134 (CMPshiftRA (MOVDconst [c]) x [d]) -> (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d]))) 1135 1136 // constant folding in *shift ops 1137 (ADDshiftLL x (MOVDconst [c]) [d]) -> (ADDconst x [int64(uint64(c)<<uint64(d))]) 1138 (ADDshiftRL x (MOVDconst [c]) [d]) -> (ADDconst x [int64(uint64(c)>>uint64(d))]) 1139 (ADDshiftRA x (MOVDconst [c]) [d]) -> (ADDconst x [int64(int64(c)>>uint64(d))]) 1140 (SUBshiftLL x (MOVDconst [c]) [d]) -> (SUBconst x [int64(uint64(c)<<uint64(d))]) 1141 (SUBshiftRL x (MOVDconst [c]) [d]) -> (SUBconst x [int64(uint64(c)>>uint64(d))]) 1142 (SUBshiftRA x (MOVDconst [c]) [d]) -> (SUBconst x [int64(int64(c)>>uint64(d))]) 1143 (ANDshiftLL x (MOVDconst [c]) [d]) -> (ANDconst x [int64(uint64(c)<<uint64(d))]) 1144 (ANDshiftRL x (MOVDconst [c]) [d]) -> (ANDconst x [int64(uint64(c)>>uint64(d))]) 1145 (ANDshiftRA x (MOVDconst [c]) [d]) -> (ANDconst x [int64(int64(c)>>uint64(d))]) 1146 (ORshiftLL x (MOVDconst [c]) [d]) -> (ORconst x [int64(uint64(c)<<uint64(d))]) 1147 (ORshiftRL x (MOVDconst [c]) [d]) -> (ORconst x [int64(uint64(c)>>uint64(d))]) 1148 (ORshiftRA x (MOVDconst [c]) [d]) -> (ORconst x [int64(int64(c)>>uint64(d))]) 1149 (XORshiftLL x (MOVDconst [c]) [d]) -> (XORconst x [int64(uint64(c)<<uint64(d))]) 1150 (XORshiftRL x (MOVDconst [c]) [d]) -> (XORconst x [int64(uint64(c)>>uint64(d))]) 1151 (XORshiftRA x (MOVDconst [c]) [d]) -> (XORconst x [int64(int64(c)>>uint64(d))]) 1152 (BICshiftLL x (MOVDconst [c]) [d]) -> (BICconst x [int64(uint64(c)<<uint64(d))]) 1153 (BICshiftRL x (MOVDconst [c]) [d]) -> (BICconst x [int64(uint64(c)>>uint64(d))]) 1154 (BICshiftRA x (MOVDconst [c]) [d]) -> (BICconst x [int64(int64(c)>>uint64(d))]) 1155 (CMPshiftLL x (MOVDconst [c]) [d]) -> (CMPconst x [int64(uint64(c)<<uint64(d))]) 1156 (CMPshiftRL x (MOVDconst [c]) [d]) -> (CMPconst x [int64(uint64(c)>>uint64(d))]) 1157 (CMPshiftRA x (MOVDconst [c]) [d]) -> (CMPconst x [int64(int64(c)>>uint64(d))]) 1158 1159 // simplification with *shift ops 1160 (SUBshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1161 (SUBshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1162 (SUBshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1163 (ANDshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1164 (ANDshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1165 (ANDshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1166 (ORshiftLL x y:(SLLconst x [c]) [d]) && c==d -> y 1167 (ORshiftRL x y:(SRLconst x [c]) [d]) && c==d -> y 1168 (ORshiftRA x y:(SRAconst x [c]) [d]) && c==d -> y 1169 (XORshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1170 (XORshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1171 (XORshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1172 (BICshiftLL x (SLLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1173 (BICshiftRL x (SRLconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1174 (BICshiftRA x (SRAconst x [c]) [d]) && c==d -> (MOVDconst [0]) 1175 1176 // do combined loads 1177 // little endian loads 1178 // b[0] | b[1]<<8 -> load 16-bit 1179 (ORshiftLL <t> [8] 1180 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem)) 1181 y1:(MOVDnop x1:(MOVBUload [i+1] {s} p mem))) 1182 && x0.Uses == 1 && x1.Uses == 1 1183 && y0.Uses == 1 && y1.Uses == 1 1184 && mergePoint(b,x0,x1) != nil 1185 && clobber(x0) && clobber(x1) 1186 && clobber(y0) && clobber(y1) 1187 -> @mergePoint(b,x0,x1) (MOVHUload <t> {s} (OffPtr <p.Type> [i] p) mem) 1188 1189 // b[0] | b[1]<<8 | b[2]<<16 | b[3]<<24 -> load 32-bit 1190 (ORshiftLL <t> [24] o0:(ORshiftLL [16] 1191 x0:(MOVHUload [i] {s} p mem) 1192 y1:(MOVDnop x1:(MOVBUload [i+2] {s} p mem))) 1193 y2:(MOVDnop x2:(MOVBUload [i+3] {s} p mem))) 1194 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 1195 && y1.Uses == 1 && y2.Uses == 1 1196 && o0.Uses == 1 1197 && mergePoint(b,x0,x1,x2) != nil 1198 && clobber(x0) && clobber(x1) && clobber(x2) 1199 && clobber(y1) && clobber(y2) 1200 && clobber(o0) 1201 -> @mergePoint(b,x0,x1,x2) (MOVWUload <t> {s} (OffPtr <p.Type> [i] p) mem) 1202 1203 // b[0] | b[1]<<8 | b[2]<<16 | b[3]<<24 | b[4]<<32 | b[5]<<40 | b[6]<<48 | b[7]<<56 -> load 64-bit 1204 (ORshiftLL <t> [56] o0:(ORshiftLL [48] o1:(ORshiftLL [40] o2:(ORshiftLL [32] 1205 x0:(MOVWUload [i] {s} p mem) 1206 y1:(MOVDnop x1:(MOVBUload [i+4] {s} p mem))) 1207 y2:(MOVDnop x2:(MOVBUload [i+5] {s} p mem))) 1208 y3:(MOVDnop x3:(MOVBUload [i+6] {s} p mem))) 1209 y4:(MOVDnop x4:(MOVBUload [i+7] {s} p mem))) 1210 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 1211 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 1212 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 1213 && mergePoint(b,x0,x1,x2,x3,x4) != nil 1214 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) 1215 && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) 1216 && clobber(o0) && clobber(o1) && clobber(o2) 1217 -> @mergePoint(b,x0,x1,x2,x3,x4) (MOVDload <t> {s} (OffPtr <p.Type> [i] p) mem) 1218 1219 // b[3]<<24 | b[2]<<16 | b[1]<<8 | b[0] -> load 32-bit 1220 (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] 1221 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem))) 1222 y1:(MOVDnop x1:(MOVBUload [i-1] {s} p mem))) 1223 y2:(MOVDnop x2:(MOVBUload [i-2] {s} p mem))) 1224 y3:(MOVDnop x3:(MOVBUload [i-3] {s} p mem))) 1225 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 1226 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 1227 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 1228 && mergePoint(b,x0,x1,x2,x3) != nil 1229 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) 1230 && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) 1231 && clobber(o0) && clobber(o1) && clobber(s0) 1232 -> @mergePoint(b,x0,x1,x2,x3) (MOVWUload <t> {s} (OffPtr <p.Type> [i-3] p) mem) 1233 1234 // b[7]<<56 | b[6]<<48 | b[5]<<40 | b[4]<<32 | b[3]<<24 | b[2]<<16 | b[1]<<8 | b[0] -> load 64-bit, reverse 1235 (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] 1236 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem))) 1237 y1:(MOVDnop x1:(MOVBUload [i-1] {s} p mem))) 1238 y2:(MOVDnop x2:(MOVBUload [i-2] {s} p mem))) 1239 y3:(MOVDnop x3:(MOVBUload [i-3] {s} p mem))) 1240 y4:(MOVDnop x4:(MOVBUload [i-4] {s} p mem))) 1241 y5:(MOVDnop x5:(MOVBUload [i-5] {s} p mem))) 1242 y6:(MOVDnop x6:(MOVBUload [i-6] {s} p mem))) 1243 y7:(MOVDnop x7:(MOVBUload [i-7] {s} p mem))) 1244 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 1245 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 1246 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 1247 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 1248 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 1249 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 1250 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil 1251 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) 1252 && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 1253 && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) 1254 && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) 1255 && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) 1256 && clobber(o4) && clobber(o5) && clobber(s0) 1257 -> @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i-7] p) mem)) 1258 1259 // big endian loads 1260 // b[1] | b[0]<<8 -> load 16-bit, reverse 1261 (ORshiftLL <t> [8] 1262 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem)) 1263 y1:(MOVDnop x1:(MOVBUload [i-1] {s} p mem))) 1264 && ((i-1)%2 == 0 || i-1<256 && i-1>-256 && !isArg(s) && !isAuto(s)) 1265 && x0.Uses == 1 && x1.Uses == 1 1266 && y0.Uses == 1 && y1.Uses == 1 1267 && mergePoint(b,x0,x1) != nil 1268 && clobber(x0) && clobber(x1) 1269 && clobber(y0) && clobber(y1) 1270 -> @mergePoint(b,x0,x1) (REV16W <t> (MOVHUload <t> [i-1] {s} p mem)) 1271 1272 // b[3] | b[2]<<8 | b[1]<<16 | b[0]<<24 -> load 32-bit, reverse 1273 (ORshiftLL <t> [24] o0:(ORshiftLL [16] 1274 y0:(REV16W x0:(MOVHUload [i] {s} p mem)) 1275 y1:(MOVDnop x1:(MOVBUload [i-1] {s} p mem))) 1276 y2:(MOVDnop x2:(MOVBUload [i-2] {s} p mem))) 1277 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 1278 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 1279 && o0.Uses == 1 1280 && mergePoint(b,x0,x1,x2) != nil 1281 && clobber(x0) && clobber(x1) && clobber(x2) 1282 && clobber(y0) && clobber(y1) && clobber(y2) 1283 && clobber(o0) 1284 -> @mergePoint(b,x0,x1,x2) (REVW <t> (MOVWUload <t> {s} (OffPtr <p.Type> [i-2] p) mem)) 1285 1286 // b[7] | b[6]<<8 | b[5]<<16 | b[4]<<24 | b[3]<<32 | b[2]<<40 | b[1]<<48 | b[0]<<56 -> load 64-bit, reverse 1287 (ORshiftLL <t> [56] o0:(ORshiftLL [48] o1:(ORshiftLL [40] o2:(ORshiftLL [32] 1288 y0:(REVW x0:(MOVWUload [i] {s} p mem)) 1289 y1:(MOVDnop x1:(MOVBUload [i-1] {s} p mem))) 1290 y2:(MOVDnop x2:(MOVBUload [i-2] {s} p mem))) 1291 y3:(MOVDnop x3:(MOVBUload [i-3] {s} p mem))) 1292 y4:(MOVDnop x4:(MOVBUload [i-4] {s} p mem))) 1293 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 1294 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 1295 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 1296 && mergePoint(b,x0,x1,x2,x3,x4) != nil 1297 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) 1298 && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) 1299 && clobber(o0) && clobber(o1) && clobber(o2) 1300 -> @mergePoint(b,x0,x1,x2,x3,x4) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i-4] p) mem)) 1301 1302 // b[0]<<24 | b[1]<<16 | b[2]<<8 | b[3] -> load 32-bit, reverse 1303 (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] 1304 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem))) 1305 y1:(MOVDnop x1:(MOVBUload [i+1] {s} p mem))) 1306 y2:(MOVDnop x2:(MOVBUload [i+2] {s} p mem))) 1307 y3:(MOVDnop x3:(MOVBUload [i+3] {s} p mem))) 1308 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 1309 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 1310 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 1311 && mergePoint(b,x0,x1,x2,x3) != nil 1312 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) 1313 && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) 1314 && clobber(o0) && clobber(o1) && clobber(s0) 1315 -> @mergePoint(b,x0,x1,x2,x3) (REVW <t> (MOVWUload <t> {s} (OffPtr <p.Type> [i] p) mem)) 1316 1317 // b[0]<<56 | b[1]<<48 | b[2]<<40 | b[3]<<32 | b[4]<<24 | b[5]<<16 | b[6]<<8 | b[7] -> load 64-bit, reverse 1318 (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] 1319 y0:(MOVDnop x0:(MOVBUload [i] {s} p mem))) 1320 y1:(MOVDnop x1:(MOVBUload [i+1] {s} p mem))) 1321 y2:(MOVDnop x2:(MOVBUload [i+2] {s} p mem))) 1322 y3:(MOVDnop x3:(MOVBUload [i+3] {s} p mem))) 1323 y4:(MOVDnop x4:(MOVBUload [i+4] {s} p mem))) 1324 y5:(MOVDnop x5:(MOVBUload [i+5] {s} p mem))) 1325 y6:(MOVDnop x6:(MOVBUload [i+6] {s} p mem))) 1326 y7:(MOVDnop x7:(MOVBUload [i+7] {s} p mem))) 1327 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 1328 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 1329 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 1330 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 1331 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 1332 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 1333 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil 1334 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) 1335 && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) 1336 && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) 1337 && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) 1338 && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) 1339 && clobber(o4) && clobber(o5) && clobber(s0) 1340 -> @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i] p) mem)) 1341
