1 /* Renesas RL78 specific support for 32-bit ELF. 2 Copyright (C) 2011-2014 Free Software Foundation, Inc. 3 4 This file is part of BFD, the Binary File Descriptor library. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ 19 20 #include "sysdep.h" 21 #include "bfd.h" 22 #include "bfd_stdint.h" 23 #include "libbfd.h" 24 #include "elf-bfd.h" 25 #include "elf/rl78.h" 26 #include "libiberty.h" 27 28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000) 29 30 #define RL78REL(n,sz,bit,shift,complain,pcrel) \ 31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) 33 34 /* Note that the relocations around 0x7f are internal to this file; 35 feel free to move them as needed to avoid conflicts with published 36 relocation numbers. */ 37 38 static reloc_howto_type rl78_elf_howto_table [] = 39 { 40 RL78REL (NONE, 0, 0, 0, dont, FALSE), 41 RL78REL (DIR32, 2, 32, 0, signed, FALSE), 42 RL78REL (DIR24S, 2, 24, 0, signed, FALSE), 43 RL78REL (DIR16, 1, 16, 0, dont, FALSE), 44 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE), 45 RL78REL (DIR16S, 1, 16, 0, signed, FALSE), 46 RL78REL (DIR8, 0, 8, 0, dont, FALSE), 47 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE), 48 RL78REL (DIR8S, 0, 8, 0, signed, FALSE), 49 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE), 50 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE), 51 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE), 52 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE), 53 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE), 54 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE), 55 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE), 56 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE), 57 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE), 58 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE), 59 60 EMPTY_HOWTO (0x13), 61 EMPTY_HOWTO (0x14), 62 EMPTY_HOWTO (0x15), 63 EMPTY_HOWTO (0x16), 64 EMPTY_HOWTO (0x17), 65 EMPTY_HOWTO (0x18), 66 EMPTY_HOWTO (0x19), 67 EMPTY_HOWTO (0x1a), 68 EMPTY_HOWTO (0x1b), 69 EMPTY_HOWTO (0x1c), 70 EMPTY_HOWTO (0x1d), 71 EMPTY_HOWTO (0x1e), 72 EMPTY_HOWTO (0x1f), 73 74 EMPTY_HOWTO (0x20), 75 EMPTY_HOWTO (0x21), 76 EMPTY_HOWTO (0x22), 77 EMPTY_HOWTO (0x23), 78 EMPTY_HOWTO (0x24), 79 EMPTY_HOWTO (0x25), 80 EMPTY_HOWTO (0x26), 81 EMPTY_HOWTO (0x27), 82 EMPTY_HOWTO (0x28), 83 EMPTY_HOWTO (0x29), 84 EMPTY_HOWTO (0x2a), 85 EMPTY_HOWTO (0x2b), 86 EMPTY_HOWTO (0x2c), 87 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE), 88 89 EMPTY_HOWTO (0x2e), 90 EMPTY_HOWTO (0x2f), 91 EMPTY_HOWTO (0x30), 92 EMPTY_HOWTO (0x31), 93 EMPTY_HOWTO (0x32), 94 EMPTY_HOWTO (0x33), 95 EMPTY_HOWTO (0x34), 96 EMPTY_HOWTO (0x35), 97 EMPTY_HOWTO (0x36), 98 EMPTY_HOWTO (0x37), 99 EMPTY_HOWTO (0x38), 100 EMPTY_HOWTO (0x39), 101 EMPTY_HOWTO (0x3a), 102 EMPTY_HOWTO (0x3b), 103 EMPTY_HOWTO (0x3c), 104 EMPTY_HOWTO (0x3d), 105 EMPTY_HOWTO (0x3e), 106 EMPTY_HOWTO (0x3f), 107 EMPTY_HOWTO (0x40), 108 109 RL78REL (ABS32, 2, 32, 0, dont, FALSE), 110 RL78REL (ABS24S, 2, 24, 0, signed, FALSE), 111 RL78REL (ABS16, 1, 16, 0, dont, FALSE), 112 RL78REL (ABS16U, 1, 16, 0, unsigned, FALSE), 113 RL78REL (ABS16S, 1, 16, 0, signed, FALSE), 114 RL78REL (ABS8, 0, 8, 0, dont, FALSE), 115 RL78REL (ABS8U, 0, 8, 0, unsigned, FALSE), 116 RL78REL (ABS8S, 0, 8, 0, signed, FALSE), 117 RL78REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE), 118 RL78REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE), 119 RL78REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE), 120 RL78REL (ABS16UL, 1, 16, 0, unsigned, FALSE), 121 RL78REL (ABS16UW, 1, 16, 0, unsigned, FALSE), 122 RL78REL (ABS8UL, 0, 8, 0, unsigned, FALSE), 123 RL78REL (ABS8UW, 0, 8, 0, unsigned, FALSE), 124 RL78REL (ABS32_REV, 2, 32, 0, dont, FALSE), 125 RL78REL (ABS16_REV, 1, 16, 0, dont, FALSE), 126 127 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32) 128 129 EMPTY_HOWTO (0x52), 130 EMPTY_HOWTO (0x53), 131 EMPTY_HOWTO (0x54), 132 EMPTY_HOWTO (0x55), 133 EMPTY_HOWTO (0x56), 134 EMPTY_HOWTO (0x57), 135 EMPTY_HOWTO (0x58), 136 EMPTY_HOWTO (0x59), 137 EMPTY_HOWTO (0x5a), 138 EMPTY_HOWTO (0x5b), 139 EMPTY_HOWTO (0x5c), 140 EMPTY_HOWTO (0x5d), 141 EMPTY_HOWTO (0x5e), 142 EMPTY_HOWTO (0x5f), 143 EMPTY_HOWTO (0x60), 144 EMPTY_HOWTO (0x61), 145 EMPTY_HOWTO (0x62), 146 EMPTY_HOWTO (0x63), 147 EMPTY_HOWTO (0x64), 148 EMPTY_HOWTO (0x65), 149 EMPTY_HOWTO (0x66), 150 EMPTY_HOWTO (0x67), 151 EMPTY_HOWTO (0x68), 152 EMPTY_HOWTO (0x69), 153 EMPTY_HOWTO (0x6a), 154 EMPTY_HOWTO (0x6b), 155 EMPTY_HOWTO (0x6c), 156 EMPTY_HOWTO (0x6d), 157 EMPTY_HOWTO (0x6e), 158 EMPTY_HOWTO (0x6f), 159 EMPTY_HOWTO (0x70), 160 EMPTY_HOWTO (0x71), 161 EMPTY_HOWTO (0x72), 162 EMPTY_HOWTO (0x73), 163 EMPTY_HOWTO (0x74), 164 EMPTY_HOWTO (0x75), 165 EMPTY_HOWTO (0x76), 166 EMPTY_HOWTO (0x77), 167 168 EMPTY_HOWTO (0x78), 169 EMPTY_HOWTO (0x79), 170 EMPTY_HOWTO (0x7a), 171 EMPTY_HOWTO (0x7b), 172 EMPTY_HOWTO (0x7c), 173 EMPTY_HOWTO (0x7d), 174 EMPTY_HOWTO (0x7e), 175 EMPTY_HOWTO (0x7f), 176 177 RL78REL (SYM, 2, 32, 0, dont, FALSE), 178 RL78REL (OPneg, 2, 32, 0, dont, FALSE), 179 RL78REL (OPadd, 2, 32, 0, dont, FALSE), 180 RL78REL (OPsub, 2, 32, 0, dont, FALSE), 181 RL78REL (OPmul, 2, 32, 0, dont, FALSE), 182 RL78REL (OPdiv, 2, 32, 0, dont, FALSE), 183 RL78REL (OPshla, 2, 32, 0, dont, FALSE), 184 RL78REL (OPshra, 2, 32, 0, dont, FALSE), 185 RL78REL (OPsctsize, 2, 32, 0, dont, FALSE), 186 EMPTY_HOWTO (0x89), 187 EMPTY_HOWTO (0x8a), 188 EMPTY_HOWTO (0x8b), 189 EMPTY_HOWTO (0x8c), 190 RL78REL (OPscttop, 2, 32, 0, dont, FALSE), 191 EMPTY_HOWTO (0x8e), 192 EMPTY_HOWTO (0x8f), 193 RL78REL (OPand, 2, 32, 0, dont, FALSE), 194 RL78REL (OPor, 2, 32, 0, dont, FALSE), 195 RL78REL (OPxor, 2, 32, 0, dont, FALSE), 196 RL78REL (OPnot, 2, 32, 0, dont, FALSE), 197 RL78REL (OPmod, 2, 32, 0, dont, FALSE), 198 RL78REL (OPromtop, 2, 32, 0, dont, FALSE), 199 RL78REL (OPramtop, 2, 32, 0, dont, FALSE) 200 }; 201 202 /* Map BFD reloc types to RL78 ELF reloc types. */ 204 205 struct rl78_reloc_map 206 { 207 bfd_reloc_code_real_type bfd_reloc_val; 208 unsigned int rl78_reloc_val; 209 }; 210 211 static const struct rl78_reloc_map rl78_reloc_map [] = 212 { 213 { BFD_RELOC_NONE, R_RL78_NONE }, 214 { BFD_RELOC_8, R_RL78_DIR8S }, 215 { BFD_RELOC_16, R_RL78_DIR16S }, 216 { BFD_RELOC_24, R_RL78_DIR24S }, 217 { BFD_RELOC_32, R_RL78_DIR32 }, 218 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 }, 219 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL }, 220 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL }, 221 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL }, 222 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL }, 223 { BFD_RELOC_RL78_8U, R_RL78_DIR8U }, 224 { BFD_RELOC_RL78_16U, R_RL78_DIR16U }, 225 { BFD_RELOC_RL78_SYM, R_RL78_SYM }, 226 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub }, 227 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg }, 228 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand }, 229 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra }, 230 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 }, 231 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 }, 232 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV }, 233 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 }, 234 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV }, 235 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL }, 236 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW }, 237 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U }, 238 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX } 239 }; 240 241 static reloc_howto_type * 242 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, 243 bfd_reloc_code_real_type code) 244 { 245 unsigned int i; 246 247 if (code == BFD_RELOC_RL78_32_OP) 248 return rl78_elf_howto_table + R_RL78_DIR32; 249 250 for (i = ARRAY_SIZE (rl78_reloc_map); --i;) 251 if (rl78_reloc_map [i].bfd_reloc_val == code) 252 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val; 253 254 return NULL; 255 } 256 257 static reloc_howto_type * 258 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) 259 { 260 unsigned int i; 261 262 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++) 263 if (rl78_elf_howto_table[i].name != NULL 264 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0) 265 return rl78_elf_howto_table + i; 266 267 return NULL; 268 } 269 270 /* Set the howto pointer for an RL78 ELF reloc. */ 271 272 static void 273 rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED, 274 arelent * cache_ptr, 275 Elf_Internal_Rela * dst) 276 { 277 unsigned int r_type; 278 279 r_type = ELF32_R_TYPE (dst->r_info); 280 BFD_ASSERT (r_type < (unsigned int) R_RL78_max); 281 cache_ptr->howto = rl78_elf_howto_table + r_type; 282 } 283 284 static bfd_vma 286 get_symbol_value (const char * name, 287 bfd_reloc_status_type * status, 288 struct bfd_link_info * info, 289 bfd * input_bfd, 290 asection * input_section, 291 int offset) 292 { 293 bfd_vma value = 0; 294 struct bfd_link_hash_entry * h; 295 296 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE); 297 298 if (h == NULL 299 || (h->type != bfd_link_hash_defined 300 && h->type != bfd_link_hash_defweak)) 301 * status = info->callbacks->undefined_symbol 302 (info, name, input_bfd, input_section, offset, TRUE); 303 else 304 value = (h->u.def.value 305 + h->u.def.section->output_section->vma 306 + h->u.def.section->output_offset); 307 308 return value; 309 } 310 311 static bfd_vma 312 get_romstart (bfd_reloc_status_type * status, 313 struct bfd_link_info * info, 314 bfd * abfd, 315 asection * sec, 316 int offset) 317 { 318 static bfd_boolean cached = FALSE; 319 static bfd_vma cached_value = 0; 320 321 if (!cached) 322 { 323 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset); 324 cached = TRUE; 325 } 326 return cached_value; 327 } 328 329 static bfd_vma 330 get_ramstart (bfd_reloc_status_type * status, 331 struct bfd_link_info * info, 332 bfd * abfd, 333 asection * sec, 334 int offset) 335 { 336 static bfd_boolean cached = FALSE; 337 static bfd_vma cached_value = 0; 338 339 if (!cached) 340 { 341 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset); 342 cached = TRUE; 343 } 344 return cached_value; 345 } 346 347 #define NUM_STACK_ENTRIES 16 348 static int32_t rl78_stack [ NUM_STACK_ENTRIES ]; 349 static unsigned int rl78_stack_top; 350 351 #define RL78_STACK_PUSH(val) \ 352 do \ 353 { \ 354 if (rl78_stack_top < NUM_STACK_ENTRIES) \ 355 rl78_stack [rl78_stack_top ++] = (val); \ 356 else \ 357 r = bfd_reloc_dangerous; \ 358 } \ 359 while (0) 360 361 #define RL78_STACK_POP(dest) \ 362 do \ 363 { \ 364 if (rl78_stack_top > 0) \ 365 (dest) = rl78_stack [-- rl78_stack_top]; \ 366 else \ 367 (dest) = 0, r = bfd_reloc_dangerous; \ 368 } \ 369 while (0) 370 371 /* Relocate an RL78 ELF section. 372 There is some attempt to make this function usable for many architectures, 373 both USE_REL and USE_RELA ['twould be nice if such a critter existed], 374 if only to serve as a learning tool. 375 376 The RELOCATE_SECTION function is called by the new ELF backend linker 377 to handle the relocations for a section. 378 379 The relocs are always passed as Rela structures; if the section 380 actually uses Rel structures, the r_addend field will always be 381 zero. 382 383 This function is responsible for adjusting the section contents as 384 necessary, and (if using Rela relocs and generating a relocatable 385 output file) adjusting the reloc addend as necessary. 386 387 This function does not have to worry about setting the reloc 388 address or the reloc symbol index. 389 390 LOCAL_SYMS is a pointer to the swapped in local symbols. 391 392 LOCAL_SECTIONS is an array giving the section in the input file 393 corresponding to the st_shndx field of each local symbol. 394 395 The global hash table entry for the global symbols can be found 396 via elf_sym_hashes (input_bfd). 397 398 When generating relocatable output, this function must handle 399 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 400 going to be the section symbol corresponding to the output 401 section, which means that the addend must be adjusted 402 accordingly. */ 403 404 static bfd_boolean 405 rl78_elf_relocate_section 406 (bfd * output_bfd, 407 struct bfd_link_info * info, 408 bfd * input_bfd, 409 asection * input_section, 410 bfd_byte * contents, 411 Elf_Internal_Rela * relocs, 412 Elf_Internal_Sym * local_syms, 413 asection ** local_sections) 414 { 415 Elf_Internal_Shdr * symtab_hdr; 416 struct elf_link_hash_entry ** sym_hashes; 417 Elf_Internal_Rela * rel; 418 Elf_Internal_Rela * relend; 419 bfd *dynobj; 420 asection *splt; 421 422 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; 423 sym_hashes = elf_sym_hashes (input_bfd); 424 relend = relocs + input_section->reloc_count; 425 426 dynobj = elf_hash_table (info)->dynobj; 427 splt = NULL; 428 if (dynobj != NULL) 429 splt = bfd_get_linker_section (dynobj, ".plt"); 430 431 for (rel = relocs; rel < relend; rel ++) 432 { 433 reloc_howto_type * howto; 434 unsigned long r_symndx; 435 Elf_Internal_Sym * sym; 436 asection * sec; 437 struct elf_link_hash_entry * h; 438 bfd_vma relocation; 439 bfd_reloc_status_type r; 440 const char * name = NULL; 441 bfd_boolean unresolved_reloc = TRUE; 442 int r_type; 443 444 r_type = ELF32_R_TYPE (rel->r_info); 445 r_symndx = ELF32_R_SYM (rel->r_info); 446 447 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info); 448 h = NULL; 449 sym = NULL; 450 sec = NULL; 451 relocation = 0; 452 453 if (r_symndx < symtab_hdr->sh_info) 454 { 455 sym = local_syms + r_symndx; 456 sec = local_sections [r_symndx]; 457 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); 458 459 name = bfd_elf_string_from_elf_section 460 (input_bfd, symtab_hdr->sh_link, sym->st_name); 461 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name; 462 } 463 else 464 { 465 bfd_boolean warned ATTRIBUTE_UNUSED; 466 bfd_boolean ignored ATTRIBUTE_UNUSED; 467 468 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 469 r_symndx, symtab_hdr, sym_hashes, h, 470 sec, relocation, unresolved_reloc, 471 warned, ignored); 472 473 name = h->root.root.string; 474 } 475 476 if (sec != NULL && discarded_section (sec)) 477 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, 478 rel, 1, relend, howto, 0, contents); 479 480 if (info->relocatable) 481 { 482 /* This is a relocatable link. We don't have to change 483 anything, unless the reloc is against a section symbol, 484 in which case we have to adjust according to where the 485 section symbol winds up in the output section. */ 486 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 487 rel->r_addend += sec->output_offset; 488 continue; 489 } 490 491 switch (ELF32_R_TYPE (rel->r_info)) 492 { 493 case R_RL78_DIR16S: 494 { 495 bfd_vma *plt_offset; 496 497 if (h != NULL) 498 plt_offset = &h->plt.offset; 499 else 500 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx; 501 502 if (! valid_16bit_address (relocation)) 503 { 504 /* If this is the first time we've processed this symbol, 505 fill in the plt entry with the correct symbol address. */ 506 if ((*plt_offset & 1) == 0) 507 { 508 unsigned int x; 509 510 x = 0x000000ec; /* br !!abs24 */ 511 x |= (relocation << 8) & 0xffffff00; 512 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset); 513 *plt_offset |= 1; 514 } 515 516 relocation = (splt->output_section->vma 517 + splt->output_offset 518 + (*plt_offset & -2)); 519 if (name) 520 { 521 char *newname = bfd_malloc (strlen(name)+5); 522 strcpy (newname, name); 523 strcat(newname, ".plt"); 524 _bfd_generic_link_add_one_symbol (info, 525 input_bfd, 526 newname, 527 BSF_FUNCTION | BSF_WEAK, 528 splt, 529 (*plt_offset & -2), 530 0, 531 1, 532 0, 533 0); 534 } 535 } 536 } 537 break; 538 } 539 540 if (h != NULL && h->root.type == bfd_link_hash_undefweak) 541 /* If the symbol is undefined and weak 542 then the relocation resolves to zero. */ 543 relocation = 0; 544 else 545 { 546 if (howto->pc_relative) 547 { 548 relocation -= (input_section->output_section->vma 549 + input_section->output_offset 550 + rel->r_offset); 551 relocation -= bfd_get_reloc_size (howto); 552 } 553 554 relocation += rel->r_addend; 555 } 556 557 r = bfd_reloc_ok; 558 559 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow 560 #define ALIGN(m) if (relocation & m) r = bfd_reloc_other; 561 #define OP(i) (contents[rel->r_offset + (i)]) 562 563 /* Opcode relocs are always big endian. Data relocs are bi-endian. */ 564 switch (r_type) 565 { 566 case R_RL78_NONE: 567 break; 568 569 case R_RL78_RH_RELAX: 570 break; 571 572 case R_RL78_DIR8S_PCREL: 573 RANGE (-128, 127); 574 OP (0) = relocation; 575 break; 576 577 case R_RL78_DIR8S: 578 RANGE (-128, 255); 579 OP (0) = relocation; 580 break; 581 582 case R_RL78_DIR8U: 583 RANGE (0, 255); 584 OP (0) = relocation; 585 break; 586 587 case R_RL78_DIR16S_PCREL: 588 RANGE (-32768, 32767); 589 OP (0) = relocation; 590 OP (1) = relocation >> 8; 591 break; 592 593 case R_RL78_DIR16S: 594 if ((relocation & 0xf0000) == 0xf0000) 595 relocation &= 0xffff; 596 RANGE (-32768, 65535); 597 OP (0) = relocation; 598 OP (1) = relocation >> 8; 599 break; 600 601 case R_RL78_DIR16U: 602 RANGE (0, 65536); 603 OP (0) = relocation; 604 OP (1) = relocation >> 8; 605 break; 606 607 case R_RL78_DIR16: 608 RANGE (-32768, 65536); 609 OP (0) = relocation; 610 OP (1) = relocation >> 8; 611 break; 612 613 case R_RL78_DIR16_REV: 614 RANGE (-32768, 65536); 615 OP (1) = relocation; 616 OP (0) = relocation >> 8; 617 break; 618 619 case R_RL78_DIR3U_PCREL: 620 RANGE (3, 10); 621 OP (0) &= 0xf8; 622 OP (0) |= relocation & 0x07; 623 break; 624 625 case R_RL78_DIR24S_PCREL: 626 RANGE (-0x800000, 0x7fffff); 627 OP (0) = relocation; 628 OP (1) = relocation >> 8; 629 OP (2) = relocation >> 16; 630 break; 631 632 case R_RL78_DIR24S: 633 RANGE (-0x800000, 0x7fffff); 634 OP (0) = relocation; 635 OP (1) = relocation >> 8; 636 OP (2) = relocation >> 16; 637 break; 638 639 case R_RL78_DIR32: 640 OP (0) = relocation; 641 OP (1) = relocation >> 8; 642 OP (2) = relocation >> 16; 643 OP (3) = relocation >> 24; 644 break; 645 646 case R_RL78_DIR32_REV: 647 OP (3) = relocation; 648 OP (2) = relocation >> 8; 649 OP (1) = relocation >> 16; 650 OP (0) = relocation >> 24; 651 break; 652 653 case R_RL78_RH_SFR: 654 RANGE (0xfff00, 0xfffff); 655 OP (0) = relocation & 0xff; 656 break; 657 658 case R_RL78_RH_SADDR: 659 RANGE (0xffe20, 0xfff1f); 660 OP (0) = relocation & 0xff; 661 break; 662 663 /* Complex reloc handling: */ 664 665 case R_RL78_ABS32: 666 RL78_STACK_POP (relocation); 667 OP (0) = relocation; 668 OP (1) = relocation >> 8; 669 OP (2) = relocation >> 16; 670 OP (3) = relocation >> 24; 671 break; 672 673 case R_RL78_ABS32_REV: 674 RL78_STACK_POP (relocation); 675 OP (3) = relocation; 676 OP (2) = relocation >> 8; 677 OP (1) = relocation >> 16; 678 OP (0) = relocation >> 24; 679 break; 680 681 case R_RL78_ABS24S_PCREL: 682 case R_RL78_ABS24S: 683 RL78_STACK_POP (relocation); 684 RANGE (-0x800000, 0x7fffff); 685 OP (0) = relocation; 686 OP (1) = relocation >> 8; 687 OP (2) = relocation >> 16; 688 break; 689 690 case R_RL78_ABS16: 691 RL78_STACK_POP (relocation); 692 RANGE (-32768, 65535); 693 OP (0) = relocation; 694 OP (1) = relocation >> 8; 695 break; 696 697 case R_RL78_ABS16_REV: 698 RL78_STACK_POP (relocation); 699 RANGE (-32768, 65535); 700 OP (1) = relocation; 701 OP (0) = relocation >> 8; 702 break; 703 704 case R_RL78_ABS16S_PCREL: 705 case R_RL78_ABS16S: 706 RL78_STACK_POP (relocation); 707 RANGE (-32768, 32767); 708 OP (0) = relocation; 709 OP (1) = relocation >> 8; 710 break; 711 712 case R_RL78_ABS16U: 713 RL78_STACK_POP (relocation); 714 RANGE (0, 65536); 715 OP (0) = relocation; 716 OP (1) = relocation >> 8; 717 break; 718 719 case R_RL78_ABS16UL: 720 RL78_STACK_POP (relocation); 721 relocation >>= 2; 722 RANGE (0, 65536); 723 OP (0) = relocation; 724 OP (1) = relocation >> 8; 725 break; 726 727 case R_RL78_ABS16UW: 728 RL78_STACK_POP (relocation); 729 relocation >>= 1; 730 RANGE (0, 65536); 731 OP (0) = relocation; 732 OP (1) = relocation >> 8; 733 break; 734 735 case R_RL78_ABS8: 736 RL78_STACK_POP (relocation); 737 RANGE (-128, 255); 738 OP (0) = relocation; 739 break; 740 741 case R_RL78_ABS8U: 742 RL78_STACK_POP (relocation); 743 RANGE (0, 255); 744 OP (0) = relocation; 745 break; 746 747 case R_RL78_ABS8UL: 748 RL78_STACK_POP (relocation); 749 relocation >>= 2; 750 RANGE (0, 255); 751 OP (0) = relocation; 752 break; 753 754 case R_RL78_ABS8UW: 755 RL78_STACK_POP (relocation); 756 relocation >>= 1; 757 RANGE (0, 255); 758 OP (0) = relocation; 759 break; 760 761 case R_RL78_ABS8S_PCREL: 762 case R_RL78_ABS8S: 763 RL78_STACK_POP (relocation); 764 RANGE (-128, 127); 765 OP (0) = relocation; 766 break; 767 768 case R_RL78_SYM: 769 if (r_symndx < symtab_hdr->sh_info) 770 RL78_STACK_PUSH (sec->output_section->vma 771 + sec->output_offset 772 + sym->st_value 773 + rel->r_addend); 774 else 775 { 776 if (h != NULL 777 && (h->root.type == bfd_link_hash_defined 778 || h->root.type == bfd_link_hash_defweak)) 779 RL78_STACK_PUSH (h->root.u.def.value 780 + sec->output_section->vma 781 + sec->output_offset 782 + rel->r_addend); 783 else if (h->root.type == bfd_link_hash_undefweak) 784 RL78_STACK_PUSH (0); 785 else 786 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol")); 787 } 788 break; 789 790 case R_RL78_OPneg: 791 { 792 int32_t tmp; 793 794 RL78_STACK_POP (tmp); 795 tmp = - tmp; 796 RL78_STACK_PUSH (tmp); 797 } 798 break; 799 800 case R_RL78_OPadd: 801 { 802 int32_t tmp1, tmp2; 803 804 RL78_STACK_POP (tmp2); 805 RL78_STACK_POP (tmp1); 806 tmp1 += tmp2; 807 RL78_STACK_PUSH (tmp1); 808 } 809 break; 810 811 case R_RL78_OPsub: 812 { 813 int32_t tmp1, tmp2; 814 815 /* For the expression "A - B", the assembler pushes A, 816 then B, then OPSUB. So the first op we pop is B, not 817 A. */ 818 RL78_STACK_POP (tmp2); /* B */ 819 RL78_STACK_POP (tmp1); /* A */ 820 tmp1 -= tmp2; /* A - B */ 821 RL78_STACK_PUSH (tmp1); 822 } 823 break; 824 825 case R_RL78_OPmul: 826 { 827 int32_t tmp1, tmp2; 828 829 RL78_STACK_POP (tmp2); 830 RL78_STACK_POP (tmp1); 831 tmp1 *= tmp2; 832 RL78_STACK_PUSH (tmp1); 833 } 834 break; 835 836 case R_RL78_OPdiv: 837 { 838 int32_t tmp1, tmp2; 839 840 RL78_STACK_POP (tmp2); 841 RL78_STACK_POP (tmp1); 842 tmp1 /= tmp2; 843 RL78_STACK_PUSH (tmp1); 844 } 845 break; 846 847 case R_RL78_OPshla: 848 { 849 int32_t tmp1, tmp2; 850 851 RL78_STACK_POP (tmp2); 852 RL78_STACK_POP (tmp1); 853 tmp1 <<= tmp2; 854 RL78_STACK_PUSH (tmp1); 855 } 856 break; 857 858 case R_RL78_OPshra: 859 { 860 int32_t tmp1, tmp2; 861 862 RL78_STACK_POP (tmp2); 863 RL78_STACK_POP (tmp1); 864 tmp1 >>= tmp2; 865 RL78_STACK_PUSH (tmp1); 866 } 867 break; 868 869 case R_RL78_OPsctsize: 870 RL78_STACK_PUSH (input_section->size); 871 break; 872 873 case R_RL78_OPscttop: 874 RL78_STACK_PUSH (input_section->output_section->vma); 875 break; 876 877 case R_RL78_OPand: 878 { 879 int32_t tmp1, tmp2; 880 881 RL78_STACK_POP (tmp2); 882 RL78_STACK_POP (tmp1); 883 tmp1 &= tmp2; 884 RL78_STACK_PUSH (tmp1); 885 } 886 break; 887 888 case R_RL78_OPor: 889 { 890 int32_t tmp1, tmp2; 891 892 RL78_STACK_POP (tmp2); 893 RL78_STACK_POP (tmp1); 894 tmp1 |= tmp2; 895 RL78_STACK_PUSH (tmp1); 896 } 897 break; 898 899 case R_RL78_OPxor: 900 { 901 int32_t tmp1, tmp2; 902 903 RL78_STACK_POP (tmp2); 904 RL78_STACK_POP (tmp1); 905 tmp1 ^= tmp2; 906 RL78_STACK_PUSH (tmp1); 907 } 908 break; 909 910 case R_RL78_OPnot: 911 { 912 int32_t tmp; 913 914 RL78_STACK_POP (tmp); 915 tmp = ~ tmp; 916 RL78_STACK_PUSH (tmp); 917 } 918 break; 919 920 case R_RL78_OPmod: 921 { 922 int32_t tmp1, tmp2; 923 924 RL78_STACK_POP (tmp2); 925 RL78_STACK_POP (tmp1); 926 tmp1 %= tmp2; 927 RL78_STACK_PUSH (tmp1); 928 } 929 break; 930 931 case R_RL78_OPromtop: 932 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset)); 933 break; 934 935 case R_RL78_OPramtop: 936 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset)); 937 break; 938 939 default: 940 r = bfd_reloc_notsupported; 941 break; 942 } 943 944 if (r != bfd_reloc_ok) 945 { 946 const char * msg = NULL; 947 948 switch (r) 949 { 950 case bfd_reloc_overflow: 951 /* Catch the case of a missing function declaration 952 and emit a more helpful error message. */ 953 if (r_type == R_RL78_DIR24S_PCREL) 954 msg = _("%B(%A): error: call to undefined function '%s'"); 955 else 956 r = info->callbacks->reloc_overflow 957 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, 958 input_bfd, input_section, rel->r_offset); 959 break; 960 961 case bfd_reloc_undefined: 962 r = info->callbacks->undefined_symbol 963 (info, name, input_bfd, input_section, rel->r_offset, 964 TRUE); 965 break; 966 967 case bfd_reloc_other: 968 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area"); 969 break; 970 971 case bfd_reloc_outofrange: 972 msg = _("%B(%A): internal error: out of range error"); 973 break; 974 975 case bfd_reloc_notsupported: 976 msg = _("%B(%A): internal error: unsupported relocation error"); 977 break; 978 979 case bfd_reloc_dangerous: 980 msg = _("%B(%A): internal error: dangerous relocation"); 981 break; 982 983 default: 984 msg = _("%B(%A): internal error: unknown error"); 985 break; 986 } 987 988 if (msg) 989 _bfd_error_handler (msg, input_bfd, input_section, name); 990 991 if (! r) 992 return FALSE; 993 } 994 } 995 996 return TRUE; 997 } 998 999 /* Function to set the ELF flag bits. */ 1001 1002 static bfd_boolean 1003 rl78_elf_set_private_flags (bfd * abfd, flagword flags) 1004 { 1005 elf_elfheader (abfd)->e_flags = flags; 1006 elf_flags_init (abfd) = TRUE; 1007 return TRUE; 1008 } 1009 1010 static bfd_boolean no_warn_mismatch = FALSE; 1011 1012 void bfd_elf32_rl78_set_target_flags (bfd_boolean); 1013 1014 void 1015 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch) 1016 { 1017 no_warn_mismatch = user_no_warn_mismatch; 1018 } 1019 1020 /* Merge backend specific data from an object file to the output 1021 object file when linking. */ 1022 1023 static bfd_boolean 1024 rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd) 1025 { 1026 flagword new_flags; 1027 flagword old_flags; 1028 bfd_boolean error = FALSE; 1029 1030 new_flags = elf_elfheader (ibfd)->e_flags; 1031 old_flags = elf_elfheader (obfd)->e_flags; 1032 1033 if (!elf_flags_init (obfd)) 1034 { 1035 /* First call, no flags set. */ 1036 elf_flags_init (obfd) = TRUE; 1037 elf_elfheader (obfd)->e_flags = new_flags; 1038 } 1039 else if (old_flags != new_flags) 1040 { 1041 flagword changed_flags = old_flags ^ new_flags; 1042 1043 if (changed_flags & E_FLAG_RL78_G10) 1044 { 1045 (*_bfd_error_handler) 1046 (_("RL78/G10 ABI conflict: cannot link G10 and non-G10 objects together")); 1047 1048 if (old_flags & E_FLAG_RL78_G10) 1049 (*_bfd_error_handler) (_("- %s is G10, %s is not"), 1050 bfd_get_filename (obfd), bfd_get_filename (ibfd)); 1051 else 1052 (*_bfd_error_handler) (_("- %s is G10, %s is not"), 1053 bfd_get_filename (ibfd), bfd_get_filename (obfd)); 1054 } 1055 1056 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES) 1057 { 1058 (*_bfd_error_handler) 1059 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together")); 1060 1061 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES) 1062 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"), 1063 bfd_get_filename (obfd), bfd_get_filename (ibfd)); 1064 else 1065 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"), 1066 bfd_get_filename (ibfd), bfd_get_filename (obfd)); 1067 } 1068 } 1069 1070 return !error; 1071 } 1072 1073 static bfd_boolean 1075 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr) 1076 { 1077 FILE * file = (FILE *) ptr; 1078 flagword flags; 1079 1080 BFD_ASSERT (abfd != NULL && ptr != NULL); 1081 1082 /* Print normal ELF private data. */ 1083 _bfd_elf_print_private_bfd_data (abfd, ptr); 1084 1085 flags = elf_elfheader (abfd)->e_flags; 1086 fprintf (file, _("private flags = 0x%lx:"), (long) flags); 1087 1088 if (flags & E_FLAG_RL78_G10) 1089 fprintf (file, _(" [G10]")); 1090 1091 if (flags & E_FLAG_RL78_64BIT_DOUBLES) 1092 fprintf (file, _(" [64-bit doubles]")); 1093 1094 fputc ('\n', file); 1095 return TRUE; 1096 } 1097 1098 /* Return the MACH for an e_flags value. */ 1099 1100 static int 1101 elf32_rl78_machine (bfd * abfd) 1102 { 1103 if ((elf_elfheader (abfd)->e_flags & EF_RL78_CPU_MASK) == EF_RL78_CPU_RL78) 1104 return bfd_mach_rl78; 1105 1106 return 0; 1107 } 1108 1109 static bfd_boolean 1110 rl78_elf_object_p (bfd * abfd) 1111 { 1112 bfd_default_set_arch_mach (abfd, bfd_arch_rl78, 1113 elf32_rl78_machine (abfd)); 1114 return TRUE; 1115 } 1116 1117 /* support PLT for 16-bit references to 24-bit functions. */ 1119 1120 /* We support 16-bit pointers to code above 64k by generating a thunk 1121 below 64k containing a JMP instruction to the final address. */ 1122 1123 static bfd_boolean 1124 rl78_elf_check_relocs 1125 (bfd * abfd, 1126 struct bfd_link_info * info, 1127 asection * sec, 1128 const Elf_Internal_Rela * relocs) 1129 { 1130 Elf_Internal_Shdr * symtab_hdr; 1131 struct elf_link_hash_entry ** sym_hashes; 1132 const Elf_Internal_Rela * rel; 1133 const Elf_Internal_Rela * rel_end; 1134 bfd_vma *local_plt_offsets; 1135 asection *splt; 1136 bfd *dynobj; 1137 1138 if (info->relocatable) 1139 return TRUE; 1140 1141 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1142 sym_hashes = elf_sym_hashes (abfd); 1143 local_plt_offsets = elf_local_got_offsets (abfd); 1144 splt = NULL; 1145 dynobj = elf_hash_table(info)->dynobj; 1146 1147 rel_end = relocs + sec->reloc_count; 1148 for (rel = relocs; rel < rel_end; rel++) 1149 { 1150 struct elf_link_hash_entry *h; 1151 unsigned long r_symndx; 1152 bfd_vma *offset; 1153 1154 r_symndx = ELF32_R_SYM (rel->r_info); 1155 if (r_symndx < symtab_hdr->sh_info) 1156 h = NULL; 1157 else 1158 { 1159 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 1160 while (h->root.type == bfd_link_hash_indirect 1161 || h->root.type == bfd_link_hash_warning) 1162 h = (struct elf_link_hash_entry *) h->root.u.i.link; 1163 1164 /* PR15323, ref flags aren't set for references in the same 1165 object. */ 1166 h->root.non_ir_ref = 1; 1167 } 1168 1169 switch (ELF32_R_TYPE (rel->r_info)) 1170 { 1171 /* This relocation describes a 16-bit pointer to a function. 1172 We may need to allocate a thunk in low memory; reserve memory 1173 for it now. */ 1174 case R_RL78_DIR16S: 1175 if (dynobj == NULL) 1176 elf_hash_table (info)->dynobj = dynobj = abfd; 1177 if (splt == NULL) 1178 { 1179 splt = bfd_get_linker_section (dynobj, ".plt"); 1180 if (splt == NULL) 1181 { 1182 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS 1183 | SEC_IN_MEMORY | SEC_LINKER_CREATED 1184 | SEC_READONLY | SEC_CODE); 1185 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt", 1186 flags); 1187 if (splt == NULL 1188 || ! bfd_set_section_alignment (dynobj, splt, 1)) 1189 return FALSE; 1190 } 1191 } 1192 1193 if (h != NULL) 1194 offset = &h->plt.offset; 1195 else 1196 { 1197 if (local_plt_offsets == NULL) 1198 { 1199 size_t size; 1200 unsigned int i; 1201 1202 size = symtab_hdr->sh_info * sizeof (bfd_vma); 1203 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size); 1204 if (local_plt_offsets == NULL) 1205 return FALSE; 1206 elf_local_got_offsets (abfd) = local_plt_offsets; 1207 1208 for (i = 0; i < symtab_hdr->sh_info; i++) 1209 local_plt_offsets[i] = (bfd_vma) -1; 1210 } 1211 offset = &local_plt_offsets[r_symndx]; 1212 } 1213 1214 if (*offset == (bfd_vma) -1) 1215 { 1216 *offset = splt->size; 1217 splt->size += 4; 1218 } 1219 break; 1220 } 1221 } 1222 1223 return TRUE; 1224 } 1225 1226 /* This must exist if dynobj is ever set. */ 1227 1228 static bfd_boolean 1229 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED, 1230 struct bfd_link_info *info) 1231 { 1232 bfd *dynobj; 1233 asection *splt; 1234 1235 if (!elf_hash_table (info)->dynamic_sections_created) 1236 return TRUE; 1237 1238 /* As an extra sanity check, verify that all plt entries have been 1239 filled in. However, relaxing might have changed the relocs so 1240 that some plt entries don't get filled in, so we have to skip 1241 this check if we're relaxing. Unfortunately, check_relocs is 1242 called before relaxation. */ 1243 1244 if (info->relax_trip > 0) 1245 return TRUE; 1246 1247 if ((dynobj = elf_hash_table (info)->dynobj) != NULL 1248 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL) 1249 { 1250 bfd_byte *contents = splt->contents; 1251 unsigned int i, size = splt->size; 1252 1253 for (i = 0; i < size; i += 4) 1254 { 1255 unsigned int x = bfd_get_32 (dynobj, contents + i); 1256 BFD_ASSERT (x != 0); 1257 } 1258 } 1259 1260 return TRUE; 1261 } 1262 1263 static bfd_boolean 1264 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, 1265 struct bfd_link_info *info) 1266 { 1267 bfd *dynobj; 1268 asection *splt; 1269 1270 if (info->relocatable) 1271 return TRUE; 1272 1273 dynobj = elf_hash_table (info)->dynobj; 1274 if (dynobj == NULL) 1275 return TRUE; 1276 1277 splt = bfd_get_linker_section (dynobj, ".plt"); 1278 BFD_ASSERT (splt != NULL); 1279 1280 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size); 1281 if (splt->contents == NULL) 1282 return FALSE; 1283 1284 return TRUE; 1285 } 1286 1287 1288 1290 /* Handle relaxing. */ 1291 1292 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1293 is within the low 64k, remove any entry for it in the plt. */ 1294 1295 struct relax_plt_data 1296 { 1297 asection *splt; 1298 bfd_boolean *again; 1299 }; 1300 1301 static bfd_boolean 1302 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata) 1303 { 1304 struct relax_plt_data *data = (struct relax_plt_data *) xdata; 1305 1306 if (h->plt.offset != (bfd_vma) -1) 1307 { 1308 bfd_vma address; 1309 1310 if (h->root.type == bfd_link_hash_undefined 1311 || h->root.type == bfd_link_hash_undefweak) 1312 address = 0; 1313 else 1314 address = (h->root.u.def.section->output_section->vma 1315 + h->root.u.def.section->output_offset 1316 + h->root.u.def.value); 1317 1318 if (valid_16bit_address (address)) 1319 { 1320 h->plt.offset = -1; 1321 data->splt->size -= 4; 1322 *data->again = TRUE; 1323 } 1324 } 1325 1326 return TRUE; 1327 } 1328 1329 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1330 previously had a plt entry, give it a new entry offset. */ 1331 1332 static bfd_boolean 1333 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata) 1334 { 1335 bfd_vma *entry = (bfd_vma *) xdata; 1336 1337 if (h->plt.offset != (bfd_vma) -1) 1338 { 1339 h->plt.offset = *entry; 1340 *entry += 4; 1341 } 1342 1343 return TRUE; 1344 } 1345 1346 static bfd_boolean 1347 rl78_elf_relax_plt_section (bfd *dynobj, 1348 asection *splt, 1349 struct bfd_link_info *info, 1350 bfd_boolean *again) 1351 { 1352 struct relax_plt_data relax_plt_data; 1353 bfd *ibfd; 1354 1355 /* Assume nothing changes. */ 1356 *again = FALSE; 1357 1358 if (info->relocatable) 1359 return TRUE; 1360 1361 /* We only relax the .plt section at the moment. */ 1362 if (dynobj != elf_hash_table (info)->dynobj 1363 || strcmp (splt->name, ".plt") != 0) 1364 return TRUE; 1365 1366 /* Quick check for an empty plt. */ 1367 if (splt->size == 0) 1368 return TRUE; 1369 1370 /* Map across all global symbols; see which ones happen to 1371 fall in the low 64k. */ 1372 relax_plt_data.splt = splt; 1373 relax_plt_data.again = again; 1374 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check, 1375 &relax_plt_data); 1376 1377 /* Likewise for local symbols, though that's somewhat less convenient 1378 as we have to walk the list of input bfds and swap in symbol data. */ 1379 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1380 { 1381 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1382 Elf_Internal_Shdr *symtab_hdr; 1383 Elf_Internal_Sym *isymbuf = NULL; 1384 unsigned int idx; 1385 1386 if (! local_plt_offsets) 1387 continue; 1388 1389 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; 1390 if (symtab_hdr->sh_info != 0) 1391 { 1392 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; 1393 if (isymbuf == NULL) 1394 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr, 1395 symtab_hdr->sh_info, 0, 1396 NULL, NULL, NULL); 1397 if (isymbuf == NULL) 1398 return FALSE; 1399 } 1400 1401 for (idx = 0; idx < symtab_hdr->sh_info; ++idx) 1402 { 1403 Elf_Internal_Sym *isym; 1404 asection *tsec; 1405 bfd_vma address; 1406 1407 if (local_plt_offsets[idx] == (bfd_vma) -1) 1408 continue; 1409 1410 isym = &isymbuf[idx]; 1411 if (isym->st_shndx == SHN_UNDEF) 1412 continue; 1413 else if (isym->st_shndx == SHN_ABS) 1414 tsec = bfd_abs_section_ptr; 1415 else if (isym->st_shndx == SHN_COMMON) 1416 tsec = bfd_com_section_ptr; 1417 else 1418 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx); 1419 1420 address = (tsec->output_section->vma 1421 + tsec->output_offset 1422 + isym->st_value); 1423 if (valid_16bit_address (address)) 1424 { 1425 local_plt_offsets[idx] = -1; 1426 splt->size -= 4; 1427 *again = TRUE; 1428 } 1429 } 1430 1431 if (isymbuf != NULL 1432 && symtab_hdr->contents != (unsigned char *) isymbuf) 1433 { 1434 if (! info->keep_memory) 1435 free (isymbuf); 1436 else 1437 { 1438 /* Cache the symbols for elf_link_input_bfd. */ 1439 symtab_hdr->contents = (unsigned char *) isymbuf; 1440 } 1441 } 1442 } 1443 1444 /* If we changed anything, walk the symbols again to reallocate 1445 .plt entry addresses. */ 1446 if (*again && splt->size > 0) 1447 { 1448 bfd_vma entry = 0; 1449 1450 elf_link_hash_traverse (elf_hash_table (info), 1451 rl78_relax_plt_realloc, &entry); 1452 1453 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1454 { 1455 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1456 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info; 1457 unsigned int idx; 1458 1459 if (! local_plt_offsets) 1460 continue; 1461 1462 for (idx = 0; idx < nlocals; ++idx) 1463 if (local_plt_offsets[idx] != (bfd_vma) -1) 1464 { 1465 local_plt_offsets[idx] = entry; 1466 entry += 4; 1467 } 1468 } 1469 } 1470 1471 return TRUE; 1472 } 1473 1474 /* Delete some bytes from a section while relaxing. */ 1475 1476 static bfd_boolean 1477 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, 1478 Elf_Internal_Rela *alignment_rel, int force_snip) 1479 { 1480 Elf_Internal_Shdr * symtab_hdr; 1481 unsigned int sec_shndx; 1482 bfd_byte * contents; 1483 Elf_Internal_Rela * irel; 1484 Elf_Internal_Rela * irelend; 1485 Elf_Internal_Sym * isym; 1486 Elf_Internal_Sym * isymend; 1487 bfd_vma toaddr; 1488 unsigned int symcount; 1489 struct elf_link_hash_entry ** sym_hashes; 1490 struct elf_link_hash_entry ** end_hashes; 1491 1492 if (!alignment_rel) 1493 force_snip = 1; 1494 1495 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 1496 1497 contents = elf_section_data (sec)->this_hdr.contents; 1498 1499 /* The deletion must stop at the next alignment boundary, if 1500 ALIGNMENT_REL is non-NULL. */ 1501 toaddr = sec->size; 1502 if (alignment_rel) 1503 toaddr = alignment_rel->r_offset; 1504 1505 irel = elf_section_data (sec)->relocs; 1506 if (irel == NULL) 1507 { 1508 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE); 1509 irel = elf_section_data (sec)->relocs; 1510 } 1511 1512 irelend = irel + sec->reloc_count; 1513 1514 /* Actually delete the bytes. */ 1515 memmove (contents + addr, contents + addr + count, 1516 (size_t) (toaddr - addr - count)); 1517 1518 /* If we don't have an alignment marker to worry about, we can just 1519 shrink the section. Otherwise, we have to fill in the newly 1520 created gap with NOP insns (0x03). */ 1521 if (force_snip) 1522 sec->size -= count; 1523 else 1524 memset (contents + toaddr - count, 0x03, count); 1525 1526 /* Adjust all the relocs. */ 1527 for (; irel && irel < irelend; irel++) 1528 { 1529 /* Get the new reloc address. */ 1530 if (irel->r_offset > addr 1531 && (irel->r_offset < toaddr 1532 || (force_snip && irel->r_offset == toaddr))) 1533 irel->r_offset -= count; 1534 1535 /* If we see an ALIGN marker at the end of the gap, we move it 1536 to the beginning of the gap, since marking these gaps is what 1537 they're for. */ 1538 if (irel->r_offset == toaddr 1539 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 1540 && irel->r_addend & RL78_RELAXA_ALIGN) 1541 irel->r_offset -= count; 1542 } 1543 1544 /* Adjust the local symbols defined in this section. */ 1545 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1546 isym = (Elf_Internal_Sym *) symtab_hdr->contents; 1547 isymend = isym + symtab_hdr->sh_info; 1548 1549 for (; isym < isymend; isym++) 1550 { 1551 /* If the symbol is in the range of memory we just moved, we 1552 have to adjust its value. */ 1553 if (isym->st_shndx == sec_shndx 1554 && isym->st_value > addr 1555 && isym->st_value < toaddr) 1556 isym->st_value -= count; 1557 1558 /* If the symbol *spans* the bytes we just deleted (i.e. it's 1559 *end* is in the moved bytes but it's *start* isn't), then we 1560 must adjust its size. */ 1561 if (isym->st_shndx == sec_shndx 1562 && isym->st_value < addr 1563 && isym->st_value + isym->st_size > addr 1564 && isym->st_value + isym->st_size < toaddr) 1565 isym->st_size -= count; 1566 } 1567 1568 /* Now adjust the global symbols defined in this section. */ 1569 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 1570 - symtab_hdr->sh_info); 1571 sym_hashes = elf_sym_hashes (abfd); 1572 end_hashes = sym_hashes + symcount; 1573 1574 for (; sym_hashes < end_hashes; sym_hashes++) 1575 { 1576 struct elf_link_hash_entry *sym_hash = *sym_hashes; 1577 1578 if ((sym_hash->root.type == bfd_link_hash_defined 1579 || sym_hash->root.type == bfd_link_hash_defweak) 1580 && sym_hash->root.u.def.section == sec) 1581 { 1582 /* As above, adjust the value if needed. */ 1583 if (sym_hash->root.u.def.value > addr 1584 && sym_hash->root.u.def.value < toaddr) 1585 sym_hash->root.u.def.value -= count; 1586 1587 /* As above, adjust the size if needed. */ 1588 if (sym_hash->root.u.def.value < addr 1589 && sym_hash->root.u.def.value + sym_hash->size > addr 1590 && sym_hash->root.u.def.value + sym_hash->size < toaddr) 1591 sym_hash->size -= count; 1592 } 1593 } 1594 1595 return TRUE; 1596 } 1597 1598 /* Used to sort relocs by address. If relocs have the same address, 1599 we maintain their relative order, except that R_RL78_RH_RELAX 1600 alignment relocs must be the first reloc for any given address. */ 1601 1602 static void 1603 reloc_bubblesort (Elf_Internal_Rela * r, int count) 1604 { 1605 int i; 1606 bfd_boolean again; 1607 bfd_boolean swappit; 1608 1609 /* This is almost a classic bubblesort. It's the slowest sort, but 1610 we're taking advantage of the fact that the relocations are 1611 mostly in order already (the assembler emits them that way) and 1612 we need relocs with the same address to remain in the same 1613 relative order. */ 1614 again = TRUE; 1615 while (again) 1616 { 1617 again = FALSE; 1618 for (i = 0; i < count - 1; i ++) 1619 { 1620 if (r[i].r_offset > r[i + 1].r_offset) 1621 swappit = TRUE; 1622 else if (r[i].r_offset < r[i + 1].r_offset) 1623 swappit = FALSE; 1624 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1625 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN)) 1626 swappit = TRUE; 1627 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1628 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN) 1629 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX 1630 && (r[i].r_addend & RL78_RELAXA_ALIGN))) 1631 swappit = TRUE; 1632 else 1633 swappit = FALSE; 1634 1635 if (swappit) 1636 { 1637 Elf_Internal_Rela tmp; 1638 1639 tmp = r[i]; 1640 r[i] = r[i + 1]; 1641 r[i + 1] = tmp; 1642 /* If we do move a reloc back, re-scan to see if it 1643 needs to be moved even further back. This avoids 1644 most of the O(n^2) behavior for our cases. */ 1645 if (i > 0) 1646 i -= 2; 1647 again = TRUE; 1648 } 1649 } 1650 } 1651 } 1652 1653 1654 #define OFFSET_FOR_RELOC(rel, lrel, scale) \ 1655 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ 1656 lrel, abfd, sec, link_info, scale) 1657 1658 static bfd_vma 1659 rl78_offset_for_reloc (bfd * abfd, 1660 Elf_Internal_Rela * rel, 1661 Elf_Internal_Shdr * symtab_hdr, 1662 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED, 1663 Elf_Internal_Sym * intsyms, 1664 Elf_Internal_Rela ** lrel, 1665 bfd * input_bfd, 1666 asection * input_section, 1667 struct bfd_link_info * info, 1668 int * scale) 1669 { 1670 bfd_vma symval; 1671 bfd_reloc_status_type r; 1672 1673 *scale = 1; 1674 1675 /* REL is the first of 1..N relocations. We compute the symbol 1676 value for each relocation, then combine them if needed. LREL 1677 gets a pointer to the last relocation used. */ 1678 while (1) 1679 { 1680 int32_t tmp1, tmp2; 1681 1682 /* Get the value of the symbol referred to by the reloc. */ 1683 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) 1684 { 1685 /* A local symbol. */ 1686 Elf_Internal_Sym *isym; 1687 asection *ssec; 1688 1689 isym = intsyms + ELF32_R_SYM (rel->r_info); 1690 1691 if (isym->st_shndx == SHN_UNDEF) 1692 ssec = bfd_und_section_ptr; 1693 else if (isym->st_shndx == SHN_ABS) 1694 ssec = bfd_abs_section_ptr; 1695 else if (isym->st_shndx == SHN_COMMON) 1696 ssec = bfd_com_section_ptr; 1697 else 1698 ssec = bfd_section_from_elf_index (abfd, 1699 isym->st_shndx); 1700 1701 /* Initial symbol value. */ 1702 symval = isym->st_value; 1703 1704 /* GAS may have made this symbol relative to a section, in 1705 which case, we have to add the addend to find the 1706 symbol. */ 1707 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) 1708 symval += rel->r_addend; 1709 1710 if (ssec) 1711 { 1712 if ((ssec->flags & SEC_MERGE) 1713 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE) 1714 symval = _bfd_merged_section_offset (abfd, & ssec, 1715 elf_section_data (ssec)->sec_info, 1716 symval); 1717 } 1718 1719 /* Now make the offset relative to where the linker is putting it. */ 1720 if (ssec) 1721 symval += 1722 ssec->output_section->vma + ssec->output_offset; 1723 1724 symval += rel->r_addend; 1725 } 1726 else 1727 { 1728 unsigned long indx; 1729 struct elf_link_hash_entry * h; 1730 1731 /* An external symbol. */ 1732 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; 1733 h = elf_sym_hashes (abfd)[indx]; 1734 BFD_ASSERT (h != NULL); 1735 1736 if (h->root.type != bfd_link_hash_defined 1737 && h->root.type != bfd_link_hash_defweak) 1738 { 1739 /* This appears to be a reference to an undefined 1740 symbol. Just ignore it--it will be caught by the 1741 regular reloc processing. */ 1742 if (lrel) 1743 *lrel = rel; 1744 return 0; 1745 } 1746 1747 symval = (h->root.u.def.value 1748 + h->root.u.def.section->output_section->vma 1749 + h->root.u.def.section->output_offset); 1750 1751 symval += rel->r_addend; 1752 } 1753 1754 switch (ELF32_R_TYPE (rel->r_info)) 1755 { 1756 case R_RL78_SYM: 1757 RL78_STACK_PUSH (symval); 1758 break; 1759 1760 case R_RL78_OPneg: 1761 RL78_STACK_POP (tmp1); 1762 tmp1 = - tmp1; 1763 RL78_STACK_PUSH (tmp1); 1764 break; 1765 1766 case R_RL78_OPadd: 1767 RL78_STACK_POP (tmp1); 1768 RL78_STACK_POP (tmp2); 1769 tmp1 += tmp2; 1770 RL78_STACK_PUSH (tmp1); 1771 break; 1772 1773 case R_RL78_OPsub: 1774 RL78_STACK_POP (tmp1); 1775 RL78_STACK_POP (tmp2); 1776 tmp2 -= tmp1; 1777 RL78_STACK_PUSH (tmp2); 1778 break; 1779 1780 case R_RL78_OPmul: 1781 RL78_STACK_POP (tmp1); 1782 RL78_STACK_POP (tmp2); 1783 tmp1 *= tmp2; 1784 RL78_STACK_PUSH (tmp1); 1785 break; 1786 1787 case R_RL78_OPdiv: 1788 RL78_STACK_POP (tmp1); 1789 RL78_STACK_POP (tmp2); 1790 tmp1 /= tmp2; 1791 RL78_STACK_PUSH (tmp1); 1792 break; 1793 1794 case R_RL78_OPshla: 1795 RL78_STACK_POP (tmp1); 1796 RL78_STACK_POP (tmp2); 1797 tmp1 <<= tmp2; 1798 RL78_STACK_PUSH (tmp1); 1799 break; 1800 1801 case R_RL78_OPshra: 1802 RL78_STACK_POP (tmp1); 1803 RL78_STACK_POP (tmp2); 1804 tmp1 >>= tmp2; 1805 RL78_STACK_PUSH (tmp1); 1806 break; 1807 1808 case R_RL78_OPsctsize: 1809 RL78_STACK_PUSH (input_section->size); 1810 break; 1811 1812 case R_RL78_OPscttop: 1813 RL78_STACK_PUSH (input_section->output_section->vma); 1814 break; 1815 1816 case R_RL78_OPand: 1817 RL78_STACK_POP (tmp1); 1818 RL78_STACK_POP (tmp2); 1819 tmp1 &= tmp2; 1820 RL78_STACK_PUSH (tmp1); 1821 break; 1822 1823 case R_RL78_OPor: 1824 RL78_STACK_POP (tmp1); 1825 RL78_STACK_POP (tmp2); 1826 tmp1 |= tmp2; 1827 RL78_STACK_PUSH (tmp1); 1828 break; 1829 1830 case R_RL78_OPxor: 1831 RL78_STACK_POP (tmp1); 1832 RL78_STACK_POP (tmp2); 1833 tmp1 ^= tmp2; 1834 RL78_STACK_PUSH (tmp1); 1835 break; 1836 1837 case R_RL78_OPnot: 1838 RL78_STACK_POP (tmp1); 1839 tmp1 = ~ tmp1; 1840 RL78_STACK_PUSH (tmp1); 1841 break; 1842 1843 case R_RL78_OPmod: 1844 RL78_STACK_POP (tmp1); 1845 RL78_STACK_POP (tmp2); 1846 tmp1 %= tmp2; 1847 RL78_STACK_PUSH (tmp1); 1848 break; 1849 1850 case R_RL78_OPromtop: 1851 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset)); 1852 break; 1853 1854 case R_RL78_OPramtop: 1855 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset)); 1856 break; 1857 1858 case R_RL78_DIR16UL: 1859 case R_RL78_DIR8UL: 1860 case R_RL78_ABS16UL: 1861 case R_RL78_ABS8UL: 1862 if (rl78_stack_top) 1863 RL78_STACK_POP (symval); 1864 if (lrel) 1865 *lrel = rel; 1866 *scale = 4; 1867 return symval; 1868 1869 case R_RL78_DIR16UW: 1870 case R_RL78_DIR8UW: 1871 case R_RL78_ABS16UW: 1872 case R_RL78_ABS8UW: 1873 if (rl78_stack_top) 1874 RL78_STACK_POP (symval); 1875 if (lrel) 1876 *lrel = rel; 1877 *scale = 2; 1878 return symval; 1879 1880 default: 1881 if (rl78_stack_top) 1882 RL78_STACK_POP (symval); 1883 if (lrel) 1884 *lrel = rel; 1885 return symval; 1886 } 1887 1888 rel ++; 1889 } 1890 } 1891 1892 struct { 1893 int prefix; /* or -1 for "no prefix" */ 1894 int insn; /* or -1 for "end of list" */ 1895 int insn_for_saddr; /* or -1 for "no alternative" */ 1896 int insn_for_sfr; /* or -1 for "no alternative" */ 1897 } relax_addr16[] = { 1898 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */ 1899 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */ 1900 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */ 1901 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */ 1902 1903 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */ 1904 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */ 1905 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */ 1906 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */ 1907 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */ 1908 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */ 1909 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */ 1910 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */ 1911 1912 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */ 1913 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */ 1914 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */ 1915 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */ 1916 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */ 1917 1918 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */ 1919 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */ 1920 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */ 1921 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */ 1922 1923 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */ 1924 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */ 1925 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */ 1926 1927 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */ 1928 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */ 1929 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */ 1930 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */ 1931 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */ 1932 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */ 1933 1934 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */ 1935 1936 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */ 1937 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */ 1938 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */ 1939 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */ 1940 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */ 1941 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */ 1942 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */ 1943 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */ 1944 1945 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */ 1946 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */ 1947 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */ 1948 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */ 1949 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */ 1950 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */ 1951 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */ 1952 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */ 1953 1954 { -1, -1, -1, -1 } 1955 }; 1956 1957 /* Relax one section. */ 1958 1959 static bfd_boolean 1960 rl78_elf_relax_section 1961 (bfd * abfd, 1962 asection * sec, 1963 struct bfd_link_info * link_info, 1964 bfd_boolean * again) 1965 { 1966 Elf_Internal_Shdr * symtab_hdr; 1967 Elf_Internal_Shdr * shndx_hdr; 1968 Elf_Internal_Rela * internal_relocs; 1969 Elf_Internal_Rela * free_relocs = NULL; 1970 Elf_Internal_Rela * irel; 1971 Elf_Internal_Rela * srel; 1972 Elf_Internal_Rela * irelend; 1973 Elf_Internal_Rela * next_alignment; 1974 bfd_byte * contents = NULL; 1975 bfd_byte * free_contents = NULL; 1976 Elf_Internal_Sym * intsyms = NULL; 1977 Elf_Internal_Sym * free_intsyms = NULL; 1978 Elf_External_Sym_Shndx * shndx_buf = NULL; 1979 bfd_vma pc; 1980 bfd_vma symval ATTRIBUTE_UNUSED = 0; 1981 int pcrel ATTRIBUTE_UNUSED = 0; 1982 int code ATTRIBUTE_UNUSED = 0; 1983 int section_alignment_glue; 1984 int scale; 1985 1986 if (abfd == elf_hash_table (link_info)->dynobj 1987 && strcmp (sec->name, ".plt") == 0) 1988 return rl78_elf_relax_plt_section (abfd, sec, link_info, again); 1989 1990 /* Assume nothing changes. */ 1991 *again = FALSE; 1992 1993 /* We don't have to do anything for a relocatable link, if 1994 this section does not have relocs, or if this is not a 1995 code section. */ 1996 if (link_info->relocatable 1997 || (sec->flags & SEC_RELOC) == 0 1998 || sec->reloc_count == 0 1999 || (sec->flags & SEC_CODE) == 0) 2000 return TRUE; 2001 2002 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 2003 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr; 2004 2005 /* Get the section contents. */ 2006 if (elf_section_data (sec)->this_hdr.contents != NULL) 2007 contents = elf_section_data (sec)->this_hdr.contents; 2008 /* Go get them off disk. */ 2009 else 2010 { 2011 if (! bfd_malloc_and_get_section (abfd, sec, &contents)) 2012 goto error_return; 2013 elf_section_data (sec)->this_hdr.contents = contents; 2014 } 2015 2016 /* Read this BFD's symbols. */ 2017 /* Get cached copy if it exists. */ 2018 if (symtab_hdr->contents != NULL) 2019 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; 2020 else 2021 { 2022 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); 2023 symtab_hdr->contents = (bfd_byte *) intsyms; 2024 } 2025 2026 if (shndx_hdr->sh_size != 0) 2027 { 2028 bfd_size_type amt; 2029 2030 amt = symtab_hdr->sh_info; 2031 amt *= sizeof (Elf_External_Sym_Shndx); 2032 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt); 2033 if (shndx_buf == NULL) 2034 goto error_return; 2035 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0 2036 || bfd_bread (shndx_buf, amt, abfd) != amt) 2037 goto error_return; 2038 shndx_hdr->contents = (bfd_byte *) shndx_buf; 2039 } 2040 2041 /* Get a copy of the native relocations. */ 2042 internal_relocs = (_bfd_elf_link_read_relocs 2043 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, 2044 link_info->keep_memory)); 2045 if (internal_relocs == NULL) 2046 goto error_return; 2047 if (! link_info->keep_memory) 2048 free_relocs = internal_relocs; 2049 2050 /* The RL_ relocs must be just before the operand relocs they go 2051 with, so we must sort them to guarantee this. We use bubblesort 2052 instead of qsort so we can guarantee that relocs with the same 2053 address remain in the same relative order. */ 2054 reloc_bubblesort (internal_relocs, sec->reloc_count); 2055 2056 /* Walk through them looking for relaxing opportunities. */ 2057 irelend = internal_relocs + sec->reloc_count; 2058 2059 2060 /* This will either be NULL or a pointer to the next alignment 2061 relocation. */ 2062 next_alignment = internal_relocs; 2063 2064 /* We calculate worst case shrinkage caused by alignment directives. 2065 No fool-proof, but better than either ignoring the problem or 2066 doing heavy duty analysis of all the alignment markers in all 2067 input sections. */ 2068 section_alignment_glue = 0; 2069 for (irel = internal_relocs; irel < irelend; irel++) 2070 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 2071 && irel->r_addend & RL78_RELAXA_ALIGN) 2072 { 2073 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2074 2075 if (section_alignment_glue < this_glue) 2076 section_alignment_glue = this_glue; 2077 } 2078 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte 2079 shrinkage. */ 2080 section_alignment_glue *= 2; 2081 2082 for (irel = internal_relocs; irel < irelend; irel++) 2083 { 2084 unsigned char *insn; 2085 int nrelocs; 2086 2087 /* The insns we care about are all marked with one of these. */ 2088 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX) 2089 continue; 2090 2091 if (irel->r_addend & RL78_RELAXA_ALIGN 2092 || next_alignment == internal_relocs) 2093 { 2094 /* When we delete bytes, we need to maintain all the alignments 2095 indicated. In addition, we need to be careful about relaxing 2096 jumps across alignment boundaries - these displacements 2097 *grow* when we delete bytes. For now, don't shrink 2098 displacements across an alignment boundary, just in case. 2099 Note that this only affects relocations to the same 2100 section. */ 2101 next_alignment += 2; 2102 while (next_alignment < irelend 2103 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX 2104 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN))) 2105 next_alignment ++; 2106 if (next_alignment >= irelend || next_alignment->r_offset == 0) 2107 next_alignment = NULL; 2108 } 2109 2110 /* When we hit alignment markers, see if we've shrunk enough 2111 before them to reduce the gap without violating the alignment 2112 requirements. */ 2113 if (irel->r_addend & RL78_RELAXA_ALIGN) 2114 { 2115 /* At this point, the next relocation *should* be the ELIGN 2116 end marker. */ 2117 Elf_Internal_Rela *erel = irel + 1; 2118 unsigned int alignment, nbytes; 2119 2120 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX) 2121 continue; 2122 if (!(erel->r_addend & RL78_RELAXA_ELIGN)) 2123 continue; 2124 2125 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2126 2127 if (erel->r_offset - irel->r_offset < alignment) 2128 continue; 2129 2130 nbytes = erel->r_offset - irel->r_offset; 2131 nbytes /= alignment; 2132 nbytes *= alignment; 2133 2134 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment, 2135 erel->r_offset == sec->size); 2136 *again = TRUE; 2137 2138 continue; 2139 } 2140 2141 if (irel->r_addend & RL78_RELAXA_ELIGN) 2142 continue; 2143 2144 insn = contents + irel->r_offset; 2145 2146 nrelocs = irel->r_addend & RL78_RELAXA_RNUM; 2147 2148 /* At this point, we have an insn that is a candidate for linker 2149 relaxation. There are NRELOCS relocs following that may be 2150 relaxed, although each reloc may be made of more than one 2151 reloc entry (such as gp-rel symbols). */ 2152 2153 /* Get the value of the symbol referred to by the reloc. Just 2154 in case this is the last reloc in the list, use the RL's 2155 addend to choose between this reloc (no addend) or the next 2156 (yes addend, which means at least one following reloc). */ 2157 2158 /* srel points to the "current" reloction for this insn - 2159 actually the last reloc for a given operand, which is the one 2160 we need to update. We check the relaxations in the same 2161 order that the relocations happen, so we'll just push it 2162 along as we go. */ 2163 srel = irel; 2164 2165 pc = sec->output_section->vma + sec->output_offset 2166 + srel->r_offset; 2167 2168 #define GET_RELOC \ 2169 BFD_ASSERT (nrelocs > 0); \ 2170 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ 2171 pcrel = symval - pc + srel->r_addend; \ 2172 nrelocs --; 2173 2174 #define SNIPNR(offset, nbytes) \ 2175 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0); 2176 #define SNIP(offset, nbytes, newtype) \ 2177 SNIPNR (offset, nbytes); \ 2178 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) 2179 2180 /* The order of these bit tests must match the order that the 2181 relocs appear in. Since we sorted those by offset, we can 2182 predict them. */ 2183 2184 /*----------------------------------------------------------------------*/ 2185 /* EF ad BR $rel8 pcrel 2186 ED al ah BR !abs16 abs 2187 EE al ah BR $!rel16 pcrel 2188 EC al ah as BR !!abs20 abs 2189 2190 FD al ah CALL !abs16 abs 2191 FE al ah CALL $!rel16 pcrel 2192 FC al ah as CALL !!abs20 abs 2193 2194 DC ad BC $rel8 2195 DE ad BNC $rel8 2196 DD ad BZ $rel8 2197 DF ad BNZ $rel8 2198 61 C3 ad BH $rel8 2199 61 D3 ad BNH $rel8 2200 61 C8 EF ad SKC ; BR $rel8 2201 61 D8 EF ad SKNC ; BR $rel8 2202 61 E8 EF ad SKZ ; BR $rel8 2203 61 F8 EF ad SKNZ ; BR $rel8 2204 61 E3 EF ad SKH ; BR $rel8 2205 61 F3 EF ad SKNH ; BR $rel8 2206 */ 2207 2208 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA) 2209 { 2210 /* SKIP opcodes that skip non-branches will have a relax tag 2211 but no corresponding symbol to relax against; we just 2212 skip those. */ 2213 if (irel->r_addend & RL78_RELAXA_RNUM) 2214 { 2215 GET_RELOC; 2216 } 2217 2218 switch (insn[0]) 2219 { 2220 case 0xec: /* BR !!abs20 */ 2221 2222 if (pcrel < 127 2223 && pcrel > -127) 2224 { 2225 insn[0] = 0xef; 2226 insn[1] = pcrel; 2227 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2228 *again = TRUE; 2229 } 2230 else if (symval < 65536) 2231 { 2232 insn[0] = 0xed; 2233 insn[1] = symval & 0xff; 2234 insn[2] = symval >> 8; 2235 SNIP (2, 1, R_RL78_DIR16S); 2236 *again = TRUE; 2237 } 2238 else if (pcrel < 32767 2239 && pcrel > -32767) 2240 { 2241 insn[0] = 0xee; 2242 insn[1] = pcrel & 0xff; 2243 insn[2] = pcrel >> 8; 2244 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2245 *again = TRUE; 2246 } 2247 break; 2248 2249 case 0xee: /* BR $!pcrel16 */ 2250 case 0xed: /* BR $!abs16 */ 2251 if (pcrel < 127 2252 && pcrel > -127) 2253 { 2254 insn[0] = 0xef; 2255 insn[1] = pcrel; 2256 SNIP (2, 1, R_RL78_DIR8S_PCREL); 2257 *again = TRUE; 2258 } 2259 break; 2260 2261 case 0xfc: /* CALL !!abs20 */ 2262 if (symval < 65536) 2263 { 2264 insn[0] = 0xfd; 2265 insn[1] = symval & 0xff; 2266 insn[2] = symval >> 8; 2267 SNIP (2, 1, R_RL78_DIR16S); 2268 *again = TRUE; 2269 } 2270 else if (pcrel < 32767 2271 && pcrel > -32767) 2272 { 2273 insn[0] = 0xfe; 2274 insn[1] = pcrel & 0xff; 2275 insn[2] = pcrel >> 8; 2276 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2277 *again = TRUE; 2278 } 2279 break; 2280 2281 case 0x61: /* PREFIX */ 2282 /* For SKIP/BR, we change the BR opcode and delete the 2283 SKIP. That way, we don't have to find and change the 2284 relocation for the BR. */ 2285 /* Note that, for the case where we're skipping some 2286 other insn, we have no "other" reloc but that's safe 2287 here anyway. */ 2288 switch (insn[1]) 2289 { 2290 case 0xc8: /* SKC */ 2291 if (insn[2] == 0xef) 2292 { 2293 insn[2] = 0xde; /* BNC */ 2294 SNIPNR (0, 2); 2295 } 2296 break; 2297 2298 case 0xd8: /* SKNC */ 2299 if (insn[2] == 0xef) 2300 { 2301 insn[2] = 0xdc; /* BC */ 2302 SNIPNR (0, 2); 2303 } 2304 break; 2305 2306 case 0xe8: /* SKZ */ 2307 if (insn[2] == 0xef) 2308 { 2309 insn[2] = 0xdf; /* BNZ */ 2310 SNIPNR (0, 2); 2311 } 2312 break; 2313 2314 case 0xf8: /* SKNZ */ 2315 if (insn[2] == 0xef) 2316 { 2317 insn[2] = 0xdd; /* BZ */ 2318 SNIPNR (0, 2); 2319 } 2320 break; 2321 2322 case 0xe3: /* SKH */ 2323 if (insn[2] == 0xef) 2324 { 2325 insn[2] = 0xd3; /* BNH */ 2326 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2327 } 2328 break; 2329 2330 case 0xf3: /* SKNH */ 2331 if (insn[2] == 0xef) 2332 { 2333 insn[2] = 0xc3; /* BH */ 2334 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2335 } 2336 break; 2337 } 2338 break; 2339 } 2340 2341 } 2342 2343 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16) 2344 { 2345 /*----------------------------------------------------------------------*/ 2346 /* Some insns have both a 16-bit address operand and an 8-bit 2347 variant if the address is within a special range: 2348 2349 Address 16-bit operand SADDR range SFR range 2350 FFF00-FFFFF 0xff00-0xffff 0x00-0xff 2351 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff 2352 2353 The RELAX_ADDR16[] array has the insn encodings for the 2354 16-bit operand version, as well as the SFR and SADDR 2355 variants. We only need to replace the encodings and 2356 adjust the operand. 2357 2358 Note: we intentionally do not attempt to decode and skip 2359 any ES: prefix, as adding ES: means the addr16 (likely) 2360 no longer points to saddr/sfr space. 2361 */ 2362 2363 int is_sfr; 2364 int is_saddr; 2365 int idx; 2366 int poff; 2367 2368 GET_RELOC; 2369 2370 if (0xffe20 <= symval && symval <= 0xfffff) 2371 { 2372 2373 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f); 2374 is_sfr = (0xfff00 <= symval && symval <= 0xfffff); 2375 2376 for (idx = 0; relax_addr16[idx].insn != -1; idx ++) 2377 { 2378 if (relax_addr16[idx].prefix != -1 2379 && insn[0] == relax_addr16[idx].prefix 2380 && insn[1] == relax_addr16[idx].insn) 2381 { 2382 poff = 1; 2383 } 2384 else if (relax_addr16[idx].prefix == -1 2385 && insn[0] == relax_addr16[idx].insn) 2386 { 2387 poff = 0; 2388 } 2389 else 2390 continue; 2391 2392 /* We have a matched insn, and poff is 0 or 1 depending 2393 on the base pattern size. */ 2394 2395 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1) 2396 { 2397 insn[poff] = relax_addr16[idx].insn_for_sfr; 2398 SNIP (poff+2, 1, R_RL78_RH_SFR); 2399 } 2400 2401 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1) 2402 { 2403 insn[poff] = relax_addr16[idx].insn_for_saddr; 2404 SNIP (poff+2, 1, R_RL78_RH_SADDR); 2405 } 2406 2407 } 2408 } 2409 } 2410 2411 /*----------------------------------------------------------------------*/ 2412 2413 } 2414 2415 return TRUE; 2416 2417 error_return: 2418 if (free_relocs != NULL) 2419 free (free_relocs); 2420 2421 if (free_contents != NULL) 2422 free (free_contents); 2423 2424 if (shndx_buf != NULL) 2425 { 2426 shndx_hdr->contents = NULL; 2427 free (shndx_buf); 2428 } 2429 2430 if (free_intsyms != NULL) 2431 free (free_intsyms); 2432 2433 return TRUE; 2434 } 2435 2436 2437 2439 #define ELF_ARCH bfd_arch_rl78 2440 #define ELF_MACHINE_CODE EM_RL78 2441 #define ELF_MAXPAGESIZE 0x1000 2442 2443 #define TARGET_LITTLE_SYM rl78_elf32_vec 2444 #define TARGET_LITTLE_NAME "elf32-rl78" 2445 2446 #define elf_info_to_howto_rel NULL 2447 #define elf_info_to_howto rl78_info_to_howto_rela 2448 #define elf_backend_object_p rl78_elf_object_p 2449 #define elf_backend_relocate_section rl78_elf_relocate_section 2450 #define elf_symbol_leading_char ('_') 2451 #define elf_backend_can_gc_sections 1 2452 2453 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup 2454 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup 2455 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags 2456 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data 2457 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data 2458 2459 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section 2460 #define elf_backend_check_relocs rl78_elf_check_relocs 2461 #define elf_backend_always_size_sections \ 2462 rl78_elf_always_size_sections 2463 #define elf_backend_finish_dynamic_sections \ 2464 rl78_elf_finish_dynamic_sections 2465 2466 #include "elf32-target.h" 2467
