1 ; Fujitsu FRV opcode support, for GNU Binutils. -*- Scheme -*- 2 ; 3 ; Copyright 2000, 2001, 2003, 2004, 2007, 2009 Free Software Foundation, Inc. 4 ; 5 ; Contributed by Red Hat Inc; developed under contract from Fujitsu. 6 ; 7 ; This file is part of the GNU Binutils. 8 ; 9 ; This program is free software; you can redistribute it and/or modify 10 ; it under the terms of the GNU General Public License as published by 11 ; the Free Software Foundation; either version 3 of the License, or 12 ; (at your option) any later version. 13 ; 14 ; This program is distributed in the hope that it will be useful, 15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of 16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 ; GNU General Public License for more details. 18 ; 19 ; You should have received a copy of the GNU General Public License 20 ; along with this program; if not, write to the Free Software 21 ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 22 ; MA 02110-1301, USA. 23 24 (include "simplify.inc") 25 26 ; define-arch must appear first 27 28 (define-arch 29 (name frv) ; name of cpu architecture 30 (comment "Fujitsu FRV") 31 (insn-lsb0? #t) 32 (machs frv fr550 fr500 fr450 fr400 tomcat simple) 33 (isas frv) 34 ) 35 36 (define-isa 37 (name frv) 38 (base-insn-bitsize 32) 39 ; Initial bitnumbers to decode insns by. 40 (decode-assist (24 23 22 21 20 19 18)) 41 (liw-insns 1) ; The frv fetches up to 1 insns at a time. 42 (parallel-insns 8) ; The frv executes up to 8 insns at a time. 43 ) 44 45 ; Cpu family definitions. 46 ; 47 (define-cpu 48 ; cpu names must be distinct from the architecture name and machine names. 49 ; The "b" suffix stands for "base" and is the convention. 50 ; The "f" suffix stands for "family" and is the convention. 51 (name frvbf) 52 (comment "Fujitsu FRV base family") 53 (endian big) 54 (word-bitsize 32) 55 ) 56 58 ; Generic FR-V machine. Supports the entire architecture 59 (define-mach 60 (name frv) 61 (comment "Generic FRV cpu") 62 (cpu frvbf) 63 ) 64 (define-model 65 (name frv) (comment "Generic FRV model") (attrs) 66 (mach frv) 67 68 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 69 70 ; `state' is a list of variables for recording model state 71 ; (state) 72 73 (unit u-exec "Execution Unit" () 74 1 1 ; issue done 75 () ; state 76 () ; inputs 77 () ; outputs 78 () ; profile action (default) 79 ) 80 ) 81 83 ; FR550 machine 84 (define-mach 85 (name fr550) 86 (comment "FR550 cpu") 87 (cpu frvbf) 88 ) 89 (define-model 90 (name fr550) (comment "FR550 model") (attrs) 91 (mach fr550) 92 93 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 94 95 ; `state' is a list of variables for recording model state 96 (state 97 ; State items 98 ; These are all masks with each bit representing one register. 99 (prev-fr-load DI) ; Previous use of FR register was target of a load 100 (prev-fr-complex-1 DI) ; Previous use of FR register has variable latency 101 (prev-fr-complex-2 DI) ; Previous use of FR register has variable latency 102 (prev-ccr-complex DI) ; Previous use of CCR register has variable latency 103 (prev-acc-mmac DI) ; Previous use of ACC register was a MMAC category 104 (cur-fr-load DI) ; Current use of FR register was target of a load 105 (cur-fr-complex-1 DI) ; Current use of FR register has variable latency 106 (cur-fr-complex-2 DI) ; Current use of FR register has variable latency 107 (cur-ccr-complex SI) ; Current use of CCR register has variable latency 108 (cur-acc-mmac DI) ; Current use of ACC register was a MMAC category 109 ) 110 ; Basic unit for instructions with no latency penalties 111 (unit u-exec "Execution Unit" () 112 1 1 ; issue done 113 () ; state 114 () ; inputs 115 () ; outputs 116 () ; profile action (default) 117 ) 118 ; Basic integer insn unit 119 (unit u-integer "Integer Unit" () 120 1 1 ; issue done 121 () ; state 122 ((GRi INT -1) (GRj INT -1)) ; inputs 123 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 124 () ; profile action (default) 125 ) 126 ; Integer multiplication unit 127 (unit u-imul "Integer Multiplication Unit" () 128 1 1 ; issue done 129 () ; state 130 ((GRi INT -1) (GRj INT -1)) ; inputs 131 ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs 132 () ; profile action (default) 133 ) 134 ; Integer division unit 135 (unit u-idiv "Integer Division Unit" () 136 1 1 ; issue done 137 () ; state 138 ((GRi INT -1) (GRj INT -1)) ; inputs 139 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 140 () ; profile action (default) 141 ) 142 ; Branch unit 143 (unit u-branch "Branch Unit" () 144 1 1 ; issue done 145 () ; state 146 ((GRi INT -1) (GRj INT -1) 147 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 148 ((pc)) ; outputs 149 () ; profile action (default) 150 ) 151 ; Trap unit 152 (unit u-trap "Trap Unit" () 153 1 1 ; issue done 154 () ; state 155 ((GRi INT -1) (GRj INT -1) 156 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 157 () ; outputs 158 () ; profile action (default) 159 ) 160 ; Condition code check unit 161 (unit u-check "Check Unit" () 162 1 1 ; issue done 163 () ; state 164 ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs 165 () ; outputs 166 () ; profile action (default) 167 ) 168 ; Float Arithmetic unit 169 (unit u-float-arith "Float Arithmetic unit" () 170 1 1 ; issue done 171 () ; state 172 ((FRi INT -1) (FRj INT -1) ; inputs 173 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 174 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 175 () ; profile action (default) 176 ) 177 ; Float Dual Arithmetic unit 178 (unit u-float-dual-arith "Float Arithmetic unit" () 179 ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI 180 1 3 ; issue done 181 () ; state 182 ((FRi INT -1) (FRj INT -1) ; inputs 183 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 184 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 185 () ; profile action (default) 186 ) 187 ; Float Div unit 188 (unit u-float-div "Float Div unit" () 189 1 1 ; issue done 190 () ; state 191 ((FRi INT -1) (FRj INT -1)) ; inputs 192 ((FRk INT -1)) ; outputs 193 () ; profile action (default) 194 ) 195 ; Float Square Root unit 196 (unit u-float-sqrt "Float Square Root unit" () 197 1 1 ; issue done 198 () ; state 199 ((FRj INT -1) (FRdoublej INT -1)) ; inputs 200 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 201 () ; profile action (default) 202 ) 203 ; Float Compare unit 204 (unit u-float-compare "Float Compare unit" () 205 1 1 ; issue done 206 () ; state 207 ((FRi INT -1) (FRj INT -1) 208 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 209 ((FCCi_2 INT -1)) ; outputs 210 () ; profile action (default) 211 ) 212 ; Dual Float Compare unit 213 (unit u-float-dual-compare "Float Dual Compare unit" () 214 ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI 215 1 3 ; issue done 216 () ; state 217 ((FRi INT -1) (FRj INT -1)) ; inputs 218 ((FCCi_2 INT -1)) ; outputs 219 () ; profile action (default) 220 ) 221 ; FR Move to GR unit 222 (unit u-fr2gr "FR Move to GR Unit" () 223 1 1 ; issue done 224 () ; state 225 ((FRintk INT -1)) ; inputs 226 ((GRj INT -1)) ; outputs 227 () ; profile action (default) 228 ) 229 ; GR Move to FR unit 230 (unit u-gr2fr "GR Move to FR Unit" () 231 1 1 ; issue done 232 () ; state 233 ((GRj INT -1)) ; inputs 234 ((FRintk INT -1)) ; outputs 235 () ; profile action (default) 236 ) 237 ; SPR Move to GR unit 238 (unit u-spr2gr "SPR Move to GR Unit" () 239 1 1 ; issue done 240 () ; state 241 ((spr INT -1)) ; inputs 242 ((GRj INT -1)) ; outputs 243 () ; profile action (default) 244 ) 245 ; GR Move to SPR unit 246 (unit u-gr2spr "GR Move to SPR Unit" () 247 1 1 ; issue done 248 () ; state 249 ((GRj INT -1)) ; inputs 250 ((spr INT -1)) ; outputs 251 () ; profile action (default) 252 ) 253 ; GR set half unit 254 (unit u-set-hilo "GR Set Half" () 255 1 1 ; issue done 256 () ; state 257 () ; inputs 258 ((GRkhi INT -1) (GRklo INT -1)) ; outputs 259 () ; profile action (default) 260 ) 261 ; GR load unit 262 (unit u-gr-load "GR Load Unit" () 263 1 1 ; issue done 264 () ; state 265 ((GRi INT -1) (GRj INT -1)) ; inputs 266 ((GRk INT -1) (GRdoublek INT -1)) ; outputs 267 () ; profile action (default) 268 ) 269 ; GR store unit 270 (unit u-gr-store "GR Store Unit" () 271 1 1 ; issue done 272 () ; state 273 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs 274 () ; outputs 275 () ; profile action (default) 276 ) 277 ; FR load unit 278 (unit u-fr-load "FR Load Unit" () 279 1 1 ; issue done 280 () ; state 281 ((GRi INT -1) (GRj INT -1)) ; inputs 282 ((FRintk INT -1) (FRdoublek INT -1)) ; outputs 283 () ; profile action (default) 284 ) 285 ; FR store unit 286 (unit u-fr-store "FR Store Unit" () 287 1 1 ; issue done 288 () ; state 289 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs 290 () ; outputs 291 () ; profile action (default) 292 ) 293 ; Swap unit 294 (unit u-swap "Swap Unit" () 295 1 1 ; issue done 296 () ; state 297 ((GRi INT -1) (GRj INT -1)) ; inputs 298 ((GRk INT -1)) ; outputs 299 () ; profile action (default) 300 ) 301 ; FR Move to FR unit 302 (unit u-fr2fr "FR Move to FR Unit" () 303 1 1 ; issue done 304 () ; state 305 ((FRi INT -1)) ; inputs 306 ((FRk INT -1)) ; outputs 307 () ; profile action (default) 308 ) 309 ; Clrgr unit 310 (unit u-clrgr "Clrgr Unit" () 311 1 1 ; issue done 312 () ; state 313 ((GRk INT -1)) ; inputs 314 () ; outputs 315 () ; profile action (default) 316 ) 317 ; Clrfr unit 318 (unit u-clrfr "Clrfr Unit" () 319 1 1 ; issue done 320 () ; state 321 ((FRk INT -1)) ; inputs 322 () ; outputs 323 () ; profile action (default) 324 ) 325 ; Insn cache invalidate unit 326 (unit u-ici "Insn cache invalidate unit" () 327 1 1 ; issue done 328 () ; state 329 ((GRi INT -1) (GRj INT -1)) ; inputs 330 () ; outputs 331 () ; profile action (default) 332 ) 333 ; Data cache invalidate unit 334 (unit u-dci "Data cache invalidate unit" () 335 1 1 ; issue done 336 () ; state 337 ((GRi INT -1) (GRj INT -1)) ; inputs 338 () ; outputs 339 () ; profile action (default) 340 ) 341 ; Data cache flush unit 342 (unit u-dcf "Data cache flush unit" () 343 1 1 ; issue done 344 () ; state 345 ((GRi INT -1) (GRj INT -1)) ; inputs 346 () ; outputs 347 () ; profile action (default) 348 ) 349 ; Insn cache preload unit 350 (unit u-icpl "Insn cache preload unit" () 351 1 1 ; issue done 352 () ; state 353 ((GRi INT -1) (GRj INT -1)) ; inputs 354 () ; outputs 355 () ; profile action (default) 356 ) 357 ; Data cache preload unit 358 (unit u-dcpl "Data cache preload unit" () 359 1 1 ; issue done 360 () ; state 361 ((GRi INT -1) (GRj INT -1)) ; inputs 362 () ; outputs 363 () ; profile action (default) 364 ) 365 ; Insn cache unlock unit 366 (unit u-icul "Insn cache unlock unit" () 367 1 1 ; issue done 368 () ; state 369 ((GRi INT -1) (GRj INT -1)) ; inputs 370 () ; outputs 371 () ; profile action (default) 372 ) 373 ; Data cache unlock unit 374 (unit u-dcul "Data cache unlock unit" () 375 1 1 ; issue done 376 () ; state 377 ((GRi INT -1) (GRj INT -1)) ; inputs 378 () ; outputs 379 () ; profile action (default) 380 ) 381 ; commit unit 382 (unit u-commit "Commit Unit" () 383 1 1 ; issue done 384 () ; state 385 ((GRk INT -1) (FRk INT -1)) ; inputs 386 () ; outputs 387 () ; profile action (default) 388 ) 389 ; Float Conversion unit 390 (unit u-float-convert "Float Conversion unit" () 391 1 1 ; issue done 392 () ; state 393 ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs 394 ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs 395 () ; profile action (default) 396 ) 397 ; Media units 398 (unit u-media "Media unit" () 399 1 1 ; issue done 400 () ; state 401 ((FRinti INT -1) (FRintj INT -1)) ; inputs 402 ((FRintk INT -1)) ; outputs 403 () ; profile action (default) 404 ) 405 (unit u-media-quad "Media-quad unit" () 406 1 1 ; issue done 407 () ; state 408 ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs 409 ((FRintkeven INT -1)) ; outputs 410 () ; profile action (default) 411 ) 412 (unit u-media-dual-expand "Media Dual Expand unit" () 413 1 1 ; issue done 414 () ; state 415 ((FRinti INT -1)) ; inputs 416 ((FRintkeven INT -1)) ; outputs 417 () ; profile action (default) 418 ) 419 (unit u-media-3-dual "Media-3-dual unit" () 420 1 1 ; issue done 421 () ; state 422 ((FRinti INT -1)) ; inputs 423 ((FRintk INT -1)) ; outputs 424 () ; profile action (default) 425 ) 426 (unit u-media-3-acc "Media unit for M-3 using ACC" () 427 1 1 ; issue done 428 () ; state 429 ((FRintj INT -1) (ACC40Si INT -1)) ; inputs 430 ((FRintk INT -1)) ; outputs 431 () ; profile action (default) 432 ) 433 (unit u-media-3-acc-dual "Media-3-acc-dual unit" () 434 1 1 ; issue done 435 () ; state 436 ((ACC40Si INT -1)) ; inputs 437 ((FRintkeven INT -1)) ; outputs 438 () ; profile action (default) 439 ) 440 (unit u-media-3-wtacc "Media-3-wtacc unit" () 441 1 1 ; issue done 442 () ; state 443 ((FRinti INT -1) (ACC40Sk INT -1)) ; inputs 444 () ; outputs 445 () ; profile action (default) 446 ) 447 (unit u-media-3-mclracc "Media-3-mclracc unit" () 448 1 1 ; issue done 449 () ; state 450 () ; inputs 451 () ; outputs 452 () ; profile action (default) 453 ) 454 (unit u-media-set "Media set" () 455 1 1 ; issue done 456 () ; state 457 () ; inputs 458 ((FRintk INT -1)) ; outputs 459 () ; profile action (default) 460 ) 461 (unit u-media-4 "Media-4 unit" () 462 1 1 ; issue done 463 () ; state 464 ((FRinti INT -1) (FRintj INT -1)) ; inputs 465 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 466 () ; profile action (default) 467 ) 468 (unit u-media-4-acc "Media-4-acc unit" () 469 1 1 ; issue done 470 () ; state 471 ((ACC40Si INT -1)) ; inputs 472 ((ACC40Sk INT -1)) ; outputs 473 () ; profile action (default) 474 ) 475 (unit u-media-4-acc-dual "Media-4-acc-dual unit" () 476 1 1 ; issue done 477 () ; state 478 ((ACC40Si INT -1)) ; inputs 479 ((ACC40Sk INT -1)) ; outputs 480 () ; profile action (default) 481 ) 482 (unit u-media-4-add-sub "Media-4-add-sub unit" () 483 1 1 ; issue done 484 () ; state 485 ((ACC40Si INT -1)) ; inputs 486 ((ACC40Sk INT -1)) ; outputs 487 () ; profile action (default) 488 ) 489 (unit u-media-4-add-sub-dual "Media-4-add-sub-dual unit" () 490 1 1 ; issue done 491 () ; state 492 ((ACC40Si INT -1)) ; inputs 493 ((ACC40Sk INT -1)) ; outputs 494 () ; profile action (default) 495 ) 496 (unit u-media-4-quad "Media-4-quad unit" () 497 1 1 ; issue done 498 () ; state 499 ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs 500 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 501 () ; profile action (default) 502 ) 503 ) 504 505 ; FR500 machine. 506 (define-mach 507 (name fr500) 508 (comment "FR500 cpu") 509 (cpu frvbf) 510 ) 511 (define-model 512 (name fr500) (comment "FR500 model") (attrs) 513 (mach fr500) 514 515 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 516 517 ; `state' is a list of variables for recording model state 518 (state 519 ; State items 520 ; These are all masks with each bit representing one register. 521 (prev-fpop DI) ; Previous use of FR register was floating point insn 522 (prev-media DI) ; Previous use of FR register was a media insn 523 (prev-cc-complex DI) ; Previous use of ICC register was not simple 524 (cur-fpop DI) ; Current use of FR register was floating point insn 525 (cur-media DI) ; Current use of FR register was a media insn 526 (cur-cc-complex DI) ; Current use of ICC register was not simple 527 ) 528 ; Basic unit for instructions with no latency penalties 529 (unit u-exec "Execution Unit" () 530 1 1 ; issue done 531 () ; state 532 () ; inputs 533 () ; outputs 534 () ; profile action (default) 535 ) 536 ; Basic integer insn unit 537 (unit u-integer "Integer Unit" () 538 1 1 ; issue done 539 () ; state 540 ((GRi INT -1) (GRj INT -1)) ; inputs 541 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 542 () ; profile action (default) 543 ) 544 ; Integer multiplication unit 545 (unit u-imul "Integer Multiplication Unit" () 546 1 1 ; issue done 547 () ; state 548 ((GRi INT -1) (GRj INT -1)) ; inputs 549 ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs 550 () ; profile action (default) 551 ) 552 ; Integer division unit 553 (unit u-idiv "Integer Division Unit" () 554 1 1 ; issue done 555 () ; state 556 ((GRi INT -1) (GRj INT -1)) ; inputs 557 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 558 () ; profile action (default) 559 ) 560 ; Branch unit 561 (unit u-branch "Branch Unit" () 562 1 1 ; issue done 563 () ; state 564 ((GRi INT -1) (GRj INT -1) 565 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 566 ((pc)) ; outputs 567 () ; profile action (default) 568 ) 569 ; Trap unit 570 (unit u-trap "Trap Unit" () 571 1 1 ; issue done 572 () ; state 573 ((GRi INT -1) (GRj INT -1) 574 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 575 () ; outputs 576 () ; profile action (default) 577 ) 578 ; Condition code check unit 579 (unit u-check "Check Unit" () 580 1 1 ; issue done 581 () ; state 582 ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs 583 () ; outputs 584 () ; profile action (default) 585 ) 586 ; Clrgr unit 587 (unit u-clrgr "Clrgr Unit" () 588 1 1 ; issue done 589 () ; state 590 ((GRk INT -1)) ; inputs 591 () ; outputs 592 () ; profile action (default) 593 ) 594 ; Clrfr unit 595 (unit u-clrfr "Clrfr Unit" () 596 1 1 ; issue done 597 () ; state 598 ((FRk INT -1)) ; inputs 599 () ; outputs 600 () ; profile action (default) 601 ) 602 ; GR set half unit 603 (unit u-set-hilo "GR Set Half" () 604 1 1 ; issue done 605 () ; state 606 () ; inputs 607 ((GRkhi INT -1) (GRklo INT -1)) ; outputs 608 () ; profile action (default) 609 ) 610 ; GR load unit -- TODO doesn't handle quad 611 (unit u-gr-load "GR Load Unit" () 612 1 1 ; issue done 613 () ; state 614 ((GRi INT -1) (GRj INT -1)) ; inputs 615 ((GRk INT -1) (GRdoublek INT -1)) ; outputs 616 () ; profile action (default) 617 ) 618 ; GR store unit -- TODO doesn't handle quad 619 (unit u-gr-store "GR Store Unit" () 620 1 1 ; issue done 621 () ; state 622 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs 623 () ; outputs 624 () ; profile action (default) 625 ) 626 ; GR recovering store unit -- TODO doesn't handle quad 627 (unit u-gr-r-store "GR Recovering Store Unit" () 628 1 1 ; issue done 629 () ; state 630 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs 631 () ; outputs 632 () ; profile action (default) 633 ) 634 ; FR load unit -- TODO doesn't handle quad 635 (unit u-fr-load "FR Load Unit" () 636 1 1 ; issue done 637 () ; state 638 ((GRi INT -1) (GRj INT -1)) ; inputs 639 ((FRintk INT -1) (FRdoublek INT -1)) ; outputs 640 () ; profile action (default) 641 ) 642 ; FR store unit -- TODO doesn't handle quad 643 (unit u-fr-store "FR Store Unit" () 644 1 1 ; issue done 645 () ; state 646 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs 647 () ; outputs 648 () ; profile action (default) 649 ) 650 ; FR recovering store unit -- TODO doesn't handle quad 651 (unit u-fr-r-store "FR Recovering Store Unit" () 652 1 1 ; issue done 653 () ; state 654 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs 655 () ; outputs 656 () ; profile action (default) 657 ) 658 ; Swap unit 659 (unit u-swap "Swap Unit" () 660 1 1 ; issue done 661 () ; state 662 ((GRi INT -1) (GRj INT -1)) ; inputs 663 ((GRk INT -1)) ; outputs 664 () ; profile action (default) 665 ) 666 ; FR Move to FR unit 667 (unit u-fr2fr "FR Move to FR Unit" () 668 1 1 ; issue done 669 () ; state 670 ((FRi INT -1)) ; inputs 671 ((FRk INT -1)) ; outputs 672 () ; profile action (default) 673 ) 674 ; FR Move to GR unit 675 (unit u-fr2gr "FR Move to GR Unit" () 676 1 1 ; issue done 677 () ; state 678 ((FRintk INT -1)) ; inputs 679 ((GRj INT -1)) ; outputs 680 () ; profile action (default) 681 ) 682 ; SPR Move to GR unit 683 (unit u-spr2gr "SPR Move to GR Unit" () 684 1 1 ; issue done 685 () ; state 686 ((spr INT -1)) ; inputs 687 ((GRj INT -1)) ; outputs 688 () ; profile action (default) 689 ) 690 ; GR Move to FR unit 691 (unit u-gr2fr "GR Move to FR Unit" () 692 1 1 ; issue done 693 () ; state 694 ((GRj INT -1)) ; inputs 695 ((FRintk INT -1)) ; outputs 696 () ; profile action (default) 697 ) 698 ; GR Move to SPR unit 699 (unit u-gr2spr "GR Move to SPR Unit" () 700 1 1 ; issue done 701 () ; state 702 ((GRj INT -1)) ; inputs 703 ((spr INT -1)) ; outputs 704 () ; profile action (default) 705 ) 706 ; Float Arithmetic unit 707 (unit u-float-arith "Float Arithmetic unit" () 708 1 1 ; issue done 709 () ; state 710 ((FRi INT -1) (FRj INT -1) ; inputs 711 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 712 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 713 () ; profile action (default) 714 ) 715 ; Float Dual Arithmetic unit 716 (unit u-float-dual-arith "Float Arithmetic unit" () 717 1 1 ; issue done 718 () ; state 719 ((FRi INT -1) (FRj INT -1) ; inputs 720 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 721 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 722 () ; profile action (default) 723 ) 724 ; Float Div unit 725 (unit u-float-div "Float Div unit" () 726 1 1 ; issue done 727 () ; state 728 ((FRi INT -1) (FRj INT -1)) ; inputs 729 ((FRk INT -1)) ; outputs 730 () ; profile action (default) 731 ) 732 ; Float Square Root unit 733 (unit u-float-sqrt "Float Square Root unit" () 734 1 1 ; issue done 735 () ; state 736 ((FRj INT -1) (FRdoublej INT -1)) ; inputs 737 ((FRk INT -1) (FRdoublek INT -1)) ; outputs 738 () ; profile action (default) 739 ) 740 ; Float Dual Square Root unit 741 (unit u-float-dual-sqrt "Float Dual Square Root unit" () 742 1 1 ; issue done 743 () ; state 744 ((FRj INT -1)) ; inputs 745 ((FRk INT -1)) ; outputs 746 () ; profile action (default) 747 ) 748 ; Float Compare unit 749 (unit u-float-compare "Float Compare unit" () 750 1 1 ; issue done 751 () ; state 752 ((FRi INT -1) (FRj INT -1) 753 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs 754 ((FCCi_2 INT -1)) ; outputs 755 () ; profile action (default) 756 ) 757 ; Dual Float Compare unit 758 (unit u-float-dual-compare "Float Dual Compare unit" () 759 1 1 ; issue done 760 () ; state 761 ((FRi INT -1) (FRj INT -1)) ; inputs 762 ((FCCi_2 INT -1)) ; outputs 763 () ; profile action (default) 764 ) 765 ; Float Conversion unit 766 (unit u-float-convert "Float Conversion unit" () 767 1 1 ; issue done 768 () ; state 769 ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs 770 ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs 771 () ; profile action (default) 772 ) 773 ; Dual Float Conversion unit 774 (unit u-float-dual-convert "Float Dual Conversion unit" () 775 1 1 ; issue done 776 () ; state 777 ((FRj INT -1) (FRintj INT -1)) ; inputs 778 ((FRk INT -1) (FRintk INT -1)) ; outputs 779 () ; profile action (default) 780 ) 781 ; Media unit 782 (unit u-media "Media unit" () 783 1 1 ; issue done 784 () ; state 785 ((FRinti INT -1) (FRintj INT -1) (ACC40Si INT -1) (ACCGi INT -1)) ; inputs 786 ((FRintk INT -1) (ACC40Sk INT -1) (ACC40Uk INT -1) (ACCGk INT -1)) ; outputs 787 () ; profile action (default) 788 ) 789 ; Media Quad Arithmetic unit 790 (unit u-media-quad-arith "Media Quad Arithmetic unit" () 791 1 1 ; issue done 792 () ; state 793 ((FRinti INT -1) (FRintj INT -1)) ; inputs 794 ((FRintk INT -1)) ; outputs 795 () ; profile action (default) 796 ) 797 ; Media Dual Multiplication unit 798 (unit u-media-dual-mul "Media Dual Multiplication unit" () 799 1 1 ; issue done 800 () ; state 801 ((FRinti INT -1) (FRintj INT -1)) ; inputs 802 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 803 () ; profile action (default) 804 ) 805 ; Media Quad Multiplication unit 806 (unit u-media-quad-mul "Media Quad Multiplication unit" () 807 1 1 ; issue done 808 () ; state 809 ((FRinti INT -1) (FRintj INT -1)) ; inputs 810 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 811 () ; profile action (default) 812 ) 813 ; Media Quad Complex unit 814 (unit u-media-quad-complex "Media Quad Complex unit" () 815 1 1 ; issue done 816 () ; state 817 ((FRinti INT -1) (FRintj INT -1)) ; inputs 818 ((ACC40Sk INT -1)) ; outputs 819 () ; profile action (default) 820 ) 821 ; Media Dual Expand unit 822 (unit u-media-dual-expand "Media Dual Expand unit" () 823 1 1 ; issue done 824 () ; state 825 ((FRinti INT -1)) ; inputs 826 ((FRintk INT -1)) ; outputs 827 () ; profile action (default) 828 ) 829 ; Media Dual Unpack unit 830 (unit u-media-dual-unpack "Media Dual Unpack unit" () 831 1 1 ; issue done 832 () ; state 833 ((FRinti INT -1)) ; inputs 834 ((FRintk INT -1)) ; outputs 835 () ; profile action (default) 836 ) 837 ; Media Dual byte to half unit 838 (unit u-media-dual-btoh "Media Byte to byte" () 839 1 1 ; issue done 840 () ; state 841 ((FRintj INT -1)) ; inputs 842 ((FRintk INT -1)) ; outputs 843 () ; profile action (default) 844 ) 845 ; Media Dual half to byte unit 846 (unit u-media-dual-htob "Media Half to byte" () 847 1 1 ; issue done 848 () ; state 849 ((FRintj INT -1)) ; inputs 850 ((FRintk INT -1)) ; outputs 851 () ; profile action (default) 852 ) 853 ; Media Dual byte to half unit extended 854 (unit u-media-dual-btohe "Media Byte to byte extended" () 855 1 1 ; issue done 856 () ; state 857 ((FRintj INT -1)) ; inputs 858 ((FRintk INT -1)) ; outputs 859 () ; profile action (default) 860 ) 861 ; Barrier unit 862 (unit u-barrier "Barrier unit" () 863 1 1 ; issue done 864 () ; state 865 () ; inputs 866 () ; outputs 867 () ; profile action (default) 868 ) 869 ; Memory Barrier unit 870 (unit u-membar "Memory Barrier unit" () 871 1 1 ; issue done 872 () ; state 873 () ; inputs 874 () ; outputs 875 () ; profile action (default) 876 ) 877 ; Insn cache invalidate unit 878 (unit u-ici "Insn cache invalidate unit" () 879 1 1 ; issue done 880 () ; state 881 ((GRi INT -1) (GRj INT -1)) ; inputs 882 () ; outputs 883 () ; profile action (default) 884 ) 885 ; Data cache invalidate unit 886 (unit u-dci "Data cache invalidate unit" () 887 1 1 ; issue done 888 () ; state 889 ((GRi INT -1) (GRj INT -1)) ; inputs 890 () ; outputs 891 () ; profile action (default) 892 ) 893 ; Data cache flush unit 894 (unit u-dcf "Data cache flush unit" () 895 1 1 ; issue done 896 () ; state 897 ((GRi INT -1) (GRj INT -1)) ; inputs 898 () ; outputs 899 () ; profile action (default) 900 ) 901 ; Insn cache preload unit 902 (unit u-icpl "Insn cache preload unit" () 903 1 1 ; issue done 904 () ; state 905 ((GRi INT -1) (GRj INT -1)) ; inputs 906 () ; outputs 907 () ; profile action (default) 908 ) 909 ; Data cache preload unit 910 (unit u-dcpl "Data cache preload unit" () 911 1 1 ; issue done 912 () ; state 913 ((GRi INT -1) (GRj INT -1)) ; inputs 914 () ; outputs 915 () ; profile action (default) 916 ) 917 ; Insn cache unlock unit 918 (unit u-icul "Insn cache unlock unit" () 919 1 1 ; issue done 920 () ; state 921 ((GRi INT -1) (GRj INT -1)) ; inputs 922 () ; outputs 923 () ; profile action (default) 924 ) 925 ; Data cache unlock unit 926 (unit u-dcul "Data cache unlock unit" () 927 1 1 ; issue done 928 () ; state 929 ((GRi INT -1) (GRj INT -1)) ; inputs 930 () ; outputs 931 () ; profile action (default) 932 ) 933 ; commit unit 934 (unit u-commit "Commit Unit" () 935 1 1 ; issue done 936 () ; state 937 ((GRk INT -1) (FRk INT -1)) ; inputs 938 () ; outputs 939 () ; profile action (default) 940 ) 941 ) 942 944 ; Tomcat machine. Early version of fr500 machine 945 (define-mach 946 (name tomcat) 947 (comment "Tomcat -- early version of fr500") 948 (cpu frvbf) 949 ) 950 (define-model 951 (name tomcat) (comment "Tomcat model") (attrs) 952 (mach tomcat) 953 954 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 955 956 ; `state' is a list of variables for recording model state 957 ; (state) 958 959 (unit u-exec "Execution Unit" () 960 1 1 ; issue done 961 () ; state 962 () ; inputs 963 () ; outputs 964 () ; profile action (default) 965 ) 966 ) 967 969 ; FR400 machine 970 (define-mach 971 (name fr400) 972 (comment "FR400 cpu") 973 (cpu frvbf) 974 ) 975 (define-model 976 (name fr400) (comment "FR400 model") (attrs) 977 (mach fr400) 978 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 979 ; `state' is a list of variables for recording model state 980 (state 981 ; State items 982 ; These are all masks with each bit representing one register. 983 (prev-fp-load DI) ; Previous use of FR register was floating point load 984 (prev-fr-p4 DI) ; Previous use of FR register was media unit 4 985 (prev-fr-p6 DI) ; Previous use of FR register was media unit 6 986 (prev-acc-p2 DI) ; Previous use of ACC register was media unit 2 987 (prev-acc-p4 DI) ; Previous use of ACC register was media unit 4 988 (cur-fp-load DI) ; Current use of FR register is floating point load 989 (cur-fr-p4 DI) ; Current use of FR register is media unit 4 990 (cur-fr-p6 DI) ; Current use of FR register is media unit 6 991 (cur-acc-p2 DI) ; Current use of ACC register is media unit 2 992 (cur-acc-p4 DI) ; Current use of ACC register is media unit 4 993 ) 994 (unit u-exec "Execution Unit" () 995 1 1 ; issue done 996 () ; state 997 () ; inputs 998 () ; outputs 999 () ; profile action (default) 1000 ) 1001 ; Basic integer insn unit 1002 (unit u-integer "Integer Unit" () 1003 1 1 ; issue done 1004 () ; state 1005 ((GRi INT -1) (GRj INT -1)) ; inputs 1006 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 1007 () ; profile action (default) 1008 ) 1009 ; Integer multiplication unit 1010 (unit u-imul "Integer Multiplication Unit" () 1011 1 1 ; issue done 1012 () ; state 1013 ((GRi INT -1) (GRj INT -1)) ; inputs 1014 ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs 1015 () ; profile action (default) 1016 ) 1017 ; Integer division unit 1018 (unit u-idiv "Integer Division Unit" () 1019 1 1 ; issue done 1020 () ; state 1021 ((GRi INT -1) (GRj INT -1)) ; inputs 1022 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 1023 () ; profile action (default) 1024 ) 1025 ; Branch unit 1026 (unit u-branch "Branch Unit" () 1027 1 1 ; issue done 1028 () ; state 1029 ((GRi INT -1) (GRj INT -1) 1030 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 1031 ((pc)) ; outputs 1032 () ; profile action (default) 1033 ) 1034 ; Trap unit 1035 (unit u-trap "Trap Unit" () 1036 1 1 ; issue done 1037 () ; state 1038 ((GRi INT -1) (GRj INT -1) 1039 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 1040 () ; outputs 1041 () ; profile action (default) 1042 ) 1043 ; Condition code check unit 1044 (unit u-check "Check Unit" () 1045 1 1 ; issue done 1046 () ; state 1047 ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs 1048 () ; outputs 1049 () ; profile action (default) 1050 ) 1051 ; GR set half unit 1052 (unit u-set-hilo "GR Set Half" () 1053 1 1 ; issue done 1054 () ; state 1055 () ; inputs 1056 ((GRkhi INT -1) (GRklo INT -1)) ; outputs 1057 () ; profile action (default) 1058 ) 1059 ; GR load unit -- TODO doesn't handle quad 1060 (unit u-gr-load "GR Load Unit" () 1061 1 1 ; issue done 1062 () ; state 1063 ((GRi INT -1) (GRj INT -1)) ; inputs 1064 ((GRk INT -1) (GRdoublek INT -1)) ; outputs 1065 () ; profile action (default) 1066 ) 1067 ; GR store unit -- TODO doesn't handle quad 1068 (unit u-gr-store "GR Store Unit" () 1069 1 1 ; issue done 1070 () ; state 1071 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs 1072 () ; outputs 1073 () ; profile action (default) 1074 ) 1075 ; FR load unit -- TODO doesn't handle quad 1076 (unit u-fr-load "FR Load Unit" () 1077 1 1 ; issue done 1078 () ; state 1079 ((GRi INT -1) (GRj INT -1)) ; inputs 1080 ((FRintk INT -1) (FRdoublek INT -1)) ; outputs 1081 () ; profile action (default) 1082 ) 1083 ; FR store unit -- TODO doesn't handle quad 1084 (unit u-fr-store "FR Store Unit" () 1085 1 1 ; issue done 1086 () ; state 1087 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs 1088 () ; outputs 1089 () ; profile action (default) 1090 ) 1091 ; Swap unit 1092 (unit u-swap "Swap Unit" () 1093 1 1 ; issue done 1094 () ; state 1095 ((GRi INT -1) (GRj INT -1)) ; inputs 1096 ((GRk INT -1)) ; outputs 1097 () ; profile action (default) 1098 ) 1099 ; FR Move to GR unit 1100 (unit u-fr2gr "FR Move to GR Unit" () 1101 1 1 ; issue done 1102 () ; state 1103 ((FRintk INT -1)) ; inputs 1104 ((GRj INT -1)) ; outputs 1105 () ; profile action (default) 1106 ) 1107 ; SPR Move to GR unit 1108 (unit u-spr2gr "SPR Move to GR Unit" () 1109 1 1 ; issue done 1110 () ; state 1111 ((spr INT -1)) ; inputs 1112 ((GRj INT -1)) ; outputs 1113 () ; profile action (default) 1114 ) 1115 ; GR Move to FR unit 1116 (unit u-gr2fr "GR Move to FR Unit" () 1117 1 1 ; issue done 1118 () ; state 1119 ((GRj INT -1)) ; inputs 1120 ((FRintk INT -1)) ; outputs 1121 () ; profile action (default) 1122 ) 1123 ; GR Move to SPR unit 1124 (unit u-gr2spr "GR Move to SPR Unit" () 1125 1 1 ; issue done 1126 () ; state 1127 ((GRj INT -1)) ; inputs 1128 ((spr INT -1)) ; outputs 1129 () ; profile action (default) 1130 ) 1131 ; Media unit M1 -- see table 13-8 in the fr400 LSI 1132 (unit u-media-1 "Media-1 unit" () 1133 1 1 ; issue done 1134 () ; state 1135 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1136 ((FRintk INT -1)) ; outputs 1137 () ; profile action (default) 1138 ) 1139 (unit u-media-1-quad "Media-1-quad unit" () 1140 1 1 ; issue done 1141 () ; state 1142 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1143 ((FRintk INT -1)) ; outputs 1144 () ; profile action (default) 1145 ) 1146 (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" () 1147 1 1 ; issue done 1148 () ; state 1149 () ; inputs 1150 ((FRkhi INT -1) (FRklo INT -1)) ; outputs 1151 () ; profile action (default) 1152 ) 1153 ; Media unit M2 -- see table 13-8 in the fr400 LSI 1154 (unit u-media-2 "Media-2 unit" () 1155 1 1 ; issue done 1156 () ; state 1157 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1158 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 1159 () ; profile action (default) 1160 ) 1161 (unit u-media-2-quad "Media-2-quad unit" () 1162 1 1 ; issue done 1163 () ; state 1164 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1165 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 1166 () ; profile action (default) 1167 ) 1168 (unit u-media-2-acc "Media-2-acc unit" () 1169 1 1 ; issue done 1170 () ; state 1171 ((ACC40Si INT -1)) ; inputs 1172 ((ACC40Sk INT -1)) ; outputs 1173 () ; profile action (default) 1174 ) 1175 (unit u-media-2-acc-dual "Media-2-acc-dual unit" () 1176 1 1 ; issue done 1177 () ; state 1178 ((ACC40Si INT -1)) ; inputs 1179 ((ACC40Sk INT -1)) ; outputs 1180 () ; profile action (default) 1181 ) 1182 (unit u-media-2-add-sub "Media-2-add-sub unit" () 1183 1 1 ; issue done 1184 () ; state 1185 ((ACC40Si INT -1)) ; inputs 1186 ((ACC40Sk INT -1)) ; outputs 1187 () ; profile action (default) 1188 ) 1189 (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" () 1190 1 1 ; issue done 1191 () ; state 1192 ((ACC40Si INT -1)) ; inputs 1193 ((ACC40Sk INT -1)) ; outputs 1194 () ; profile action (default) 1195 ) 1196 ; Media unit M3 -- see table 13-8 in the fr400 LSI 1197 (unit u-media-3 "Media-3 unit" () 1198 1 1 ; issue done 1199 () ; state 1200 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1201 ((FRintk INT -1)) ; outputs 1202 () ; profile action (default) 1203 ) 1204 (unit u-media-3-dual "Media-3-dual unit" () 1205 1 1 ; issue done 1206 () ; state 1207 ((FRinti INT -1)) ; inputs 1208 ((FRintk INT -1)) ; outputs 1209 () ; profile action (default) 1210 ) 1211 (unit u-media-3-quad "Media-3-quad unit" () 1212 1 1 ; issue done 1213 () ; state 1214 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1215 ((FRintk INT -1)) ; outputs 1216 () ; profile action (default) 1217 ) 1218 ; Media unit M4 -- see table 13-8 in the fr400 LSI 1219 (unit u-media-4 "Media-4 unit" () 1220 1 1 ; issue done 1221 () ; state 1222 ((ACC40Si INT -1) (FRintj INT -1)) ; inputs 1223 ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs 1224 () ; profile action (default) 1225 ) 1226 (unit u-media-4-accg "Media-4-accg unit" () 1227 1 1 ; issue done 1228 () ; state 1229 ((ACCGi INT -1) (FRinti INT -1)) ; inputs 1230 ((ACCGk INT -1) (FRintk INT -1)) ; outputs 1231 () ; profile action (default) 1232 ) 1233 (unit u-media-4-acc-dual "Media-4-acc-dual unit" () 1234 1 1 ; issue done 1235 () ; state 1236 ((ACC40Si INT -1)) ; inputs 1237 ((FRintk INT -1)) ; outputs 1238 () ; profile action (default) 1239 ) 1240 ; Media unit M6 -- see table 13-8 in the fr400 LSI 1241 (unit u-media-6 "Media-6 unit" () 1242 1 1 ; issue done 1243 () ; state 1244 ((FRinti INT -1)) ; inputs 1245 ((FRintk INT -1)) ; outputs 1246 () ; profile action (default) 1247 ) 1248 ; Media unit M7 -- see table 13-8 in the fr400 LSI 1249 (unit u-media-7 "Media-1 unit" () 1250 1 1 ; issue done 1251 () ; state 1252 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1253 ((FCCk INT -1)) ; outputs 1254 () ; profile action (default) 1255 ) 1256 ; Media Dual Expand unit 1257 (unit u-media-dual-expand "Media Dual Expand unit" () 1258 1 1 ; issue done 1259 () ; state 1260 ((FRinti INT -1)) ; inputs 1261 ((FRintk INT -1)) ; outputs 1262 () ; profile action (default) 1263 ) 1264 ; Media Dual half to byte unit 1265 (unit u-media-dual-htob "Media Half to byte" () 1266 1 1 ; issue done 1267 () ; state 1268 ((FRintj INT -1)) ; inputs 1269 ((FRintk INT -1)) ; outputs 1270 () ; profile action (default) 1271 ) 1272 ; Barrier unit 1273 (unit u-barrier "Barrier unit" () 1274 1 1 ; issue done 1275 () ; state 1276 () ; inputs 1277 () ; outputs 1278 () ; profile action (default) 1279 ) 1280 ; Memory Barrier unit 1281 (unit u-membar "Memory Barrier unit" () 1282 1 1 ; issue done 1283 () ; state 1284 () ; inputs 1285 () ; outputs 1286 () ; profile action (default) 1287 ) 1288 ; Insn cache invalidate unit 1289 (unit u-ici "Insn cache invalidate unit" () 1290 1 1 ; issue done 1291 () ; state 1292 ((GRi INT -1) (GRj INT -1)) ; inputs 1293 () ; outputs 1294 () ; profile action (default) 1295 ) 1296 ; Data cache invalidate unit 1297 (unit u-dci "Data cache invalidate unit" () 1298 1 1 ; issue done 1299 () ; state 1300 ((GRi INT -1) (GRj INT -1)) ; inputs 1301 () ; outputs 1302 () ; profile action (default) 1303 ) 1304 ; Data cache flush unit 1305 (unit u-dcf "Data cache flush unit" () 1306 1 1 ; issue done 1307 () ; state 1308 ((GRi INT -1) (GRj INT -1)) ; inputs 1309 () ; outputs 1310 () ; profile action (default) 1311 ) 1312 ; Insn cache preload unit 1313 (unit u-icpl "Insn cache preload unit" () 1314 1 1 ; issue done 1315 () ; state 1316 ((GRi INT -1) (GRj INT -1)) ; inputs 1317 () ; outputs 1318 () ; profile action (default) 1319 ) 1320 ; Data cache preload unit 1321 (unit u-dcpl "Data cache preload unit" () 1322 1 1 ; issue done 1323 () ; state 1324 ((GRi INT -1) (GRj INT -1)) ; inputs 1325 () ; outputs 1326 () ; profile action (default) 1327 ) 1328 ; Insn cache unlock unit 1329 (unit u-icul "Insn cache unlock unit" () 1330 1 1 ; issue done 1331 () ; state 1332 ((GRi INT -1) (GRj INT -1)) ; inputs 1333 () ; outputs 1334 () ; profile action (default) 1335 ) 1336 ; Data cache unlock unit 1337 (unit u-dcul "Data cache unlock unit" () 1338 1 1 ; issue done 1339 () ; state 1340 ((GRi INT -1) (GRj INT -1)) ; inputs 1341 () ; outputs 1342 () ; profile action (default) 1343 ) 1344 ) 1345 1347 ; FR450 machine 1348 (define-mach 1349 (name fr450) 1350 (comment "FR450 cpu") 1351 (cpu frvbf) 1352 ) 1353 (define-model 1354 (name fr450) (comment "FR450 model") (attrs) 1355 (mach fr450) 1356 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 1357 ; `state' is a list of variables for recording model state 1358 (state 1359 ; State items 1360 ; These are all masks with each bit representing one register. 1361 (prev-fp-load DI) ; Previous use of FR register was floating point load 1362 (prev-fr-p4 DI) ; Previous use of FR register was media unit 4 1363 (prev-fr-p6 DI) ; Previous use of FR register was media unit 6 1364 (prev-acc-p2 DI) ; Previous use of ACC register was media unit 2 1365 (prev-acc-p4 DI) ; Previous use of ACC register was media unit 4 1366 (cur-fp-load DI) ; Current use of FR register is floating point load 1367 (cur-fr-p4 DI) ; Current use of FR register is media unit 4 1368 (cur-fr-p6 DI) ; Current use of FR register is media unit 6 1369 (cur-acc-p2 DI) ; Current use of ACC register is media unit 2 1370 (cur-acc-p4 DI) ; Current use of ACC register is media unit 4 1371 ) 1372 (unit u-exec "Execution Unit" () 1373 1 1 ; issue done 1374 () ; state 1375 () ; inputs 1376 () ; outputs 1377 () ; profile action (default) 1378 ) 1379 ; Basic integer insn unit 1380 (unit u-integer "Integer Unit" () 1381 1 1 ; issue done 1382 () ; state 1383 ((GRi INT -1) (GRj INT -1)) ; inputs 1384 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 1385 () ; profile action (default) 1386 ) 1387 ; Integer multiplication unit 1388 (unit u-imul "Integer Multiplication Unit" () 1389 1 1 ; issue done 1390 () ; state 1391 ((GRi INT -1) (GRj INT -1)) ; inputs 1392 ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs 1393 () ; profile action (default) 1394 ) 1395 ; Integer division unit 1396 (unit u-idiv "Integer Division Unit" () 1397 1 1 ; issue done 1398 () ; state 1399 ((GRi INT -1) (GRj INT -1)) ; inputs 1400 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs 1401 () ; profile action (default) 1402 ) 1403 ; Branch unit 1404 (unit u-branch "Branch Unit" () 1405 1 1 ; issue done 1406 () ; state 1407 ((GRi INT -1) (GRj INT -1) 1408 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 1409 ((pc)) ; outputs 1410 () ; profile action (default) 1411 ) 1412 ; Trap unit 1413 (unit u-trap "Trap Unit" () 1414 1 1 ; issue done 1415 () ; state 1416 ((GRi INT -1) (GRj INT -1) 1417 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs 1418 () ; outputs 1419 () ; profile action (default) 1420 ) 1421 ; Condition code check unit 1422 (unit u-check "Check Unit" () 1423 1 1 ; issue done 1424 () ; state 1425 ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs 1426 () ; outputs 1427 () ; profile action (default) 1428 ) 1429 ; GR set half unit 1430 (unit u-set-hilo "GR Set Half" () 1431 1 1 ; issue done 1432 () ; state 1433 () ; inputs 1434 ((GRkhi INT -1) (GRklo INT -1)) ; outputs 1435 () ; profile action (default) 1436 ) 1437 ; GR load unit -- TODO doesn't handle quad 1438 (unit u-gr-load "GR Load Unit" () 1439 1 1 ; issue done 1440 () ; state 1441 ((GRi INT -1) (GRj INT -1)) ; inputs 1442 ((GRk INT -1) (GRdoublek INT -1)) ; outputs 1443 () ; profile action (default) 1444 ) 1445 ; GR store unit -- TODO doesn't handle quad 1446 (unit u-gr-store "GR Store Unit" () 1447 1 1 ; issue done 1448 () ; state 1449 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs 1450 () ; outputs 1451 () ; profile action (default) 1452 ) 1453 ; FR load unit -- TODO doesn't handle quad 1454 (unit u-fr-load "FR Load Unit" () 1455 1 1 ; issue done 1456 () ; state 1457 ((GRi INT -1) (GRj INT -1)) ; inputs 1458 ((FRintk INT -1) (FRdoublek INT -1)) ; outputs 1459 () ; profile action (default) 1460 ) 1461 ; FR store unit -- TODO doesn't handle quad 1462 (unit u-fr-store "FR Store Unit" () 1463 1 1 ; issue done 1464 () ; state 1465 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs 1466 () ; outputs 1467 () ; profile action (default) 1468 ) 1469 ; Swap unit 1470 (unit u-swap "Swap Unit" () 1471 1 1 ; issue done 1472 () ; state 1473 ((GRi INT -1) (GRj INT -1)) ; inputs 1474 ((GRk INT -1)) ; outputs 1475 () ; profile action (default) 1476 ) 1477 ; FR Move to GR unit 1478 (unit u-fr2gr "FR Move to GR Unit" () 1479 1 1 ; issue done 1480 () ; state 1481 ((FRintk INT -1)) ; inputs 1482 ((GRj INT -1)) ; outputs 1483 () ; profile action (default) 1484 ) 1485 ; SPR Move to GR unit 1486 (unit u-spr2gr "SPR Move to GR Unit" () 1487 1 1 ; issue done 1488 () ; state 1489 ((spr INT -1)) ; inputs 1490 ((GRj INT -1)) ; outputs 1491 () ; profile action (default) 1492 ) 1493 ; GR Move to FR unit 1494 (unit u-gr2fr "GR Move to FR Unit" () 1495 1 1 ; issue done 1496 () ; state 1497 ((GRj INT -1)) ; inputs 1498 ((FRintk INT -1)) ; outputs 1499 () ; profile action (default) 1500 ) 1501 ; GR Move to SPR unit 1502 (unit u-gr2spr "GR Move to SPR Unit" () 1503 1 1 ; issue done 1504 () ; state 1505 ((GRj INT -1)) ; inputs 1506 ((spr INT -1)) ; outputs 1507 () ; profile action (default) 1508 ) 1509 ; Media unit M1 -- see table 14-8 in the fr450 LSI 1510 (unit u-media-1 "Media-1 unit" () 1511 1 1 ; issue done 1512 () ; state 1513 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1514 ((FRintk INT -1)) ; outputs 1515 () ; profile action (default) 1516 ) 1517 (unit u-media-1-quad "Media-1-quad unit" () 1518 1 1 ; issue done 1519 () ; state 1520 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1521 ((FRintk INT -1)) ; outputs 1522 () ; profile action (default) 1523 ) 1524 (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" () 1525 1 1 ; issue done 1526 () ; state 1527 () ; inputs 1528 ((FRkhi INT -1) (FRklo INT -1)) ; outputs 1529 () ; profile action (default) 1530 ) 1531 ; Media unit M2 -- see table 14-8 in the fr450 LSI 1532 (unit u-media-2 "Media-2 unit" () 1533 1 1 ; issue done 1534 () ; state 1535 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1536 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 1537 () ; profile action (default) 1538 ) 1539 (unit u-media-2-quad "Media-2-quad unit" () 1540 1 1 ; issue done 1541 () ; state 1542 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1543 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs 1544 () ; profile action (default) 1545 ) 1546 (unit u-media-2-acc "Media-2-acc unit" () 1547 1 1 ; issue done 1548 () ; state 1549 ((ACC40Si INT -1)) ; inputs 1550 ((ACC40Sk INT -1)) ; outputs 1551 () ; profile action (default) 1552 ) 1553 (unit u-media-2-acc-dual "Media-2-acc-dual unit" () 1554 1 1 ; issue done 1555 () ; state 1556 ((ACC40Si INT -1)) ; inputs 1557 ((ACC40Sk INT -1)) ; outputs 1558 () ; profile action (default) 1559 ) 1560 (unit u-media-2-add-sub "Media-2-add-sub unit" () 1561 1 1 ; issue done 1562 () ; state 1563 ((ACC40Si INT -1)) ; inputs 1564 ((ACC40Sk INT -1)) ; outputs 1565 () ; profile action (default) 1566 ) 1567 (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" () 1568 1 1 ; issue done 1569 () ; state 1570 ((ACC40Si INT -1)) ; inputs 1571 ((ACC40Sk INT -1)) ; outputs 1572 () ; profile action (default) 1573 ) 1574 ; Media unit M3 -- see table 14-8 in the fr450 LSI 1575 (unit u-media-3 "Media-3 unit" () 1576 1 1 ; issue done 1577 () ; state 1578 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1579 ((FRintk INT -1)) ; outputs 1580 () ; profile action (default) 1581 ) 1582 (unit u-media-3-dual "Media-3-dual unit" () 1583 1 1 ; issue done 1584 () ; state 1585 ((FRinti INT -1)) ; inputs 1586 ((FRintk INT -1)) ; outputs 1587 () ; profile action (default) 1588 ) 1589 (unit u-media-3-quad "Media-3-quad unit" () 1590 1 1 ; issue done 1591 () ; state 1592 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1593 ((FRintk INT -1)) ; outputs 1594 () ; profile action (default) 1595 ) 1596 ; Media unit M4 -- see table 14-8 in the fr450 LSI 1597 (unit u-media-4 "Media-4 unit" () 1598 1 1 ; issue done 1599 () ; state 1600 ((ACC40Si INT -1) (FRintj INT -1)) ; inputs 1601 ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs 1602 () ; profile action (default) 1603 ) 1604 (unit u-media-4-accg "Media-4-accg unit" () 1605 1 1 ; issue done 1606 () ; state 1607 ((ACCGi INT -1) (FRinti INT -1)) ; inputs 1608 ((ACCGk INT -1) (FRintk INT -1)) ; outputs 1609 () ; profile action (default) 1610 ) 1611 (unit u-media-4-acc-dual "Media-4-acc-dual unit" () 1612 1 1 ; issue done 1613 () ; state 1614 ((ACC40Si INT -1)) ; inputs 1615 ((FRintk INT -1)) ; outputs 1616 () ; profile action (default) 1617 ) 1618 (unit u-media-4-mclracca "Media-4 unit for MCLRACC with #A=1" () 1619 1 1 ; issue done 1620 () ; state 1621 () ; inputs 1622 () ; outputs 1623 () ; profile action (default) 1624 ) 1625 ; Media unit M6 -- see table 14-8 in the fr450 LSI 1626 (unit u-media-6 "Media-6 unit" () 1627 1 1 ; issue done 1628 () ; state 1629 ((FRinti INT -1)) ; inputs 1630 ((FRintk INT -1)) ; outputs 1631 () ; profile action (default) 1632 ) 1633 ; Media unit M7 -- see table 14-8 in the fr450 LSI 1634 (unit u-media-7 "Media-1 unit" () 1635 1 1 ; issue done 1636 () ; state 1637 ((FRinti INT -1) (FRintj INT -1)) ; inputs 1638 ((FCCk INT -1)) ; outputs 1639 () ; profile action (default) 1640 ) 1641 ; Media Dual Expand unit 1642 (unit u-media-dual-expand "Media Dual Expand unit" () 1643 1 1 ; issue done 1644 () ; state 1645 ((FRinti INT -1)) ; inputs 1646 ((FRintk INT -1)) ; outputs 1647 () ; profile action (default) 1648 ) 1649 ; Media Dual half to byte unit 1650 (unit u-media-dual-htob "Media Half to byte" () 1651 1 1 ; issue done 1652 () ; state 1653 ((FRintj INT -1)) ; inputs 1654 ((FRintk INT -1)) ; outputs 1655 () ; profile action (default) 1656 ) 1657 ; Barrier unit 1658 (unit u-barrier "Barrier unit" () 1659 1 1 ; issue done 1660 () ; state 1661 () ; inputs 1662 () ; outputs 1663 () ; profile action (default) 1664 ) 1665 ; Memory Barrier unit 1666 (unit u-membar "Memory Barrier unit" () 1667 1 1 ; issue done 1668 () ; state 1669 () ; inputs 1670 () ; outputs 1671 () ; profile action (default) 1672 ) 1673 ; Insn cache invalidate unit 1674 (unit u-ici "Insn cache invalidate unit" () 1675 1 1 ; issue done 1676 () ; state 1677 ((GRi INT -1) (GRj INT -1)) ; inputs 1678 () ; outputs 1679 () ; profile action (default) 1680 ) 1681 ; Data cache invalidate unit 1682 (unit u-dci "Data cache invalidate unit" () 1683 1 1 ; issue done 1684 () ; state 1685 ((GRi INT -1) (GRj INT -1)) ; inputs 1686 () ; outputs 1687 () ; profile action (default) 1688 ) 1689 ; Data cache flush unit 1690 (unit u-dcf "Data cache flush unit" () 1691 1 1 ; issue done 1692 () ; state 1693 ((GRi INT -1) (GRj INT -1)) ; inputs 1694 () ; outputs 1695 () ; profile action (default) 1696 ) 1697 ; Insn cache preload unit 1698 (unit u-icpl "Insn cache preload unit" () 1699 1 1 ; issue done 1700 () ; state 1701 ((GRi INT -1) (GRj INT -1)) ; inputs 1702 () ; outputs 1703 () ; profile action (default) 1704 ) 1705 ; Data cache preload unit 1706 (unit u-dcpl "Data cache preload unit" () 1707 1 1 ; issue done 1708 () ; state 1709 ((GRi INT -1) (GRj INT -1)) ; inputs 1710 () ; outputs 1711 () ; profile action (default) 1712 ) 1713 ; Insn cache unlock unit 1714 (unit u-icul "Insn cache unlock unit" () 1715 1 1 ; issue done 1716 () ; state 1717 ((GRi INT -1) (GRj INT -1)) ; inputs 1718 () ; outputs 1719 () ; profile action (default) 1720 ) 1721 ; Data cache unlock unit 1722 (unit u-dcul "Data cache unlock unit" () 1723 1 1 ; issue done 1724 () ; state 1725 ((GRi INT -1) (GRj INT -1)) ; inputs 1726 () ; outputs 1727 () ; profile action (default) 1728 ) 1729 ) 1730 1732 ; Simple machine - single issue integer machine 1733 (define-mach 1734 (name simple) 1735 (comment "Simple single issue integer cpu") 1736 (cpu frvbf) 1737 ) 1738 (define-model 1739 (name simple) (comment "Simple model") (attrs) 1740 (mach simple) 1741 (pipeline all "" () ((fetch) (decode) (execute) (writeback))) 1742 ; `state' is a list of variables for recording model state 1743 (state) 1744 (unit u-exec "Execution Unit" () 1745 1 1 ; issue done 1746 () ; state 1747 () ; inputs 1748 () ; outputs 1749 () ; profile action (default) 1750 ) 1751 ) 1752 1754 ; The instruction fetch/execute cycle. 1755 ; 1756 ; This is how to fetch and decode an instruction. 1757 ; Leave it out for now 1758 1759 ; (define-extract (const SI 0)) 1760 1761 ; This is how to execute a decoded instruction. 1762 ; Leave it out for now 1763 1764 ; (define-execute (const SI 0)) 1765 1767 ; An attribute to describe which unit an insn runs in. 1768 (define-attr 1769 (for insn) 1770 (type enum) 1771 (name UNIT) 1772 (comment "parallel execution pipeline selection") 1773 ; The order of declaration is significant. 1774 ; See the *_unit_mapping tables in frv.opc 1775 ; Keep variations on the same unit together. 1776 ; Keep the '01' variant immediately after the '1' variant in each unit. 1777 ; Keep the 'ALL' variations immediately after the last numbered variant in each unit. 1778 (values NIL 1779 I0 I1 I01 I2 I3 IALL 1780 FM0 FM1 FM01 FM2 FM3 FMALL FMLOW 1781 B0 B1 B01 1782 C 1783 MULT-DIV ; multiply/division slotted differently on different machines 1784 IACC ; iacc multiply slotted differently on different machines 1785 LOAD ; loads slotted differently on different machines 1786 STORE ; store slotted differently on different machines 1787 SCAN ; scan, scani slotted differently on different machines 1788 DCPL ; dcpl slotted differently on different machines 1789 MDUALACC ; media dual acc slotted differently on different machines 1790 MDCUTSSI ; mdcutssi insn slotted differently on different machines 1791 MCLRACC-1; mclracc A==1 slotted differently on different machines 1792 NUM_UNITS 1793 ) 1794 ) 1795 ; Attributes to describe major categories of insns 1796 (define-attr 1797 (for insn) 1798 (type enum) 1799 (name FR400-MAJOR) 1800 (comment "fr400 major insn categories") 1801 ; The order of declaration is significant. Keep variations on the same major 1802 ; together. 1803 (values NONE 1804 I-1 I-2 I-3 I-4 I-5 1805 B-1 B-2 B-3 B-4 B-5 B-6 1806 C-1 C-2 1807 M-1 M-2 1808 ) 1809 ) 1810 (define-attr 1811 (for insn) 1812 (type enum) 1813 (name FR450-MAJOR) 1814 (comment "fr450 major insn categories") 1815 ; The order of declaration is significant. Keep variations on the same major 1816 ; together. 1817 (values NONE 1818 I-1 I-2 I-3 I-4 I-5 1819 B-1 B-2 B-3 B-4 B-5 B-6 1820 C-1 C-2 1821 M-1 M-2 M-3 M-4 M-5 M-6 1822 ) 1823 ) 1824 (define-attr 1825 (for insn) 1826 (type enum) 1827 (name FR500-MAJOR) 1828 (comment "fr500 major insn categories") 1829 ; The order of declaration is significant. Keep variations on the same major 1830 ; together. 1831 (values NONE 1832 I-1 I-2 I-3 I-4 I-5 I-6 1833 B-1 B-2 B-3 B-4 B-5 B-6 1834 C-1 C-2 1835 F-1 F-2 F-3 F-4 F-5 F-6 F-7 F-8 1836 M-1 M-2 M-3 M-4 M-5 M-6 M-7 M-8 1837 ) 1838 ) 1839 (define-attr 1840 (for insn) 1841 (type enum) 1842 (name FR550-MAJOR) 1843 (comment "fr550 major insn categories") 1844 ; The order of declaration is significant. Keep variations on the same major 1845 ; together. 1846 (values NONE 1847 I-1 I-2 I-3 I-4 I-5 I-6 I-7 I-8 1848 B-1 B-2 B-3 B-4 B-5 B-6 1849 C-1 C-2 1850 F-1 F-2 F-3 F-4 1851 M-1 M-2 M-3 M-4 M-5 1852 ) 1853 ) 1854 ; Privileged insn 1855 (define-attr 1856 (for insn) 1857 (type boolean) 1858 (name PRIVILEGED) 1859 (comment "insn only allowed in supervisor mode") 1860 ) 1861 ; Non-Excepting insn 1862 (define-attr 1863 (for insn) 1864 (type boolean) 1865 (name NON-EXCEPTING) 1866 (comment "non-excepting insn") 1867 ) 1868 ; Conditional insn 1869 (define-attr 1870 (for insn) 1871 (type boolean) 1872 (name CONDITIONAL) 1873 (comment "conditional insn") 1874 ) 1875 ; insn accesses FR registers 1876 (define-attr 1877 (for insn) 1878 (type boolean) 1879 (name FR-ACCESS) 1880 (comment "insn accesses FR registers") 1881 ) 1882 ; insn preserves MSR.OVF 1883 (define-attr 1884 (for insn) 1885 (type boolean) 1886 (name PRESERVE-OVF) 1887 (comment "Preserve value of MSR.OVF") 1888 ) 1889 ; "Audio" instruction provided by the fr405 but not the original fr400 core. 1890 (define-attr 1891 (for insn) 1892 (type boolean) 1893 (name AUDIO) 1894 (comment "Audio instruction added with FR405") 1895 ) 1896 ; null attribute -- used as a place holder for where an attribue is required. 1897 (define-attr 1898 (for insn) 1899 (type boolean) 1900 (name NA) 1901 (comment "placeholder attribute") 1902 (attrs META) ; do not define in any generated file for now 1903 ) 1904 1905 ; IDOC attribute for instruction documentation. 1906 1907 (define-attr 1908 (for insn) 1909 (type enum) 1910 (name IDOC) 1911 (comment "insn kind for documentation") 1912 (attrs META) 1913 (values 1914 (MEM - () "Memory") 1915 (ALU - () "ALU") 1916 (FPU - () "FPU") 1917 (BR - () "Branch") 1918 (PRIV - () "Priviledged") 1919 (MISC - () "Miscellaneous") 1920 ) 1921 ) 1922 1924 ; Instruction fields. 1925 ; 1926 ; Attributes: 1927 ; PCREL-ADDR: pc relative value (for reloc and disassembly purposes) 1928 ; ABS-ADDR: absolute address (for reloc and disassembly purposes?) 1929 ; RESERVED: bits are not used to decode insn, must be all 0 1930 (dnf f-pack "packing bit" () 31 1) 1931 (dnf f-op "primary opcode" () 24 7) 1932 (dnf f-ope1 "extended opcode" () 11 6) 1933 (dnf f-ope2 "extended opcode" () 9 4) 1934 (dnf f-ope3 "extended opcode" () 15 3) 1935 (dnf f-ope4 "extended opcode" () 7 2) 1936 1937 (dnf f-GRi "source register 1" () 17 6) 1938 (dnf f-GRj "source register 2" () 5 6) 1939 (dnf f-GRk "destination register" () 30 6) 1940 1941 (dnf f-FRi "source register 1" () 17 6) 1942 (dnf f-FRj "source register 2" () 5 6) 1943 (dnf f-FRk "destination register" () 30 6) 1944 1945 (dnf f-CPRi "source register 1" () 17 6) 1946 (dnf f-CPRj "source register 2" () 5 6) 1947 (dnf f-CPRk "destination register" () 30 6) 1948 1949 (dnf f-ACCGi "source register" () 17 6) 1950 (dnf f-ACCGk "destination register" () 30 6) 1951 1952 (dnf f-ACC40Si "40 bit signed accumulator" () 17 6) 1953 (dnf f-ACC40Ui "40 bit unsigned accumulator" () 17 6) 1954 (dnf f-ACC40Sk "40 bit accumulator" () 30 6) 1955 (dnf f-ACC40Uk "40 bit accumulator" () 30 6) 1956 1957 (dnf f-CRi "source register" () 14 3) 1958 (dnf f-CRj "source register" () 2 3) 1959 (dnf f-CRk "destination register" () 27 3) 1960 (dnf f-CCi "condition register" () 11 3) 1961 1962 (df f-CRj_int "target cr for ck insns" () 26 2 UINT 1963 ((value pc) (sub WI value 4)) 1964 ((value pc) (add WI value 4)) 1965 ) 1966 (dnf f-CRj_float "target cr for fck insns" () 26 2) 1967 1968 (dnf f-ICCi_1 "condition register" () 11 2) 1969 (dnf f-ICCi_2 "condition register" () 26 2) 1970 (dnf f-ICCi_3 "condition register" () 1 2) 1971 (dnf f-FCCi_1 "condition register" () 11 2) 1972 (dnf f-FCCi_2 "condition register" () 26 2) 1973 (dnf f-FCCi_3 "condition register" () 1 2) 1974 (dnf f-FCCk "condition register" () 26 2) 1975 (dnf f-eir "exception insn register" () 17 6) 1976 1977 (df f-s10 "10 bit sign extended" () 9 10 INT #f #f) 1978 (df f-s12 "12 bit sign extended" () 11 12 INT #f #f) 1979 (df f-d12 "12 bit sign extended" () 11 12 INT #f #f) 1980 (df f-u16 "16 bit unsigned" () 15 16 UINT #f #f) 1981 (df f-s16 "16 bit sign extended" () 15 16 INT #f #f) 1982 (df f-s6 "6 bit signed" () 5 6 INT #f #f) 1983 (df f-s6_1 "6 bit signed" () 11 6 INT #f #f) 1984 (df f-u6 "6 bit unsigned" () 5 6 UINT #f #f) 1985 (df f-s5 "5 bit signed" () 4 5 INT #f #f) 1986 1987 (df f-u12-h "upper 6 bits of u12" () 17 6 INT #f #f) 1988 (df f-u12-l "lower 6 bits of u12" () 5 6 UINT #f #f) 1989 (dnmf f-u12 "12 bit signed immediate" () INT 1990 (f-u12-h f-u12-l) 1991 (sequence () ; insert 1992 (set (ifield f-u12-h) (sra SI (ifield f-u12) 6)) 1993 (set (ifield f-u12-l) (and (ifield f-u12) #x3f)) 1994 ) 1995 (sequence () ; extract 1996 (set (ifield f-u12) (or (sll (ifield f-u12-h) 6) 1997 (ifield f-u12-l))) 1998 ) 1999 ) 2000 2001 (dnf f-int-cc "integer branch conditions" () 30 4) 2002 (dnf f-flt-cc "floating branch conditions" () 30 4) 2003 (df f-cond "conditional arithmetic" () 8 1 UINT #f #f) 2004 (df f-ccond "lr branch condition" () 12 1 UINT #f #f) 2005 (df f-hint "2 bit branch prediction hint" () 17 2 UINT #f #f) 2006 (df f-LI "link indicator" () 25 1 UINT #f #f) 2007 (df f-lock "cache lock indicator" () 25 1 UINT #f #f) 2008 (df f-debug "debug mode indicator" () 25 1 UINT #f #f) 2009 (df f-A "all accumulator bit" () 17 1 UINT #f #f) 2010 (df f-ae "cache all entries indicator" () 25 1 UINT #f #f) 2011 2012 (dnf f-spr-h "upper 6 bits of spr" () 30 6) 2013 (dnf f-spr-l "lower 6 bits of spr" () 17 6) 2014 (dnmf f-spr "special purpose register" () UINT 2015 (f-spr-h f-spr-l) 2016 (sequence () ; insert 2017 (set (ifield f-spr-h) (srl (ifield f-spr) (const 6))) 2018 (set (ifield f-spr-l) (and (ifield f-spr) (const #x3f))) 2019 ) 2020 (sequence () ; extract 2021 (set (ifield f-spr) (or (sll (ifield f-spr-h) (const 6)) 2022 (ifield f-spr-l))) 2023 ) 2024 ) 2025 2026 (df f-label16 "18 bit pc relative signed offset" (PCREL-ADDR) 15 16 INT 2027 ((value pc) (sra WI (sub WI value pc) (const 2))) 2028 ((value pc) (add WI (sll WI value (const 2)) pc)) 2029 ) 2030 2031 (df f-labelH6 "upper 6 bits of label24" () 30 6 INT #f #f) 2032 (dnf f-labelL18 "lower 18 bits of label24" () 17 18) 2033 (dnmf f-label24 "26 bit signed offset" (PCREL-ADDR) INT 2034 (f-labelH6 f-labelL18) 2035 ; insert 2036 (sequence () 2037 (set (ifield f-labelH6) 2038 (sra WI (sub (ifield f-label24) pc) (const 20))) 2039 (set (ifield f-labelL18) 2040 (and (srl (sub (ifield f-label24) pc) (const 2)) 2041 (const #x3ffff))) 2042 ) 2043 ; extract 2044 (sequence () 2045 (set (ifield f-label24) 2046 (add (sll (or (sll (ifield f-labelH6) (const 18)) 2047 (ifield f-labelL18)) 2048 (const 2)) 2049 pc))) 2050 ) 2051 2052 (dnf f-LRAE "Load Real Address E flag" () 5 1) 2053 (dnf f-LRAD "Load Real Address D flag" () 4 1) 2054 (dnf f-LRAS "Load Real Address S flag" () 3 1) 2055 2056 (dnf f-TLBPRopx "TLB Probe operation number" () 28 3) 2057 (dnf f-TLBPRL "TLB Probe L flag" () 25 1) 2058 2059 (dnf f-ICCi_1-null "null field" (RESERVED) 11 2) 2060 (dnf f-ICCi_2-null "null field" (RESERVED) 26 2) 2061 (dnf f-ICCi_3-null "null field" (RESERVED) 1 2) 2062 (dnf f-FCCi_1-null "null field" (RESERVED) 11 2) 2063 (dnf f-FCCi_2-null "null field" (RESERVED) 26 2) 2064 (dnf f-FCCi_3-null "null field" (RESERVED) 1 2) 2065 (dnf f-rs-null "null field" (RESERVED) 17 6) 2066 (dnf f-GRi-null "null field" (RESERVED) 17 6) 2067 (dnf f-GRj-null "null field" (RESERVED) 5 6) 2068 (dnf f-GRk-null "null field" (RESERVED) 30 6) 2069 (dnf f-FRi-null "null field" (RESERVED) 17 6) 2070 (dnf f-FRj-null "null field" (RESERVED) 5 6) 2071 (dnf f-ACCj-null "null field" (RESERVED) 5 6) 2072 (dnf f-rd-null "null field" (RESERVED) 30 6) 2073 (dnf f-cond-null "null field" (RESERVED) 30 4) 2074 (dnf f-ccond-null "null field" (RESERVED) 12 1) 2075 (dnf f-s12-null "null field" (RESERVED) 11 12) 2076 (dnf f-label16-null "null field" (RESERVED) 15 16) 2077 (dnf f-misc-null-1 "null field" (RESERVED) 30 5) 2078 (dnf f-misc-null-2 "null field" (RESERVED) 11 6) 2079 (dnf f-misc-null-3 "null field" (RESERVED) 11 4) 2080 (dnf f-misc-null-4 "null field" (RESERVED) 17 2) 2081 (dnf f-misc-null-5 "null field" (RESERVED) 17 16) 2082 (dnf f-misc-null-6 "null field" (RESERVED) 30 3) 2083 (dnf f-misc-null-7 "null field" (RESERVED) 17 3) 2084 (dnf f-misc-null-8 "null field" (RESERVED) 5 3) 2085 (dnf f-misc-null-9 "null field" (RESERVED) 5 4) 2086 (dnf f-misc-null-10 "null field" (RESERVED) 16 5) 2087 (dnf f-misc-null-11 "null field" (RESERVED) 5 1) 2088 2089 (dnf f-LRA-null "null field" (RESERVED) 2 3) 2090 (dnf f-TLBPR-null "null field" (RESERVED) 30 2) 2091 2092 (dnf f-LI-off "null field" (RESERVED) 25 1) 2093 (dnf f-LI-on "null field" (RESERVED) 25 1) 2094 2095 ; Relocation annotations. 2096 (dsh h-reloc-ann "relocation annotation" () (register BI)) 2097 (dnf f-reloc-ann "relocation annotation" () 0 0) 2098 2099 (define-pmacro (dann xname xcomment xmode xparse xprint) 2100 (define-operand 2101 (name xname) 2102 (comment xcomment) 2103 (type h-reloc-ann) 2104 (index f-reloc-ann) 2105 (mode xmode) 2106 (handlers (parse xparse) (print xprint)) 2107 ) 2108 ) 2109 2110 2112 ; Enums. 2113 2114 ; insn-op: 2115 ; FIXME: should use die macro or some such 2116 (define-normal-insn-enum insn-op "insn op enums" () OP_ f-op 2117 ( 2118 "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F" 2119 "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F" 2120 "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F" 2121 "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F" 2122 "40" "41" "42" "43" "44" "45" "46" "47" "48" "49" "4A" "4B" "4C" "4D" "4E" "4F" 2123 "50" "51" "52" "53" "54" "55" "56" "57" "58" "59" "5A" "5B" "5C" "5D" "5E" "5F" 2124 "60" "61" "62" "63" "64" "65" "66" "67" "68" "69" "6A" "6B" "6C" "6D" "6E" "6F" 2125 "70" "71" "72" "73" "74" "75" "76" "77" "78" "79" "7A" "7B" "7C" "7D" "7E" "7F" 2126 ) 2127 ) 2128 2129 (define-normal-insn-enum insn-ope1 "insn ope enums" () OPE1_ f-ope1 2130 ( 2131 "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F" 2132 "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F" 2133 "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F" 2134 "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F" 2135 ) 2136 ) 2137 2138 (define-normal-insn-enum insn-ope2 "insn ope enums" () OPE2_ f-ope2 2139 ( 2140 "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F" 2141 ) 2142 ) 2143 2144 (define-normal-insn-enum insn-ope3 "insn ope enums" () OPE3_ f-ope3 2145 ( 2146 "00" "01" "02" "03" "04" "05" "06" "07" 2147 ) 2148 ) 2149 2150 (define-normal-insn-enum insn-ope4 "insn ope enums" () OPE4_ f-ope4 2151 ( 2152 "0" "1" "2" "3" 2153 ) 2154 ) 2155 2156 ; int-cc: integer branch conditions 2157 ; FIXME: should use die macro or some such 2158 (define-normal-insn-enum int-cc "integer branch cond enums" () ICC_ f-int-cc 2159 ( 2160 "nev" "c" "v" "lt" "eq" "ls" "n" "le" 2161 "ra" "nc" "nv" "ge" "ne" "hi" "p" "gt" 2162 ) 2163 ) 2164 2165 ; flt-cc: floating-point/media branch conditions 2166 ; FIXME: should use die macro or some such 2167 (define-normal-insn-enum flt-cc "float branch cond enums" () FCC_ f-flt-cc 2168 ("nev" "u" "gt" "ug" "lt" "ul" "lg" "ne" 2169 "eq" "ue" "ge" "uge" "le" "ule" "o" "ra") 2170 ) 2171 2173 ; Hardware pieces. 2174 ; These entries list the elements of the raw hardware. 2175 ; They're also used to provide tables and other elements of the assembly 2176 ; language. 2177 (dnh h-pc "program counter" (PC PROFILE) (pc) () () ()) 2178 2179 ; The PSR. The individual fields are referenced more than the entire 2180 ; register, so reference them directly. We can assemble the 2181 ; entire register contents when necessary. 2182 ; 2183 (dsh h-psr_imple "PSR.IMPLE" () (register UQI)) 2184 (dsh h-psr_ver "PSR.VER" () (register UQI)) 2185 (dsh h-psr_ice "PSR.ICE bit" () (register BI)) 2186 (dsh h-psr_nem "PSR.NEM bit" () (register BI)) 2187 (dsh h-psr_cm "PSR.CM bit" () (register BI)) 2188 (dsh h-psr_be "PSR.BE bit" () (register BI)) 2189 (dsh h-psr_esr "PSR.ESR bit" () (register BI)) 2190 (dsh h-psr_ef "PSR.EF bit" () (register BI)) 2191 (dsh h-psr_em "PSR.EM bit" () (register BI)) 2192 (dsh h-psr_pil "PSR.PIL " () (register UQI)) 2193 (dsh h-psr_ps "PSR.PS bit" () (register BI)) 2194 (dsh h-psr_et "PSR.ET bit" () (register BI)) 2195 2196 ; PSR.S requires special handling because the shadow registers (SR0-SR4) must 2197 ; be switched with GR4-GR7 when changing from user to supervisor mode or 2198 ; vice-versa. 2199 (define-hardware 2200 (name h-psr_s) 2201 (comment "PSR.S bit") 2202 (attrs) 2203 (type register BI) 2204 (get) 2205 (set (newval) (c-call VOID "@cpu@_h_psr_s_set_handler" newval)) 2206 ) 2207 2208 ; The TBR. The individual bits are referenced more than the entire 2209 ; register, so reference them directly. We can assemble the 2210 ; entire register contents when necessary. 2211 ; 2212 (dsh h-tbr_tba "TBR.TBA" () (register UWI)) 2213 (dsh h-tbr_tt "TBR.TT" () (register UQI)) 2214 2215 ; The BPSR. The individual bits are referenced more than the entire 2216 ; register, so reference them directly. We can assemble the 2217 ; entire register contents when necessary. 2218 ; 2219 (dsh h-bpsr_bs "PSR.S bit" () (register BI)) 2220 (dsh h-bpsr_bet "PSR.ET bit" () (register BI)) 2221 2222 ; General registers 2223 ; 2224 (define-keyword 2225 (name gr-names) 2226 (print-name h-gr) 2227 (prefix "") 2228 (values 2229 (sp 1) (fp 2) 2230 (gr0 0)(gr1 1)(gr2 2)(gr3 3)(gr4 4)(gr5 5)(gr6 6)(gr7 7) 2231 (gr8 8)(gr9 9)(gr10 10)(gr11 11)(gr12 12)(gr13 13)(gr14 14)(gr15 15) 2232 (gr16 16)(gr17 17)(gr18 18)(gr19 19)(gr20 20)(gr21 21)(gr22 22)(gr23 23) 2233 (gr24 24)(gr25 25)(gr26 26)(gr27 27)(gr28 28)(gr29 29)(gr30 30)(gr31 31) 2234 (gr32 32)(gr33 33)(gr34 34)(gr35 35)(gr36 36)(gr37 37)(gr38 38)(gr39 39) 2235 (gr40 40)(gr41 41)(gr42 42)(gr43 43)(gr44 44)(gr45 45)(gr46 46)(gr47 47) 2236 (gr48 48)(gr49 49)(gr50 50)(gr51 51)(gr52 52)(gr53 53)(gr54 54)(gr55 55) 2237 (gr56 56)(gr57 57)(gr58 58)(gr59 59)(gr60 60)(gr61 61)(gr62 62)(gr63 63) 2238 ) 2239 ) 2240 2241 (define-hardware 2242 (name h-gr) 2243 (comment "general registers") 2244 (attrs PROFILE) 2245 (type register USI (64)) 2246 (indices extern-keyword gr-names) 2247 (get (index) (c-call WI "@cpu@_h_gr_get_handler" index)) 2248 (set (index newval) (c-call VOID "@cpu@_h_gr_set_handler" index newval)) 2249 ) 2250 2251 ; General Registers as double words 2252 ; These registers are shadowed onto h-gr 2253 (define-hardware 2254 (name h-gr_double) 2255 (comment "general registers as double words") 2256 (attrs PROFILE VIRTUAL) 2257 (type register DI (32)) 2258 ; FIXME: Need constraint to prohibit odd numbers. 2259 (indices extern-keyword gr-names) 2260 (get (index) 2261 (c-call DI "@cpu@_h_gr_double_get_handler" index)) 2262 (set (index newval) 2263 (c-call VOID "@cpu@_h_gr_double_set_handler" index newval)) 2264 ) 2265 2266 ; General Registers as high and low half words 2267 ; These registers are shadowed onto h-gr 2268 (define-hardware 2269 (name h-gr_hi) 2270 (comment "general registers as high half word") 2271 (attrs PROFILE VIRTUAL) 2272 (type register UHI (64)) 2273 (indices extern-keyword gr-names) 2274 (get (index) (c-call UHI "@cpu@_h_gr_hi_get_handler" index)) 2275 (set (index newval) (c-call VOID "@cpu@_h_gr_hi_set_handler" index newval)) 2276 ) 2277 (define-hardware 2278 (name h-gr_lo) 2279 (comment "general registers as low half word") 2280 (attrs PROFILE VIRTUAL) 2281 (type register UHI (64)) 2282 (indices extern-keyword gr-names) 2283 (get (index) (c-call UHI "@cpu@_h_gr_lo_get_handler" index)) 2284 (set (index newval) (c-call VOID "@cpu@_h_gr_lo_set_handler" index newval)) 2285 ) 2286 2287 ; Floating Point Registers 2288 (define-keyword 2289 (name fr-names) 2290 (print-name h-fr) 2291 (prefix "") 2292 (values 2293 (fr0 0)(fr1 1)(fr2 2)(fr3 3)(fr4 4)(fr5 5)(fr6 6)(fr7 7) 2294 (fr8 8)(fr9 9)(fr10 10)(fr11 11)(fr12 12)(fr13 13)(fr14 14)(fr15 15) 2295 (fr16 16)(fr17 17)(fr18 18)(fr19 19)(fr20 20)(fr21 21)(fr22 22)(fr23 23) 2296 (fr24 24)(fr25 25)(fr26 26)(fr27 27)(fr28 28)(fr29 29)(fr30 30)(fr31 31) 2297 (fr32 32)(fr33 33)(fr34 34)(fr35 35)(fr36 36)(fr37 37)(fr38 38)(fr39 39) 2298 (fr40 40)(fr41 41)(fr42 42)(fr43 43)(fr44 44)(fr45 45)(fr46 46)(fr47 47) 2299 (fr48 48)(fr49 49)(fr50 50)(fr51 51)(fr52 52)(fr53 53)(fr54 54)(fr55 55) 2300 (fr56 56)(fr57 57)(fr58 58)(fr59 59)(fr60 60)(fr61 61)(fr62 62)(fr63 63) 2301 ) 2302 ) 2303 2304 (define-hardware 2305 (name h-fr) 2306 (comment "floating point registers") 2307 (attrs PROFILE) 2308 (type register SF (64)) 2309 (indices extern-keyword fr-names) 2310 (get (index) (c-call SF "@cpu@_h_fr_get_handler" index)) 2311 (set (index newval) (c-call VOID "@cpu@_h_fr_set_handler" index newval)) 2312 ) 2313 2314 ; Floating Point Registers as double precision 2315 ; These registers are shadowed onto h-fr 2316 2317 (define-hardware 2318 (name h-fr_double) 2319 (comment "floating point registers as double precision") 2320 (attrs PROFILE VIRTUAL) 2321 (type register DF (32)) 2322 ; FIXME: Need constraint to prohibit odd numbers. 2323 (indices extern-keyword fr-names) 2324 (get (index) 2325 (c-call DF "@cpu@_h_fr_double_get_handler" index)) 2326 (set (index newval) 2327 (c-call VOID "@cpu@_h_fr_double_set_handler" index newval)) 2328 ) 2329 2330 ; Floating Point Registers as integer words. 2331 ; These registers are shadowed onto h-fr 2332 2333 (define-hardware 2334 (name h-fr_int) 2335 (comment "floating point registers as integers") 2336 (attrs PROFILE VIRTUAL) 2337 (type register USI (64)) 2338 (indices extern-keyword fr-names) 2339 (get (index) 2340 (c-call USI "@cpu@_h_fr_int_get_handler" index)) 2341 (set (index newval) 2342 (c-call VOID "@cpu@_h_fr_int_set_handler" index newval)) 2343 ) 2344 2345 ; Floating Point Registers as high and low half words 2346 ; These registers are shadowed onto h-fr 2347 (define-hardware 2348 (name h-fr_hi) 2349 (comment "floating point registers as unsigned high half word") 2350 (attrs PROFILE VIRTUAL) 2351 (type register UHI (64)) 2352 (indices extern-keyword fr-names) 2353 (get (regno) (srl (reg h-fr_int regno) 16)) 2354 (set (regno newval) (set (reg h-fr_int regno) 2355 (or (and (reg h-fr_int regno) #xffff) 2356 (sll newval 16)))) 2357 ) 2358 (define-hardware 2359 (name h-fr_lo) 2360 (comment "floating point registers as unsigned low half word") 2361 (attrs PROFILE VIRTUAL) 2362 (type register UHI (64)) 2363 (indices extern-keyword fr-names) 2364 (get (regno) (and (reg h-fr_int regno) #xffff)) 2365 (set (regno newval) (set (reg h-fr_int regno) 2366 (or (and (reg h-fr_int regno) #xffff0000) 2367 (and newval #xffff)))) 2368 ) 2369 2370 ; Floating Point Registers as unsigned bytes 2371 ; These registers are shadowed onto h-fr 2372 (define-hardware 2373 (name h-fr_0) 2374 (comment "floating point registers as unsigned byte 0") 2375 (attrs PROFILE VIRTUAL) 2376 (type register UHI (64)) 2377 (indices extern-keyword fr-names) 2378 (get (regno) (and (reg h-fr_int regno) #xff)) 2379 (set (regno newval) 2380 (sequence () 2381 (if (gt USI newval #xff) 2382 (set newval #xff)) 2383 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffffff00) 2384 newval)))) 2385 ) 2386 (define-hardware 2387 (name h-fr_1) 2388 (comment "floating point registers as unsigned byte 1") 2389 (attrs PROFILE VIRTUAL) 2390 (type register UHI (64)) 2391 (indices extern-keyword fr-names) 2392 (get (regno) (and (srl (reg h-fr_int regno) 8) #xff)) 2393 (set (regno newval) 2394 (sequence () 2395 (if (gt USI newval #xff) 2396 (set newval #xff)) 2397 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffff00ff) 2398 (sll newval 8))))) 2399 ) 2400 (define-hardware 2401 (name h-fr_2) 2402 (comment "floating point registers as unsigned byte 2") 2403 (attrs PROFILE VIRTUAL) 2404 (type register UHI (64)) 2405 (indices extern-keyword fr-names) 2406 (get (regno) (and (srl (reg h-fr_int regno) 16) #xff)) 2407 (set (regno newval) 2408 (sequence () 2409 (if (gt USI newval #xff) 2410 (set newval #xff)) 2411 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xff00ffff) 2412 (sll newval 16))))) 2413 ) 2414 (define-hardware 2415 (name h-fr_3) 2416 (comment "floating point registers as unsigned byte 3") 2417 (attrs PROFILE VIRTUAL) 2418 (type register UHI (64)) 2419 (indices extern-keyword fr-names) 2420 (get (regno) (and (srl (reg h-fr_int regno) 24) #xff)) 2421 (set (regno newval) 2422 (sequence () 2423 (if (gt USI newval #xff) 2424 (set newval #xff)) 2425 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #x00ffffff) 2426 (sll newval 24))))) 2427 ) 2428 ; Coprocessor Registers 2429 ; 2430 (define-keyword 2431 (name cpr-names) 2432 (print-name h-cpr) 2433 (prefix "") 2434 (values 2435 (cpr0 0)(cpr1 1)(cpr2 2)(cpr3 3)(cpr4 4)(cpr5 5)(cpr6 6)(cpr7 7) 2436 (cpr8 8)(cpr9 9)(cpr10 10)(cpr11 11)(cpr12 12)(cpr13 13)(cpr14 14)(cpr15 15) 2437 (cpr16 16)(cpr17 17)(cpr18 18)(cpr19 19)(cpr20 20)(cpr21 21)(cpr22 22)(cpr23 23) 2438 (cpr24 24)(cpr25 25)(cpr26 26)(cpr27 27)(cpr28 28)(cpr29 29)(cpr30 30)(cpr31 31) 2439 (cpr32 32)(cpr33 33)(cpr34 34)(cpr35 35)(cpr36 36)(cpr37 37)(cpr38 38)(cpr39 39) 2440 (cpr40 40)(cpr41 41)(cpr42 42)(cpr43 43)(cpr44 44)(cpr45 45)(cpr46 46)(cpr47 47) 2441 (cpr48 48)(cpr49 49)(cpr50 50)(cpr51 51)(cpr52 52)(cpr53 53)(cpr54 54)(cpr55 55) 2442 (cpr56 56)(cpr57 57)(cpr58 58)(cpr59 59)(cpr60 60)(cpr61 61)(cpr62 62)(cpr63 63) 2443 ) 2444 ) 2445 2446 (define-hardware 2447 (name h-cpr) 2448 (comment "coprocessor registers") 2449 (attrs PROFILE (MACH frv)) 2450 (type register WI (64)) 2451 (indices extern-keyword cpr-names) 2452 ) 2453 2454 ; Coprocessor Registers as double words 2455 ; These registers are shadowed onto h-cpr 2456 (define-hardware 2457 (name h-cpr_double) 2458 (comment "coprocessor registers as double words") 2459 (attrs PROFILE VIRTUAL (MACH frv)) 2460 (type register DI (32)) 2461 ; FIXME: Need constraint to prohibit odd numbers. 2462 (indices extern-keyword cpr-names) 2463 (get (index) 2464 (c-call DI "@cpu@_h_cpr_double_get_handler" index)) 2465 (set (index newval) 2466 (c-call VOID "@cpu@_h_cpr_double_set_handler" index newval)) 2467 ) 2468 2469 ; Special Purpose Registers 2470 ; 2471 (define-keyword 2472 (name spr-names) 2473 (print-name h-spr) 2474 (prefix "") 2475 (values 2476 (psr 0) (pcsr 1) (bpcsr 2) (tbr 3) (bpsr 4) 2477 2478 (hsr0 16) (hsr1 17) (hsr2 18) (hsr3 19) 2479 (hsr4 20) (hsr5 21) (hsr6 22) (hsr7 23) 2480 (hsr8 24) (hsr9 25) (hsr10 26) (hsr11 27) 2481 (hsr12 28) (hsr13 29) (hsr14 30) (hsr15 31) 2482 (hsr16 32) (hsr17 33) (hsr18 34) (hsr19 35) 2483 (hsr20 36) (hsr21 37) (hsr22 38) (hsr23 39) 2484 (hsr24 40) (hsr25 41) (hsr26 42) (hsr27 43) 2485 (hsr28 44) (hsr29 45) (hsr30 46) (hsr31 47) 2486 (hsr32 48) (hsr33 49) (hsr34 50) (hsr35 51) 2487 (hsr36 52) (hsr37 53) (hsr38 54) (hsr39 55) 2488 (hsr40 56) (hsr41 57) (hsr42 58) (hsr43 59) 2489 (hsr44 60) (hsr45 61) (hsr46 62) (hsr47 63) 2490 (hsr48 64) (hsr49 65) (hsr50 66) (hsr51 67) 2491 (hsr52 68) (hsr53 69) (hsr54 70) (hsr55 71) 2492 (hsr56 72) (hsr57 73) (hsr58 74) (hsr59 75) 2493 (hsr60 76) (hsr61 77) (hsr62 78) (hsr63 79) 2494 2495 (ccr 256) (cccr 263) (lr 272) (lcr 273) (iacc0h 280) (iacc0l 281) (isr 288) 2496 2497 (neear0 352) (neear1 353) (neear2 354) (neear3 355) 2498 (neear4 356) (neear5 357) (neear6 358) (neear7 359) 2499 (neear8 360) (neear9 361) (neear10 362) (neear11 363) 2500 (neear12 364) (neear13 365) (neear14 366) (neear15 367) 2501 (neear16 368) (neear17 369) (neear18 370) (neear19 371) 2502 (neear20 372) (neear21 373) (neear22 374) (neear23 375) 2503 (neear24 376) (neear25 377) (neear26 378) (neear27 379) 2504 (neear28 380) (neear29 381) (neear30 382) (neear31 383) 2505 2506 (nesr0 384) (nesr1 385) (nesr2 386) (nesr3 387) 2507 (nesr4 388) (nesr5 389) (nesr6 390) (nesr7 391) 2508 (nesr8 392) (nesr9 393) (nesr10 394) (nesr11 395) 2509 (nesr12 396) (nesr13 397) (nesr14 398) (nesr15 399) 2510 (nesr16 400) (nesr17 401) (nesr18 402) (nesr19 403) 2511 (nesr20 404) (nesr21 405) (nesr22 406) (nesr23 407) 2512 (nesr24 408) (nesr25 409) (nesr26 410) (nesr27 411) 2513 (nesr28 412) (nesr29 413) (nesr30 414) (nesr31 415) 2514 2515 (necr 416) 2516 2517 (gner0 432) (gner1 433) 2518 2519 (fner0 434) (fner1 435) 2520 2521 (epcr0 512) (epcr1 513) (epcr2 514) (epcr3 515) 2522 (epcr4 516) (epcr5 517) (epcr6 518) (epcr7 519) 2523 (epcr8 520) (epcr9 521) (epcr10 522) (epcr11 523) 2524 (epcr12 524) (epcr13 525) (epcr14 526) (epcr15 527) 2525 (epcr16 528) (epcr17 529) (epcr18 530) (epcr19 531) 2526 (epcr20 532) (epcr21 533) (epcr22 534) (epcr23 535) 2527 (epcr24 536) (epcr25 537) (epcr26 538) (epcr27 539) 2528 (epcr28 540) (epcr29 541) (epcr30 542) (epcr31 543) 2529 (epcr32 544) (epcr33 545) (epcr34 546) (epcr35 547) 2530 (epcr36 548) (epcr37 549) (epcr38 550) (epcr39 551) 2531 (epcr40 552) (epcr41 553) (epcr42 554) (epcr43 555) 2532 (epcr44 556) (epcr45 557) (epcr46 558) (epcr47 559) 2533 (epcr48 560) (epcr49 561) (epcr50 562) (epcr51 563) 2534 (epcr52 564) (epcr53 565) (epcr54 566) (epcr55 567) 2535 (epcr56 568) (epcr57 569) (epcr58 570) (epcr59 571) 2536 (epcr60 572) (epcr61 573) (epcr62 574) (epcr63 575) 2537 2538 (esr0 576) (esr1 577) (esr2 578) (esr3 579) 2539 (esr4 580) (esr5 581) (esr6 582) (esr7 583) 2540 (esr8 584) (esr9 585) (esr10 586) (esr11 587) 2541 (esr12 588) (esr13 589) (esr14 590) (esr15 591) 2542 (esr16 592) (esr17 593) (esr18 594) (esr19 595) 2543 (esr20 596) (esr21 597) (esr22 598) (esr23 599) 2544 (esr24 600) (esr25 601) (esr26 602) (esr27 603) 2545 (esr28 604) (esr29 605) (esr30 606) (esr31 607) 2546 (esr32 608) (esr33 609) (esr34 610) (esr35 611) 2547 (esr36 612) (esr37 613) (esr38 614) (esr39 615) 2548 (esr40 616) (esr41 617) (esr42 618) (esr43 619) 2549 (esr44 620) (esr45 621) (esr46 622) (esr47 623) 2550 (esr48 624) (esr49 625) (esr50 626) (esr51 627) 2551 (esr52 628) (esr53 629) (esr54 630) (esr55 631) 2552 (esr56 632) (esr57 633) (esr58 634) (esr59 635) 2553 (esr60 636) (esr61 637) (esr62 638) (esr63 639) 2554 2555 (eir0 640) (eir1 641) (eir2 642) (eir3 643) 2556 (eir4 644) (eir5 645) (eir6 646) (eir7 647) 2557 (eir8 648) (eir9 649) (eir10 650) (eir11 651) 2558 (eir12 652) (eir13 653) (eir14 654) (eir15 655) 2559 (eir16 656) (eir17 657) (eir18 658) (eir19 659) 2560 (eir20 660) (eir21 661) (eir22 662) (eir23 663) 2561 (eir24 664) (eir25 665) (eir26 666) (eir27 667) 2562 (eir28 668) (eir29 669) (eir30 670) (eir31 671) 2563 2564 (esfr0 672) (esfr1 673) 2565 2566 (sr0 768) (sr1 769) (sr2 770) (sr3 771) 2567 2568 (scr0 832) (scr1 833) (scr2 834) (scr3 835) 2569 2570 (fsr0 1024) (fsr1 1025) (fsr2 1026) (fsr3 1027) 2571 (fsr4 1028) (fsr5 1029) (fsr6 1030) (fsr7 1031) 2572 (fsr8 1032) (fsr9 1033) (fsr10 1034) (fsr11 1035) 2573 (fsr12 1036) (fsr13 1037) (fsr14 1038) (fsr15 1039) 2574 (fsr16 1040) (fsr17 1041) (fsr18 1042) (fsr19 1043) 2575 (fsr20 1044) (fsr21 1045) (fsr22 1046) (fsr23 1047) 2576 (fsr24 1048) (fsr25 1049) (fsr26 1050) (fsr27 1051) 2577 (fsr28 1052) (fsr29 1053) (fsr30 1054) (fsr31 1055) 2578 (fsr32 1056) (fsr33 1057) (fsr34 1058) (fsr35 1059) 2579 (fsr36 1060) (fsr37 1061) (fsr38 1062) (fsr39 1063) 2580 (fsr40 1064) (fsr41 1065) (fsr42 1066) (fsr43 1067) 2581 (fsr44 1068) (fsr45 1069) (fsr46 1070) (fsr47 1071) 2582 (fsr48 1072) (fsr49 1073) (fsr50 1074) (fsr51 1075) 2583 (fsr52 1076) (fsr53 1077) (fsr54 1078) (fsr55 1079) 2584 (fsr56 1080) (fsr57 1081) (fsr58 1082) (fsr59 1083) 2585 (fsr60 1084) (fsr61 1085) (fsr62 1086) (fsr63 1087) 2586 2587 ; FQ0-FQ31 are 64 bit registers. 2588 ; These names allow access to the upper 32 bits of the FQ registers. 2589 (fqop0 1088) (fqop1 1090) (fqop2 1092) (fqop3 1094) 2590 (fqop4 1096) (fqop5 1098) (fqop6 1100) (fqop7 1102) 2591 (fqop8 1104) (fqop9 1106) (fqop10 1108) (fqop11 1110) 2592 (fqop12 1112) (fqop13 1114) (fqop14 1116) (fqop15 1118) 2593 (fqop16 1120) (fqop17 1122) (fqop18 1124) (fqop19 1126) 2594 (fqop20 1128) (fqop21 1130) (fqop22 1132) (fqop23 1134) 2595 (fqop24 1136) (fqop25 1138) (fqop26 1140) (fqop27 1142) 2596 (fqop28 1144) (fqop29 1146) (fqop30 1148) (fqop31 1150) 2597 ; These names allow access to the lower 32 bits of the FQ registers. 2598 (fqst0 1089) (fqst1 1091) (fqst2 1093) (fqst3 1095) 2599 (fqst4 1097) (fqst5 1099) (fqst6 1101) (fqst7 1103) 2600 (fqst8 1105) (fqst9 1107) (fqst10 1109) (fqst11 1111) 2601 (fqst12 1113) (fqst13 1115) (fqst14 1117) (fqst15 1119) 2602 (fqst16 1121) (fqst17 1123) (fqst18 1125) (fqst19 1127) 2603 (fqst20 1129) (fqst21 1131) (fqst22 1133) (fqst23 1135) 2604 (fqst24 1137) (fqst25 1139) (fqst26 1141) (fqst27 1143) 2605 (fqst28 1145) (fqst29 1147) (fqst30 1149) (fqst31 1151) 2606 ; These also access the lower 32 bits of the FQ registers. 2607 ; These are not accessible as spr registers (see LSI appendix - section 13.4) 2608 ; (fq0 1089) (fq1 1091) (fq2 1093) (fq3 1095) 2609 ; (fq4 1097) (fq5 1099) (fq6 1101) (fq7 1103) 2610 ; (fq8 1105) (fq9 1107) (fq10 1109) (fq11 1111) 2611 ; (fq12 1113) (fq13 1115) (fq14 1117) (fq15 1119) 2612 ; (fq16 1121) (fq17 1123) (fq18 1125) (fq19 1127) 2613 ; (fq20 1129) (fq21 1131) (fq22 1133) (fq23 1135) 2614 ; (fq24 1137) (fq25 1139) (fq26 1141) (fq27 1143) 2615 ; (fq28 1145) (fq29 1147) (fq30 1149) (fq31 1151) 2616 2617 (mcilr0 1272) (mcilr1 1273) 2618 2619 (msr0 1280) (msr1 1281) (msr2 1282) (msr3 1283) 2620 (msr4 1284) (msr5 1285) (msr6 1286) (msr7 1287) 2621 (msr8 1288) (msr9 1289) (msr10 1290) (msr11 1291) 2622 (msr12 1292) (msr13 1293) (msr14 1294) (msr15 1295) 2623 (msr16 1296) (msr17 1297) (msr18 1298) (msr19 1299) 2624 (msr20 1300) (msr21 1301) (msr22 1302) (msr23 1303) 2625 (msr24 1304) (msr25 1305) (msr26 1306) (msr27 1307) 2626 (msr28 1308) (msr29 1309) (msr30 1310) (msr31 1311) 2627 (msr32 1312) (msr33 1313) (msr34 1314) (msr35 1315) 2628 (msr36 1316) (msr37 1317) (msr38 1318) (msr39 1319) 2629 (msr40 1320) (msr41 1321) (msr42 1322) (msr43 1323) 2630 (msr44 1324) (msr45 1325) (msr46 1326) (msr47 1327) 2631 (msr48 1328) (msr49 1329) (msr50 1330) (msr51 1331) 2632 (msr52 1332) (msr53 1333) (msr54 1334) (msr55 1335) 2633 (msr56 1336) (msr57 1337) (msr58 1338) (msr59 1339) 2634 (msr60 1340) (msr61 1341) (msr62 1342) (msr63 1343) 2635 2636 ; MQ0-MQ31 are 64 bit registers. 2637 ; These names allow access to the upper 32 bits of the MQ registers. 2638 (mqop0 1344) (mqop1 1346) (mqop2 1348) (mqop3 1350) 2639 (mqop4 1352) (mqop5 1354) (mqop6 1356) (mqop7 1358) 2640 (mqop8 1360) (mqop9 1362) (mqop10 1364) (mqop11 1366) 2641 (mqop12 1368) (mqop13 1370) (mqop14 1372) (mqop15 1374) 2642 (mqop16 1376) (mqop17 1378) (mqop18 1380) (mqop19 1382) 2643 (mqop20 1384) (mqop21 1386) (mqop22 1388) (mqop23 1390) 2644 (mqop24 1392) (mqop25 1394) (mqop26 1396) (mqop27 1398) 2645 (mqop28 1400) (mqop29 1402) (mqop30 1404) (mqop31 1406) 2646 ; These names allow access to the lower 32 bits of the MQ registers. 2647 (mqst0 1345) (mqst1 1347) (mqst2 1349) (mqst3 1351) 2648 (mqst4 1353) (mqst5 1355) (mqst6 1357) (mqst7 1359) 2649 (mqst8 1361) (mqst9 1363) (mqst10 1365) (mqst11 1367) 2650 (mqst12 1369) (mqst13 1371) (mqst14 1373) (mqst15 1375) 2651 (mqst16 1377) (mqst17 1379) (mqst18 1381) (mqst19 1383) 2652 (mqst20 1385) (mqst21 1387) (mqst22 1389) (mqst23 1391) 2653 (mqst24 1393) (mqst25 1395) (mqst26 1397) (mqst27 1399) 2654 (mqst28 1401) (mqst29 1403) (mqst30 1405) (mqst31 1407) 2655 ; These also access the lower 32 bits of the MQ registers. 2656 ; These are not accessible as spr registers (see LSI appendix - section 13.4) 2657 ; (mq0 1345) (mq1 1347) (mq2 1349) (mq3 1351) 2658 ; (mq4 1353) (mq5 1355) (mq6 1357) (mq7 1359) 2659 ; (mq8 1361) (mq9 1363) (mq10 1365) (mq11 1367) 2660 ; (mq12 1369) (mq13 1371) (mq14 1373) (mq15 1375) 2661 ; (mq16 1377) (mq17 1379) (mq18 1381) (mq19 1383) 2662 ; (mq20 1385) (mq21 1387) (mq22 1389) (mq23 1391) 2663 ; (mq24 1393) (mq25 1395) (mq26 1397) (mq27 1399) 2664 ; (mq28 1401) (mq29 1403) (mq30 1405) (mq31 1407) 2665 2666 ; These are not accessible as spr registers (see LSI appendix - section 13.4) 2667 ; (acc0 1408) (acc1 1409) (acc2 1410) (acc3 1411) 2668 ; (acc4 1412) (acc5 1413) (acc6 1414) (acc7 1415) 2669 ; (acc8 1416) (acc9 1417) (acc10 1418) (acc11 1419) 2670 ; (acc12 1420) (acc13 1421) (acc14 1422) (acc15 1423) 2671 ; (acc16 1424) (acc17 1425) (acc18 1426) (acc19 1427) 2672 ; (acc20 1428) (acc21 1429) (acc22 1430) (acc23 1431) 2673 ; (acc24 1432) (acc25 1433) (acc26 1434) (acc27 1435) 2674 ; (acc28 1436) (acc29 1437) (acc30 1438) (acc31 1439) 2675 ; (acc32 1440) (acc33 1441) (acc34 1442) (acc35 1443) 2676 ; (acc36 1444) (acc37 1445) (acc38 1446) (acc39 1447) 2677 ; (acc40 1448) (acc41 1449) (acc42 1450) (acc43 1451) 2678 ; (acc44 1452) (acc45 1453) (acc46 1454) (acc47 1455) 2679 ; (acc48 1456) (acc49 1457) (acc50 1458) (acc51 1459) 2680 ; (acc52 1460) (acc53 1461) (acc54 1462) (acc55 1463) 2681 ; (acc56 1464) (acc57 1465) (acc58 1466) (acc59 1467) 2682 ; (acc60 1468) (acc61 1469) (acc62 1470) (acc63 1471) 2683 2684 ; (accg0 1472) (accg1 1473) (accg2 1474) (accg3 1475) 2685 ; (accg4 1476) (accg5 1477) (accg6 1478) (accg7 1479) 2686 ; (accg8 1480) (accg9 1481) (accg10 1482) (accg11 1483) 2687 ; (accg12 1484) (accg13 1485) (accg14 1486) (accg15 1487) 2688 ; (accg16 1488) (accg17 1489) (accg18 1490) (accg19 1491) 2689 ; (accg20 1492) (accg21 1493) (accg22 1494) (accg23 1495) 2690 ; (accg24 1496) (accg25 1497) (accg26 1498) (accg27 1499) 2691 ; (accg28 1500) (accg29 1501) (accg30 1502) (accg31 1503) 2692 ; (accg32 1504) (accg33 1505) (accg34 1506) (accg35 1507) 2693 ; (accg36 1508) (accg37 1509) (accg38 1510) (accg39 1511) 2694 ; (accg40 1512) (accg41 1513) (accg42 1514) (accg43 1515) 2695 ; (accg44 1516) (accg45 1517) (accg46 1518) (accg47 1519) 2696 ; (accg48 1520) (accg49 1521) (accg50 1522) (accg51 1523) 2697 ; (accg52 1524) (accg53 1525) (accg54 1526) (accg55 1527) 2698 ; (accg56 1528) (accg57 1529) (accg58 1530) (accg59 1531) 2699 ; (accg60 1532) (accg61 1533) (accg62 1534) (accg63 1535) 2700 2701 (ear0 1536) (ear1 1537) (ear2 1538) (ear3 1539) 2702 (ear4 1540) (ear5 1541) (ear6 1542) (ear7 1543) 2703 (ear8 1544) (ear9 1545) (ear10 1546) (ear11 1547) 2704 (ear12 1548) (ear13 1549) (ear14 1550) (ear15 1551) 2705 (ear16 1552) (ear17 1553) (ear18 1554) (ear19 1555) 2706 (ear20 1556) (ear21 1557) (ear22 1558) (ear23 1559) 2707 (ear24 1560) (ear25 1561) (ear26 1562) (ear27 1563) 2708 (ear28 1564) (ear29 1565) (ear30 1566) (ear31 1567) 2709 (ear32 1568) (ear33 1569) (ear34 1570) (ear35 1571) 2710 (ear36 1572) (ear37 1573) (ear38 1574) (ear39 1575) 2711 (ear40 1576) (ear41 1577) (ear42 1578) (ear43 1579) 2712 (ear44 1580) (ear45 1581) (ear46 1582) (ear47 1583) 2713 (ear48 1584) (ear49 1585) (ear50 1586) (ear51 1587) 2714 (ear52 1588) (ear53 1589) (ear54 1590) (ear55 1591) 2715 (ear56 1592) (ear57 1593) (ear58 1594) (ear59 1595) 2716 (ear60 1596) (ear61 1597) (ear62 1598) (ear63 1599) 2717 2718 (edr0 1600) (edr1 1601) (edr2 1602) (edr3 1603) 2719 (edr4 1604) (edr5 1605) (edr6 1606) (edr7 1607) 2720 (edr8 1608) (edr9 1609) (edr10 1610) (edr11 1611) 2721 (edr12 1612) (edr13 1613) (edr14 1614) (edr15 1615) 2722 (edr16 1616) (edr17 1617) (edr18 1618) (edr19 1619) 2723 (edr20 1620) (edr21 1621) (edr22 1622) (edr23 1623) 2724 (edr24 1624) (edr25 1625) (edr26 1626) (edr27 1627) 2725 (edr28 1628) (edr29 1629) (edr30 1630) (edr31 1631) 2726 (edr32 1632) (edr33 1636) (edr34 1634) (edr35 1635) 2727 (edr36 1636) (edr37 1637) (edr38 1638) (edr39 1639) 2728 (edr40 1640) (edr41 1641) (edr42 1642) (edr43 1643) 2729 (edr44 1644) (edr45 1645) (edr46 1646) (edr47 1647) 2730 (edr48 1648) (edr49 1649) (edr50 1650) (edr51 1651) 2731 (edr52 1652) (edr53 1653) (edr54 1654) (edr55 1655) 2732 (edr56 1656) (edr57 1657) (edr58 1658) (edr59 1659) 2733 (edr60 1660) (edr61 1661) (edr62 1662) (edr63 1663) 2734 2735 (iamlr0 1664) (iamlr1 1665) (iamlr2 1666) (iamlr3 1667) 2736 (iamlr4 1668) (iamlr5 1669) (iamlr6 1670) (iamlr7 1671) 2737 (iamlr8 1672) (iamlr9 1673) (iamlr10 1674) (iamlr11 1675) 2738 (iamlr12 1676) (iamlr13 1677) (iamlr14 1678) (iamlr15 1679) 2739 (iamlr16 1680) (iamlr17 1681) (iamlr18 1682) (iamlr19 1683) 2740 (iamlr20 1684) (iamlr21 1685) (iamlr22 1686) (iamlr23 1687) 2741 (iamlr24 1688) (iamlr25 1689) (iamlr26 1690) (iamlr27 1691) 2742 (iamlr28 1692) (iamlr29 1693) (iamlr30 1694) (iamlr31 1695) 2743 (iamlr32 1696) (iamlr33 1697) (iamlr34 1698) (iamlr35 1699) 2744 (iamlr36 1700) (iamlr37 1701) (iamlr38 1702) (iamlr39 1703) 2745 (iamlr40 1704) (iamlr41 1705) (iamlr42 1706) (iamlr43 1707) 2746 (iamlr44 1708) (iamlr45 1709) (iamlr46 1710) (iamlr47 1711) 2747 (iamlr48 1712) (iamlr49 1713) (iamlr50 1714) (iamlr51 1715) 2748 (iamlr52 1716) (iamlr53 1717) (iamlr54 1718) (iamlr55 1719) 2749 (iamlr56 1720) (iamlr57 1721) (iamlr58 1722) (iamlr59 1723) 2750 (iamlr60 1724) (iamlr61 1725) (iamlr62 1726) (iamlr63 1727) 2751 2752 (iampr0 1728) (iampr1 1729) (iampr2 1730) (iampr3 1731) 2753 (iampr4 1732) (iampr5 1733) (iampr6 1734) (iampr7 1735) 2754 (iampr8 1736) (iampr9 1737) (iampr10 1738) (iampr11 1739) 2755 (iampr12 1740) (iampr13 1741) (iampr14 1742) (iampr15 1743) 2756 (iampr16 1744) (iampr17 1745) (iampr18 1746) (iampr19 1747) 2757 (iampr20 1748) (iampr21 1749) (iampr22 1750) (iampr23 1751) 2758 (iampr24 1752) (iampr25 1753) (iampr26 1754) (iampr27 1755) 2759 (iampr28 1756) (iampr29 1757) (iampr30 1758) (iampr31 1759) 2760 (iampr32 1760) (iampr33 1761) (iampr34 1762) (iampr35 1763) 2761 (iampr36 1764) (iampr37 1765) (iampr38 1766) (iampr39 1767) 2762 (iampr40 1768) (iampr41 1769) (iampr42 1770) (iampr43 1771) 2763 (iampr44 1772) (iampr45 1773) (iampr46 1774) (iampr47 1775) 2764 (iampr48 1776) (iampr49 1777) (iampr50 1778) (iampr51 1779) 2765 (iampr52 1780) (iampr53 1781) (iampr54 1782) (iampr55 1783) 2766 (iampr56 1784) (iampr57 1785) (iampr58 1786) (iampr59 1787) 2767 (iampr60 1788) (iampr61 1789) (iampr62 1790) (iampr63 1791) 2768 2769 (damlr0 1792) (damlr1 1793) (damlr2 1794) (damlr3 1795) 2770 (damlr4 1796) (damlr5 1797) (damlr6 1798) (damlr7 1799) 2771 (damlr8 1800) (damlr9 1801) (damlr10 1802) (damlr11 1803) 2772 (damlr12 1804) (damlr13 1805) (damlr14 1806) (damlr15 1807) 2773 (damlr16 1808) (damlr17 1809) (damlr18 1810) (damlr19 1811) 2774 (damlr20 1812) (damlr21 1813) (damlr22 1814) (damlr23 1815) 2775 (damlr24 1816) (damlr25 1817) (damlr26 1818) (damlr27 1819) 2776 (damlr28 1820) (damlr29 1821) (damlr30 1822) (damlr31 1823) 2777 (damlr32 1824) (damlr33 1825) (damlr34 1826) (damlr35 1827) 2778 (damlr36 1828) (damlr37 1829) (damlr38 1830) (damlr39 1831) 2779 (damlr40 1832) (damlr41 1833) (damlr42 1834) (damlr43 1835) 2780 (damlr44 1836) (damlr45 1837) (damlr46 1838) (damlr47 1839) 2781 (damlr48 1840) (damlr49 1841) (damlr50 1842) (damlr51 1843) 2782 (damlr52 1844) (damlr53 1845) (damlr54 1846) (damlr55 1847) 2783 (damlr56 1848) (damlr57 1849) (damlr58 1850) (damlr59 1851) 2784 (damlr60 1852) (damlr61 1853) (damlr62 1854) (damlr63 1855) 2785 2786 (dampr0 1856) (dampr1 1857) (dampr2 1858) (dampr3 1859) 2787 (dampr4 1860) (dampr5 1861) (dampr6 1862) (dampr7 1863) 2788 (dampr8 1864) (dampr9 1865) (dampr10 1866) (dampr11 1867) 2789 (dampr12 1868) (dampr13 1869) (dampr14 1870) (dampr15 1871) 2790 (dampr16 1872) (dampr17 1873) (dampr18 1874) (dampr19 1875) 2791 (dampr20 1876) (dampr21 1877) (dampr22 1878) (dampr23 1879) 2792 (dampr24 1880) (dampr25 1881) (dampr26 1882) (dampr27 1883) 2793 (dampr28 1884) (dampr29 1885) (dampr30 1886) (dampr31 1887) 2794 (dampr32 1888) (dampr33 1889) (dampr34 1890) (dampr35 1891) 2795 (dampr36 1892) (dampr37 1893) (dampr38 1894) (dampr39 1895) 2796 (dampr40 1896) (dampr41 1897) (dampr42 1898) (dampr43 1899) 2797 (dampr44 1900) (dampr45 1901) (dampr46 1902) (dampr47 1903) 2798 (dampr48 1904) (dampr49 1905) (dampr50 1906) (dampr51 1907) 2799 (dampr52 1908) (dampr53 1909) (dampr54 1910) (dampr55 1911) 2800 (dampr56 1912) (dampr57 1913) (dampr58 1914) (dampr59 1915) 2801 (dampr60 1916) (dampr61 1917) (dampr62 1918) (dampr63 1919) 2802 2803 (amcr 1920) (stbar 1921) (mmcr 1922) 2804 (iamvr1 1925) (damvr1 1927) 2805 (cxnr 1936) (ttbr 1937) (tplr 1938) (tppr 1939) 2806 (tpxr 1940) 2807 (timerh 1952) (timerl 1953) (timerd 1954) 2808 (dcr 2048) (brr 2049) (nmar 2050) (btbr 2051) 2809 2810 (ibar0 2052) (ibar1 2053) (ibar2 2054) (ibar3 2055) 2811 (dbar0 2056) (dbar1 2057) (dbar2 2058) (dbar3 2059) 2812 2813 (dbdr00 2060) (dbdr01 2061) (dbdr02 2062) (dbdr03 2063) 2814 (dbdr10 2064) (dbdr11 2065) (dbdr12 2066) (dbdr13 2067) 2815 (dbdr20 2068) (dbdr21 2069) (dbdr22 2070) (dbdr23 2071) 2816 (dbdr30 2072) (dbdr31 2073) (dbdr32 2074) (dbdr33 2075) 2817 2818 (dbmr00 2076) (dbmr01 2077) (dbmr02 2078) (dbmr03 2079) 2819 (dbmr10 2080) (dbmr11 2081) (dbmr12 2082) (dbmr13 2083) 2820 (dbmr20 2084) (dbmr21 2085) (dbmr22 2086) (dbmr23 2087) 2821 (dbmr30 2088) (dbmr31 2089) (dbmr32 2090) (dbmr33 2091) 2822 2823 (cpcfr 2304) (cpcr 2305) (cpsr 2306) (cptr 2307) 2824 (cphsr0 2308) (cphsr1 2309) (cpesr0 2320) (cpesr1 2321) 2825 (cpemr0 2322) (cpemr1 2323) 2826 2827 (iperr0 2324) (iperr1 2325) (ipjsr 2326) (ipjrr 2327) 2828 (ipcsr0 2336) (ipcsr1 2337) (ipcwer0 2338) (ipcwer1 2339) 2829 (ipcwr 2340) 2830 2831 (mbhsr 2352) (mbssr 2353) (mbrsr 2354) (mbsdr 2355) 2832 (mbrdr 2356) (mbsmr 2357) (mbstr0 2359) (mbstr1 2360) 2833 2834 (slpr 2368) (sldr 2369) (slhsr 2370) (sltr 2371) 2835 (slwr 2372) 2836 2837 (ihsr8 3848) (ihsr9 3849) (ihsr10 3850) 2838 ) 2839 ) 2840 2841 (define-hardware 2842 (name h-spr) 2843 (comment "special purpose registers") 2844 (attrs PROFILE) 2845 (type register UWI (4096)) 2846 (indices extern-keyword spr-names) 2847 (get (index) (c-call UWI "@cpu@_h_spr_get_handler" index)) 2848 (set (index newval) (c-call VOID "@cpu@_h_spr_set_handler" index newval)) 2849 ) 2850 2851 (define-pmacro (spr-pcsr) (reg h-spr 1)) 2852 (define-pmacro (spr-bpcsr) (reg h-spr 2)) 2853 (define-pmacro (spr-lr) (reg h-spr 272)) 2854 (define-pmacro (spr-lcr) (reg h-spr 273)) 2855 (define-pmacro (spr-iacc0h) (reg h-spr 280)) 2856 (define-pmacro (spr-iacc0l) (reg h-spr 281)) 2857 (define-pmacro (spr-sr0) (reg h-spr 768)) 2858 (define-pmacro (spr-sr1) (reg h-spr 769)) 2859 (define-pmacro (spr-sr2) (reg h-spr 770)) 2860 (define-pmacro (spr-sr3) (reg h-spr 771)) 2861 2862 ; Accumulator guard. Actually a subset of the SPR registers, but those SPRs 2863 ; are read-only in most insns. This hardware element is used by those insns 2864 ; which have direct access (mwtaccg, mrdaccg). 2865 (define-keyword 2866 (name accg-names) 2867 (print-name h-accg) 2868 (prefix "") 2869 (values 2870 (accg0 0)(accg1 1)(accg2 2)(accg3 3) 2871 (accg4 4)(accg5 5)(accg6 6)(accg7 7) 2872 (accg8 8)(accg9 9)(accg10 10)(accg11 11) 2873 (accg12 12)(accg13 13)(accg14 14)(accg15 15) 2874 (accg16 16)(accg17 17)(accg18 18)(accg19 19) 2875 (accg20 20)(accg21 21)(accg22 22)(accg23 23) 2876 (accg24 24)(accg25 25)(accg26 26)(accg27 27) 2877 (accg28 28)(accg29 29)(accg30 30)(accg31 31) 2878 (accg32 32)(accg33 33)(accg34 34)(accg35 35) 2879 (accg36 36)(accg37 37)(accg38 38)(accg39 39) 2880 (accg40 40)(accg41 41)(accg42 42)(accg43 43) 2881 (accg44 44)(accg45 45)(accg46 46)(accg47 47) 2882 (accg48 48)(accg49 49)(accg50 50)(accg51 51) 2883 (accg52 52)(accg53 53)(accg54 54)(accg55 55) 2884 (accg56 56)(accg57 57)(accg58 58)(accg59 59) 2885 (accg60 60)(accg61 61)(accg62 62)(accg63 63) 2886 ) 2887 ) 2888 2889 (define-hardware 2890 (name h-accg) 2891 (comment "accumulator guard") 2892 (attrs PROFILE VIRTUAL) 2893 (type register UWI (64)) 2894 (indices extern-keyword accg-names) 2895 (get (index) 2896 (and (reg h-spr (add index 1472)) #xff)) 2897 (set (index newval) 2898 (set (raw-reg UWI h-spr (add index 1472)) (and newval #xff))) 2899 ) 2900 2901 ; 40 bit accumulator. Composed of ACCG and ACC registers concatenated, but 2902 ; referenced more often as the composed 40 bits. 2903 (define-keyword 2904 (name acc-names) 2905 (print-name h-acc40) 2906 (prefix "") 2907 (values 2908 (acc0 0)(acc1 1)(acc2 2)(acc3 3)(acc4 4)(acc5 5)(acc6 6)(acc7 7) 2909 (acc8 8)(acc9 9)(acc10 10)(acc11 11)(acc12 12)(acc13 13)(acc14 14)(acc15 15) 2910 (acc16 16)(acc17 17)(acc18 18)(acc19 19)(acc20 20)(acc21 21)(acc22 22)(acc23 23) 2911 (acc24 24)(acc25 25)(acc26 26)(acc27 27)(acc28 28)(acc29 29)(acc30 30)(acc31 31) 2912 (acc32 32)(acc33 33)(acc34 34)(acc35 35)(acc36 36)(acc37 37)(acc38 38)(acc39 39) 2913 (acc40 40)(acc41 41)(acc42 42)(acc43 43)(acc44 44)(acc45 45)(acc46 46)(acc47 47) 2914 (acc48 48)(acc49 49)(acc50 50)(acc51 51)(acc52 52)(acc53 53)(acc54 54)(acc55 55) 2915 (acc56 56)(acc57 57)(acc58 58)(acc59 59)(acc60 60)(acc61 61)(acc62 62)(acc63 63) 2916 ) 2917 ) 2918 2919 (define-hardware 2920 (name h-acc40S) 2921 (comment "40 bit signed accumulator") 2922 (attrs PROFILE VIRTUAL) 2923 (type register DI (64)) 2924 (indices extern-keyword acc-names) 2925 ; The accumlator is made up of two 32 bit registers, accgi/acci. 2926 ; We want to extract this as a combined 40 signed bits 2927 (get (index) 2928 (or DI 2929 (sll DI (ext DI (trunc QI (reg h-spr (add index 1472)))) 2930 32) 2931 (zext DI (reg h-spr (add index 1408))))) 2932 ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions 2933 ; on ACC and ACCG registers 2934 (set (index newval) 2935 (sequence () 2936 (c-call VOID "frv_check_spr_write_access" (add index 1408)) 2937 (set (raw-reg UWI h-spr 2938 (add index 1472)) (and (srl newval 32) #xff)) 2939 (set (raw-reg UWI h-spr 2940 (add index 1408)) (trunc USI newval)))) 2941 ) 2942 2943 (define-hardware 2944 (name h-acc40U) 2945 (comment "40 bit unsigned accumulator") 2946 (attrs PROFILE VIRTUAL) 2947 (type register UDI (64)) 2948 (indices extern-keyword acc-names) 2949 ; The accumlator is made up of two 32 bit registers, accgi/acci. 2950 ; We want to extract this as a combined 40 unsigned bits 2951 (get (index) 2952 (or DI 2953 (sll DI (zext DI (reg h-spr (add index 1472))) 32) 2954 (zext DI (reg h-spr (add index 1408))))) 2955 ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions 2956 ; on ACC and ACCG registers 2957 (set (index newval) 2958 (sequence () 2959 (c-call VOID "frv_check_spr_write_access" (add index 1408)) 2960 (set (raw-reg UWI h-spr 2961 (add index 1472)) (and (srl newval 32) #xff)) 2962 (set (raw-reg UWI h-spr 2963 (add index 1408)) (trunc USI newval)))) 2964 ) 2965 ; 64-bit signed accumulator. Composed of iacc0h and iacc0l registers 2966 ; concatenated, but referenced more often as the composed 64 bits. 2967 (define-keyword 2968 ; This is totally hokey -- I have to have an index! 2969 (name iacc0-names) 2970 (print-name h-iacc0) 2971 (prefix "") 2972 (values (iacc0 0)) 2973 ) 2974 2975 (define-hardware 2976 (name h-iacc0) 2977 (comment "64 bit signed accumulator") 2978 (attrs PROFILE VIRTUAL (MACH fr400,fr450)) 2979 (type register DI (1)) 2980 (indices extern-keyword iacc0-names) 2981 ; The single 64-bit integer accumulator is made up of two 32 bit 2982 ; registers, iacc0h and iacc0l. We want to extract this as a 2983 ; combined 64 signed bits. 2984 (get (idx) (or DI (sll DI (ext DI (spr-iacc0h)) 32) (zext DI (spr-iacc0l)))) 2985 (set (idx newval) 2986 (sequence () 2987 (set (spr-iacc0h) (trunc SI (srl newval 32))) 2988 (set (spr-iacc0l) (trunc SI newval)))) 2989 ) 2990 2991 ; Integer condition code registers (CCR) 2992 ; 2993 ; The individual sub registers bits of the CCR are referenced more often than 2994 ; the entire register so set them directly. We can assemble the 2995 ; entire register when necessary. 2996 ; 2997 (define-keyword 2998 (name iccr-names) 2999 (print-name h-iccr) 3000 (prefix "") 3001 (values (icc0 0) (icc1 1) (icc2 2) (icc3 3)) 3002 ) 3003 3004 (define-hardware 3005 (name h-iccr) 3006 (comment "Integer condition code registers") 3007 (attrs PROFILE) 3008 (type register UQI (4)) 3009 (indices extern-keyword iccr-names) 3010 ) 3011 3012 ; Floating point condition code registers (CCR) 3013 ; 3014 ; The individual sub registers bits of the CCR are referenced more often than 3015 ; the entire register so set them directly. We can assemble the 3016 ; entire register when necessary. 3017 ; 3018 (define-keyword 3019 (name fccr-names) 3020 (print-name h-fccr) 3021 (prefix "") 3022 (values (fcc0 0) (fcc1 1) (fcc2 2) (fcc3 3)) 3023 ) 3024 3025 (define-hardware 3026 (name h-fccr) 3027 (comment "Floating point condition code registers") 3028 (attrs PROFILE) 3029 (type register UQI (4)) 3030 (indices extern-keyword fccr-names) 3031 ) 3032 3033 ; C condition code registers (CCCR) 3034 ; 3035 (define-keyword 3036 (name cccr-names) 3037 (print-name h-cccr) 3038 (prefix "") 3039 (values (cc0 0) (cc1 1) (cc2 2) (cc3 3) (cc4 4) (cc5 5) (cc6 6) (cc7 7)) 3040 ) 3041 3042 (define-hardware 3043 (name h-cccr) 3044 (comment "Condition code registers") 3045 (attrs PROFILE) 3046 (type register UQI (8)) 3047 (indices extern-keyword cccr-names) 3048 ) 3049 3051 ; Dummy hardware used to define packing bit on insns 3052 ; 3053 (define-hardware 3054 (name h-pack) 3055 (comment "Packing bit dummy hardware") 3056 (type immediate (UINT 1)) 3057 (values keyword "" (("" 1) (".p" 0) (".P" 0))) 3058 ) 3059 ; Dummy hardware used to define hint field for branches always taken 3060 ; 3061 (define-hardware 3062 (name h-hint-taken) 3063 (comment "Branch taken hint dummy hardware") 3064 (type immediate (UINT 1)) 3065 ; The order of these is important. We want '2' to get written by default, 3066 ; but we also want the docoder/disassembler to allow the values '0', '1' and 3067 ; '3'. 3068 (values keyword "" (("" 2) ("" 0) ("" 1) ("" 3))) 3069 ) 3070 ; Dummy hardware used to define hint field for branches never taken 3071 ; 3072 (define-hardware 3073 (name h-hint-not-taken) 3074 (comment "Branch not taken hint dummy hardware") 3075 (type immediate (UINT 1)) 3076 ; The order of these is important. We want '0' to get written by default, 3077 ; but we also want the docoder/disassembler to allow the values '1', '2' and 3078 ; '3'. 3079 (values keyword "" (("" 0) ("" 1) ("" 2) ("" 3))) 3080 ) 3081 3083 ; Instruction Operands. 3084 ; These entries provide a layer between the assembler and the raw hardware 3085 ; description, and are used to refer to hardware elements in the semantic 3086 ; code. Usually there's a bit of over-specification, but in more complicated 3087 ; instruction sets there isn't. 3088 3089 ; FRV specific operand attributes: 3090 3091 (define-attr 3092 (for operand) 3093 (type boolean) 3094 (name HASH-PREFIX) 3095 (comment "immediates have an optional '#' prefix") 3096 ) 3097 3098 ; ??? Convention says this should be o-sr, but then the insn definitions 3099 ; should refer to o-sr which is clumsy. The "o-" could be implicit, but 3100 ; then it should be implicit for all the symbols here, but then there would 3101 ; be confusion between (f-)simm8 and (h-)simm8. 3102 ; So for now the rule is exactly as it appears here. 3103 3104 ; dnmop: define-normal-mode-operand: temporary, pending potential removal 3105 ; of modes from h/w. 3106 (define-pmacro (dnmop xname xcomment xattrs xtype xindex xmode) 3107 (define-operand 3108 (name xname) 3109 (comment xcomment) 3110 (.splice attrs (.unsplice xattrs)) 3111 (type xtype) 3112 (index xindex) 3113 (mode xmode) 3114 ) 3115 ) 3116 3117 ; dnpmop: define-normal-parsed-mode-operand: Normal mode operand with parse handler 3118 (define-pmacro (dnpmop xname xcomment xattrs xtype xindex xmode xparse) 3119 (define-operand 3120 (name xname) 3121 (comment xcomment) 3122 (.splice attrs (.unsplice xattrs)) 3123 (type xtype) 3124 (index xindex) 3125 (mode xmode) 3126 (handlers (parse xparse)) 3127 ) 3128 ) 3129 3130 (dnop pack "packing bit" () h-pack f-pack) 3131 3132 (dnmop GRi "source register 1" () h-gr f-GRi SI) 3133 (dnmop GRj "source register 2" () h-gr f-GRj SI) 3134 (dnmop GRk "destination register" () h-gr f-GRk SI) 3135 (dnmop GRkhi "destination register" () h-gr_hi f-GRk UHI) 3136 (dnmop GRklo "destination register" () h-gr_lo f-GRk UHI) 3137 (dnpmop GRdoublek "destination register" () h-gr_double f-GRk DI "even_register") 3138 (dnmop ACC40Si "signed accumulator" () h-acc40S f-ACC40Si DI) 3139 (dnmop ACC40Ui "unsigned accumulator" () h-acc40U f-ACC40Ui UDI) 3140 (dnmop ACC40Sk "target accumulator" () h-acc40S f-ACC40Sk DI) 3141 (dnmop ACC40Uk "target accumulator" () h-acc40U f-ACC40Uk UDI) 3142 (dnmop ACCGi "source register" () h-accg f-ACCGi UWI) 3143 (dnmop ACCGk "target register" () h-accg f-ACCGk UWI) 3144 3145 (dnmop CPRi "source register" ((MACH frv)) h-cpr f-CPRi SI) 3146 (dnmop CPRj "source register" ((MACH frv)) h-cpr f-CPRj SI) 3147 (dnmop CPRk "destination register" ((MACH frv)) h-cpr f-CPRk SI) 3148 (dnpmop CPRdoublek "destination register" ((MACH frv)) h-cpr_double f-CPRk DI "even_register") 3149 3150 ; floating point operands 3151 (dnmop FRinti "source register 1" () h-fr_int f-FRi SI) 3152 (dnmop FRintj "source register 2" () h-fr_int f-FRj SI) 3153 (dnmop FRintk "target register" () h-fr_int f-FRk SI) 3154 (dnmop FRi "source register 1" () h-fr f-FRi SF) 3155 (dnmop FRj "source register 2" () h-fr f-FRj SF) 3156 (dnmop FRk "destination register" () h-fr f-FRk SF) 3157 (dnmop FRkhi "destination register" () h-fr_hi f-FRk UHI) 3158 (dnmop FRklo "destination register" () h-fr_lo f-FRk UHI) 3159 (dnpmop FRdoublei "source register 1" () h-fr_double f-FRi DF "even_register") 3160 (dnpmop FRdoublej "source register 2" () h-fr_double f-FRj DF "even_register") 3161 (dnpmop FRdoublek "target register" () h-fr_double f-FRk DF "even_register") 3162 3163 (dnop CRi "source register 1" () h-cccr f-CRi) 3164 (dnop CRj "source register 2" () h-cccr f-CRj) 3165 (dnop CRj_int "destination register" () h-cccr f-CRj_int) 3166 (dnop CRj_float "destination register" () h-cccr f-CRj_float) 3167 (dnop CRk "destination register" () h-cccr f-CRk) 3168 (dnop CCi "condition register" () h-cccr f-CCi) 3169 3170 (dnop ICCi_1 "condition register" () h-iccr f-ICCi_1) 3171 (dnop ICCi_2 "condition register" () h-iccr f-ICCi_2) 3172 (dnop ICCi_3 "condition register" () h-iccr f-ICCi_3) 3173 (dnop FCCi_1 "condition register" () h-fccr f-FCCi_1) 3174 (dnop FCCi_2 "condition register" () h-fccr f-FCCi_2) 3175 (dnop FCCi_3 "condition register" () h-fccr f-FCCi_3) 3176 (dnop FCCk "condition register" () h-fccr f-FCCk) 3177 3178 (dnop eir "exception insn reg" () h-uint f-eir) 3179 (dnop s10 "10 bit signed immediate" (HASH-PREFIX) h-sint f-s10) 3180 (dnop u16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-u16) 3181 (dnop s16 "16 bit signed immediate" (HASH-PREFIX) h-sint f-s16) 3182 (dnop s6 "6 bit signed immediate" (HASH-PREFIX) h-sint f-s6) 3183 (dnop s6_1 "6 bit signed immediate" (HASH-PREFIX) h-sint f-s6_1) 3184 (dnop u6 "6 bit unsigned immediate" (HASH-PREFIX) h-uint f-u6) 3185 (dnop s5 "5 bit signed immediate" (HASH-PREFIX) h-sint f-s5) 3186 (dnop cond "conditional arithmetic" (HASH-PREFIX) h-uint f-cond) 3187 (dnop ccond "lr branch condition" (HASH-PREFIX) h-uint f-ccond) 3188 (dnop hint "2 bit branch predictor" (HASH-PREFIX) h-uint f-hint) 3189 (dnop hint_taken "2 bit branch predictor" () h-hint-taken f-hint) 3190 (dnop hint_not_taken "2 bit branch predictor" () h-hint-not-taken f-hint) 3191 3192 (dnop LI "link indicator" () h-uint f-LI) 3193 (dnop lock "cache lock indicator" (HASH-PREFIX) h-uint f-lock) 3194 (dnop debug "debug mode indicator" (HASH-PREFIX) h-uint f-debug) 3195 (dnop ae "all entries indicator" (HASH-PREFIX) h-uint f-ae) 3196 3197 (dnop label16 "18 bit pc relative address" () h-iaddr f-label16) 3198 3199 (dnop LRAE "Load Real Address E flag" () h-uint f-LRAE) 3200 (dnop LRAD "Load Real Address D flag" () h-uint f-LRAD) 3201 (dnop LRAS "Load Real Address S flag" () h-uint f-LRAS) 3202 3203 (dnop TLBPRopx "TLB Probe operation number" () h-uint f-TLBPRopx) 3204 (dnop TLBPRL "TLB Probe L flag" () h-uint f-TLBPRL) 3205 3206 (define-operand 3207 (name A0) 3208 (comment "A==0 operand of mclracc") 3209 (attrs) 3210 (type h-uint) 3211 (index f-A) 3212 (mode USI) 3213 (handlers (parse "A0")) 3214 ) 3215 3216 (define-operand 3217 (name A1) 3218 (comment "A==1 operand of mclracc") 3219 (attrs) 3220 (type h-uint) 3221 (index f-A) 3222 (mode USI) 3223 (handlers (parse "A1")) 3224 ) 3225 3226 (define-operand 3227 (name FRintieven) 3228 (comment "(even) source register 1") 3229 (attrs) 3230 (type h-fr_int) 3231 (index f-FRi) 3232 (mode SI) 3233 (handlers (parse "even_register")) 3234 ) 3235 3236 (define-operand 3237 (name FRintjeven) 3238 (comment "(even) source register 2") 3239 (attrs) 3240 (type h-fr_int) 3241 (index f-FRj) 3242 (mode SI) 3243 (handlers (parse "even_register")) 3244 ) 3245 3246 (define-operand 3247 (name FRintkeven) 3248 (comment "(even) target register") 3249 (attrs) 3250 (type h-fr_int) 3251 (index f-FRk) 3252 (mode SI) 3253 (handlers (parse "even_register")) 3254 ) 3255 3256 (define-operand 3257 (name d12) 3258 (comment "12 bit signed immediate") 3259 (attrs) 3260 (type h-sint) 3261 (index f-d12) 3262 (handlers (parse "d12")) 3263 ) 3264 3265 (define-operand 3266 (name s12) 3267 (comment "12 bit signed immediate") 3268 (attrs HASH-PREFIX) 3269 (type h-sint) 3270 (index f-d12) 3271 (handlers (parse "s12")) 3272 ) 3273 3274 (define-operand 3275 (name u12) 3276 (comment "12 bit signed immediate") 3277 (attrs HASH-PREFIX) 3278 (type h-sint) 3279 (index f-u12) 3280 (handlers (parse "u12")) 3281 ) 3282 3283 (define-operand 3284 (name spr) 3285 (comment "special purpose register") 3286 (attrs) 3287 (type h-spr) 3288 (index f-spr) 3289 (handlers (parse "spr") (print "spr")) 3290 ) 3291 3292 (define-operand 3293 (name ulo16) 3294 (comment "16 bit unsigned immediate, for #lo()") 3295 (attrs) 3296 (type h-uint) 3297 (index f-u16) 3298 (handlers (parse "ulo16") (print "lo")) 3299 ) 3300 3301 (define-operand 3302 (name slo16) 3303 (comment "16 bit unsigned immediate, for #lo()") 3304 (attrs) 3305 (type h-sint) 3306 (index f-s16) 3307 (handlers (parse "uslo16") (print "lo")) 3308 ) 3309 3310 (define-operand 3311 (name uhi16) 3312 (comment "16 bit unsigned immediate, for #hi()") 3313 (attrs) 3314 (type h-uint) 3315 (index f-u16) 3316 (handlers (parse "uhi16") (print "hi")) 3317 ) 3318 3319 (define-operand 3320 (name label24) 3321 (comment "26 bit pc relative address") 3322 (attrs) 3323 (type h-iaddr) 3324 (index f-label24) 3325 (mode SI) 3326 (handlers (parse "call_label")) 3327 ) 3328 3329 ; operands representing hardware 3330 ; 3331 (dnop psr_esr "PSR.ESR bit" (SEM-ONLY) h-psr_esr f-nil) 3332 (dnop psr_s "PSR.S bit" (SEM-ONLY) h-psr_s f-nil) 3333 (dnop psr_ps "PSR.PS bit" (SEM-ONLY) h-psr_ps f-nil) 3334 (dnop psr_et "PSR.ET bit" (SEM-ONLY) h-psr_et f-nil) 3335 3336 (dnop bpsr_bs "BPSR.BS bit" (SEM-ONLY) h-bpsr_bs f-nil) 3337 (dnop bpsr_bet "BPSR.BET bit" (SEM-ONLY) h-bpsr_bet f-nil) 3338 3339 (dnop tbr_tba "TBR.TBA" (SEM-ONLY) h-tbr_tba f-nil) 3340 (dnop tbr_tt "TBR.TT" (SEM-ONLY) h-tbr_tt f-nil) 3341 3342 ; Null operands 3343 ; 3344 (define-pmacro (ICCi_1-null) (f-ICCi_1-null 0)) 3345 (define-pmacro (ICCi_2-null) (f-ICCi_2-null 0)) 3346 (define-pmacro (ICCi_3-null) (f-ICCi_3-null 0)) 3347 (define-pmacro (FCCi_1-null) (f-FCCi_1-null 0)) 3348 (define-pmacro (FCCi_2-null) (f-FCCi_2-null 0)) 3349 (define-pmacro (FCCi_3-null) (f-FCCi_3-null 0)) 3350 (define-pmacro (rs-null) (f-rs-null 0)) 3351 (define-pmacro (GRi-null) (f-GRi-null 0)) 3352 (define-pmacro (GRj-null) (f-GRj-null 0)) 3353 (define-pmacro (GRk-null) (f-GRk-null 0)) 3354 (define-pmacro (FRi-null) (f-FRi-null 0)) 3355 (define-pmacro (FRj-null) (f-FRj-null 0)) 3356 (define-pmacro (ACCj-null) (f-ACCj-null 0)) 3357 (define-pmacro (rd-null) (f-rd-null 0)) 3358 (define-pmacro (cond-null) (f-cond-null 0)) 3359 (define-pmacro (ccond-null) (f-ccond-null 0)) 3360 (define-pmacro (s12-null) (f-s12-null 0)) 3361 (define-pmacro (label16-null) (f-label16-null 0)) 3362 (define-pmacro (misc-null-1) (f-misc-null-1 0)) 3363 (define-pmacro (misc-null-2) (f-misc-null-2 0)) 3364 (define-pmacro (misc-null-3) (f-misc-null-3 0)) 3365 (define-pmacro (misc-null-4) (f-misc-null-4 0)) 3366 (define-pmacro (misc-null-5) (f-misc-null-5 0)) 3367 (define-pmacro (misc-null-6) (f-misc-null-6 0)) 3368 (define-pmacro (misc-null-7) (f-misc-null-7 0)) 3369 (define-pmacro (misc-null-8) (f-misc-null-8 0)) 3370 (define-pmacro (misc-null-9) (f-misc-null-9 0)) 3371 (define-pmacro (misc-null-10) (f-misc-null-10 0)) 3372 (define-pmacro (misc-null-11) (f-misc-null-11 0)) 3373 3374 (define-pmacro (LRA-null) (f-LRA-null 0)) 3375 (define-pmacro (TLBPR-null) (f-TLBPR-null 0)) 3376 3377 (define-pmacro (LI-on) (f-LI-on 1)) 3378 (define-pmacro (LI-off) (f-LI-off 0)) 3379 3381 ; Instruction definitions. 3382 ; 3383 ; Notes: 3384 ; - dni is short for "define-normal-instruction" 3385 ; - Macros are used to represent each insn format. These should be used as much 3386 ; as possible unless an insn has exceptional behaviour 3387 ; 3388 3389 ; Commonly used Macros 3390 ; 3391 ; Specific registers 3392 ; 3393 3394 ; Integer condition code manipulation 3395 ; 3396 (define-pmacro (set-z-and-n icc x) 3397 (if (eq x 0) 3398 (set icc (or (and icc #x7) #x4)) 3399 (if (lt x 0) 3400 (set icc (or (and icc #xb) #x8)) 3401 (set icc (and icc #x3)))) 3402 ) 3403 3404 (define-pmacro (set-n icc val) 3405 (if (eq val 0) 3406 (set icc (and icc #x7)) 3407 (set icc (or icc #x8))) 3408 ) 3409 3410 (define-pmacro (set-z icc val) 3411 (if (eq val 0) 3412 (set icc (and icc #xb)) 3413 (set icc (or icc #x4))) 3414 ) 3415 3416 (define-pmacro (set-v icc val) 3417 (if (eq val 0) 3418 (set icc (and icc #xd)) 3419 (set icc (or icc #x2))) 3420 ) 3421 3422 (define-pmacro (set-c icc val) 3423 (if (eq val 0) 3424 (set icc (and icc #xe)) 3425 (set icc (or icc #x1))) 3426 ) 3427 3428 (define-pmacro (nbit icc) 3429 (trunc BI (srl (and icc #x8) 3)) 3430 ) 3431 3432 (define-pmacro (zbit icc) 3433 (trunc BI (srl (and icc #x4) 2)) 3434 ) 3435 3436 (define-pmacro (vbit icc) 3437 (trunc BI (srl (and icc #x2) 1)) 3438 ) 3439 3440 (define-pmacro (cbit icc) 3441 (trunc BI (and icc #x1)) 3442 ) 3443 3444 (define-pmacro (ebit icc) 3445 (trunc BI (srl (and icc #x8) 3)) 3446 ) 3447 3448 (define-pmacro (lbit icc) 3449 (trunc BI (srl (and icc #x4) 2)) 3450 ) 3451 3452 (define-pmacro (gbit icc) 3453 (trunc BI (srl (and icc #x2) 1)) 3454 ) 3455 3456 (define-pmacro (ubit icc) 3457 (trunc BI (and icc #x1)) 3458 ) 3459 3460 ; FRV insns 3461 ; 3462 ; 3463 ; Format: INT, Logic, Shift r-r 3464 ; 3465 (define-pmacro (int-logic-r-r name operation op ope comment) 3466 (dni name 3467 (comment) 3468 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3469 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3470 (.str name "$pack $GRi,$GRj,$GRk") 3471 (+ pack GRk op GRi (ICCi_1-null) ope GRj) 3472 (set GRk (operation GRi GRj)) 3473 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3474 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3475 ) 3476 ) 3477 3478 (int-logic-r-r add add OP_00 OPE2_00 "add reg/reg") 3479 (int-logic-r-r sub sub OP_00 OPE2_04 "sub reg/reg") 3480 (int-logic-r-r and and OP_01 OPE2_00 "and reg/reg") 3481 (int-logic-r-r or or OP_01 OPE2_02 "or reg/reg") 3482 (int-logic-r-r xor xor OP_01 OPE2_04 "xor reg/reg") 3483 3484 (dni not 3485 ("not") 3486 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3487 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3488 ("not$pack $GRj,$GRk") 3489 (+ pack GRk OP_01 (rs-null) (ICCi_1-null) OPE2_06 GRj) 3490 (set GRk (inv GRj)) 3491 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3492 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3493 ) 3494 3495 (dni sdiv 3496 "signed division" 3497 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3498 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3499 "sdiv$pack $GRi,$GRj,$GRk" 3500 (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0E GRj) 3501 (sequence () 3502 (c-call VOID "@cpu@_signed_integer_divide" 3503 GRi GRj (index-of GRk) 0) 3504 (clobber GRk)) 3505 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 3506 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3507 ) 3508 3509 (dni nsdiv 3510 "non excepting signed division" 3511 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING 3512 (MACH simple,tomcat,fr500,fr550,frv)) 3513 "nsdiv$pack $GRi,$GRj,$GRk" 3514 (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0E GRj) 3515 (sequence () 3516 (c-call VOID "@cpu@_signed_integer_divide" 3517 GRi GRj (index-of GRk) 1) 3518 (clobber GRk)) 3519 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3520 ) 3521 3522 (dni udiv 3523 "unsigned division reg/reg" 3524 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3525 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3526 "udiv$pack $GRi,$GRj,$GRk" 3527 (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0F GRj) 3528 (sequence () 3529 (c-call VOID "@cpu@_unsigned_integer_divide" 3530 GRi GRj (index-of GRk) 0) 3531 (clobber GRk)) 3532 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 3533 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3534 ) 3535 3536 (dni nudiv 3537 "non excepting unsigned division" 3538 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING 3539 (MACH simple,tomcat,fr500,fr550,frv)) 3540 "nudiv$pack $GRi,$GRj,$GRk" 3541 (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0F GRj) 3542 (sequence () 3543 (c-call VOID "@cpu@_unsigned_integer_divide" 3544 GRi GRj (index-of GRk) 1) 3545 (clobber GRk)) 3546 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3547 ) 3548 3549 ; Multiplication 3550 ; 3551 (define-pmacro (multiply-r-r name signop op ope comment) 3552 (dni name 3553 (comment) 3554 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3555 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3556 (.str name "$pack $GRi,$GRj,$GRdoublek") 3557 (+ pack GRdoublek op GRi (ICCi_1-null) ope GRj) 3558 (set GRdoublek (mul DI (signop DI GRi) (signop DI GRj))) 3559 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 3560 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 3561 ) 3562 ) 3563 3564 (multiply-r-r smul ext OP_00 OPE2_08 "signed multiply reg/reg") 3565 (multiply-r-r umul zext OP_00 OPE2_0A "unsigned multiply reg/reg") 3566 3567 ; Multiplication with integer accumulator IACC 3568 ; 3569 3570 (define-pmacro (iacc-set value) 3571 (set (reg h-iacc0 0) value)) 3572 3573 (define-pmacro (iacc-add value) 3574 (set (reg h-iacc0 0) 3575 (cond DI 3576 ((andif (andif (gt value 0) (gt (reg h-iacc0 0) 0)) 3577 (lt (sub DI #x7fffffffffffffff value) (reg h-iacc0 0))) 3578 ; Positive overflow 3579 (const DI #x7fffffffffffffff)) 3580 ((andif (andif (lt value 0) (lt (reg h-iacc0 0) 0)) 3581 (gt (sub DI #x8000000000000000 value) (reg h-iacc0 0))) 3582 ; Negative overflow 3583 (const DI #x8000000000000000)) 3584 (else 3585 (add DI (reg h-iacc0 0) value)))) 3586 ) 3587 3588 (define-pmacro (iacc-sub value) 3589 (set (reg h-iacc0 0) 3590 (cond DI 3591 ((andif (andif (lt value 0) (gt (reg h-iacc0 0) 0)) 3592 (lt (add DI #x7fffffffffffffff value) (reg h-iacc0 0))) 3593 ; Positive overflow 3594 (const DI #x7fffffffffffffff)) 3595 ((andif (andif (gt value 0) (lt (reg h-iacc0 0) 0)) 3596 (gt (add DI #x8000000000000000 value) (reg h-iacc0 0))) 3597 ; Negative overflow 3598 (const DI #x8000000000000000)) 3599 (else 3600 (sub DI (reg h-iacc0 0) value)))) 3601 ) 3602 3603 (define-pmacro (iacc-multiply-r-r name operation op ope comment) 3604 (dni name 3605 (comment) 3606 ((UNIT IACC) (MACH fr400,fr450) 3607 (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) 3608 (.str name "$pack $GRi,$GRj") 3609 (+ pack (rd-null) op GRi ope GRj) 3610 ((.sym iacc- operation) (mul DI (ext DI GRi) (ext DI GRj))) 3611 ((fr400 (unit u-integer)) (fr450 (unit u-integer))) 3612 ) 3613 ) 3614 3615 (iacc-multiply-r-r smu set OP_46 OPE1_05 "Signed multiply reg/reg/iacc") 3616 (iacc-multiply-r-r smass add OP_46 OPE1_06 "Signed multiply/add reg/reg/iacc") 3617 (iacc-multiply-r-r smsss sub OP_46 OPE1_07 "Signed multiply/sub reg/reg/iacc") 3618 3619 (define-pmacro (int-shift-r-r name op ope comment) 3620 (dni name 3621 (comment) 3622 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3623 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3624 (.str name "$pack $GRi,$GRj,$GRk") 3625 (+ pack GRk op GRi (ICCi_1-null) ope GRj) 3626 (set GRk (name GRi (and GRj #x1f))) 3627 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3628 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3629 ) 3630 ) 3631 3632 (int-shift-r-r sll OP_01 OPE2_08 "shift left logical reg/reg") 3633 (int-shift-r-r srl OP_01 OPE2_0A "shift right logical reg/reg") 3634 (int-shift-r-r sra OP_01 OPE2_0C "shift right arith reg/reg") 3635 3636 (dni slass 3637 "shift left arith reg/reg with saturation" 3638 ((UNIT IALL) (MACH fr400,fr450) 3639 (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) 3640 "slass$pack $GRi,$GRj,$GRk" 3641 (+ pack GRk OP_46 GRi OPE1_02 GRj) 3642 (set GRk (c-call SI "@cpu@_shift_left_arith_saturate" GRi GRj)) 3643 () 3644 ) 3645 3646 (dni scutss 3647 "Integer accumulator cut with saturation" 3648 ((UNIT I0) (MACH fr400,fr450) 3649 (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) 3650 "scutss$pack $GRj,$GRk" 3651 (+ pack GRk OP_46 (rs-null) OPE1_04 GRj) 3652 (set GRk (c-call SI "@cpu@_iacc_cut" (reg h-iacc0 0) GRj)) 3653 () 3654 ) 3655 3656 (define-pmacro (scan-semantics arg1 arg2 targ) 3657 (sequence ((WI tmp1) (WI tmp2)) 3658 (set tmp1 arg1) 3659 (set tmp2 (sra arg2 1)) 3660 (set targ (c-call WI "@cpu@_scan_result" (xor tmp1 tmp2)))) 3661 ) 3662 3663 (dni scan 3664 "scan" 3665 ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3666 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3667 "scan$pack $GRi,$GRj,$GRk" 3668 (+ pack GRk OP_0B GRi (ICCi_1-null) OPE2_00 GRj) 3669 (scan-semantics GRi GRj GRk) 3670 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3671 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3672 ) 3673 3674 ; Format: conditional INT, Logic, Shift r-r 3675 ; 3676 (define-pmacro (conditional-int-logic name operation op ope comment) 3677 (dni name 3678 (comment) 3679 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3680 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3681 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") 3682 (+ pack GRk op GRi CCi cond ope GRj) 3683 (if (eq CCi (or cond 2)) 3684 (set GRk (operation GRi GRj))) 3685 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3686 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3687 ) 3688 ) 3689 3690 (conditional-int-logic cadd add OP_58 OPE4_0 "conditional add") 3691 (conditional-int-logic csub sub OP_58 OPE4_1 "conditional sub") 3692 (conditional-int-logic cand and OP_5A OPE4_0 "conditional and") 3693 (conditional-int-logic cor or OP_5A OPE4_1 "conditional or") 3694 (conditional-int-logic cxor xor OP_5A OPE4_2 "conditional xor") 3695 3696 (dni cnot 3697 "conditional not" 3698 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3699 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3700 "cnot$pack $GRj,$GRk,$CCi,$cond" 3701 (+ pack GRk OP_5A (rs-null) CCi cond OPE4_3 GRj) 3702 (if (eq CCi (or cond 2)) 3703 (set GRk (inv GRj))) 3704 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3705 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3706 ) 3707 3708 (dni csmul 3709 "conditional signed multiply" 3710 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3711 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3712 "csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond" 3713 (+ pack GRdoublek OP_58 GRi CCi cond OPE4_2 GRj) 3714 (if (eq CCi (or cond 2)) 3715 (set GRdoublek (mul DI (ext DI GRi) (ext DI GRj)))) 3716 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 3717 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 3718 ) 3719 3720 (dni csdiv 3721 "conditional signed division" 3722 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3723 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3724 "csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond" 3725 (+ pack GRk OP_58 GRi CCi cond OPE4_3 GRj) 3726 (if (eq CCi (or cond 2)) 3727 (sequence () 3728 (c-call VOID "@cpu@_signed_integer_divide" 3729 GRi GRj (index-of GRk) 0) 3730 (clobber GRk))) 3731 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 3732 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3733 ) 3734 3735 (dni cudiv 3736 "conditional unsigned division" 3737 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3738 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3739 "cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond" 3740 (+ pack GRk OP_59 GRi CCi cond OPE4_3 GRj) 3741 (if (eq CCi (or cond 2)) 3742 (sequence () 3743 (c-call VOID "@cpu@_unsigned_integer_divide" 3744 GRi GRj (index-of GRk) 0) 3745 (clobber GRk))) 3746 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 3747 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 3748 ) 3749 3750 (define-pmacro (conditional-shift name operation op ope comment) 3751 (dni name 3752 (comment) 3753 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3754 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3755 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") 3756 (+ pack GRk op GRi CCi cond ope GRj) 3757 (if (eq CCi (or cond 2)) 3758 (set GRk (operation GRi (and GRj #x1f)))) 3759 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3760 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3761 ) 3762 ) 3763 3764 (conditional-shift csll sll OP_5C OPE4_0 "conditional shift left logical") 3765 (conditional-shift csrl srl OP_5C OPE4_1 "conditional shift right logical") 3766 (conditional-shift csra sra OP_5C OPE4_2 "conditional shift right arith") 3767 3768 (dni cscan 3769 "conditional scan" 3770 ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3771 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3772 "cscan$pack $GRi,$GRj,$GRk,$CCi,$cond" 3773 (+ pack GRk OP_65 GRi CCi cond OPE4_3 GRj) 3774 (if (eq CCi (or cond 2)) 3775 (scan-semantics GRi GRj GRk)) 3776 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3777 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3778 ) 3779 3780 ; Format: INT, Logic, Shift, cc r-r 3781 ; 3782 (define-pmacro (int-arith-cc-semantics operation icc) 3783 (sequence ((BI tmp) (QI cc) (SI result)) 3784 (set cc icc) 3785 (set tmp ((.sym operation -oflag) GRi GRj (const 0))) 3786 (set-v cc tmp) 3787 (set tmp ((.sym operation -cflag) GRi GRj (const 0))) 3788 (set-c cc tmp) 3789 (set result (operation GRi GRj)) 3790 (set-z-and-n cc result) 3791 (set GRk result) 3792 (set icc cc)) 3793 ) 3794 3795 (define-pmacro (int-arith-cc-r-r name operation op ope comment) 3796 (dni name 3797 (comment) 3798 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3799 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3800 (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") 3801 (+ pack GRk op GRi ICCi_1 ope GRj) 3802 (int-arith-cc-semantics operation ICCi_1) 3803 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3804 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3805 ) 3806 ) 3807 3808 (int-arith-cc-r-r addcc add OP_00 OPE2_01 "add reg/reg, set icc") 3809 (int-arith-cc-r-r subcc sub OP_00 OPE2_05 "sub reg/reg, set icc") 3810 3811 (define-pmacro (int-logic-cc-semantics op icc) 3812 (sequence ((SI tmp)) 3813 (set tmp (op GRi GRj)) 3814 (set GRk tmp) 3815 (set-z-and-n icc tmp)) 3816 ) 3817 3818 (define-pmacro (int-logic-cc-r-r name op ope comment) 3819 (dni (.sym name cc) 3820 (comment) 3821 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3822 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3823 (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1") 3824 (+ pack GRk op GRi ICCi_1 ope GRj) 3825 (int-logic-cc-semantics name ICCi_1) 3826 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3827 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3828 ) 3829 ) 3830 3831 (int-logic-cc-r-r and OP_01 OPE2_01 "and reg/reg, set icc") 3832 (int-logic-cc-r-r or OP_01 OPE2_03 "or reg/reg, set icc") 3833 (int-logic-cc-r-r xor OP_01 OPE2_05 "xor reg/reg, set icc") 3834 3835 (define-pmacro (int-shift-cc-semantics op l-r icc) 3836 (sequence ((WI shift) (SI tmp) (QI cc)) 3837 (set shift (and GRj #x1f)) 3838 (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r) 3839 GRi shift icc)) 3840 (set tmp (op GRi shift)) 3841 (set GRk tmp) 3842 (set-z-and-n cc tmp) 3843 (set icc cc)) 3844 ) 3845 3846 (define-pmacro (int-shift-cc-r-r name l-r op ope comment) 3847 (dni (.sym name cc) 3848 (comment) 3849 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3850 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3851 (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1") 3852 (+ pack GRk op GRi ICCi_1 ope GRj) 3853 (int-shift-cc-semantics name l-r ICCi_1) 3854 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3855 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3856 ) 3857 ) 3858 3859 (int-shift-cc-r-r sll left OP_01 OPE2_09 "shift left logical reg/reg,set icc") 3860 (int-shift-cc-r-r srl right OP_01 OPE2_0B "shift right logical reg/reg,set icc") 3861 (int-shift-cc-r-r sra right OP_01 OPE2_0D "shift right arith reg/reg,set icc") 3862 3863 (define-pmacro (multiply-cc-semantics signop arg1 arg2 targ icc) 3864 (sequence ((DI tmp) (QI cc)) 3865 (set cc icc) 3866 (set tmp (mul DI (signop DI arg1) (signop DI arg2))) 3867 (set-n cc (srl DI tmp 63)) 3868 (set-z cc (eq tmp 0)) 3869 (set targ tmp) 3870 (set icc cc)) 3871 ) 3872 3873 (define-pmacro (multiply-cc-r-r name signop op ope comment) 3874 (dni name 3875 (comment) 3876 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3877 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3878 (.str name "$pack $GRi,$GRj,$GRdoublek,$ICCi_1") 3879 (+ pack GRdoublek op GRi ICCi_1 ope GRj) 3880 (multiply-cc-semantics signop GRi GRj GRdoublek ICCi_1) 3881 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 3882 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 3883 ) 3884 ) 3885 3886 (multiply-cc-r-r smulcc ext OP_00 OPE2_09 "signed multiply reg/reg") 3887 (multiply-cc-r-r umulcc zext OP_00 OPE2_0B "unsigned multiply reg/reg") 3888 3889 3890 ; Format: conditional INT, Logic, Shift, cc r-r 3891 ; 3892 (define-pmacro (conditional-int-arith-cc name operation op ope comment) 3893 (dni name 3894 (comment) 3895 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3896 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3897 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") 3898 (+ pack GRk op GRi CCi cond ope GRj) 3899 (if (eq CCi (or cond 2)) 3900 (int-arith-cc-semantics operation 3901 (reg h-iccr (and (index-of CCi) 3)))) 3902 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3903 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3904 ) 3905 ) 3906 3907 (conditional-int-arith-cc caddcc add OP_59 OPE4_0 "add, set icc") 3908 (conditional-int-arith-cc csubcc sub OP_59 OPE4_1 "sub, set icc") 3909 3910 (dni csmulcc 3911 "conditional signed multiply and set condition code" 3912 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 3913 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3914 "csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond" 3915 (+ pack GRdoublek OP_59 GRi CCi cond OPE4_2 GRj) 3916 (if (eq CCi (or cond 2)) 3917 (multiply-cc-semantics ext GRi GRj GRdoublek 3918 (reg h-iccr (and (index-of CCi) 3)))) 3919 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 3920 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 3921 ) 3922 3923 (define-pmacro (conditional-int-logic-cc name operation op ope comment) 3924 (dni name 3925 (comment) 3926 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3927 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3928 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond") 3929 (+ pack GRk op GRi CCi cond ope GRj) 3930 (if (eq CCi (or cond 2)) 3931 (int-logic-cc-semantics operation 3932 (reg h-iccr (and (index-of CCi) 3)))) 3933 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3934 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3935 ) 3936 ) 3937 3938 (conditional-int-logic-cc candcc and OP_5B OPE4_0 "conditional and, set icc") 3939 (conditional-int-logic-cc corcc or OP_5B OPE4_1 "conditional or , set icc") 3940 (conditional-int-logic-cc cxorcc xor OP_5B OPE4_2 "conditional xor, set icc") 3941 3942 (define-pmacro (conditional-int-shift-cc name l-r op ope comment) 3943 (dni (.sym c name cc) 3944 (comment) 3945 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3946 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 3947 (.str (.sym c name cc) "$pack $GRi,$GRj,$GRk,$CCi,$cond") 3948 (+ pack GRk op GRi CCi cond ope GRj) 3949 (if (eq CCi (or cond 2)) 3950 (int-shift-cc-semantics name l-r 3951 (reg h-iccr (and (index-of CCi) 3)))) 3952 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3953 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3954 ) 3955 ) 3956 3957 (conditional-int-shift-cc sll left OP_5D OPE4_0 "shift left logical, set icc") 3958 (conditional-int-shift-cc srl right OP_5D OPE4_1 "shift right logical, set icc") 3959 (conditional-int-shift-cc sra right OP_5D OPE4_2 "shift right arith , set icc") 3960 3961 ; Add and subtract with carry 3962 ; 3963 (define-pmacro (int-arith-x-r-r name operation op ope comment) 3964 (dni name 3965 (comment) 3966 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3967 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3968 (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") 3969 (+ pack GRk op GRi ICCi_1 ope GRj) 3970 (set GRk ((.sym operation c) GRi GRj (cbit ICCi_1))) 3971 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3972 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3973 ) 3974 ) 3975 3976 (int-arith-x-r-r addx add OP_00 OPE2_02 "Add reg/reg, with carry") 3977 (int-arith-x-r-r subx sub OP_00 OPE2_06 "Sub reg/reg, with carry") 3978 3979 (define-pmacro (int-arith-x-cc-r-r name operation op ope comment) 3980 (dni name 3981 (comment) 3982 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 3983 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 3984 (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1") 3985 (+ pack GRk op GRi ICCi_1 ope GRj) 3986 (sequence ((WI tmp) (QI cc)) 3987 (set cc ICCi_1) 3988 (set tmp ((.sym operation c) GRi GRj (cbit cc))) 3989 (set-v cc ((.sym operation -oflag) GRi GRj (cbit cc))) 3990 (set-c cc ((.sym operation -cflag) GRi GRj (cbit cc))) 3991 (set-z-and-n cc tmp) 3992 (set GRk tmp) 3993 (set ICCi_1 cc)) 3994 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 3995 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 3996 ) 3997 ) 3998 3999 (int-arith-x-cc-r-r addxcc add OP_00 OPE2_03 "Add reg/reg, use/set carry") 4000 (int-arith-x-cc-r-r subxcc sub OP_00 OPE2_07 "Sub reg/reg, use/set carry") 4001 ; Add and subtract with saturation 4002 ; 4003 (define-pmacro (int-arith-ss-r-r name operation op ope comment) 4004 (dni name 4005 (comment) 4006 ((UNIT IALL) (MACH fr400,fr450) 4007 (FR400-MAJOR I-1) (FR450-MAJOR I-1) AUDIO) 4008 (.str name "$pack $GRi,$GRj,$GRk") 4009 (+ pack GRk op GRi ope GRj) 4010 (sequence () 4011 (set GRk (operation GRi GRj)) 4012 (if ((.sym operation -oflag) GRi GRj (const 0)) 4013 ; Overflow, saturate. 4014 ; Sign of result will be 4015 ; same as sign of first operand. 4016 (set GRk 4017 (cond SI 4018 ((gt GRi 0) (const #x7fffffff)) 4019 ((lt GRi 0) (const #x80000000)) 4020 (else (const 0))))) 4021 ) 4022 ((fr400 (unit u-integer)) (fr450 (unit u-integer))) 4023 ) 4024 ) 4025 4026 (int-arith-ss-r-r addss add OP_46 OPE1_00 "add reg/reg, with saturation") 4027 (int-arith-ss-r-r subss sub OP_46 OPE1_01 "sub reg/reg, with saturation") 4028 4029 ; Format: INT, Logic, Shift r-simm 4030 ; 4031 (define-pmacro (int-logic-r-simm name operation op comment) 4032 (dni name 4033 (comment) 4034 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4035 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4036 (.str name "$pack $GRi,$s12,$GRk") 4037 (+ pack GRk op GRi s12) 4038 (set GRk (operation GRi s12)) 4039 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4040 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4041 ) 4042 ) 4043 4044 (int-logic-r-simm addi add OP_10 "add reg/immed") 4045 (int-logic-r-simm subi sub OP_14 "sub reg/immed") 4046 (int-logic-r-simm andi and OP_20 "and reg/immed") 4047 (int-logic-r-simm ori or OP_22 "or reg/immed") 4048 (int-logic-r-simm xori xor OP_24 "xor reg/immed") 4049 4050 (dni sdivi 4051 "signed division reg/immed" 4052 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 4053 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4054 "sdivi$pack $GRi,$s12,$GRk" 4055 (+ pack GRk OP_1E GRi s12) 4056 (sequence () 4057 (c-call VOID "@cpu@_signed_integer_divide" 4058 GRi s12 (index-of GRk) 0) 4059 (clobber GRk)) 4060 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 4061 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 4062 ) 4063 4064 (dni nsdivi 4065 "non excepting signed division reg/immed" 4066 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING 4067 (MACH simple,tomcat,fr500,fr550,frv)) 4068 "nsdivi$pack $GRi,$s12,$GRk" 4069 (+ pack GRk OP_2E GRi s12) 4070 (sequence () 4071 (c-call VOID "@cpu@_signed_integer_divide" 4072 GRi s12 (index-of GRk) 1) 4073 (clobber GRk)) 4074 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 4075 ) 4076 4077 (dni udivi 4078 "unsigned division reg/immed" 4079 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 4080 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4081 "udivi$pack $GRi,$s12,$GRk" 4082 (+ pack GRk OP_1F GRi s12) 4083 (sequence () 4084 (c-call VOID "@cpu@_unsigned_integer_divide" 4085 GRi s12 (index-of GRk) 0) 4086 (clobber GRk)) 4087 ((fr400 (unit u-idiv)) (fr450 (unit u-idiv)) 4088 (fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 4089 ) 4090 4091 (dni nudivi 4092 "non excepting unsigned division reg/immed" 4093 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING 4094 (MACH simple,tomcat,fr500,fr550,frv)) 4095 "nudivi$pack $GRi,$s12,$GRk" 4096 (+ pack GRk OP_2F GRi s12) 4097 (sequence () 4098 (c-call VOID "@cpu@_unsigned_integer_divide" 4099 GRi s12 (index-of GRk) 1) 4100 (clobber GRk)) 4101 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv))) 4102 ) 4103 4104 (define-pmacro (multiply-r-simm name signop op comment) 4105 (dni name 4106 (comment) 4107 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 4108 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4109 (.str name "$pack $GRi,$s12,$GRdoublek") 4110 (+ pack GRdoublek op GRi s12) 4111 (set GRdoublek (mul DI (signop DI GRi) (signop DI s12))) 4112 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 4113 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 4114 ) 4115 ) 4116 4117 (multiply-r-simm smuli ext OP_18 "signed multiply reg/immed") 4118 (multiply-r-simm umuli zext OP_1A "unsigned multiply reg/immed") 4119 4120 (define-pmacro (int-shift-r-simm name op comment) 4121 (dni (.sym name i) 4122 (comment) 4123 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4124 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4125 (.str (.sym name i) "$pack $GRi,$s12,$GRk") 4126 (+ pack GRk op GRi s12) 4127 (set GRk (name GRi (and s12 #x1f))) 4128 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4129 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4130 ) 4131 ) 4132 4133 (int-shift-r-simm sll OP_28 "shift left logical reg/immed") 4134 (int-shift-r-simm srl OP_2A "shift right logical reg/immed") 4135 (int-shift-r-simm sra OP_2C "shift right arith reg/immed") 4136 4137 (dni scani 4138 "scan immediate" 4139 ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4140 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4141 "scani$pack $GRi,$s12,$GRk" 4142 (+ pack GRk OP_47 GRi s12) 4143 (scan-semantics GRi s12 GRk) 4144 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4145 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4146 ) 4147 4148 ; Format: INT, Logic, Shift cc r-simm 4149 ; 4150 (define-pmacro (int-arith-cc-r-simm name operation op comment) 4151 (dni name 4152 (comment) 4153 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4154 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4155 (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") 4156 (+ pack GRk op GRi ICCi_1 s10) 4157 (sequence ((BI tmp) (QI cc) (SI result)) 4158 (set cc ICCi_1) 4159 (set tmp ((.sym operation -oflag) GRi s10 (const 0))) 4160 (set-v cc tmp) 4161 (set tmp ((.sym operation -cflag) GRi s10 (const 0))) 4162 (set-c cc tmp) 4163 (set result (operation GRi s10)) 4164 (set-z-and-n cc result) 4165 (set GRk result) 4166 (set ICCi_1 cc)) 4167 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4168 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4169 ) 4170 ) 4171 4172 (int-arith-cc-r-simm addicc add OP_11 "add reg/immed, set icc") 4173 (int-arith-cc-r-simm subicc sub OP_15 "sub reg/immed, set icc") 4174 4175 (define-pmacro (int-logic-cc-r-simm name op comment) 4176 (dni (.sym name icc) 4177 (comment) 4178 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4179 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4180 (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1") 4181 (+ pack GRk op GRi ICCi_1 s10) 4182 (sequence ((SI tmp)) 4183 (set tmp (name GRi s10)) 4184 (set GRk tmp) 4185 (set-z-and-n ICCi_1 tmp)) 4186 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4187 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4188 ) 4189 ) 4190 4191 (int-logic-cc-r-simm and OP_21 "and reg/immed, set icc") 4192 (int-logic-cc-r-simm or OP_23 "or reg/immed, set icc") 4193 (int-logic-cc-r-simm xor OP_25 "xor reg/immed, set icc") 4194 4195 (define-pmacro (multiply-cc-r-simm name signop op comment) 4196 (dni name 4197 (comment) 4198 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) 4199 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4200 (.str name "$pack $GRi,$s10,$GRdoublek,$ICCi_1") 4201 (+ pack GRdoublek op GRi ICCi_1 s10) 4202 (multiply-cc-semantics signop GRi s10 GRdoublek ICCi_1) 4203 ((fr400 (unit u-imul)) (fr450 (unit u-imul)) 4204 (fr500 (unit u-imul)) (fr550 (unit u-imul))) 4205 ) 4206 ) 4207 4208 (multiply-cc-r-simm smulicc ext OP_19 "signed multiply reg/immed") 4209 (multiply-cc-r-simm umulicc zext OP_1B "unsigned multiply reg/immed") 4210 4211 (define-pmacro (int-shift-cc-r-simm name l-r op comment) 4212 (dni (.sym name icc) 4213 (comment) 4214 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4215 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4216 (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1") 4217 (+ pack GRk op GRi ICCi_1 s10) 4218 (sequence ((WI shift) (SI tmp) (QI cc)) 4219 (set shift (and s10 #x1f)) 4220 (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r) 4221 GRi shift ICCi_1)) 4222 (set tmp (name GRi shift)) 4223 (set GRk tmp) 4224 (set-z-and-n cc tmp) 4225 (set ICCi_1 cc)) 4226 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4227 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4228 ) 4229 ) 4230 4231 (int-shift-cc-r-simm sll left OP_29 "shift left logical reg/immed, set icc") 4232 (int-shift-cc-r-simm srl right OP_2B "shift right logical reg/immed, set icc") 4233 (int-shift-cc-r-simm sra right OP_2D "shift right arith reg/immed, set icc") 4234 4235 (define-pmacro (int-arith-x-r-simm name operation op comment) 4236 (dni name 4237 (comment) 4238 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4239 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4240 (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") 4241 (+ pack GRk op GRi ICCi_1 s10) 4242 (set GRk ((.sym operation c) GRi s10 (cbit ICCi_1))) 4243 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4244 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4245 ) 4246 ) 4247 4248 (int-arith-x-r-simm addxi add OP_12 "Add reg/immed, with carry") 4249 (int-arith-x-r-simm subxi sub OP_16 "Sub reg/immed, with carry") 4250 4251 (define-pmacro (int-arith-x-cc-r-simm name operation op comment) 4252 (dni name 4253 (comment) 4254 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4255 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4256 (.str name "$pack $GRi,$s10,$GRk,$ICCi_1") 4257 (+ pack GRk op GRi ICCi_1 s10) 4258 (sequence ((WI tmp) (QI cc)) 4259 (set cc ICCi_1) 4260 (set tmp ((.sym operation c) GRi s10 (cbit cc))) 4261 (set-v cc ((.sym operation -oflag) GRi s10 (cbit cc))) 4262 (set-c cc ((.sym operation -cflag) GRi s10 (cbit cc))) 4263 (set-z-and-n cc tmp) 4264 (set GRk tmp) 4265 (set ICCi_1 cc)) 4266 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4267 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4268 ) 4269 ) 4270 4271 (int-arith-x-cc-r-simm addxicc add OP_13 "Add reg/immed, with carry") 4272 (int-arith-x-cc-r-simm subxicc sub OP_17 "Sub reg/immed, with carry") 4273 4274 ; Byte compare insns 4275 4276 (dni cmpb 4277 "Compare bytes" 4278 ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1) 4279 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4280 "cmpb$pack $GRi,$GRj,$ICCi_1" 4281 (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj) 4282 (sequence ((QI cc)) 4283 (set-n cc (eq (and GRi #xff000000) (and GRj #xff000000))) 4284 (set-z cc (eq (and GRi #x00ff0000) (and GRj #x00ff0000))) 4285 (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00))) 4286 (set-c cc (eq (and GRi #x000000ff) (and GRj #x000000ff))) 4287 (set ICCi_1 cc)) 4288 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4289 (fr550 (unit u-integer))) 4290 ) 4291 4292 (dni cmpba 4293 "OR of Compare bytes" 4294 ((UNIT IALL) (MACH fr400,fr450,fr550) (FR550-MAJOR I-1) 4295 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4296 "cmpba$pack $GRi,$GRj,$ICCi_1" 4297 (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0D GRj) 4298 (sequence ((QI cc)) 4299 (set cc 0) 4300 (set-c cc 4301 (orif (eq (and GRi #xff000000) (and GRj #xff000000)) 4302 (orif (eq (and GRi #x00ff0000) (and GRj #x00ff0000)) 4303 (orif (eq (and GRi #x0000ff00) 4304 (and GRj #x0000ff00)) 4305 (eq (and GRi #x000000ff) 4306 (and GRj #x000000ff)))))) 4307 (set ICCi_1 cc)) 4308 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4309 (fr550 (unit u-integer))) 4310 ) 4311 4312 ; Format: Load immediate 4313 ; 4314 (dni setlo 4315 "set low order bits" 4316 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4317 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4318 "setlo$pack $ulo16,$GRklo" 4319 (+ pack GRk OP_3D (misc-null-4) u16) 4320 (set GRklo u16) 4321 ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo)) 4322 (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo))) 4323 ) 4324 4325 (dni sethi 4326 "set high order bits" 4327 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4328 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4329 "sethi$pack $uhi16,$GRkhi" 4330 (+ pack GRkhi OP_3E (misc-null-4) u16) 4331 (set GRkhi u16) 4332 ((fr400 (unit u-set-hilo)) (fr450 (unit u-set-hilo)) 4333 (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo))) 4334 ) 4335 4336 (dni setlos 4337 "set low order bits and extend sign" 4338 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) 4339 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 4340 "setlos$pack $slo16,$GRk" 4341 (+ pack GRk OP_3F (misc-null-4) s16) 4342 (set GRk s16) 4343 ((fr400 (unit u-integer)) (fr450 (unit u-integer)) 4344 (fr500 (unit u-integer)) (fr550 (unit u-integer))) 4345 ) 4346 4347 (define-pmacro (load-gr-r name mode op ope comment ann) 4348 (dni name 4349 (comment) 4350 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4351 (FR400-MAJOR I-2) (FR450-MAJOR I-2)) 4352 (.str name "$pack " ann "($GRi,$GRj),$GRk") 4353 (+ pack GRk op GRi ope GRj) 4354 (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))) 4355 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4356 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4357 ) 4358 ) 4359 4360 (dann ldann "ld annotation" SI "ld_annotation" "at") 4361 4362 (load-gr-r ldsb QI OP_02 OPE1_00 "Load signed byte" "@") 4363 (load-gr-r ldub UQI OP_02 OPE1_01 "Load unsigned byte" "@") 4364 (load-gr-r ldsh HI OP_02 OPE1_02 "Load signed half" "@") 4365 (load-gr-r lduh UHI OP_02 OPE1_03 "Load unsigned half" "@") 4366 (load-gr-r ld SI OP_02 OPE1_04 "Load word" "$ldann") 4367 4368 (define-pmacro (load-fr-r name mode op ope comment) 4369 (dni name 4370 (comment) 4371 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4372 (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS) 4373 (.str name "$pack @($GRi,$GRj),$FRintk") 4374 (+ pack FRintk op GRi ope GRj) 4375 (set FRintk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))) 4376 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4377 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4378 ) 4379 ) 4380 4381 (load-fr-r ldbf UQI OP_02 OPE1_08 "Load byte float") 4382 (load-fr-r ldhf UHI OP_02 OPE1_09 "Load half float") 4383 (load-fr-r ldf SI OP_02 OPE1_0A "Load word float") 4384 4385 (define-pmacro (load-cpr-r name mode op ope reg attr comment) 4386 (dni name 4387 (comment) 4388 ((UNIT LOAD) (FR500-MAJOR I-2) attr) 4389 (.str name "$pack @($GRi,$GRj),$" reg "k") 4390 (+ pack (.sym reg k) op GRi ope GRj) 4391 (set (.sym reg k) 4392 (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))) 4393 () 4394 ) 4395 ) 4396 4397 (load-cpr-r ldc SI OP_02 OPE1_0D CPR (MACH frv) "Load coprocessor word") 4398 4399 ; These correspond to enumerators in frv-sim.h 4400 (define-pmacro (ne-UQI-size) 0) 4401 (define-pmacro (ne-QI-size) 1) 4402 (define-pmacro (ne-UHI-size) 2) 4403 (define-pmacro (ne-HI-size) 3) 4404 (define-pmacro (ne-SI-size) 4) 4405 (define-pmacro (ne-DI-size) 5) 4406 (define-pmacro (ne-XI-size) 6) 4407 4408 (define-pmacro (ne-load-semantics base dispix targ idisp size is_float action) 4409 (sequence ((BI do_op)) 4410 (set do_op 4411 (c-call BI "@cpu@_check_non_excepting_load" 4412 (index-of base) dispix (index-of targ) 4413 idisp size is_float)) 4414 (if do_op action)) 4415 ) 4416 4417 (define-pmacro (ne-load-gr-r name mode op ope size comment) 4418 (dni name 4419 (comment) 4420 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING 4421 (MACH simple,tomcat,fr500,fr550,frv)) 4422 (.str name "$pack @($GRi,$GRj),$GRk") 4423 (+ pack GRk op GRi ope GRj) 4424 (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 4425 (set GRk 4426 (c-call mode (.str "@cpu@_read_mem_" mode) 4427 pc (add GRi GRj)))) 4428 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4429 ) 4430 ) 4431 4432 (ne-load-gr-r nldsb QI OP_02 OPE1_20 (ne-QI-size) "Load signed byte") 4433 (ne-load-gr-r nldub UQI OP_02 OPE1_21 (ne-UQI-size) "Load unsigned byte") 4434 (ne-load-gr-r nldsh HI OP_02 OPE1_22 (ne-HI-size) "Load signed half") 4435 (ne-load-gr-r nlduh UHI OP_02 OPE1_23 (ne-UHI-size) "Load unsigned half") 4436 (ne-load-gr-r nld SI OP_02 OPE1_24 (ne-SI-size) "Load word") 4437 4438 (define-pmacro (ne-load-fr-r name mode op ope size comment) 4439 (dni name 4440 (comment) 4441 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS 4442 (MACH simple,tomcat,fr500,fr550,frv)) 4443 (.str name "$pack @($GRi,$GRj),$FRintk") 4444 (+ pack FRintk op GRi ope GRj) 4445 (ne-load-semantics GRi (index-of GRj) FRintk 0 size 1 4446 (set FRintk 4447 (c-call mode (.str "@cpu@_read_mem_" mode) 4448 pc (add GRi GRj)))) 4449 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4450 ) 4451 ) 4452 4453 (ne-load-fr-r nldbf UQI OP_02 OPE1_28 (ne-UQI-size) "Load byte float") 4454 (ne-load-fr-r nldhf UHI OP_02 OPE1_29 (ne-UHI-size) "Load half float") 4455 (ne-load-fr-r nldf SI OP_02 OPE1_2A (ne-SI-size) "Load word float") 4456 4457 ; Semantics for a load-double insn 4458 ; 4459 (define-pmacro (load-double-semantics not_gr mode regtype address arg) 4460 (if (orif not_gr (ne (index-of (.sym regtype doublek)) 0)) 4461 (sequence () 4462 (set address (add GRi arg)) 4463 (set (.sym regtype doublek) 4464 (c-call mode (.str "@cpu@_read_mem_" mode) pc address)))) 4465 ) 4466 4467 (define-pmacro (load-double-r-r 4468 name not_gr mode op ope regtype attr profile comment ann) 4469 (dni name 4470 (comment) 4471 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4472 (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) 4473 (.str name "$pack " ann "($GRi,$GRj),$" regtype "doublek") 4474 (+ pack (.sym regtype doublek) op GRi ope GRj) 4475 (sequence ((WI address)) 4476 (load-double-semantics not_gr mode regtype address GRj)) 4477 profile 4478 ) 4479 ) 4480 4481 (dann lddann "ldd annotation" SI "ldd_annotation" "at") 4482 4483 (load-double-r-r ldd 0 DI OP_02 OPE1_05 GR NA 4484 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4485 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4486 "Load double word" "$lddann") 4487 (load-double-r-r lddf 1 DF OP_02 OPE1_0B FR FR-ACCESS 4488 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4489 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4490 "Load double float" "@") 4491 (load-double-r-r lddc 1 DI OP_02 OPE1_0E CPR (MACH frv) () 4492 "Load coprocessor double" "@") 4493 4494 (define-pmacro (ne-load-double-r-r 4495 name not_gr mode op ope regtype size is_float attr profile 4496 comment) 4497 (dni name 4498 (comment) 4499 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr 4500 (MACH simple,tomcat,fr500,fr550,frv)) 4501 (.str name "$pack @($GRi,$GRj),$" regtype "doublek") 4502 (+ pack (.sym regtype doublek) op GRi ope GRj) 4503 (sequence ((WI address)) 4504 (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek) 4505 0 size is_float 4506 (load-double-semantics not_gr mode 4507 regtype 4508 address GRj))) 4509 profile 4510 ) 4511 ) 4512 4513 (ne-load-double-r-r nldd 0 DI OP_02 OPE1_25 GR (ne-DI-size) 0 NA 4514 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word") 4515 (ne-load-double-r-r nlddf 1 DF OP_02 OPE1_2B FR (ne-DI-size) 1 FR-ACCESS 4516 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float") 4517 4518 ; Semantics for a load-quad insn 4519 ; 4520 (define-pmacro (load-quad-semantics regtype address arg) 4521 (sequence () 4522 (set address (add GRi arg)) 4523 (c-call VOID (.str "@cpu@_load_quad_" regtype) 4524 pc address (index-of (.sym regtype k)))) 4525 ) 4526 4527 (define-pmacro (load-quad-r-r name op ope regtype attr profile comment) 4528 (dni name 4529 (comment) 4530 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr) 4531 (.str name "$pack @($GRi,$GRj),$" regtype "k") 4532 (+ pack (.sym regtype k) op GRi ope GRj) 4533 (sequence ((WI address)) 4534 (load-quad-semantics regtype address GRj)) 4535 ; TODO regtype-k not referenced for profiling 4536 profile 4537 ) 4538 ) 4539 4540 (load-quad-r-r ldq OP_02 OPE1_06 GR NA ((fr500 (unit u-gr-load))) 4541 "Load quad word") 4542 (load-quad-r-r ldqf OP_02 OPE1_0C FRint FR-ACCESS ((fr500 (unit u-fr-load))) 4543 "Load quad float") 4544 (load-quad-r-r ldqc OP_02 OPE1_0F CPR NA () "Load coprocessor quad") 4545 4546 (define-pmacro (ne-load-quad-r-r 4547 name op ope regtype size is_float attr profile comment) 4548 (dni name 4549 (comment) 4550 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr) 4551 (.str name "$pack @($GRi,$GRj),$" regtype "k") 4552 (+ pack (.sym regtype k) op GRi ope GRj) 4553 (sequence ((WI address)) 4554 (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 4555 0 size is_float 4556 (load-quad-semantics regtype address GRj))) 4557 ; TODO regtype-k not referenced for profiling 4558 profile 4559 ) 4560 ) 4561 4562 (ne-load-quad-r-r nldq OP_02 OPE1_26 GR (ne-XI-size) 0 NA 4563 ((fr500 (unit u-gr-load))) "Load quad word") 4564 (ne-load-quad-r-r nldqf OP_02 OPE1_2C FRint (ne-XI-size) 1 FR-ACCESS 4565 ((fr500 (unit u-fr-load))) "Load quad float") 4566 4567 (define-pmacro (load-gr-u-semantics mode) 4568 (sequence ((UWI address)) 4569 (set address (add GRi GRj)) 4570 (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc address)) 4571 (if (ne (index-of GRi) (index-of GRk)) 4572 (sequence () 4573 (set GRi address) 4574 (c-call VOID "@cpu@_force_update")))) 4575 ) 4576 4577 (define-pmacro (load-gr-u name mode op ope comment) 4578 (dni name 4579 (comment) 4580 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4581 (FR400-MAJOR I-2) (FR450-MAJOR I-2)) 4582 (.str name "$pack @($GRi,$GRj),$GRk") 4583 (+ pack GRk op GRi ope GRj) 4584 (load-gr-u-semantics mode) 4585 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4586 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4587 ) 4588 ) 4589 4590 (load-gr-u ldsbu QI OP_02 OPE1_10 "Load signed byte, update index") 4591 (load-gr-u ldubu UQI OP_02 OPE1_11 "Load unsigned byte, update index") 4592 (load-gr-u ldshu HI OP_02 OPE1_12 "Load signed half, update index") 4593 (load-gr-u lduhu UHI OP_02 OPE1_13 "Load unsigned half, update index") 4594 (load-gr-u ldu SI OP_02 OPE1_14 "Load word, update index") 4595 4596 (define-pmacro (ne-load-gr-u name mode op ope size comment) 4597 (dni name 4598 (comment) 4599 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING 4600 (MACH simple,tomcat,fr500,fr550,frv)) 4601 (.str name "$pack @($GRi,$GRj),$GRk") 4602 (+ pack GRk op GRi ope GRj) 4603 (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 (load-gr-u-semantics mode)) 4604 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4605 ) 4606 ) 4607 4608 (ne-load-gr-u nldsbu QI OP_02 OPE1_30 (ne-QI-size) "Load signed byte, update index") 4609 (ne-load-gr-u nldubu UQI OP_02 OPE1_31 (ne-UQI-size) "Load unsigned byte, update index") 4610 (ne-load-gr-u nldshu HI OP_02 OPE1_32 (ne-HI-size) "Load signed half, update index") 4611 (ne-load-gr-u nlduhu UHI OP_02 OPE1_33 (ne-UHI-size) "Load unsigned half, update index") 4612 (ne-load-gr-u nldu SI OP_02 OPE1_34 (ne-SI-size) "Load word, update index") 4613 4614 (define-pmacro (load-non-gr-u-semantics mode regtype) 4615 (sequence ((UWI address)) 4616 (set address (add GRi GRj)) 4617 (set (.sym regtype k) 4618 (c-call mode (.str "@cpu@_read_mem_" mode) pc address)) 4619 (set GRi address) 4620 (c-call VOID "@cpu@_force_update")) 4621 ) 4622 4623 (define-pmacro (load-fr-u name mode op ope comment) 4624 (dni name 4625 (comment) 4626 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4627 (FR400-MAJOR I-2) (FR450-MAJOR I-2) FR-ACCESS) 4628 (.str name "$pack @($GRi,$GRj),$FRintk") 4629 (+ pack FRintk op GRi ope GRj) 4630 (load-non-gr-u-semantics mode FRint) 4631 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4632 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4633 ) 4634 ) 4635 4636 (load-fr-u ldbfu UQI OP_02 OPE1_18 "Load byte float, update index") 4637 (load-fr-u ldhfu UHI OP_02 OPE1_19 "Load half float, update index") 4638 (load-fr-u ldfu SI OP_02 OPE1_1A "Load word float, update index") 4639 4640 (define-pmacro (load-cpr-u name mode op ope comment) 4641 (dni name 4642 (comment) 4643 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv)) 4644 (.str name "$pack @($GRi,$GRj),$CPRk") 4645 (+ pack CPRk op GRi ope GRj) 4646 (load-non-gr-u-semantics mode CPR) 4647 () 4648 ) 4649 ) 4650 4651 (load-cpr-u ldcu SI OP_02 OPE1_1D "Load coprocessor word float,update index") 4652 4653 (define-pmacro (ne-load-non-gr-u name mode op ope regtype size comment) 4654 (dni name 4655 (comment) 4656 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS 4657 (MACH simple,tomcat,fr500,fr550,frv)) 4658 (.str name "$pack @($GRi,$GRj),$" regtype "k") 4659 (+ pack (.sym regtype k) op GRi ope GRj) 4660 (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1 4661 (load-non-gr-u-semantics mode regtype)) 4662 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4663 ) 4664 ) 4665 4666 (ne-load-non-gr-u nldbfu UQI OP_02 OPE1_38 FRint (ne-UQI-size) "Load byte float, update index") 4667 (ne-load-non-gr-u nldhfu UHI OP_02 OPE1_39 FRint (ne-UHI-size) "Load half float, update index") 4668 (ne-load-non-gr-u nldfu SI OP_02 OPE1_3A FRint (ne-SI-size) "Load word float, update index") 4669 4670 (define-pmacro (load-double-gr-u-semantics) 4671 (sequence ((WI address)) 4672 (load-double-semantics 0 DI GR address GRj) 4673 (if (ne (index-of GRi) (index-of GRdoublek)) 4674 (sequence () 4675 (set GRi address) 4676 (c-call VOID "@cpu@_force_update")))) 4677 ) 4678 4679 (define-pmacro (load-double-gr-u name op ope comment) 4680 (dni name 4681 (comment) 4682 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4683 (FR400-MAJOR I-2) (FR450-MAJOR I-2)) 4684 (.str name "$pack @($GRi,$GRj),$GRdoublek") 4685 (+ pack GRdoublek op GRi ope GRj) 4686 (load-double-gr-u-semantics) 4687 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4688 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4689 ) 4690 ) 4691 4692 (load-double-gr-u lddu OP_02 OPE1_15 "Load double word, update index") 4693 4694 (define-pmacro (ne-load-double-gr-u name op ope size comment) 4695 (dni name 4696 (comment) 4697 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING 4698 (MACH simple,tomcat,fr500,fr550,frv)) 4699 (.str name "$pack @($GRi,$GRj),$GRdoublek") 4700 (+ pack GRdoublek op GRi ope GRj) 4701 (ne-load-semantics GRi (index-of GRj) GRdoublek 0 size 0 4702 (load-double-gr-u-semantics)) 4703 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4704 4705 ) 4706 ) 4707 4708 (ne-load-double-gr-u nlddu OP_02 OPE1_35 (ne-DI-size) "Load double word, update index") 4709 4710 (define-pmacro (load-double-non-gr-u-semantics mode regtype) 4711 (sequence ((WI address)) 4712 (load-double-semantics 1 mode regtype address GRj) 4713 (set GRi address) 4714 (c-call VOID "@cpu@_force_update")) 4715 ) 4716 4717 (define-pmacro (load-double-non-gr-u 4718 name mode op ope regtype attr profile comment) 4719 (dni name 4720 (comment) 4721 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4722 (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) 4723 (.str name "$pack @($GRi,$GRj),$" regtype "doublek") 4724 (+ pack (.sym regtype doublek) op GRi ope GRj) 4725 (load-double-non-gr-u-semantics mode regtype) 4726 profile 4727 ) 4728 ) 4729 4730 (load-double-non-gr-u lddfu DF OP_02 OPE1_1B FR FR-ACCESS 4731 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4732 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4733 "Load double float, update index") 4734 (load-double-non-gr-u lddcu DI OP_02 OPE1_1E CPR (MACH frv) 4735 () "Load coprocessor double float, update index") 4736 4737 (define-pmacro (ne-load-double-non-gr-u name mode op ope regtype size comment) 4738 (dni name 4739 (comment) 4740 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS 4741 (MACH simple,tomcat,fr500,fr550,frv)) 4742 (.str name "$pack @($GRi,$GRj),$" regtype "doublek") 4743 (+ pack (.sym regtype doublek) op GRi ope GRj) 4744 (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek) 0 size 1 4745 (load-double-non-gr-u-semantics mode regtype)) 4746 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4747 ) 4748 ) 4749 4750 (ne-load-double-non-gr-u nlddfu DF OP_02 OPE1_3B FR (ne-DI-size) "Load double float, update index") 4751 4752 (define-pmacro (load-quad-gr-u-semantics) 4753 (sequence ((WI address)) 4754 (load-quad-semantics GR address GRj) 4755 (if (ne (index-of GRi) (index-of GRk)) 4756 (sequence () 4757 (set GRi address) 4758 (c-call VOID "@cpu@_force_update")))) 4759 ) 4760 4761 (define-pmacro (load-quad-gr-u name op ope comment) 4762 (dni name 4763 (comment) 4764 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv)) 4765 (.str name "$pack @($GRi,$GRj),$GRk") 4766 (+ pack GRk op GRi ope GRj) 4767 (load-quad-gr-u-semantics) 4768 ; TODO - GRk not referenced here for profiling 4769 ((fr500 (unit u-gr-load))) 4770 ) 4771 ) 4772 4773 (load-quad-gr-u ldqu OP_02 OPE1_16 "Load quad word, update index") 4774 4775 (define-pmacro (ne-load-quad-gr-u name op ope size comment) 4776 (dni name 4777 (comment) 4778 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING) 4779 (.str name "$pack @($GRi,$GRj),$GRk") 4780 (+ pack GRk op GRi ope GRj) 4781 (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 4782 (load-quad-gr-u-semantics)) 4783 ; TODO - GRk not referenced here for profiling 4784 ((fr500 (unit u-gr-load))) 4785 ) 4786 ) 4787 4788 (ne-load-quad-gr-u nldqu OP_02 OPE1_36 (ne-XI-size) "Load quad word, update index") 4789 4790 (define-pmacro (load-quad-non-gr-u-semantics regtype) 4791 (sequence ((WI address)) 4792 (load-quad-semantics regtype address GRj) 4793 (set GRi address) 4794 (c-call VOID "@cpu@_force_update")) 4795 ) 4796 4797 (define-pmacro (load-quad-non-gr-u name op ope regtype attr profile comment) 4798 (dni name 4799 (comment) 4800 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr) 4801 (.str name "$pack @($GRi,$GRj),$" regtype "k") 4802 (+ pack (.sym regtype k) op GRi ope GRj) 4803 (load-quad-non-gr-u-semantics regtype) 4804 profile 4805 ) 4806 ) 4807 4808 (load-quad-non-gr-u ldqfu OP_02 OPE1_1C FRint FR-ACCESS 4809 ((fr500 (unit u-fr-load))) "Load quad float, update index") 4810 (load-quad-non-gr-u ldqcu OP_02 OPE1_1F CPR NA 4811 () "Load coprocessor quad word, update index") 4812 4813 (define-pmacro (ne-load-quad-non-gr-u name op ope regtype size comment) 4814 (dni name 4815 (comment) 4816 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING FR-ACCESS) 4817 (.str name "$pack @($GRi,$GRj),$" regtype "k") 4818 (+ pack (.sym regtype k) op GRi ope GRj) 4819 (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1 4820 (load-quad-non-gr-u-semantics regtype)) 4821 ((fr500 (unit u-fr-load))) 4822 ) 4823 ) 4824 4825 (ne-load-quad-non-gr-u nldqfu OP_02 OPE1_3C FRint (ne-XI-size) "Load quad float,update index") 4826 4827 (define-pmacro (load-r-simm name mode op regtype attr profile comment) 4828 (dni name 4829 (comment) 4830 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4831 (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) 4832 (.str name "$pack @($GRi,$d12),$" regtype "k") 4833 (+ pack (.sym regtype k) op GRi d12) 4834 (set (.sym regtype k) 4835 (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi d12))) 4836 profile 4837 ) 4838 ) 4839 4840 (load-r-simm ldsbi QI OP_30 GR NA 4841 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4842 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4843 "Load signed byte") 4844 (load-r-simm ldshi HI OP_31 GR NA 4845 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4846 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4847 "Load signed half") 4848 (load-r-simm ldi SI OP_32 GR NA 4849 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4850 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4851 "Load word") 4852 (load-r-simm ldubi UQI OP_35 GR NA 4853 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4854 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4855 "Load unsigned byte") 4856 (load-r-simm lduhi UHI OP_36 GR NA 4857 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4858 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4859 "Load unsigned half") 4860 4861 (load-r-simm ldbfi UQI OP_38 FRint FR-ACCESS 4862 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4863 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4864 "Load byte float") 4865 (load-r-simm ldhfi UHI OP_39 FRint FR-ACCESS 4866 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4867 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4868 "Load half float") 4869 (load-r-simm ldfi SI OP_3A FRint FR-ACCESS 4870 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4871 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4872 "Load word float") 4873 4874 (define-pmacro (ne-load-r-simm 4875 name mode op regtype size is_float attr profile comment) 4876 (dni name 4877 (comment) 4878 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr 4879 (MACH simple,tomcat,fr500,fr550,frv)) 4880 (.str name "$pack @($GRi,$d12),$" regtype "k") 4881 (+ pack (.sym regtype k) op GRi d12) 4882 (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float 4883 (set (.sym regtype k) 4884 (c-call mode (.str "@cpu@_read_mem_" mode) 4885 pc (add GRi d12)))) 4886 profile 4887 ) 4888 ) 4889 4890 (ne-load-r-simm nldsbi QI OP_40 GR (ne-QI-size) 0 NA 4891 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed byte") 4892 (ne-load-r-simm nldubi UQI OP_41 GR (ne-UQI-size) 0 NA 4893 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned byte") 4894 (ne-load-r-simm nldshi HI OP_42 GR (ne-HI-size) 0 NA 4895 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed half") 4896 (ne-load-r-simm nlduhi UHI OP_43 GR (ne-UHI-size) 0 NA 4897 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned half") 4898 (ne-load-r-simm nldi SI OP_44 GR (ne-SI-size) 0 NA 4899 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load word") 4900 4901 (ne-load-r-simm nldbfi UQI OP_48 FRint (ne-UQI-size) 1 FR-ACCESS 4902 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load byte float") 4903 (ne-load-r-simm nldhfi UHI OP_49 FRint (ne-UHI-size) 1 FR-ACCESS 4904 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load half float") 4905 (ne-load-r-simm nldfi SI OP_4A FRint (ne-SI-size) 1 FR-ACCESS 4906 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load word float") 4907 4908 (define-pmacro (load-double-r-simm 4909 name not_gr mode op regtype attr profile comment) 4910 (dni name 4911 (comment) 4912 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 4913 (FR400-MAJOR I-2) (FR450-MAJOR I-2) attr) 4914 (.str name "$pack @($GRi,$d12),$" regtype "doublek") 4915 (+ pack (.sym regtype doublek) op GRi d12) 4916 (sequence ((WI address)) 4917 (load-double-semantics not_gr mode regtype address d12)) 4918 profile 4919 ) 4920 ) 4921 4922 (load-double-r-simm lddi 0 DI OP_33 GR NA 4923 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 4924 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 4925 "Load double word") 4926 (load-double-r-simm lddfi 1 DF OP_3B FR FR-ACCESS 4927 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 4928 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 4929 "Load double float") 4930 4931 (define-pmacro (ne-load-double-r-simm 4932 name not_gr mode op regtype size is_float attr profile comment) 4933 (dni name 4934 (comment) 4935 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr 4936 (MACH simple,tomcat,fr500,fr550,frv)) 4937 (.str name "$pack @($GRi,$d12),$" regtype "doublek") 4938 (+ pack (.sym regtype doublek) op GRi d12) 4939 (sequence ((WI address)) 4940 (ne-load-semantics GRi -1 (.sym regtype doublek) 4941 d12 size is_float 4942 (load-double-semantics not_gr mode 4943 regtype 4944 address d12))) 4945 profile 4946 ) 4947 ) 4948 4949 (ne-load-double-r-simm nlddi 0 DI OP_45 GR (ne-DI-size) 0 NA 4950 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word") 4951 (ne-load-double-r-simm nlddfi 1 DF OP_4B FR (ne-DI-size) 1 FR-ACCESS 4952 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float") 4953 4954 (define-pmacro (load-quad-r-simm name op regtype attr profile comment) 4955 (dni name 4956 (comment) 4957 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr) 4958 (.str name "$pack @($GRi,$d12),$" regtype "k") 4959 (+ pack (.sym regtype k) op GRi d12) 4960 (sequence ((WI address)) 4961 (load-quad-semantics regtype address d12)) 4962 profile 4963 ) 4964 ) 4965 4966 (load-quad-r-simm ldqi OP_34 GR NA 4967 ((fr500 (unit u-gr-load))) "Load quad word") 4968 (load-quad-r-simm ldqfi OP_3C FRint FR-ACCESS 4969 ((fr500 (unit u-fr-load))) "Load quad float") 4970 4971 (define-pmacro (ne-load-quad-r-simm 4972 name op regtype size is_float attr profile comment) 4973 (dni name 4974 (comment) 4975 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr) 4976 (.str name "$pack @($GRi,$d12),$" regtype "k") 4977 (+ pack (.sym regtype k) op GRi d12) 4978 (sequence ((WI address)) 4979 (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float 4980 (load-quad-semantics regtype address d12))) 4981 profile 4982 ) 4983 ) 4984 4985 (ne-load-quad-r-simm nldqfi OP_4C FRint (ne-XI-size) 1 FR-ACCESS 4986 ((fr500 (unit u-fr-load))) "Load quad float") 4987 4988 (define-pmacro (store-r-r name mode op ope reg attr profile comment) 4989 (dni name 4990 (comment) 4991 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 4992 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 4993 (.str name "$pack $" reg "k,@($GRi,$GRj)") 4994 (+ pack (.sym reg k) op GRi ope GRj) 4995 (c-call VOID (.str "@cpu@_write_mem_" mode) 4996 pc (add GRi GRj) (.sym reg k)) 4997 profile 4998 ) 4999 ) 5000 5001 (store-r-r stb QI OP_03 OPE1_00 GR NA 5002 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5003 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5004 "Store unsigned byte") 5005 (store-r-r sth HI OP_03 OPE1_01 GR NA 5006 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5007 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5008 "Store unsigned half") 5009 (store-r-r st SI OP_03 OPE1_02 GR NA 5010 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5011 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5012 "Store word") 5013 5014 (store-r-r stbf QI OP_03 OPE1_08 FRint FR-ACCESS 5015 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5016 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5017 "Store byte float") 5018 (store-r-r sthf HI OP_03 OPE1_09 FRint FR-ACCESS 5019 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5020 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5021 "Store half float") 5022 (store-r-r stf SI OP_03 OPE1_0A FRint FR-ACCESS 5023 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5024 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5025 "Store word float") 5026 5027 (store-r-r stc SI OP_03 OPE1_25 CPR (MACH frv) () "Store coprocessor word") 5028 5029 ; Semantics for a store-double insn 5030 ; 5031 (define-pmacro (store-double-semantics mode regtype address arg) 5032 (sequence () 5033 (set address (add GRi arg)) 5034 (c-call VOID (.str "@cpu@_write_mem_" mode) 5035 pc address (.sym regtype doublek))) 5036 ) 5037 5038 (define-pmacro (store-double-r-r name mode op ope regtype attr profile comment) 5039 (dni name 5040 (comment) 5041 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5042 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 5043 (.str name "$pack $" regtype "doublek,@($GRi,$GRj)") 5044 (+ pack (.sym regtype doublek) op GRi ope GRj) 5045 (sequence ((WI address)) 5046 (store-double-semantics mode regtype address GRj)) 5047 profile 5048 ) 5049 ) 5050 5051 (store-double-r-r std DI OP_03 OPE1_03 GR NA 5052 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5053 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5054 "Store double word") 5055 (store-double-r-r stdf DF OP_03 OPE1_0B FR FR-ACCESS 5056 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5057 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5058 "Store double float") 5059 5060 (store-double-r-r stdc DI OP_03 OPE1_26 CPR (MACH frv) 5061 () "Store coprocessor double word") 5062 5063 ; Semantics for a store-quad insn 5064 ; 5065 (define-pmacro (store-quad-semantics regtype address arg) 5066 (sequence () 5067 (set address (add GRi arg)) 5068 (c-call VOID (.str "@cpu@_store_quad_" regtype) 5069 pc address (index-of (.sym regtype k)))) 5070 ) 5071 5072 (define-pmacro (store-quad-r-r name op ope regtype attr profile comment) 5073 (dni name 5074 (comment) 5075 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) 5076 (.str name "$pack $" regtype "k,@($GRi,$GRj)") 5077 (+ pack (.sym regtype k) op GRi ope GRj) 5078 (sequence ((WI address)) 5079 (store-quad-semantics regtype address GRj)) 5080 profile 5081 ) 5082 ) 5083 5084 (store-quad-r-r stq OP_03 OPE1_04 GR NA 5085 ((fr500 (unit u-gr-store))) "Store quad word") 5086 (store-quad-r-r stqf OP_03 OPE1_0C FRint FR-ACCESS 5087 ((fr500 (unit u-fr-store))) 5088 "Store quad float") 5089 (store-quad-r-r stqc OP_03 OPE1_27 CPR NA 5090 () "Store coprocessor quad word") 5091 5092 (define-pmacro (store-r-r-u name mode op ope regtype attr profile comment) 5093 (dni name 5094 (comment) 5095 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5096 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 5097 (.str name "$pack $" regtype "k,@($GRi,$GRj)") 5098 (+ pack (.sym regtype k) op GRi ope GRj) 5099 (sequence ((UWI address)) 5100 (set address (add GRi GRj)) 5101 (c-call VOID (.str "@cpu@_write_mem_" mode) 5102 pc address (.sym regtype k)) 5103 (set GRi address)) 5104 profile 5105 ) 5106 ) 5107 5108 (store-r-r-u stbu QI OP_03 OPE1_10 GR NA 5109 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5110 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5111 "Store unsigned byte, update index") 5112 (store-r-r-u sthu HI OP_03 OPE1_11 GR NA 5113 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5114 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5115 "Store unsigned half, update index") 5116 (store-r-r-u stu WI OP_03 OPE1_12 GR NA 5117 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5118 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5119 "Store word, update index") 5120 5121 (store-r-r-u stbfu QI OP_03 OPE1_18 FRint FR-ACCESS 5122 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5123 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5124 "Store byte float, update index") 5125 (store-r-r-u sthfu HI OP_03 OPE1_19 FRint FR-ACCESS 5126 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5127 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5128 "Store half float, update index") 5129 (store-r-r-u stfu SI OP_03 OPE1_1A FRint FR-ACCESS 5130 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5131 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5132 "Store word float, update index") 5133 5134 (store-r-r-u stcu SI OP_03 OPE1_2D CPR (MACH frv) () 5135 "Store coprocessor word, update index") 5136 5137 (define-pmacro (store-double-r-r-u 5138 name mode op ope regtype attr profile comment) 5139 (dni name 5140 (comment) 5141 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5142 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 5143 (.str name "$pack $" regtype "doublek,@($GRi,$GRj)") 5144 (+ pack (.sym regtype doublek) op GRi ope GRj) 5145 (sequence ((WI address)) 5146 (store-double-semantics mode regtype address GRj) 5147 (set GRi address)) 5148 profile 5149 ) 5150 ) 5151 5152 (store-double-r-r-u stdu DI OP_03 OPE1_13 GR NA 5153 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5154 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5155 "Store double word, update index") 5156 (store-double-r-r-u stdfu DF OP_03 OPE1_1B FR FR-ACCESS 5157 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5158 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5159 "Store double float,update index") 5160 (store-double-r-r-u stdcu DI OP_03 OPE1_2E CPR (MACH frv) () 5161 "Store coprocessor double word, update index") 5162 5163 (define-pmacro (store-quad-r-r-u name op ope regtype attr profile comment) 5164 (dni name 5165 (comment) 5166 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) 5167 (.str name "$pack $" regtype "k,@($GRi,$GRj)") 5168 (+ pack (.sym regtype k) op GRi ope GRj) 5169 (sequence ((WI address)) 5170 (store-quad-semantics regtype address GRj) 5171 (set GRi address)) 5172 profile 5173 ) 5174 ) 5175 5176 (store-quad-r-r-u stqu OP_03 OPE1_14 GR NA 5177 ((fr500 (unit u-gr-store))) 5178 "Store quad word, update index") 5179 (store-quad-r-r-u stqfu OP_03 OPE1_1C FRint FR-ACCESS 5180 ((fr500 (unit u-fr-store))) 5181 "Store quad float, update index") 5182 (store-quad-r-r-u stqcu OP_03 OPE1_2F CPR NA () 5183 "Store coprocessor quad word, update index") 5184 5185 (define-pmacro (conditional-load name mode op ope regtype profile comment) 5186 (dni name 5187 (comment) 5188 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5189 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL) 5190 (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond") 5191 (+ pack (.sym regtype k) op GRi CCi cond ope GRj) 5192 (if (eq CCi (or cond 2)) 5193 (set (.sym regtype k) 5194 (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))) 5195 profile 5196 ) 5197 ) 5198 5199 (conditional-load cldsb QI OP_5E OPE4_0 GR 5200 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5201 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5202 "Load signed byte") 5203 (conditional-load cldub UQI OP_5E OPE4_1 GR 5204 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5205 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5206 "Load unsigned byte") 5207 (conditional-load cldsh HI OP_5E OPE4_2 GR 5208 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5209 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5210 "Load signed half") 5211 (conditional-load clduh UHI OP_5E OPE4_3 GR 5212 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5213 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5214 "Load unsigned half") 5215 (conditional-load cld SI OP_5F OPE4_0 GR 5216 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5217 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5218 "Load word") 5219 5220 (conditional-load cldbf UQI OP_60 OPE4_0 FRint 5221 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 5222 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 5223 "Load byte float") 5224 (conditional-load cldhf UHI OP_60 OPE4_1 FRint 5225 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 5226 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 5227 "Load half float") 5228 (conditional-load cldf SI OP_60 OPE4_2 FRint 5229 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 5230 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 5231 "Load word float") 5232 5233 (define-pmacro (conditional-load-double 5234 name not_gr mode op ope regtype attr profile comment) 5235 (dni name 5236 (comment) 5237 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5238 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL attr) 5239 (.str name "$pack @($GRi,$GRj),$" regtype "doublek,$CCi,$cond") 5240 (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj) 5241 (if (eq CCi (or cond 2)) 5242 (sequence ((WI address)) 5243 (load-double-semantics not_gr mode regtype address GRj))) 5244 profile 5245 ) 5246 ) 5247 5248 (conditional-load-double cldd 0 DI OP_5F OPE4_1 GR NA 5249 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5250 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5251 "Load double word") 5252 (conditional-load-double clddf 1 DF OP_60 OPE4_3 FR FR-ACCESS 5253 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5254 (fr500 (unit u-gr-load)) (fr550 (unit u-fr-load))) 5255 "Load double float") 5256 5257 (dni cldq 5258 "conditional load quad integer" 5259 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL) 5260 "cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond" 5261 (+ pack GRk OP_5F GRi CCi cond OPE4_2 GRj) 5262 (if (eq CCi (or cond 2)) 5263 (sequence ((WI address)) 5264 (load-quad-semantics GR address GRj))) 5265 ((fr500 (unit u-gr-load))) 5266 ) 5267 5268 (define-pmacro (conditional-load-gr-u name mode op ope comment) 5269 (dni name 5270 (comment) 5271 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5272 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL) 5273 (.str name "$pack @($GRi,$GRj),$GRk,$CCi,$cond") 5274 (+ pack GRk op GRi CCi cond ope GRj) 5275 (if (eq CCi (or cond 2)) 5276 (sequence ((WI address)) 5277 (set address (add GRi GRj)) 5278 (set GRk 5279 (c-call mode (.str "@cpu@_read_mem_" mode) 5280 pc address)) 5281 (if (ne (index-of GRi) (index-of GRk)) 5282 (set GRi address)))) 5283 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5284 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5285 ) 5286 ) 5287 5288 (conditional-load-gr-u cldsbu QI OP_61 OPE4_0 "Load signed byte, update") 5289 (conditional-load-gr-u cldubu UQI OP_61 OPE4_1 "Load unsigned byte, update") 5290 (conditional-load-gr-u cldshu HI OP_61 OPE4_2 "Load signed half, update") 5291 (conditional-load-gr-u clduhu UHI OP_61 OPE4_3 "Load unsigned half, update") 5292 (conditional-load-gr-u cldu SI OP_62 OPE4_0 "Load word, update") 5293 5294 (define-pmacro (conditional-load-non-gr-u name mode op ope regtype comment) 5295 (dni name 5296 (comment) 5297 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5298 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS) 5299 (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond") 5300 (+ pack (.sym regtype k) op GRi CCi cond ope GRj) 5301 (if (eq CCi (or cond 2)) 5302 (sequence ((WI address)) 5303 (set address (add GRi GRj)) 5304 (set (.sym regtype k) 5305 (c-call mode (.str "@cpu@_read_mem_" mode) 5306 pc address)) 5307 (set GRi address))) 5308 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 5309 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 5310 ) 5311 ) 5312 5313 (conditional-load-non-gr-u cldbfu UQI OP_63 OPE4_0 FRint "Load byte float, update") 5314 (conditional-load-non-gr-u cldhfu UHI OP_63 OPE4_1 FRint "Load half float, update") 5315 (conditional-load-non-gr-u cldfu SI OP_63 OPE4_2 FRint "Load word float, update") 5316 5317 5318 (dni clddu 5319 "Load double word, update" 5320 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5321 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL) 5322 "clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond" 5323 (+ pack GRdoublek OP_62 GRi CCi cond OPE4_1 GRj) 5324 (if (eq CCi (or cond 2)) 5325 (sequence ((WI address)) 5326 (load-double-semantics 0 DI GR address GRj) 5327 (if (ne (index-of GRi) (index-of GRdoublek)) 5328 (set GRi address)))) 5329 ((fr400 (unit u-gr-load)) (fr450 (unit u-gr-load)) 5330 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) 5331 ) 5332 5333 (dni clddfu 5334 "Load double float, update" 5335 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) 5336 (FR400-MAJOR I-2) (FR450-MAJOR I-2) CONDITIONAL FR-ACCESS) 5337 "clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond" 5338 (+ pack FRdoublek OP_63 GRi CCi cond OPE4_3 GRj) 5339 (if (eq CCi (or cond 2)) 5340 (sequence ((WI address)) 5341 (load-double-semantics 1 DF FR address GRj) 5342 (set GRi address))) 5343 ((fr400 (unit u-fr-load)) (fr450 (unit u-fr-load)) 5344 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) 5345 ) 5346 5347 (dni cldqu 5348 "conditional load quad integer and update index" 5349 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL) 5350 "cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond" 5351 (+ pack GRk OP_62 GRi CCi cond OPE4_2 GRj) 5352 (if (eq CCi (or cond 2)) 5353 (sequence ((WI address)) 5354 (load-quad-semantics GR address GRj) 5355 (if (ne (index-of GRi) (index-of GRk)) 5356 (set GRi address)))) 5357 ((fr500 (unit u-gr-load))) 5358 ) 5359 5360 (define-pmacro (conditional-store name mode op ope regtype profile comment) 5361 (dni name 5362 (comment) 5363 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5364 (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL) 5365 (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond") 5366 (+ pack (.sym regtype k) op GRi CCi cond ope GRj) 5367 (if (eq CCi (or cond 2)) 5368 (c-call VOID (.str "@cpu@_write_mem_" mode) 5369 pc (add GRi GRj) (.sym regtype k))) 5370 profile 5371 ) 5372 ) 5373 5374 (conditional-store cstb QI OP_64 OPE4_0 GR 5375 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5376 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5377 "Store unsigned byte") 5378 (conditional-store csth HI OP_64 OPE4_1 GR 5379 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5380 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5381 "Store unsigned half") 5382 (conditional-store cst SI OP_64 OPE4_2 GR 5383 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5384 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5385 "Store word") 5386 5387 (conditional-store cstbf QI OP_66 OPE4_0 FRint 5388 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5389 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5390 "Store byte float") 5391 (conditional-store csthf HI OP_66 OPE4_1 FRint 5392 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5393 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5394 "Store half float") 5395 (conditional-store cstf SI OP_66 OPE4_2 FRint 5396 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5397 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5398 "Store word float") 5399 5400 (define-pmacro (conditional-store-double 5401 name mode op ope regtype attr profile comment) 5402 (dni name 5403 (comment) 5404 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5405 (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr) 5406 (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond") 5407 (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj) 5408 (if (eq CCi (or cond 2)) 5409 (sequence ((WI address)) 5410 (store-double-semantics mode regtype address GRj))) 5411 profile 5412 ) 5413 ) 5414 5415 (conditional-store-double cstd DI OP_64 OPE4_3 GR NA 5416 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5417 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5418 "Store double word") 5419 (conditional-store-double cstdf DF OP_66 OPE4_3 FR FR-ACCESS 5420 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5421 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5422 "Store double float") 5423 5424 (dni cstq 5425 "conditionally store quad word" 5426 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) CONDITIONAL) 5427 "cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond" 5428 (+ pack GRk OP_65 GRi CCi cond OPE4_0 GRj) 5429 (if (eq CCi (or cond 2)) 5430 (sequence ((WI address)) 5431 (store-quad-semantics GR address GRj))) 5432 ((fr500 (unit u-gr-store))) 5433 ) 5434 5435 (define-pmacro (conditional-store-u 5436 name mode op ope regtype attr profile comment) 5437 (dni name 5438 (comment) 5439 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5440 (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr) 5441 (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond") 5442 (+ pack (.sym regtype k) op GRi CCi cond ope GRj) 5443 (if (eq CCi (or cond 2)) 5444 (sequence ((WI address)) 5445 (set address (add GRi GRj)) 5446 (c-call VOID (.str "@cpu@_write_mem_" mode) 5447 pc address (.sym regtype k)) 5448 (set GRi address))) 5449 profile 5450 ) 5451 ) 5452 5453 (conditional-store-u cstbu QI OP_67 OPE4_0 GR NA 5454 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5455 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5456 "Store unsigned byte, update index") 5457 (conditional-store-u csthu HI OP_67 OPE4_1 GR NA 5458 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5459 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5460 "Store unsigned half, update index") 5461 (conditional-store-u cstu SI OP_67 OPE4_2 GR NA 5462 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5463 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5464 "Store word, update index") 5465 5466 (conditional-store-u cstbfu QI OP_68 OPE4_0 FRint FR-ACCESS 5467 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5468 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5469 "Store byte float, update index") 5470 (conditional-store-u csthfu HI OP_68 OPE4_1 FRint FR-ACCESS 5471 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5472 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5473 "Store half float, update index") 5474 (conditional-store-u cstfu SI OP_68 OPE4_2 FRint FR-ACCESS 5475 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5476 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5477 "Store word float, update index") 5478 5479 (define-pmacro (conditional-store-double-u 5480 name mode op ope regtype attr profile comment) 5481 (dni name 5482 (comment) 5483 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5484 (FR400-MAJOR I-3) (FR450-MAJOR I-3) CONDITIONAL attr) 5485 (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond") 5486 (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj) 5487 (if (eq CCi (or cond 2)) 5488 (sequence ((WI address)) 5489 (store-double-semantics mode regtype address GRj) 5490 (set GRi address))) 5491 profile 5492 ) 5493 ) 5494 5495 (conditional-store-double-u cstdu DI OP_67 OPE4_3 GR NA 5496 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5497 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5498 "Store double word, update index") 5499 (conditional-store-double-u cstdfu DF OP_68 OPE4_3 FR FR-ACCESS 5500 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5501 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5502 "Store double float, update index") 5503 5504 (define-pmacro (store-r-simm name mode op regtype attr profile comment) 5505 (dni name 5506 (comment) 5507 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5508 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 5509 (.str name "$pack $" regtype "k,@($GRi,$d12)") 5510 (+ pack (.sym regtype k) op GRi d12) 5511 (c-call VOID (.str "@cpu@_write_mem_" mode) 5512 pc (add GRi d12) (.sym regtype k)) 5513 profile 5514 ) 5515 ) 5516 5517 (store-r-simm stbi QI OP_50 GR NA 5518 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5519 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5520 "Store unsigned byte") 5521 (store-r-simm sthi HI OP_51 GR NA 5522 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5523 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5524 "Store unsigned half") 5525 (store-r-simm sti SI OP_52 GR NA 5526 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5527 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5528 "Store word") 5529 5530 (store-r-simm stbfi QI OP_4E FRint FR-ACCESS 5531 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5532 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5533 "Store byte float") 5534 (store-r-simm sthfi HI OP_4F FRint FR-ACCESS 5535 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5536 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5537 "Store half float") 5538 (store-r-simm stfi SI OP_55 FRint FR-ACCESS 5539 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5540 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5541 "Store word float") 5542 5543 (define-pmacro (store-double-r-simm name mode op regtype attr profile comment) 5544 (dni name 5545 (comment) 5546 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) 5547 (FR400-MAJOR I-3) (FR450-MAJOR I-3) attr) 5548 (.str name "$pack $" regtype "doublek,@($GRi,$d12)") 5549 (+ pack (.sym regtype doublek) op GRi d12) 5550 (sequence ((WI address)) 5551 (store-double-semantics mode regtype address d12)) 5552 profile 5553 ) 5554 ) 5555 5556 (store-double-r-simm stdi DI OP_53 GR NA 5557 ((fr400 (unit u-gr-store)) (fr450 (unit u-gr-store)) 5558 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store))) 5559 "Store double word") 5560 (store-double-r-simm stdfi DF OP_56 FR FR-ACCESS 5561 ((fr400 (unit u-fr-store)) (fr450 (unit u-fr-store)) 5562 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store))) 5563 "Store double float") 5564 5565 (define-pmacro (store-quad-r-simm name op regtype attr profile comment) 5566 (dni name 5567 (comment) 5568 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr) 5569 (.str name "$pack $" regtype "k,@($GRi,$d12)") 5570 (+ pack (.sym regtype k) op GRi d12) 5571 (sequence ((WI address)) 5572 (store-quad-semantics regtype address d12)) 5573 profile 5574 ) 5575 ) 5576 5577 (store-quad-r-simm stqi OP_54 GR NA ((fr500 (unit u-gr-store))) 5578 "Store quad word") 5579 (store-quad-r-simm stqfi OP_57 FRint FR-ACCESS () 5580 "Store quad float") 5581 5582 (define-pmacro (swap-semantics base offset arg) 5583 (sequence ((WI tmp) (WI address)) 5584 (set tmp arg) 5585 (set address (add base offset)) 5586 (c-call VOID "@cpu@_check_swap_address" address) 5587 (set arg (c-call WI "@cpu@_read_mem_WI" pc address)) 5588 (c-call VOID "@cpu@_write_mem_WI" pc address tmp)) 5589 ) 5590 5591 (dni swap 5592 "Swap contents of memory with GR" 5593 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 5594 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 5595 "swap$pack @($GRi,$GRj),$GRk" 5596 (+ pack GRk OP_03 GRi OPE1_05 GRj) 5597 (swap-semantics GRi GRj GRk) 5598 ((fr400 (unit u-swap)) (fr450 (unit u-swap)) 5599 (fr500 (unit u-swap)) (fr550 (unit u-swap))) 5600 ) 5601 5602 (dni "swapi" 5603 "Swap contents of memory with GR" 5604 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 5605 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 5606 ("swapi$pack @($GRi,$d12),$GRk") 5607 (+ pack GRk OP_4D GRi d12) 5608 (swap-semantics GRi d12 GRk) 5609 ((fr400 (unit u-swap)) (fr450 (unit u-swap)) 5610 (fr500 (unit u-swap)) (fr550 (unit u-swap))) 5611 ) 5612 5613 (dni cswap 5614 "Conditionally swap contents of memory with GR" 5615 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 5616 (FR400-MAJOR C-2) (FR450-MAJOR C-2) CONDITIONAL) 5617 "cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond" 5618 (+ pack GRk OP_65 GRi CCi cond OPE4_2 GRj) 5619 (if (eq CCi (or cond 2)) 5620 (swap-semantics GRi GRj GRk)) 5621 ((fr400 (unit u-swap)) (fr450 (unit u-swap)) 5622 (fr500 (unit u-swap)) (fr550 (unit u-swap))) 5623 ) 5624 5625 (define-pmacro (register-transfer 5626 name op ope reg_src reg_targ pipe attrs profile comment) 5627 (dni name 5628 (comment) 5629 (.splice (UNIT pipe) (.unsplice attrs)) 5630 (.str name "$pack $" reg_src ",$" reg_targ) 5631 (+ pack reg_targ op (rs-null) ope reg_src) 5632 (set reg_targ reg_src) 5633 profile 5634 ) 5635 ) 5636 5637 (register-transfer movgf OP_03 OPE1_15 5638 GRj FRintk I0 5639 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) 5640 (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) 5641 ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) 5642 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) 5643 "transfer gr to fr") 5644 (register-transfer movfg OP_03 OPE1_0D 5645 FRintk GRj I0 5646 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) 5647 (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) 5648 ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) 5649 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) 5650 "transfer fr to gr") 5651 5652 (define-pmacro (nextreg hw r offset) (reg hw (add (index-of r) offset))) 5653 5654 (define-pmacro (register-transfer-double-from-gr-semantics cond) 5655 (if cond 5656 (if (eq (index-of GRj) 0) 5657 (sequence () 5658 (set FRintk 0) 5659 (set (nextreg h-fr_int FRintk 1) 0)) 5660 (sequence () 5661 (set FRintk GRj) 5662 (set (nextreg h-fr_int FRintk 1) (nextreg h-gr GRj 1))))) 5663 ) 5664 5665 (dni movgfd 5666 "move GR for FR double" 5667 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) 5668 (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) 5669 "movgfd$pack $GRj,$FRintk" 5670 (+ pack FRintk OP_03 (rs-null) OPE1_16 GRj) 5671 (register-transfer-double-from-gr-semantics 1) 5672 ; TODO -- doesn't handle second register in the pair 5673 ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) 5674 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) 5675 ) 5676 5677 (define-pmacro (register-transfer-double-to-gr-semantics cond) 5678 (if (andif (ne (index-of GRj) 0) cond) 5679 (sequence () 5680 (set GRj FRintk) 5681 (set (nextreg h-gr GRj 1) (nextreg h-fr_int FRintk 1)))) 5682 ) 5683 5684 (dni movfgd 5685 "move FR for GR double" 5686 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) 5687 (FR400-MAJOR I-4) (FR450-MAJOR I-4) FR-ACCESS) 5688 "movfgd$pack $FRintk,$GRj" 5689 (+ pack FRintk OP_03 (rs-null) OPE1_0E GRj) 5690 (register-transfer-double-to-gr-semantics 1) 5691 ; TODO -- doesn't handle second register in the pair 5692 ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) 5693 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) 5694 ) 5695 5696 (dni movgfq 5697 "move GR for FR quad" 5698 ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS) 5699 "movgfq$pack $GRj,$FRintk" 5700 (+ pack FRintk OP_03 (rs-null) OPE1_17 GRj) 5701 (if (eq (index-of GRj) 0) 5702 (sequence () 5703 (set FRintk 0) 5704 (set (reg h-fr_int (add (index-of FRintk) 1)) 0) 5705 (set (reg h-fr_int (add (index-of FRintk) 2)) 0) 5706 (set (reg h-fr_int (add (index-of FRintk) 3)) 0)) 5707 (sequence () 5708 (set FRintk GRj) 5709 (set (reg h-fr_int (add (index-of FRintk) 1)) 5710 (reg h-gr (add (index-of GRj) 1))) 5711 (set (reg h-fr_int (add (index-of FRintk) 2)) 5712 (reg h-gr (add (index-of GRj) 2))) 5713 (set (reg h-fr_int (add (index-of FRintk) 3)) 5714 (reg h-gr (add (index-of GRj) 3))))) 5715 () 5716 ) 5717 5718 (dni movfgq 5719 "move FR for GR quad" 5720 ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS) 5721 "movfgq$pack $FRintk,$GRj" 5722 (+ pack FRintk OP_03 (rs-null) OPE1_0F GRj) 5723 (if (ne (index-of GRj) 0) 5724 (sequence () 5725 (set GRj FRintk) 5726 (set (reg h-gr (add (index-of GRj) 1)) 5727 (reg h-fr_int (add (index-of FRintk) 1))) 5728 (set (reg h-gr (add (index-of GRj) 2)) 5729 (reg h-fr_int (add (index-of FRintk) 2))) 5730 (set (reg h-gr (add (index-of GRj) 3)) 5731 (reg h-fr_int (add (index-of FRintk) 3))))) 5732 () 5733 ) 5734 5735 (define-pmacro (conditional-register-transfer 5736 name op ope reg_src reg_targ pipe attrs profile comment) 5737 (dni name 5738 (comment) 5739 (.splice (UNIT pipe) CONDITIONAL FR-ACCESS (.unsplice attrs)) 5740 (.str name "$pack $" reg_src ",$" reg_targ ",$CCi,$cond") 5741 (+ pack reg_targ op (rs-null) CCi cond ope reg_src) 5742 (if (eq CCi (or cond 2)) 5743 (set reg_targ reg_src)) 5744 profile 5745 ) 5746 ) 5747 5748 (conditional-register-transfer cmovgf OP_69 OPE4_0 GRj FRintk I0 5749 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) 5750 (FR400-MAJOR I-4) (FR450-MAJOR I-4)) 5751 ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) 5752 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) 5753 "transfer gr to fr") 5754 (conditional-register-transfer cmovfg OP_69 OPE4_2 FRintk GRj I0 5755 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) 5756 (FR400-MAJOR I-4) (FR450-MAJOR I-4)) 5757 ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) 5758 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) 5759 "transfer fr to gr") 5760 5761 5762 (dni cmovgfd 5763 "Conditional move GR to FR double" 5764 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) 5765 (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS) 5766 "cmovgfd$pack $GRj,$FRintk,$CCi,$cond" 5767 (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_1 GRj) 5768 (register-transfer-double-from-gr-semantics (eq CCi (or cond 2))) 5769 ; TODO -- doesn't handle extra registers in double 5770 ((fr400 (unit u-gr2fr)) (fr450 (unit u-gr2fr)) 5771 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr))) 5772 ) 5773 5774 (dni cmovfgd 5775 "Conditional move FR to GR double" 5776 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) 5777 (FR400-MAJOR I-4) (FR450-MAJOR I-4) CONDITIONAL FR-ACCESS) 5778 "cmovfgd$pack $FRintk,$GRj,$CCi,$cond" 5779 (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_3 GRj) 5780 (register-transfer-double-to-gr-semantics (eq CCi (or cond 2))) 5781 ; TODO -- doesn't handle second register in the pair 5782 ((fr400 (unit u-fr2gr)) (fr450 (unit u-fr2gr)) 5783 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr))) 5784 ) 5785 5786 (define-pmacro (register-transfer-spr 5787 name op ope reg_src reg_targ unitname comment) 5788 (dni name 5789 (comment) 5790 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 5791 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 5792 (.str name "$pack $" reg_src ",$" reg_targ) 5793 (+ pack reg_targ op ope reg_src) 5794 (set reg_targ reg_src) 5795 ((fr400 (unit unitname)) (fr450 (unit unitname)) 5796 (fr500 (unit unitname)) (fr550 (unit unitname))) 5797 ) 5798 ) 5799 5800 (register-transfer-spr movgs OP_03 OPE1_06 GRj spr u-gr2spr "transfer gr->spr") 5801 (register-transfer-spr movsg OP_03 OPE1_07 spr GRj u-spr2gr "transfer spr->gr") 5802 5803 ; Integer Branch Conditions 5804 (define-pmacro (Inev cc) (const BI 0)) 5805 (define-pmacro (Ira cc) (const BI 1)) 5806 (define-pmacro (Ieq cc) ( zbit cc)) 5807 (define-pmacro (Ine cc) (not (zbit cc))) 5808 (define-pmacro (Ile cc) ( orif (zbit cc) (xor (nbit cc) (vbit cc)))) 5809 (define-pmacro (Igt cc) (not (orif (zbit cc) (xor (nbit cc) (vbit cc))))) 5810 (define-pmacro (Ilt cc) ( xor (nbit cc) (vbit cc))) 5811 (define-pmacro (Ige cc) (not (xor (nbit cc) (vbit cc)))) 5812 (define-pmacro (Ils cc) ( orif (cbit cc) (zbit cc))) 5813 (define-pmacro (Ihi cc) (not (orif (cbit cc) (zbit cc)))) 5814 (define-pmacro (Ic cc) ( cbit cc)) 5815 (define-pmacro (Inc cc) (not (cbit cc))) 5816 (define-pmacro (In cc) ( nbit cc)) 5817 (define-pmacro (Ip cc) (not (nbit cc))) 5818 (define-pmacro (Iv cc) ( vbit cc)) 5819 (define-pmacro (Inv cc) (not (vbit cc))) 5820 5821 ; Float Branch Conditions 5822 (define-pmacro (Fnev cc) (const BI 0)) 5823 (define-pmacro (Fra cc) (const BI 1)) 5824 (define-pmacro (Fne cc) (orif (lbit cc) (orif (gbit cc) (ubit cc)))) 5825 (define-pmacro (Feq cc) (ebit cc)) 5826 (define-pmacro (Flg cc) (orif (lbit cc) (gbit cc))) 5827 (define-pmacro (Fue cc) (orif (ebit cc) (ubit cc))) 5828 (define-pmacro (Ful cc) (orif (lbit cc) (ubit cc))) 5829 (define-pmacro (Fge cc) (orif (ebit cc) (gbit cc))) 5830 (define-pmacro (Flt cc) (lbit cc)) 5831 (define-pmacro (Fuge cc) (orif (ebit cc) (orif (gbit cc) (ubit cc)))) 5832 (define-pmacro (Fug cc) (orif (gbit cc) (ubit cc))) 5833 (define-pmacro (Fle cc) (orif (ebit cc) (lbit cc))) 5834 (define-pmacro (Fgt cc) (gbit cc)) 5835 (define-pmacro (Fule cc) (orif (ebit cc) (orif (lbit cc) (ubit cc)))) 5836 (define-pmacro (Fu cc) (ubit cc)) 5837 (define-pmacro (Fo cc) (orif (ebit cc) (orif (lbit cc) (gbit cc)))) 5838 5839 (define-pmacro (conditional-branch-i prefix cc op cond comment) 5840 (dni (.sym prefix cc) 5841 (comment) 5842 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5843 (FR400-MAJOR B-1) (FR450-MAJOR B-1)) 5844 (.str (.sym prefix cc) "$pack $ICCi_2,$hint,$label16") 5845 (+ pack (.sym ICC_ cc) ICCi_2 op hint label16) 5846 (sequence () 5847 (c-call VOID "@cpu@_model_branch" label16 hint) 5848 (if (cond ICCi_2) 5849 (set pc label16))) 5850 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5851 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5852 ) 5853 ) 5854 5855 (dni bra 5856 "integer branch equal" 5857 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5858 (FR400-MAJOR B-1) (FR450-MAJOR B-1)) 5859 "bra$pack $hint_taken$label16" 5860 (+ pack ICC_ra (ICCi_2-null) OP_06 hint_taken label16) 5861 (sequence () 5862 (c-call VOID "@cpu@_model_branch" label16 hint_taken) 5863 (set pc label16)) 5864 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5865 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5866 ) 5867 5868 (dni bno 5869 "integer branch never" 5870 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5871 (FR400-MAJOR B-1) (FR450-MAJOR B-1)) 5872 "bno$pack$hint_not_taken" 5873 (+ pack ICC_nev (ICCi_2-null) OP_06 hint_not_taken (label16-null)) 5874 (c-call VOID "@cpu@_model_branch" label16 hint_not_taken) 5875 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5876 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5877 ) 5878 5879 (conditional-branch-i b eq OP_06 Ieq "integer branch equal") 5880 (conditional-branch-i b ne OP_06 Ine "integer branch not equal") 5881 (conditional-branch-i b le OP_06 Ile "integer branch less or equal") 5882 (conditional-branch-i b gt OP_06 Igt "integer branch greater") 5883 (conditional-branch-i b lt OP_06 Ilt "integer branch less") 5884 (conditional-branch-i b ge OP_06 Ige "integer branch greater or equal") 5885 (conditional-branch-i b ls OP_06 Ils "integer branch less or equal unsigned") 5886 (conditional-branch-i b hi OP_06 Ihi "integer branch greater unsigned") 5887 (conditional-branch-i b c OP_06 Ic "integer branch carry set") 5888 (conditional-branch-i b nc OP_06 Inc "integer branch carry clear") 5889 (conditional-branch-i b n OP_06 In "integer branch negative") 5890 (conditional-branch-i b p OP_06 Ip "integer branch positive") 5891 (conditional-branch-i b v OP_06 Iv "integer branch overflow set") 5892 (conditional-branch-i b nv OP_06 Inv "integer branch overflow clear") 5893 5894 (define-pmacro (conditional-branch-f prefix cc op cond comment) 5895 (dni (.sym prefix cc) 5896 (comment) 5897 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5898 (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS) 5899 (.str (.sym prefix cc) "$pack $FCCi_2,$hint,$label16") 5900 (+ pack (.sym FCC_ cc) FCCi_2 op hint label16) 5901 (sequence () 5902 (c-call VOID "@cpu@_model_branch" label16 hint) 5903 (if (cond FCCi_2) (set pc label16))) 5904 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5905 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5906 ) 5907 ) 5908 5909 (dni fbra 5910 "float branch equal" 5911 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5912 (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS) 5913 "fbra$pack $hint_taken$label16" 5914 (+ pack FCC_ra (FCCi_2-null) OP_07 hint_taken label16) 5915 (sequence () 5916 (c-call VOID "@cpu@_model_branch" label16 hint_taken) 5917 (set pc label16)) 5918 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5919 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5920 ) 5921 5922 (dni fbno 5923 "float branch never" 5924 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) 5925 (FR400-MAJOR B-1) (FR450-MAJOR B-1) FR-ACCESS) 5926 "fbno$pack$hint_not_taken" 5927 (+ pack FCC_nev (FCCi_2-null) OP_07 hint_not_taken (label16-null)) 5928 (c-call VOID "@cpu@_model_branch" label16 hint_not_taken) 5929 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5930 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5931 ) 5932 5933 (conditional-branch-f fb ne OP_07 Fne "float branch not equal") 5934 (conditional-branch-f fb eq OP_07 Feq "float branch equal") 5935 (conditional-branch-f fb lg OP_07 Flg "float branch less or greater") 5936 (conditional-branch-f fb ue OP_07 Fue "float branch unordered or equal") 5937 (conditional-branch-f fb ul OP_07 Ful "float branch unordered or less") 5938 (conditional-branch-f fb ge OP_07 Fge "float branch greater or equal") 5939 (conditional-branch-f fb lt OP_07 Flt "float branch less") 5940 (conditional-branch-f fb uge OP_07 Fuge "float branch unordered, greater,equal") 5941 (conditional-branch-f fb ug OP_07 Fug "float branch unordered or greater") 5942 (conditional-branch-f fb le OP_07 Fle "float branch less or equal") 5943 (conditional-branch-f fb gt OP_07 Fgt "float branch greater") 5944 (conditional-branch-f fb ule OP_07 Fule "float branch unordered, less or equal") 5945 (conditional-branch-f fb u OP_07 Fu "float branch unordered") 5946 (conditional-branch-f fb o OP_07 Fo "float branch ordered") 5947 5948 (define-pmacro (ctrlr-branch-semantics cond ccond) 5949 (sequence ((SI tmp)) 5950 (set tmp (sub (spr-lcr) 1)) 5951 (set (spr-lcr) tmp) 5952 (if cond 5953 (if (eq ccond 0) 5954 (if (ne tmp 0) 5955 (set pc (spr-lr))) 5956 (if (eq tmp 0) 5957 (set pc (spr-lr)))))) 5958 ) 5959 5960 (dni bctrlr 5961 "LCR conditional branch to lr" 5962 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 5963 (FR400-MAJOR B-2) (FR450-MAJOR B-2)) 5964 ("bctrlr$pack $ccond,$hint") 5965 (+ pack (cond-null) (ICCi_2-null) OP_0E hint OPE3_01 ccond (s12-null)) 5966 (sequence () 5967 (c-call VOID "@cpu@_model_branch" (spr-lr) hint) 5968 (ctrlr-branch-semantics (const BI 1) ccond)) 5969 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5970 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5971 ) 5972 5973 (define-pmacro (conditional-branch-cclr prefix cc i-f op ope cond attr comment) 5974 (dni (.sym prefix cc lr) 5975 (comment) 5976 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) 5977 (FR400-MAJOR B-3) (FR450-MAJOR B-3) attr) 5978 (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$hint") 5979 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope 5980 (ccond-null) (s12-null)) 5981 (sequence () 5982 (c-call VOID "@cpu@_model_branch" (spr-lr) hint) 5983 (if (cond (.sym i-f CCi_2)) (set pc (spr-lr)))) 5984 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5985 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 5986 ) 5987 ) 5988 5989 (dni bralr 5990 "integer cclr branch always" 5991 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) 5992 (FR400-MAJOR B-3) (FR450-MAJOR B-3)) 5993 "bralr$pack$hint_taken" 5994 (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_02 (ccond-null) (s12-null)) 5995 (sequence () 5996 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) 5997 (set pc (spr-lr))) 5998 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 5999 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6000 ) 6001 6002 (dni bnolr 6003 "integer cclr branch never" 6004 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) 6005 (FR400-MAJOR B-3) (FR450-MAJOR B-3)) 6006 "bnolr$pack$hint_not_taken" 6007 (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_02 (ccond-null) (s12-null)) 6008 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) 6009 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6010 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6011 ) 6012 6013 (conditional-branch-cclr b eq I OP_0E OPE3_02 Ieq NA "integer cclr branch equal") 6014 (conditional-branch-cclr b ne I OP_0E OPE3_02 Ine NA "integer cclr branch not equal") 6015 (conditional-branch-cclr b le I OP_0E OPE3_02 Ile NA "integer cclr branch less or equal") 6016 (conditional-branch-cclr b gt I OP_0E OPE3_02 Igt NA "integer cclr branch greater") 6017 (conditional-branch-cclr b lt I OP_0E OPE3_02 Ilt NA "integer cclr branch less") 6018 (conditional-branch-cclr b ge I OP_0E OPE3_02 Ige NA "integer cclr branch greater or equal") 6019 (conditional-branch-cclr b ls I OP_0E OPE3_02 Ils NA "integer cclr branch less or equal unsigned") 6020 (conditional-branch-cclr b hi I OP_0E OPE3_02 Ihi NA "integer cclr branch greater unsigned") 6021 (conditional-branch-cclr b c I OP_0E OPE3_02 Ic NA "integer cclr branch carry set") 6022 (conditional-branch-cclr b nc I OP_0E OPE3_02 Inc NA "integer cclr branch carry clear") 6023 (conditional-branch-cclr b n I OP_0E OPE3_02 In NA "integer cclr branch negative") 6024 (conditional-branch-cclr b p I OP_0E OPE3_02 Ip NA "integer cclr branch positive") 6025 (conditional-branch-cclr b v I OP_0E OPE3_02 Iv NA "integer cclr branch overflow set") 6026 (conditional-branch-cclr b nv I OP_0E OPE3_02 Inv NA "integer cclr branch overflow clear") 6027 6028 (dni fbralr 6029 "float cclr branch always" 6030 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) 6031 (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS) 6032 "fbralr$pack$hint_taken" 6033 (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_06 (ccond-null) (s12-null)) 6034 (sequence () 6035 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) 6036 (set pc (spr-lr))) 6037 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6038 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6039 ) 6040 6041 (dni fbnolr 6042 "float cclr branch never" 6043 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) 6044 (FR400-MAJOR B-3) (FR450-MAJOR B-3) FR-ACCESS) 6045 "fbnolr$pack$hint_not_taken" 6046 (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_06 (ccond-null) (s12-null)) 6047 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) 6048 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6049 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6050 ) 6051 6052 (conditional-branch-cclr fb eq F OP_0E OPE3_06 Feq FR-ACCESS "float cclr branch equal") 6053 (conditional-branch-cclr fb ne F OP_0E OPE3_06 Fne FR-ACCESS "float cclr branch not equal") 6054 (conditional-branch-cclr fb lg F OP_0E OPE3_06 Flg FR-ACCESS "float branch less or greater") 6055 (conditional-branch-cclr fb ue F OP_0E OPE3_06 Fue FR-ACCESS "float branch unordered or equal") 6056 (conditional-branch-cclr fb ul F OP_0E OPE3_06 Ful FR-ACCESS "float branch unordered or less") 6057 (conditional-branch-cclr fb ge F OP_0E OPE3_06 Fge FR-ACCESS "float branch greater or equal") 6058 (conditional-branch-cclr fb lt F OP_0E OPE3_06 Flt FR-ACCESS "float branch less") 6059 (conditional-branch-cclr fb uge F OP_0E OPE3_06 Fuge FR-ACCESS "float branch unordered, greater, equal") 6060 (conditional-branch-cclr fb ug F OP_0E OPE3_06 Fug FR-ACCESS "float branch unordered or greater") 6061 (conditional-branch-cclr fb le F OP_0E OPE3_06 Fle FR-ACCESS "float branch less or equal") 6062 (conditional-branch-cclr fb gt F OP_0E OPE3_06 Fgt FR-ACCESS "float branch greater") 6063 (conditional-branch-cclr fb ule F OP_0E OPE3_06 Fule FR-ACCESS "float branch unordered, less or equal") 6064 (conditional-branch-cclr fb u F OP_0E OPE3_06 Fu FR-ACCESS "float branch unordered") 6065 (conditional-branch-cclr fb o F OP_0E OPE3_06 Fo FR-ACCESS "float branch ordered") 6066 6067 (define-pmacro (conditional-branch-ctrlr prefix cc i-f op ope cond attr comment) 6068 (dni (.sym prefix cc lr) 6069 (comment) 6070 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 6071 (FR400-MAJOR B-2) (FR450-MAJOR B-2) attr) 6072 (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$ccond,$hint") 6073 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope ccond (s12-null)) 6074 (sequence () 6075 (c-call VOID "@cpu@_model_branch" (spr-lr) hint) 6076 (ctrlr-branch-semantics (cond (.sym i-f CCi_2)) ccond)) 6077 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6078 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6079 ) 6080 ) 6081 6082 (dni bcralr 6083 "integer ctrlr branch always" 6084 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 6085 (FR400-MAJOR B-2) (FR450-MAJOR B-2)) 6086 "bcralr$pack $ccond$hint_taken" 6087 (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_03 ccond (s12-null)) 6088 (sequence () 6089 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) 6090 (ctrlr-branch-semantics (const BI 1) ccond)) 6091 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6092 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6093 ) 6094 6095 (dni bcnolr 6096 "integer ctrlr branch never" 6097 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 6098 (FR400-MAJOR B-2) (FR450-MAJOR B-2)) 6099 "bcnolr$pack$hint_not_taken" 6100 (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_03 (ccond-null) (s12-null)) 6101 (sequence () 6102 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) 6103 (ctrlr-branch-semantics (const BI 0) ccond)) 6104 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6105 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6106 ) 6107 6108 (conditional-branch-ctrlr bc eq I OP_0E OPE3_03 Ieq NA "integer ctrlr branch equal") 6109 (conditional-branch-ctrlr bc ne I OP_0E OPE3_03 Ine NA "integer ctrlr branch not equal") 6110 (conditional-branch-ctrlr bc le I OP_0E OPE3_03 Ile NA "integer ctrlr branch less equal") 6111 (conditional-branch-ctrlr bc gt I OP_0E OPE3_03 Igt NA "integer ctrlr branch greater") 6112 (conditional-branch-ctrlr bc lt I OP_0E OPE3_03 Ilt NA "integer ctrlr branch less") 6113 (conditional-branch-ctrlr bc ge I OP_0E OPE3_03 Ige NA "integer ctrlr branch greater equal") 6114 (conditional-branch-ctrlr bc ls I OP_0E OPE3_03 Ils NA "integer ctrlr branch less equal unsigned") 6115 (conditional-branch-ctrlr bc hi I OP_0E OPE3_03 Ihi NA "integer ctrlr branch greater unsigned") 6116 (conditional-branch-ctrlr bc c I OP_0E OPE3_03 Ic NA "integer ctrlr branch carry set") 6117 (conditional-branch-ctrlr bc nc I OP_0E OPE3_03 Inc NA "integer ctrlr branch carry clear") 6118 (conditional-branch-ctrlr bc n I OP_0E OPE3_03 In NA "integer ctrlr branch negative") 6119 (conditional-branch-ctrlr bc p I OP_0E OPE3_03 Ip NA "integer ctrlr branch positive") 6120 (conditional-branch-ctrlr bc v I OP_0E OPE3_03 Iv NA "integer ctrlr branch overflow set") 6121 (conditional-branch-ctrlr bc nv I OP_0E OPE3_03 Inv NA "integer ctrlr branch overflow clear") 6122 6123 (dni fcbralr 6124 "float ctrlr branch always" 6125 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 6126 (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS) 6127 "fcbralr$pack $ccond$hint_taken" 6128 (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_07 ccond (s12-null)) 6129 (sequence () 6130 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken) 6131 (ctrlr-branch-semantics (const BI 1) ccond)) 6132 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6133 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6134 ) 6135 6136 (dni fcbnolr 6137 "float ctrlr branch never" 6138 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) 6139 (FR400-MAJOR B-2) (FR450-MAJOR B-2) FR-ACCESS) 6140 "fcbnolr$pack$hint_not_taken" 6141 (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_07 (ccond-null) (s12-null)) 6142 (sequence () 6143 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken) 6144 (ctrlr-branch-semantics (const BI 0) ccond)) 6145 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6146 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6147 ) 6148 6149 (conditional-branch-ctrlr fcb eq F OP_0E OPE3_07 Feq FR-ACCESS "float cclr branch equal") 6150 (conditional-branch-ctrlr fcb ne F OP_0E OPE3_07 Fne FR-ACCESS "float cclr branch not equal") 6151 (conditional-branch-ctrlr fcb lg F OP_0E OPE3_07 Flg FR-ACCESS "float branch less or greater") 6152 (conditional-branch-ctrlr fcb ue F OP_0E OPE3_07 Fue FR-ACCESS "float branch unordered or equal") 6153 (conditional-branch-ctrlr fcb ul F OP_0E OPE3_07 Ful FR-ACCESS "float branch unordered or less") 6154 (conditional-branch-ctrlr fcb ge F OP_0E OPE3_07 Fge FR-ACCESS "float branch greater or equal") 6155 (conditional-branch-ctrlr fcb lt F OP_0E OPE3_07 Flt FR-ACCESS "float branch less") 6156 (conditional-branch-ctrlr fcb uge F OP_0E OPE3_07 Fuge FR-ACCESS "float branch unordered, greater, equal") 6157 (conditional-branch-ctrlr fcb ug F OP_0E OPE3_07 Fug FR-ACCESS "float branch unordered or greater") 6158 (conditional-branch-ctrlr fcb le F OP_0E OPE3_07 Fle FR-ACCESS "float branch less or equal") 6159 (conditional-branch-ctrlr fcb gt F OP_0E OPE3_07 Fgt FR-ACCESS "float branch greater") 6160 (conditional-branch-ctrlr fcb ule F OP_0E OPE3_07 Fule FR-ACCESS "float branch unordered, less or equal") 6161 (conditional-branch-ctrlr fcb u F OP_0E OPE3_07 Fu FR-ACCESS "float branch unordered") 6162 (conditional-branch-ctrlr fcb o F OP_0E OPE3_07 Fo FR-ACCESS "float branch ordered") 6163 6164 (define-pmacro (jump-and-link-semantics base offset LI) 6165 (sequence () 6166 (if (eq LI 1) 6167 (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1)) 6168 ; Target address gets aligned here 6169 (set pc (and (add base offset) #xfffffffc)) 6170 (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken 6171 ) 6172 6173 (dni jmpl 6174 "jump and link" 6175 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6176 (FR400-MAJOR I-5) (FR450-MAJOR I-5)) 6177 "jmpl$pack @($GRi,$GRj)" 6178 (+ pack (misc-null-1) (LI-off) OP_0C GRi (misc-null-2) GRj) 6179 (jump-and-link-semantics GRi GRj LI) 6180 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6181 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6182 ) 6183 6184 (dann callann "call annotation" SI "call_annotation" "at") 6185 6186 (dni calll 6187 "call and link" 6188 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6189 (FR400-MAJOR I-5) (FR450-MAJOR I-5)) 6190 "calll$pack $callann($GRi,$GRj)" 6191 (+ pack (misc-null-1) (LI-on) OP_0C GRi (misc-null-2) GRj) 6192 (jump-and-link-semantics GRi GRj LI) 6193 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6194 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6195 ) 6196 6197 (dni jmpil 6198 "jump immediate and link" 6199 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6200 (FR400-MAJOR I-5) (FR450-MAJOR I-5)) 6201 "jmpil$pack @($GRi,$s12)" 6202 (+ pack (misc-null-1) (LI-off) OP_0D GRi s12) 6203 (jump-and-link-semantics GRi s12 LI) 6204 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6205 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6206 ) 6207 6208 (dni callil 6209 "call immediate and link" 6210 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6211 (FR400-MAJOR I-5) (FR450-MAJOR I-5)) 6212 "callil$pack @($GRi,$s12)" 6213 (+ pack (misc-null-1) (LI-on) OP_0D GRi s12) 6214 (jump-and-link-semantics GRi s12 LI) 6215 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6216 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6217 ) 6218 6219 (dni call 6220 "call and link" 6221 ((UNIT B0) (FR500-MAJOR B-4) (FR550-MAJOR B-4) 6222 (FR400-MAJOR B-4) (FR450-MAJOR B-4)) 6223 "call$pack $label24" 6224 (+ pack OP_0F label24) 6225 (sequence () 6226 (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1) 6227 (set pc label24) 6228 (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken 6229 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6230 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6231 ) 6232 6233 (dni rett 6234 "return from trap" 6235 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 6236 (FR400-MAJOR C-2) (FR450-MAJOR C-2) PRIVILEGED) 6237 "rett$pack $debug" 6238 (+ pack (misc-null-1) debug OP_05 (rs-null) (s12-null)) 6239 ; frv_rett handles operating vs user mode 6240 (sequence () 6241 (set pc (c-call UWI "frv_rett" pc debug)) 6242 (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken 6243 () 6244 ) 6245 6246 (dni rei 6247 "run exception instruction" 6248 ((UNIT C) (FR500-MAJOR C-1) (MACH frv) PRIVILEGED) 6249 "rei$pack $eir" 6250 (+ pack (rd-null) OP_37 eir (s12-null)) 6251 (nop) ; for now 6252 () 6253 ) 6254 6255 (define-pmacro (trap-semantics cond base offset) 6256 (if cond 6257 (sequence () 6258 ; This is defered to frv_itrap because for the breakpoint 6259 ; case we want to change as little of the machine state as 6260 ; possible. 6261 ; 6262 ; PCSR=PC 6263 ; PSR.PS=PSR.S 6264 ; PSR.ET=0 6265 ; if PSR.ESR==1 6266 ; SR0 through SR3=GR4 through GR7 6267 ; TBR.TT=0x80 + ((GRi + s12) & 0x7f) 6268 ; PC=TBR 6269 ; We still should indicate what is modified by this insn. 6270 (clobber (spr-pcsr)) 6271 (clobber psr_ps) 6272 (clobber psr_et) 6273 (clobber tbr_tt) 6274 (if (ne psr_esr (const 0)) 6275 (sequence () 6276 (clobber (spr-sr0)) 6277 (clobber (spr-sr1)) 6278 (clobber (spr-sr2)) 6279 (clobber (spr-sr3)))) 6280 ; frv_itrap handles operating vs user mode 6281 (c-call VOID "frv_itrap" pc base offset))) 6282 ) 6283 6284 (define-pmacro (trap-r prefix cc i-f op ope cond attr comment) 6285 (dni (.sym prefix cc) 6286 (comment) 6287 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6288 (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr) 6289 (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$GRj") 6290 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi (misc-null-3) ope GRj) 6291 (trap-semantics (cond (.sym i-f CCi_2)) GRi GRj) 6292 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6293 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6294 ) 6295 ) 6296 6297 (dni tra 6298 "integer trap always" 6299 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6300 (FR400-MAJOR C-1) (FR450-MAJOR C-1)) 6301 "tra$pack $GRi,$GRj" 6302 (+ pack ICC_ra (ICCi_2-null) OP_04 GRi (misc-null-3) OPE4_0 GRj) 6303 (trap-semantics (const BI 1) GRi GRj) 6304 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6305 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6306 ) 6307 6308 (dni tno 6309 "integer trap never" 6310 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6311 (FR400-MAJOR C-1) (FR450-MAJOR C-1)) 6312 "tno$pack" 6313 (+ pack ICC_nev (ICCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_0 (GRj-null)) 6314 (trap-semantics (const BI 0) GRi GRj) 6315 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6316 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6317 ) 6318 6319 (trap-r t eq I OP_04 OPE4_0 Ieq NA "integer trap equal") 6320 (trap-r t ne I OP_04 OPE4_0 Ine NA "integer trap not equal") 6321 (trap-r t le I OP_04 OPE4_0 Ile NA "integer trap less or equal") 6322 (trap-r t gt I OP_04 OPE4_0 Igt NA "integer trap greater") 6323 (trap-r t lt I OP_04 OPE4_0 Ilt NA "integer trap less") 6324 (trap-r t ge I OP_04 OPE4_0 Ige NA "integer trap greater or equal") 6325 (trap-r t ls I OP_04 OPE4_0 Ils NA "integer trap less or equal unsigned") 6326 (trap-r t hi I OP_04 OPE4_0 Ihi NA "integer trap greater unsigned") 6327 (trap-r t c I OP_04 OPE4_0 Ic NA "integer trap carry set") 6328 (trap-r t nc I OP_04 OPE4_0 Inc NA "integer trap carry clear") 6329 (trap-r t n I OP_04 OPE4_0 In NA "integer trap negative") 6330 (trap-r t p I OP_04 OPE4_0 Ip NA "integer trap positive") 6331 (trap-r t v I OP_04 OPE4_0 Iv NA "integer trap overflow set") 6332 (trap-r t nv I OP_04 OPE4_0 Inv NA "integer trap overflow clear") 6333 6334 (dni ftra 6335 "float trap always" 6336 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6337 (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) 6338 "ftra$pack $GRi,$GRj" 6339 (+ pack FCC_ra (FCCi_2-null) OP_04 GRi (misc-null-3) OPE4_1 GRj) 6340 (trap-semantics (const BI 1) GRi GRj) 6341 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6342 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6343 ) 6344 6345 (dni ftno 6346 "flost trap never" 6347 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6348 (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) 6349 "ftno$pack" 6350 (+ pack FCC_nev (FCCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_1 (GRj-null)) 6351 (trap-semantics (const BI 0) GRi GRj) 6352 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6353 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6354 ) 6355 6356 (trap-r ft ne F OP_04 OPE4_1 Fne FR-ACCESS "float trap not equal") 6357 (trap-r ft eq F OP_04 OPE4_1 Feq FR-ACCESS "float trap equal") 6358 (trap-r ft lg F OP_04 OPE4_1 Flg FR-ACCESS "float trap greater or less") 6359 (trap-r ft ue F OP_04 OPE4_1 Fue FR-ACCESS "float trap unordered or equal") 6360 (trap-r ft ul F OP_04 OPE4_1 Ful FR-ACCESS "float trap unordered or less") 6361 (trap-r ft ge F OP_04 OPE4_1 Fge FR-ACCESS "float trap greater or equal") 6362 (trap-r ft lt F OP_04 OPE4_1 Flt FR-ACCESS "float trap less") 6363 (trap-r ft uge F OP_04 OPE4_1 Fuge FR-ACCESS "float trap unordered greater or equal") 6364 (trap-r ft ug F OP_04 OPE4_1 Fug FR-ACCESS "float trap unordered or greater") 6365 (trap-r ft le F OP_04 OPE4_1 Fle FR-ACCESS "float trap less or equal") 6366 (trap-r ft gt F OP_04 OPE4_1 Fgt FR-ACCESS "float trap greater") 6367 (trap-r ft ule F OP_04 OPE4_1 Fule FR-ACCESS "float trap unordered less or equal") 6368 (trap-r ft u F OP_04 OPE4_1 Fu FR-ACCESS "float trap unordered") 6369 (trap-r ft o F OP_04 OPE4_1 Fo FR-ACCESS "float trap ordered") 6370 6371 (define-pmacro (trap-immed prefix cc i-f op cond attr comment) 6372 (dni (.sym prefix cc) 6373 (comment) 6374 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6375 (FR400-MAJOR C-1) (FR450-MAJOR C-1) attr) 6376 (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$s12") 6377 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi s12) 6378 (trap-semantics (cond (.sym i-f CCi_2)) GRi s12) 6379 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6380 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6381 ) 6382 ) 6383 6384 (dni tira 6385 "integer trap always" 6386 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6387 (FR400-MAJOR C-1) (FR450-MAJOR C-1)) 6388 "tira$pack $GRi,$s12" 6389 (+ pack ICC_ra (ICCi_2-null) OP_1C GRi s12) 6390 (trap-semantics (const BI 1) GRi s12) 6391 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6392 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6393 ) 6394 6395 (dni tino 6396 "integer trap never" 6397 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6398 (FR400-MAJOR C-1) (FR450-MAJOR C-1)) 6399 "tino$pack" 6400 (+ pack ICC_nev (ICCi_2-null) OP_1C (GRi-null) (s12-null)) 6401 (trap-semantics (const BI 0) GRi s12) 6402 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6403 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6404 ) 6405 6406 (trap-immed ti eq I OP_1C Ieq NA "integer trap equal") 6407 (trap-immed ti ne I OP_1C Ine NA "integer trap not equal") 6408 (trap-immed ti le I OP_1C Ile NA "integer trap less or equal") 6409 (trap-immed ti gt I OP_1C Igt NA "integer trap greater") 6410 (trap-immed ti lt I OP_1C Ilt NA "integer trap less") 6411 (trap-immed ti ge I OP_1C Ige NA "integer trap greater or equal") 6412 (trap-immed ti ls I OP_1C Ils NA "integer trap less or equal unsigned") 6413 (trap-immed ti hi I OP_1C Ihi NA "integer trap greater unsigned") 6414 (trap-immed ti c I OP_1C Ic NA "integer trap carry set") 6415 (trap-immed ti nc I OP_1C Inc NA "integer trap carry clear") 6416 (trap-immed ti n I OP_1C In NA "integer trap negative") 6417 (trap-immed ti p I OP_1C Ip NA "integer trap positive") 6418 (trap-immed ti v I OP_1C Iv NA "integer trap overflow set") 6419 (trap-immed ti nv I OP_1C Inv NA "integer trap overflow clear") 6420 6421 (dni ftira 6422 "float trap always" 6423 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6424 (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) 6425 "ftira$pack $GRi,$s12" 6426 (+ pack FCC_ra (ICCi_2-null) OP_1D GRi s12) 6427 (trap-semantics (const BI 1) GRi s12) 6428 ((fr400 (unit u-trap)) 6429 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6430 ) 6431 6432 (dni ftino 6433 "float trap never" 6434 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6435 (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) 6436 "ftino$pack" 6437 (+ pack FCC_nev (FCCi_2-null) OP_1D (GRi-null) (s12-null)) 6438 (trap-semantics (const BI 0) GRi s12) 6439 ((fr400 (unit u-trap)) (fr450 (unit u-trap)) 6440 (fr500 (unit u-trap)) (fr550 (unit u-trap))) 6441 ) 6442 6443 (trap-immed fti ne F OP_1D Fne FR-ACCESS "float trap not equal") 6444 (trap-immed fti eq F OP_1D Feq FR-ACCESS "float trap equal") 6445 (trap-immed fti lg F OP_1D Flg FR-ACCESS "float trap greater or less") 6446 (trap-immed fti ue F OP_1D Fue FR-ACCESS "float trap unordered or equal") 6447 (trap-immed fti ul F OP_1D Ful FR-ACCESS "float trap unordered or less") 6448 (trap-immed fti ge F OP_1D Fge FR-ACCESS "float trap greater or equal") 6449 (trap-immed fti lt F OP_1D Flt FR-ACCESS "float trap less") 6450 (trap-immed fti uge F OP_1D Fuge FR-ACCESS "float trap unordered greater or equal") 6451 (trap-immed fti ug F OP_1D Fug FR-ACCESS "float trap unordered or greater") 6452 (trap-immed fti le F OP_1D Fle FR-ACCESS "float trap less or equal") 6453 (trap-immed fti gt F OP_1D Fgt FR-ACCESS "float trap greater") 6454 (trap-immed fti ule F OP_1D Fule FR-ACCESS "float trap unordered less or equal") 6455 (trap-immed fti u F OP_1D Fu FR-ACCESS "float trap unordered") 6456 (trap-immed fti o F OP_1D Fo FR-ACCESS "float trap ordered") 6457 6458 (dni break 6459 "break trap" 6460 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6461 (FR400-MAJOR C-1) (FR450-MAJOR C-1)) 6462 "break$pack" 6463 (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_3 (GRj-null)) 6464 (sequence () 6465 ; This is defered to frv_break because for the breakpoint 6466 ; case we want to change as little of the machine state as 6467 ; possible. 6468 ; 6469 ; BPCSR=PC 6470 ; BPSR.BS=PSR.S 6471 ; BPSR.BET=PSR.ET 6472 ; PSR.S=1 6473 ; PSR.ET=0 6474 ; TBR.TT=0xff 6475 ; PC=TBR 6476 ; We still should indicate what is modified by this insn. 6477 (clobber (spr-bpcsr)) 6478 (clobber bpsr_bs) 6479 (clobber bpsr_bet) 6480 (clobber psr_s) 6481 (clobber psr_et) 6482 (clobber tbr_tt) 6483 (c-call VOID "frv_break")) 6484 () 6485 ) 6486 6487 (dni mtrap 6488 "media trap" 6489 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) 6490 (FR400-MAJOR C-1) (FR450-MAJOR C-1) FR-ACCESS) 6491 "mtrap$pack" 6492 (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_2 (GRj-null)) 6493 (c-call VOID "frv_mtrap") 6494 () 6495 ) 6496 6497 (define-pmacro (condition-code-logic name operation ope comment) 6498 (dni name 6499 (comment) 6500 ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6) 6501 (FR400-MAJOR B-6) (FR450-MAJOR B-6)) 6502 (.str name "$pack $CRi,$CRj,$CRk") 6503 (+ pack (misc-null-6) CRk OP_0A (misc-null-7) CRi ope (misc-null-8) CRj) 6504 (set CRk (c-call UQI "@cpu@_cr_logic" operation CRi CRj)) 6505 () 6506 ) 6507 ) 6508 (define-pmacro (op-andcr) 0) 6509 (define-pmacro (op-orcr) 1) 6510 (define-pmacro (op-xorcr) 2) 6511 (define-pmacro (op-nandcr) 3) 6512 (define-pmacro (op-norcr) 4) 6513 (define-pmacro (op-andncr) 5) 6514 (define-pmacro (op-orncr) 6) 6515 (define-pmacro (op-nandncr) 7) 6516 (define-pmacro (op-norncr) 8) 6517 6518 (define-pmacro (cr-true) 3) 6519 (define-pmacro (cr-false) 2) 6520 (define-pmacro (cr-undefined) 0) 6521 6522 (condition-code-logic andcr (op-andcr) OPE1_08 "and condition code regs") 6523 (condition-code-logic orcr (op-orcr) OPE1_09 "or condition code regs") 6524 (condition-code-logic xorcr (op-xorcr) OPE1_0A "xor condition code regs") 6525 (condition-code-logic nandcr (op-nandcr) OPE1_0C "nand condition code regs") 6526 (condition-code-logic norcr (op-norcr) OPE1_0D "nor condition code regs") 6527 (condition-code-logic andncr (op-andncr) OPE1_10 "andn condition code regs") 6528 (condition-code-logic orncr (op-orncr) OPE1_11 "orn condition code regs") 6529 (condition-code-logic nandncr (op-nandncr) OPE1_14 "nandn condition code regs") 6530 (condition-code-logic norncr (op-norncr) OPE1_15 "norn condition code regs") 6531 6532 (dni notcr 6533 ("not cccr register") 6534 ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6) 6535 (FR400-MAJOR B-6) (FR450-MAJOR B-6)) 6536 (.str notcr "$pack $CRj,$CRk") 6537 (+ pack (misc-null-6) CRk OP_0A (rs-null) OPE1_0B (misc-null-8) CRj) 6538 (set CRk (xor CRj 1)) 6539 () 6540 ) 6541 6542 (define-pmacro (check-semantics cond cr) 6543 (if cond (set cr (cr-true)) (set cr (cr-false))) 6544 ) 6545 6546 (define-pmacro (check-int-condition-code prefix cc op cond comment) 6547 (dni (.sym prefix cc) 6548 (comment) 6549 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6550 (FR400-MAJOR B-5) (FR450-MAJOR B-5)) 6551 (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int") 6552 (+ pack (.sym ICC_ cc) CRj_int op (misc-null-5) ICCi_3) 6553 (check-semantics (cond ICCi_3) CRj_int) 6554 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6555 (fr500 (unit u-check)) (fr550 (unit u-check))) 6556 ) 6557 ) 6558 6559 (dni ckra 6560 "check integer cc always" 6561 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6562 (FR400-MAJOR B-5) (FR450-MAJOR B-5)) 6563 "ckra$pack $CRj_int" 6564 (+ pack ICC_ra CRj_int OP_08 (misc-null-5) (ICCi_3-null)) 6565 (check-semantics (const BI 1) CRj_int) 6566 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6567 (fr500 (unit u-check)) (fr550 (unit u-check))) 6568 ) 6569 6570 (dni ckno 6571 "check integer cc never" 6572 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6573 (FR400-MAJOR B-5) (FR450-MAJOR B-5)) 6574 "ckno$pack $CRj_int" 6575 (+ pack ICC_nev CRj_int OP_08 (misc-null-5) (ICCi_3-null)) 6576 (check-semantics (const BI 0) CRj_int) 6577 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6578 (fr500 (unit u-check)) (fr550 (unit u-check))) 6579 ) 6580 6581 (check-int-condition-code ck eq OP_08 Ieq "check integer cc equal") 6582 (check-int-condition-code ck ne OP_08 Ine "check integer cc not equal") 6583 (check-int-condition-code ck le OP_08 Ile "check integer cc less or equal") 6584 (check-int-condition-code ck gt OP_08 Igt "check integer cc greater") 6585 (check-int-condition-code ck lt OP_08 Ilt "check integer cc less") 6586 (check-int-condition-code ck ge OP_08 Ige "check integer cc greater or equal") 6587 (check-int-condition-code ck ls OP_08 Ils "check integer cc less or equal unsigned") 6588 (check-int-condition-code ck hi OP_08 Ihi "check integer cc greater unsigned") 6589 (check-int-condition-code ck c OP_08 Ic "check integer cc carry set") 6590 (check-int-condition-code ck nc OP_08 Inc "check integer cc carry clear") 6591 (check-int-condition-code ck n OP_08 In "check integer cc negative") 6592 (check-int-condition-code ck p OP_08 Ip "check integer cc positive") 6593 (check-int-condition-code ck v OP_08 Iv "check integer cc overflow set") 6594 (check-int-condition-code ck nv OP_08 Inv "check integer cc overflow clear") 6595 6596 (define-pmacro (check-float-condition-code prefix cc op cond comment) 6597 (dni (.sym prefix cc) 6598 (comment) 6599 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6600 (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS) 6601 (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float") 6602 (+ pack (.sym FCC_ cc) CRj_float op (misc-null-5) FCCi_3) 6603 (check-semantics (cond FCCi_3) CRj_float) 6604 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6605 (fr500 (unit u-check)) (fr550 (unit u-check))) 6606 ) 6607 ) 6608 6609 (dni fckra 6610 "check float cc always" 6611 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6612 (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS) 6613 "fckra$pack $CRj_float" 6614 (+ pack FCC_ra CRj_float OP_09 (misc-null-5) FCCi_3) 6615 (check-semantics (const BI 1) CRj_float) 6616 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6617 (fr500 (unit u-check)) (fr550 (unit u-check))) 6618 ) 6619 6620 (dni fckno 6621 "check float cc never" 6622 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6623 (FR400-MAJOR B-5) (FR450-MAJOR B-5) FR-ACCESS) 6624 "fckno$pack $CRj_float" 6625 (+ pack FCC_nev CRj_float OP_09 (misc-null-5) FCCi_3) 6626 (check-semantics (const BI 0) CRj_float) 6627 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6628 (fr500 (unit u-check)) (fr550 (unit u-check))) 6629 ) 6630 6631 (check-float-condition-code fck ne OP_09 Fne "check float cc not equal") 6632 (check-float-condition-code fck eq OP_09 Feq "check float cc equal") 6633 (check-float-condition-code fck lg OP_09 Flg "check float cc greater or less") 6634 (check-float-condition-code fck ue OP_09 Fue "check float cc unordered or equal") 6635 (check-float-condition-code fck ul OP_09 Ful "check float cc unordered or less") 6636 (check-float-condition-code fck ge OP_09 Fge "check float cc greater or equal") 6637 (check-float-condition-code fck lt OP_09 Flt "check float cc less") 6638 (check-float-condition-code fck uge OP_09 Fuge "check float cc unordered greater or equal") 6639 (check-float-condition-code fck ug OP_09 Fug "check float cc unordered or greater") 6640 (check-float-condition-code fck le OP_09 Fle "check float cc less or equal") 6641 (check-float-condition-code fck gt OP_09 Fgt "check float cc greater") 6642 (check-float-condition-code fck ule OP_09 Fule "check float cc unordered less or equal") 6643 (check-float-condition-code fck u OP_09 Fu "check float cc unordered") 6644 (check-float-condition-code fck o OP_09 Fo "check float cc ordered") 6645 6646 (define-pmacro (conditional-check-int-condition-code prefix cc op ope test comment) 6647 (dni (.sym prefix cc) 6648 (comment) 6649 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6650 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL) 6651 (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int,$CCi,$cond") 6652 (+ pack (.sym ICC_ cc) CRj_int op (rs-null) CCi cond ope 6653 (misc-null-9) ICCi_3) 6654 (if (eq CCi (or cond 2)) 6655 (check-semantics (test ICCi_3) CRj_int) 6656 (set CRj_int (cr-undefined))) 6657 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6658 (fr500 (unit u-check)) (fr550 (unit u-check))) 6659 ) 6660 ) 6661 6662 (dni cckra 6663 "conditional check integer cc always" 6664 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6665 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL) 6666 "cckra$pack $CRj_int,$CCi,$cond" 6667 (+ pack ICC_ra CRj_int OP_6A (rs-null) CCi cond OPE4_0 6668 (misc-null-9) (ICCi_3-null)) 6669 (if (eq CCi (or cond 2)) 6670 (check-semantics (const BI 1) CRj_int) 6671 (set CRj_int (cr-undefined))) 6672 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6673 (fr500 (unit u-check)) (fr550 (unit u-check))) 6674 ) 6675 6676 (dni cckno 6677 "conditional check integer cc never" 6678 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6679 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL) 6680 "cckno$pack $CRj_int,$CCi,$cond" 6681 (+ pack ICC_nev CRj_int OP_6A (rs-null) CCi cond OPE4_0 6682 (misc-null-9) (ICCi_3-null)) 6683 (if (eq CCi (or cond 2)) 6684 (check-semantics (const BI 0) CRj_int) 6685 (set CRj_int (cr-undefined))) 6686 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6687 (fr500 (unit u-check)) (fr550 (unit u-check))) 6688 ) 6689 6690 (conditional-check-int-condition-code cck eq OP_6A OPE4_0 Ieq "check integer cc equal") 6691 (conditional-check-int-condition-code cck ne OP_6A OPE4_0 Ine "check integer cc not equal") 6692 (conditional-check-int-condition-code cck le OP_6A OPE4_0 Ile "check integer cc less or equal") 6693 (conditional-check-int-condition-code cck gt OP_6A OPE4_0 Igt "check integer cc greater") 6694 (conditional-check-int-condition-code cck lt OP_6A OPE4_0 Ilt "check integer cc less") 6695 (conditional-check-int-condition-code cck ge OP_6A OPE4_0 Ige "check integer cc greater or equal") 6696 (conditional-check-int-condition-code cck ls OP_6A OPE4_0 Ils "check integer cc less or equal unsigned") 6697 (conditional-check-int-condition-code cck hi OP_6A OPE4_0 Ihi "check integer cc greater unsigned") 6698 (conditional-check-int-condition-code cck c OP_6A OPE4_0 Ic "check integer cc carry set") 6699 (conditional-check-int-condition-code cck nc OP_6A OPE4_0 Inc "check integer cc carry clear") 6700 (conditional-check-int-condition-code cck n OP_6A OPE4_0 In "check integer cc negative") 6701 (conditional-check-int-condition-code cck p OP_6A OPE4_0 Ip "check integer cc positive") 6702 (conditional-check-int-condition-code cck v OP_6A OPE4_0 Iv "check integer cc overflow set") 6703 (conditional-check-int-condition-code cck nv OP_6A OPE4_0 Inv "check integer cc overflow clear") 6704 6705 (define-pmacro (conditional-check-float-condition-code prefix cc op ope test comment) 6706 (dni (.sym prefix cc) 6707 (comment) 6708 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6709 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS) 6710 (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float,$CCi,$cond") 6711 (+ pack (.sym FCC_ cc) CRj_float op (rs-null) CCi cond ope 6712 (misc-null-9) FCCi_3) 6713 (if (eq CCi (or cond 2)) 6714 (check-semantics (test FCCi_3) CRj_float) 6715 (set CRj_float (cr-undefined))) 6716 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6717 (fr500 (unit u-check)) (fr550 (unit u-check))) 6718 ) 6719 ) 6720 6721 (dni cfckra 6722 "conditional check float cc always" 6723 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6724 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS) 6725 "cfckra$pack $CRj_float,$CCi,$cond" 6726 (+ pack FCC_ra CRj_float OP_6A (rs-null) CCi cond OPE4_1 6727 (misc-null-9) (FCCi_3-null)) 6728 (if (eq CCi (or cond 2)) 6729 (check-semantics (const BI 1) CRj_float) 6730 (set CRj_float (cr-undefined))) 6731 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6732 (fr500 (unit u-check)) (fr550 (unit u-check))) 6733 ) 6734 6735 (dni cfckno 6736 "conditional check float cc never" 6737 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) 6738 (FR400-MAJOR B-5) (FR450-MAJOR B-5) CONDITIONAL FR-ACCESS) 6739 "cfckno$pack $CRj_float,$CCi,$cond" 6740 (+ pack FCC_nev CRj_float OP_6A (rs-null) CCi cond OPE4_1 6741 (misc-null-9) (FCCi_3-null)) 6742 (if (eq CCi (or cond 2)) 6743 (check-semantics (const BI 0) CRj_float) 6744 (set CRj_float (cr-undefined))) 6745 ((fr400 (unit u-check)) (fr450 (unit u-check)) 6746 (fr500 (unit u-check)) (fr550 (unit u-check))) 6747 ) 6748 6749 (conditional-check-float-condition-code cfck ne OP_6A OPE4_1 Fne "check float cc not equal") 6750 (conditional-check-float-condition-code cfck eq OP_6A OPE4_1 Feq "check float cc equal") 6751 (conditional-check-float-condition-code cfck lg OP_6A OPE4_1 Flg "check float cc greater or less") 6752 (conditional-check-float-condition-code cfck ue OP_6A OPE4_1 Fue "check float cc unordered or equal") 6753 (conditional-check-float-condition-code cfck ul OP_6A OPE4_1 Ful "check float cc unordered or less") 6754 (conditional-check-float-condition-code cfck ge OP_6A OPE4_1 Fge "check float cc greater or equal") 6755 (conditional-check-float-condition-code cfck lt OP_6A OPE4_1 Flt "check float cc less") 6756 (conditional-check-float-condition-code cfck uge OP_6A OPE4_1 Fuge "check float cc unordered greater or equal") 6757 (conditional-check-float-condition-code cfck ug OP_6A OPE4_1 Fug "check float cc unordered or greater") 6758 (conditional-check-float-condition-code cfck le OP_6A OPE4_1 Fle "check float cc less or equal") 6759 (conditional-check-float-condition-code cfck gt OP_6A OPE4_1 Fgt "check float cc greater") 6760 (conditional-check-float-condition-code cfck ule OP_6A OPE4_1 Fule "check float cc unordered less or equal") 6761 (conditional-check-float-condition-code cfck u OP_6A OPE4_1 Fu "check float cc unordered") 6762 (conditional-check-float-condition-code cfck o OP_6A OPE4_1 Fo "check float cc ordered") 6763 6764 (dni cjmpl 6765 "conditional jump and link" 6766 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6767 (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL) 6768 "cjmpl$pack @($GRi,$GRj),$CCi,$cond" 6769 (+ pack (misc-null-1) (LI-off) OP_6A GRi CCi cond OPE4_2 GRj) 6770 (if (eq CCi (or cond 2)) 6771 (jump-and-link-semantics GRi GRj LI)) 6772 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6773 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6774 ) 6775 6776 (dni ccalll 6777 "conditional call and link" 6778 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) 6779 (FR400-MAJOR I-5) (FR450-MAJOR I-5) CONDITIONAL) 6780 "ccalll$pack @($GRi,$GRj),$CCi,$cond" 6781 (+ pack (misc-null-1) (LI-on) OP_6A GRi CCi cond OPE4_2 GRj) 6782 (if (eq CCi (or cond 2)) 6783 (jump-and-link-semantics GRi GRj LI)) 6784 ((fr400 (unit u-branch)) (fr450 (unit u-branch)) 6785 (fr500 (unit u-branch)) (fr550 (unit u-branch))) 6786 ) 6787 6788 (define-pmacro (cache-invalidate name cache all op ope profile comment) 6789 (dni name 6790 (comment) 6791 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 6792 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6793 (.str name "$pack @($GRi,$GRj)") 6794 (+ pack (rd-null) op GRi ope GRj) 6795 (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) all) 6796 profile 6797 ) 6798 ) 6799 6800 (cache-invalidate ici insn 0 OP_03 OPE1_38 6801 ((fr400 (unit u-ici)) (fr450 (unit u-ici)) 6802 (fr500 (unit u-ici)) (fr550 (unit u-ici))) 6803 "invalidate insn cache") 6804 (cache-invalidate dci data 0 OP_03 OPE1_3C 6805 ((fr400 (unit u-dci)) (fr450 (unit u-dci)) 6806 (fr500 (unit u-dci)) (fr550 (unit u-dci))) 6807 "invalidate data cache") 6808 6809 (define-pmacro (cache-invalidate-entry name cache op ope profile comment) 6810 (dni name 6811 (comment) 6812 ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2) 6813 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6814 (.str name "$pack @($GRi,$GRj),$ae") 6815 (+ pack (misc-null-1) ae op GRi ope GRj) 6816 (if (eq ae 0) 6817 (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) -1) ; Invalid ae setting for this insn 6818 (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) ae)) 6819 profile 6820 ) 6821 ) 6822 6823 (cache-invalidate-entry icei insn OP_03 OPE1_39 6824 ((fr400 (unit u-ici)) (fr450 (unit u-ici)) 6825 (fr550 (unit u-ici))) 6826 "invalidate insn cache entry") 6827 (cache-invalidate-entry dcei data OP_03 OPE1_3A 6828 ((fr400 (unit u-dci)) (fr450 (unit u-dci)) 6829 (fr550 (unit u-dci))) 6830 "invalidate data cache entry") 6831 6832 (dni dcf 6833 "Data cache flush" 6834 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 6835 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6836 "dcf$pack @($GRi,$GRj)" 6837 (+ pack (rd-null) OP_03 GRi OPE1_3D GRj) 6838 (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) 0) 6839 ((fr400 (unit u-dcf)) (fr450 (unit u-dcf)) 6840 (fr500 (unit u-dcf)) (fr550 (unit u-dcf))) 6841 ) 6842 6843 (dni dcef 6844 "Data cache entry flush" 6845 ((UNIT C) (MACH fr400,fr450,fr550) (FR550-MAJOR C-2) 6846 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6847 "dcef$pack @($GRi,$GRj),$ae" 6848 (+ pack (misc-null-1) ae OP_03 GRi OPE1_3B GRj) 6849 (if (eq ae 0) 6850 (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) -1) 6851 (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) ae)) 6852 ((fr400 (unit u-dcf)) (fr450 (unit u-dcf)) (fr550 (unit u-dcf))) 6853 ) 6854 6855 (define-pmacro (write-TLB name insn op ope comment) 6856 (dni name 6857 (comment) 6858 ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED) 6859 (.str insn "$pack $GRk,@($GRi,$GRj)") 6860 (+ pack GRk op GRi ope GRj) 6861 (nop) ; for now 6862 () 6863 ) 6864 ) 6865 6866 (write-TLB witlb witlb OP_03 OPE1_32 "write for insn TLB") 6867 (write-TLB wdtlb wdtlb OP_03 OPE1_36 "write for data TLB") 6868 6869 (define-pmacro (invalidate-TLB name insn op ope comment) 6870 (dni name 6871 (comment) 6872 ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED) 6873 (.str insn "$pack @($GRi,$GRj)") 6874 (+ pack (rd-null) op GRi ope GRj) 6875 (nop) ; for now 6876 () 6877 ) 6878 ) 6879 6880 (invalidate-TLB itlbi itlbi OP_03 OPE1_33 "invalidate insn TLB") 6881 (invalidate-TLB dtlbi dtlbi OP_03 OPE1_37 "invalidate data TLB") 6882 6883 (define-pmacro (cache-preload name cache pipe attrs op ope profile comment) 6884 (dni name 6885 (comment) 6886 (.splice (UNIT pipe) (FR500-MAJOR C-2) 6887 (FR400-MAJOR C-2) (.unsplice attrs)) 6888 (.str name "$pack $GRi,$GRj,$lock") 6889 (+ pack (misc-null-1) lock op GRi ope GRj) 6890 (c-call VOID (.str "@cpu@_" cache "_cache_preload") GRi GRj lock) 6891 profile 6892 ) 6893 ) 6894 6895 (cache-preload icpl insn C ((FR550-MAJOR C-2) (FR450-MAJOR C-2)) OP_03 OPE1_30 6896 ((fr400 (unit u-icpl)) (fr450 (unit u-icpl)) 6897 (fr500 (unit u-icpl)) (fr550 (unit u-icpl))) 6898 "preload insn cache") 6899 (cache-preload dcpl data DCPL ((FR550-MAJOR I-8) (FR450-MAJOR I-2)) OP_03 OPE1_34 6900 ((fr400 (unit u-dcpl)) (fr450 (unit u-dcpl)) 6901 (fr500 (unit u-dcpl)) (fr550 (unit u-dcpl))) 6902 "preload data cache") 6903 6904 (define-pmacro (cache-unlock name cache op ope profile comment) 6905 (dni name 6906 (comment) 6907 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 6908 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6909 (.str name "$pack $GRi") 6910 (+ pack (rd-null) op GRi ope (GRj-null)) 6911 (c-call VOID (.str "@cpu@_" cache "_cache_unlock") GRi) 6912 profile 6913 ) 6914 ) 6915 6916 (cache-unlock icul insn OP_03 OPE1_31 6917 ((fr400 (unit u-icul)) (fr450 (unit u-icul)) 6918 (fr500 (unit u-icul)) (fr550 (unit u-icul))) 6919 "unlock insn cache") 6920 (cache-unlock dcul data OP_03 OPE1_35 6921 ((fr400 (unit u-dcul)) (fr450 (unit u-dcul)) 6922 (fr500 (unit u-dcul)) (fr550 (unit u-dcul))) 6923 "unlock data cache") 6924 6925 (define-pmacro (barrier name insn op ope profile comment) 6926 (dni name 6927 (comment) 6928 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) 6929 (FR400-MAJOR C-2) (FR450-MAJOR C-2)) 6930 (.str insn "$pack") 6931 (+ pack (rd-null) op (rs-null) ope (GRj-null)) 6932 (nop) ; sufficient implementation 6933 profile 6934 ) 6935 ) 6936 6937 (barrier bar bar OP_03 OPE1_3E 6938 ((fr400 (unit u-barrier)) (fr450 (unit u-barrier)) 6939 (fr500 (unit u-barrier))) 6940 "barrier") 6941 (barrier membar membar OP_03 OPE1_3F 6942 ((fr400 (unit u-membar)) (fr450 (unit u-membar)) 6943 (fr500 (unit u-membar))) 6944 "memory barrier") 6945 6946 ; Load real address instructions 6947 (define-pmacro (load-real-address name insn what op ope) 6948 (dni name 6949 (.str "Load real address of " what) 6950 ((UNIT C) (FR450-MAJOR C-2) (MACH fr450)) 6951 (.str insn "$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS") 6952 (+ pack GRk op GRi ope LRAE LRAD LRAS (LRA-null)) 6953 (nop) ; not simulated 6954 () 6955 ) 6956 ) 6957 6958 (load-real-address lrai "lrai" "instruction" OP_03 OPE1_20) 6959 (load-real-address lrad "lrad" "data" OP_03 OPE1_21) 6960 6961 (dni tlbpr 6962 "TLB Probe" 6963 ((UNIT C) (FR450-MAJOR C-2) (MACH fr450)) 6964 "tlbpr$pack $GRi,$GRj,$TLBPRopx,$TLBPRL" 6965 (+ pack (TLBPR-null) TLBPRopx TLBPRL OP_03 GRi OPE1_24 GRj) 6966 (nop) ; not simulated 6967 () 6968 ) 6969 6970 ; Coprocessor operations 6971 (define-pmacro (cop-op num op) 6972 (dni (.sym cop num) 6973 "Coprocessor operation" 6974 ((UNIT C) (FR500-MAJOR C-2) (MACH frv)) 6975 (.str "cop" num "$pack $s6_1,$CPRi,$CPRj,$CPRk") 6976 (+ pack CPRk op CPRi s6_1 CPRj) 6977 (nop) ; sufficient implementation 6978 () 6979 ) 6980 ) 6981 6982 (cop-op 1 OP_7E) 6983 (cop-op 2 OP_7F) 6984 6985 (define-pmacro (clear-ne-flag-semantics target_index is_float) 6986 (c-call VOID "@cpu@_clear_ne_flags" target_index is_float) 6987 ) 6988 6989 (define-pmacro (clear-ne-flag-r name op ope reg is_float attr profile comment) 6990 (dni name 6991 (comment) 6992 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr) 6993 (.str name "$pack $" reg "k") 6994 (+ pack (.sym reg k) op (rs-null) ope (GRj-null)) 6995 (sequence () 6996 ; hack to get this referenced for profiling 6997 (c-raw-call VOID "frv_ref_SI" (.sym reg k)) 6998 (clear-ne-flag-semantics (index-of (.sym reg k)) is_float)) 6999 profile 7000 ) 7001 ) 7002 7003 (clear-ne-flag-r clrgr OP_0A OPE1_00 GR 0 NA 7004 ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr))) 7005 "Clear GR NE flag") 7006 (clear-ne-flag-r clrfr OP_0A OPE1_02 FR 1 FR-ACCESS 7007 ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr))) 7008 "Clear FR NE flag") 7009 7010 (define-pmacro (clear-ne-flag-all name op ope is_float attr profile comment) 7011 (dni name 7012 (comment) 7013 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr) 7014 (.str name "$pack") 7015 (+ pack (rd-null) op (rs-null) ope (GRj-null)) 7016 (clear-ne-flag-semantics -1 is_float) 7017 profile 7018 ) 7019 ) 7020 7021 (clear-ne-flag-all clrga OP_0A OPE1_01 0 NA 7022 ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr))) 7023 "Clear GR NE flag ALL") 7024 (clear-ne-flag-all clrfa OP_0A OPE1_03 1 FR-ACCESS 7025 ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr))) 7026 "Clear FR NE flag ALL") 7027 7028 (define-pmacro (commit-semantics target_index is_float) 7029 (c-call VOID "@cpu@_commit" target_index is_float) 7030 ) 7031 7032 (define-pmacro (commit-r name op ope reg is_float attr comment) 7033 (dni name 7034 (comment) 7035 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr) 7036 (.str name "$pack $" reg "k") 7037 (+ pack (.sym reg k) op (rs-null) ope (GRj-null)) 7038 (commit-semantics (index-of (.sym reg k)) is_float) 7039 ((fr500 (unit u-commit)) (fr550 (unit u-commit))) 7040 ) 7041 ) 7042 7043 (commit-r commitgr OP_0A OPE1_04 GR 0 NA "commit exceptions, specific GR") 7044 (commit-r commitfr OP_0A OPE1_06 FR 1 FR-ACCESS "commit exceptions, specific FR") 7045 7046 (define-pmacro (commit name op ope is_float attr comment) 7047 (dni name 7048 (comment) 7049 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr) 7050 (.str name "$pack") 7051 (+ pack (rd-null) op (rs-null) ope (GRj-null)) 7052 (commit-semantics -1 is_float) 7053 ((fr500 (unit u-commit)) (fr550 (unit u-commit))) 7054 ) 7055 ) 7056 7057 (commit commitga OP_0A OPE1_05 0 NA "commit exceptions, any GR") 7058 (commit commitfa OP_0A OPE1_07 1 FR-ACCESS "commit exceptions, any FR") 7059 7060 (define-pmacro (floating-point-conversion 7061 name op ope conv mode src targ attr comment) 7062 (dni name 7063 (comment) 7064 (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr)) 7065 (.str name "$pack $" src ",$" targ) 7066 (+ pack targ op (rs-null) ope src) 7067 (set targ (conv mode FPCONV-DEFAULT src)) 7068 ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert))) 7069 ) 7070 ) 7071 7072 (floating-point-conversion fitos OP_79 OPE1_00 float SF FRintj FRk 7073 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7074 "Convert Integer to Single") 7075 (floating-point-conversion fstoi OP_79 OPE1_01 fix SI FRj FRintk 7076 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7077 "Convert Single to Integer") 7078 (floating-point-conversion fitod OP_7A OPE1_00 float DF FRintj FRdoublek 7079 ((MACH frv)) 7080 "Convert Integer to Double") 7081 (floating-point-conversion fdtoi OP_7A OPE1_01 fix SI FRdoublej FRintk 7082 ((MACH frv)) 7083 "Convert Double to Integer") 7084 7085 (define-pmacro (floating-point-dual-conversion 7086 name op ope conv mode src src_hw targ targ_hw attr comment) 7087 (dni name 7088 (comment) 7089 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) attr) 7090 (.str name "$pack $" src ",$" targ) 7091 (+ pack targ op (rs-null) ope src) 7092 (sequence () 7093 (set targ (conv mode FPCONV-DEFAULT src)) 7094 (set (nextreg targ_hw targ 1) 7095 (conv mode FPCONV-DEFAULT (nextreg src_hw src 1)))) 7096 ((fr500 (unit u-float-dual-convert))) 7097 ) 7098 ) 7099 7100 (floating-point-dual-conversion fditos OP_79 OPE1_10 float SF FRintj h-fr_int FRk h-fr NA "Dual Convert Integer to Single") 7101 (floating-point-dual-conversion fdstoi OP_79 OPE1_11 fix SI FRj h-fr FRintk h-fr_int NA "Dual Convert Single to Integer") 7102 7103 (define-pmacro (ne-floating-point-dual-conversion 7104 name op ope conv mode src src_hw targ targ_hw attr comment) 7105 (dni name 7106 (comment) 7107 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) NON-EXCEPTING attr) 7108 (.str name "$pack $" src ",$" targ) 7109 (+ pack targ op (rs-null) ope src) 7110 (sequence () 7111 (c-call VOID "@cpu@_set_ne_index" (index-of targ)) 7112 (set targ (conv mode FPCONV-DEFAULT src)) 7113 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1)) 7114 (set (nextreg targ_hw targ 1) 7115 (conv mode FPCONV-DEFAULT (nextreg src_hw src 1)))) 7116 ((fr500 (unit u-float-dual-convert))) 7117 ) 7118 ) 7119 7120 (ne-floating-point-dual-conversion nfditos OP_79 OPE1_30 float SF FRintj h-fr_int FRk h-fr NA "Non excepting dual Convert Integer to Single") 7121 (ne-floating-point-dual-conversion nfdstoi OP_79 OPE1_31 fix SI FRj h-fr FRintk h-fr_int NA "Non excepting dual Convert Single to Integer") 7122 7123 (define-pmacro (conditional-floating-point-conversion 7124 name op ope conv mode src targ comment) 7125 (dni name 7126 (comment) 7127 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7128 (.str name "$pack $" src ",$" targ ",$CCi,$cond") 7129 (+ pack targ op (rs-null) CCi cond ope src) 7130 (if (eq CCi (or cond 2)) 7131 (set targ (conv mode FPCONV-DEFAULT src))) 7132 ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert))) 7133 ) 7134 ) 7135 7136 (conditional-floating-point-conversion cfitos OP_6B OPE4_0 float SF FRintj FRk "Conditional convert Integer to Single") 7137 (conditional-floating-point-conversion cfstoi OP_6B OPE4_1 fix SI FRj FRintk "Conditional convert Single to Integer") 7138 7139 (define-pmacro (ne-floating-point-conversion 7140 name op ope conv mode src targ comment) 7141 (dni name 7142 (comment) 7143 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7144 (.str name "$pack $" src ",$" targ) 7145 (+ pack targ op (rs-null) ope src) 7146 (sequence () 7147 (c-call VOID "@cpu@_set_ne_index" (index-of targ)) 7148 (set targ (conv mode FPCONV-DEFAULT src))) 7149 ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert))) 7150 ) 7151 ) 7152 7153 (ne-floating-point-conversion nfitos OP_79 OPE1_20 float SF FRintj FRk "NE convert Integer to Single") 7154 (ne-floating-point-conversion nfstoi OP_79 OPE1_21 fix SI FRj FRintk "NE convert Single to Integer") 7155 7156 (register-transfer fmovs OP_79 OPE1_02 7157 FRj FRk FMALL 7158 ((FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7159 ((fr500 (unit u-fr2fr))) 7160 "Move Single Float") 7161 (register-transfer fmovd OP_7A OPE1_02 7162 ; TODO -- unit doesn't handle extra register 7163 FRdoublej FRdoublek FM01 7164 ((FR500-MAJOR F-1) (MACH frv)) 7165 ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr))) 7166 "Move Double Float") 7167 7168 (dni fdmovs 7169 "Dual move single float" 7170 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1)) 7171 "fdmovs$pack $FRj,$FRk" 7172 (+ pack FRk OP_79 (rs-null) OPE1_12 FRj) 7173 (sequence () 7174 (set FRk FRj) 7175 (set (nextreg h-fr FRk 1) (nextreg h-fr FRj 1))) 7176 ; TODO -- unit doesn't handle extra register 7177 ((fr500 (unit u-fr2fr))) 7178 ) 7179 7180 (conditional-register-transfer cfmovs OP_6C OPE4_0 FRj FRk FMALL 7181 ((FR500-MAJOR F-1) (FR550-MAJOR F-2) 7182 (MACH simple,tomcat,fr500,fr550,frv)) 7183 ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr))) 7184 "Conditional move Single Float") 7185 7186 (define-pmacro (floating-point-neg name src targ op ope attr comment) 7187 (dni name 7188 (comment) 7189 (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr)) 7190 (.str name "$pack $" src ",$" targ) 7191 (+ pack src op (rs-null) ope targ) 7192 (set targ (neg src)) 7193 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7194 ) 7195 ) 7196 7197 (floating-point-neg fnegs FRj FRk OP_79 OPE1_03 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Floating point negate, single") 7198 (floating-point-neg fnegd FRdoublej FRdoublek OP_7A OPE1_03 ((MACH frv)) "Floating point negate, double") 7199 7200 (dni fdnegs 7201 "Floating point dual negate, single" 7202 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1)) 7203 "fdnegs$pack $FRj,$FRk" 7204 (+ pack FRk OP_79 (rs-null) OPE1_13 FRj) 7205 (sequence () 7206 (set FRk (neg FRj)) 7207 (set (nextreg h-fr FRk 1) (neg (nextreg h-fr FRj 1)))) 7208 ((fr500 (unit u-float-dual-arith))) 7209 ) 7210 7211 (dni cfnegs 7212 "Conditional floating point negate, single" 7213 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7214 "cfnegs$pack $FRj,$FRk,$CCi,$cond" 7215 (+ pack FRj OP_6C (rs-null) CCi cond OPE4_1 FRk) 7216 (if (eq CCi (or cond 2)) 7217 (set FRk (neg FRj))) 7218 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7219 ) 7220 7221 (define-pmacro (float-abs name src targ op ope attr comment) 7222 (dni name 7223 (comment) 7224 (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr)) 7225 (.str name "$pack $" src ",$" targ ) 7226 (+ pack targ op (rs-null) ope src) 7227 (set targ (abs src)) 7228 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7229 ) 7230 ) 7231 7232 (float-abs fabss FRj FRk OP_79 OPE1_04 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Float absolute value, single") 7233 (float-abs fabsd FRdoublej FRdoublek OP_7A OPE1_04 ((MACH frv)) "Float absolute value, double") 7234 7235 (dni fdabss 7236 "Floating point dual absolute value, single" 7237 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1)) 7238 "fdabss$pack $FRj,$FRk" 7239 (+ pack FRk OP_79 (rs-null) OPE1_14 FRj) 7240 (sequence () 7241 (set FRk (abs FRj)) 7242 (set (nextreg h-fr FRk 1) (abs (nextreg h-fr FRj 1)))) 7243 ((fr500 (unit u-float-dual-arith))) 7244 ) 7245 7246 (dni cfabss 7247 "Conditional floating point absolute value, single" 7248 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7249 "cfabss$pack $FRj,$FRk,$CCi,$cond" 7250 (+ pack FRj OP_6C (rs-null) CCi cond OPE4_2 FRk) 7251 (if (eq CCi (or cond 2)) 7252 (set FRk (abs FRj))) 7253 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7254 ) 7255 7256 (dni fsqrts 7257 "Square root single" 7258 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv)) 7259 "fsqrts$pack $FRj,$FRk" 7260 (+ pack FRk OP_79 (rs-null) OPE1_05 FRj) 7261 (set FRk (sqrt SF FRj)) 7262 ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt))) 7263 ) 7264 7265 (dni fdsqrts 7266 "Dual square root single" 7267 ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4)) 7268 "fdsqrts$pack $FRj,$FRk" 7269 (+ pack FRk OP_79 (rs-null) OPE1_15 FRj) 7270 (sequence () 7271 (set FRk (sqrt SF FRj)) 7272 (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1)))) 7273 ((fr500 (unit u-float-dual-sqrt))) 7274 ) 7275 7276 (dni nfdsqrts 7277 "Non excepting Dual square root single" 7278 ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4) NON-EXCEPTING) 7279 "nfdsqrts$pack $FRj,$FRk" 7280 (+ pack FRk OP_79 (rs-null) OPE1_35 FRj) 7281 (sequence () 7282 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7283 (set FRk (sqrt SF FRj)) 7284 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7285 (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1)))) 7286 ((fr500 (unit u-float-dual-sqrt))) 7287 ) 7288 7289 (dni fsqrtd 7290 "Square root double" 7291 ((UNIT FM01) (FR500-MAJOR F-4) (MACH frv)) 7292 "fsqrtd$pack $FRdoublej,$FRdoublek" 7293 (+ pack FRdoublek OP_7A (rs-null) OPE1_05 FRdoublej) 7294 (set FRdoublek (sqrt DF FRdoublej)) 7295 ((fr500 (unit u-float-sqrt))) 7296 ) 7297 7298 (dni cfsqrts 7299 "Conditional square root single" 7300 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv)) 7301 "cfsqrts$pack $FRj,$FRk,$CCi,$cond" 7302 (+ pack FRk OP_6E (rs-null) CCi cond OPE4_2 FRj) 7303 (if (eq CCi (or cond 2)) 7304 (set FRk (sqrt SF FRj))) 7305 ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt))) 7306 ) 7307 7308 (dni nfsqrts 7309 "Non exception square root, single" 7310 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv)) 7311 "nfsqrts$pack $FRj,$FRk" 7312 (+ pack FRk OP_79 (rs-null) OPE1_25 FRj) 7313 (sequence () 7314 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7315 (set FRk (sqrt SF FRj))) 7316 ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt))) 7317 ) 7318 7319 (define-pmacro (float-binary-op-s name pipe attr operation op ope comment) 7320 (dni name 7321 (comment) 7322 (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv) (.unsplice attr)) 7323 (.str name "$pack $FRi,$FRj,$FRk") 7324 (+ pack FRk op FRi ope FRj) 7325 (set FRk (operation FRi FRj)) 7326 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7327 ) 7328 ) 7329 7330 (float-binary-op-s fadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_06 "add single float") 7331 (float-binary-op-s fsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_07 "sub single float") 7332 (float-binary-op-s fmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_08 "mul single float") 7333 7334 (dni fdivs 7335 "div single float" 7336 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv)) 7337 "fdivs$pack $FRi,$FRj,$FRk" 7338 (+ pack FRk OP_79 FRi OPE1_09 FRj) 7339 (set FRk (div FRi FRj)) 7340 ((fr500 (unit u-float-div)) 7341 (fr550 (unit u-float-div))) 7342 ) 7343 7344 (define-pmacro (float-binary-op-d name operation op ope major comment) 7345 (dni name 7346 (comment) 7347 ((UNIT FMALL) (FR500-MAJOR major) (MACH frv)) 7348 (.str name "$pack $FRdoublei,$FRdoublej,$FRdoublek") 7349 (+ pack FRdoublek op FRdoublei ope FRdoublej) 7350 (set FRdoublek (operation FRdoublei FRdoublej)) 7351 ((fr500 (unit u-float-arith))) 7352 ) 7353 ) 7354 7355 (float-binary-op-d faddd add OP_7A OPE1_06 F-2 "add double float") 7356 (float-binary-op-d fsubd sub OP_7A OPE1_07 F-2 "sub double float") 7357 (float-binary-op-d fmuld mul OP_7A OPE1_08 F-3 "mul double float") 7358 (float-binary-op-d fdivd div OP_7A OPE1_09 F-4 "div double float") 7359 7360 (define-pmacro (conditional-float-binary-op name pipe attr operation op ope profile comment) 7361 (dni name 7362 (comment) 7363 (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv) 7364 (.unsplice attr)) 7365 (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond") 7366 (+ pack FRk op FRi CCi cond ope FRj) 7367 (if (eq CCi (or cond 2)) 7368 (set FRk (operation FRi FRj))) 7369 profile 7370 ) 7371 ) 7372 7373 (conditional-float-binary-op cfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_6D OPE4_0 7374 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7375 "cond add single") 7376 (conditional-float-binary-op cfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_6D OPE4_1 7377 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7378 "cond sub single") 7379 (conditional-float-binary-op cfmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_6E OPE4_0 7380 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7381 "cond mul single") 7382 (conditional-float-binary-op cfdivs FM01 ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_6E OPE4_1 7383 ((fr500 (unit u-float-div)) (fr550 (unit u-float-div))) 7384 "cond div single") 7385 7386 (define-pmacro (ne-float-binary-op name pipe attr operation op ope profile comment) 7387 (dni name 7388 (comment) 7389 (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv) 7390 (.unsplice attr)) 7391 (.str name "$pack $FRi,$FRj,$FRk") 7392 (+ pack FRk op FRi ope FRj) 7393 (sequence () 7394 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7395 (set FRk (operation FRi FRj))) 7396 profile 7397 ) 7398 ) 7399 7400 (ne-float-binary-op nfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_26 7401 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7402 "ne add single") 7403 (ne-float-binary-op nfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_27 7404 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7405 "ne sub single") 7406 (ne-float-binary-op nfmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_28 7407 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith))) 7408 "ne mul single") 7409 (ne-float-binary-op nfdivs FM01 ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_79 OPE1_29 7410 ((fr500 (unit u-float-div)) (fr550 (unit u-float-div))) 7411 "ne div single") 7412 7413 (define-pmacro (fcc-eq) 8) 7414 (define-pmacro (fcc-lt) 4) 7415 (define-pmacro (fcc-gt) 2) 7416 (define-pmacro (fcc-uo) 1) 7417 7418 (define-pmacro (compare-and-set-fcc arg1 arg2 fcc) 7419 (if (gt arg1 arg2) 7420 (set fcc (fcc-gt)) 7421 (if (eq arg1 arg2) 7422 (set fcc (fcc-eq)) 7423 (if (lt arg1 arg2) 7424 (set fcc (fcc-lt)) 7425 (set fcc (fcc-uo))))) 7426 ) 7427 7428 (dni fcmps 7429 "compare single float" 7430 ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7431 "fcmps$pack $FRi,$FRj,$FCCi_2" 7432 (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_0A FRj) 7433 (compare-and-set-fcc FRi FRj FCCi_2) 7434 ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare))) 7435 ) 7436 7437 (dni fcmpd 7438 "compare double float" 7439 ((UNIT FMALL) (FR500-MAJOR F-2) (MACH frv)) 7440 "fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2" 7441 (+ pack (cond-null) FCCi_2 OP_7A FRdoublei OPE1_0A FRdoublej) 7442 (compare-and-set-fcc FRdoublei FRdoublej FCCi_2) 7443 ((fr500 (unit u-float-compare))) 7444 ) 7445 7446 (dni cfcmps 7447 "Conditional compare single, float" 7448 ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) 7449 "cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond" 7450 (+ pack (cond-null) FCCi_2 OP_6D FRi CCi cond OPE4_2 FRj) 7451 (if (eq CCi (or cond 2)) 7452 (compare-and-set-fcc FRi FRj FCCi_2)) 7453 ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare))) 7454 ) 7455 7456 (dni fdcmps 7457 "float dual compare single" 7458 ((UNIT FMALL) (FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) 7459 "fdcmps$pack $FRi,$FRj,$FCCi_2" 7460 (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_1A FRj) 7461 (sequence () 7462 (compare-and-set-fcc FRi FRj FCCi_2) 7463 (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1) 7464 (nextreg h-fccr FCCi_2 1))) 7465 ((fr500 (unit u-float-dual-compare)) (fr550 (unit u-float-dual-compare))) 7466 ) 7467 7468 (define-pmacro (float-mul-with-add name add_sub arg1 arg2 targ op ope comment) 7469 (dni name 7470 (comment) 7471 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv)) 7472 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7473 (+ pack targ op arg1 ope arg2) 7474 (set targ (add_sub (mul arg1 arg2) targ)) 7475 ((fr500 (unit u-float-dual-arith))) 7476 ) 7477 ) 7478 7479 (float-mul-with-add fmadds add FRi FRj FRk OP_79 OPE1_0B "mul with add, single") 7480 (float-mul-with-add fmsubs sub FRi FRj FRk OP_79 OPE1_0C "mul with sub, single") 7481 7482 (float-mul-with-add fmaddd add FRdoublei FRdoublej FRdoublek OP_7A OPE1_0B "mul with add, double") 7483 (float-mul-with-add fmsubd sub FRdoublei FRdoublej FRdoublek OP_7A OPE1_0C "mul with sub, double") 7484 7485 (dni fdmadds 7486 "Float dual multiply with add" 7487 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv)) 7488 "fdmadds$pack $FRi,$FRj,$FRk" 7489 (+ pack FRk OP_79 FRi OPE1_1B FRj) 7490 (sequence () 7491 (set FRk (add (mul FRi FRj) FRk)) 7492 (set (nextreg h-fr FRk 1) 7493 (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)) 7494 (nextreg h-fr FRk 1)))) 7495 ; TODO dual registers not referenced for profiling 7496 ((fr500 (unit u-float-dual-arith))) 7497 ) 7498 7499 (dni nfdmadds 7500 "Non excepting float dual multiply with add" 7501 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv)) 7502 "nfdmadds$pack $FRi,$FRj,$FRk" 7503 (+ pack FRk OP_79 FRi OPE1_3B FRj) 7504 (sequence () 7505 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7506 (set FRk (add (mul FRi FRj) FRk)) 7507 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7508 (set (nextreg h-fr FRk 1) 7509 (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)) 7510 (nextreg h-fr FRk 1)))) 7511 ; TODO dual registers not referenced for profiling 7512 ((fr500 (unit u-float-dual-arith))) 7513 ) 7514 7515 (define-pmacro (conditional-float-mul-with-add 7516 name add_sub arg1 arg2 targ op ope comment) 7517 (dni name 7518 (comment) 7519 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) CONDITIONAL) 7520 (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond") 7521 (+ pack FRk op FRi CCi cond ope FRj) 7522 (if (eq CCi (or cond 2)) 7523 (set targ (add_sub (mul arg1 arg2) targ))) 7524 ((fr500 (unit u-float-dual-arith))) 7525 ) 7526 ) 7527 7528 (conditional-float-mul-with-add cfmadds add FRi FRj FRk OP_6F OPE4_0 "conditional mul with add, single") 7529 (conditional-float-mul-with-add cfmsubs sub FRi FRj FRk OP_6F OPE4_1 "conditional mul with sub, single") 7530 7531 (define-pmacro (ne-float-mul-with-add name add_sub arg1 arg2 targ op ope comment) 7532 (dni name 7533 (comment) 7534 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) NON-EXCEPTING) 7535 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7536 (+ pack targ op arg1 ope arg2) 7537 (sequence () 7538 (c-call VOID "@cpu@_set_ne_index" (index-of targ)) 7539 (set targ (add_sub (mul arg1 arg2) targ))) 7540 ((fr500 (unit u-float-dual-arith))) 7541 ) 7542 ) 7543 7544 (ne-float-mul-with-add nfmadds add FRi FRj FRk OP_79 OPE1_2B "non excepting mul with add, single") 7545 (ne-float-mul-with-add nfmsubs sub FRi FRj FRk OP_79 OPE1_2C "non excepting mul with sub, single") 7546 7547 (define-pmacro (float-parallel-mul-add-semantics cond add_sub arg1 arg2 targ) 7548 (if cond 7549 (sequence () 7550 (set targ (mul arg1 arg2)) 7551 (set (nextreg h-fr targ 1) 7552 (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1))))) 7553 ) 7554 7555 (define-pmacro (float-parallel-mul-add 7556 name add_sub arg1 arg2 targ op ope comment) 7557 (dni name 7558 (comment) 7559 ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) 7560 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7561 (+ pack targ op arg1 ope arg2) 7562 (float-parallel-mul-add-semantics 1 add_sub arg1 arg2 targ) 7563 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7564 ) 7565 ) 7566 7567 (float-parallel-mul-add fmas add FRi FRj FRk OP_79 OPE1_0E "parallel mul/add, single") 7568 (float-parallel-mul-add fmss sub FRi FRj FRk OP_79 OPE1_0F "parallel mul/sub, single") 7569 7570 (define-pmacro (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) 7571 (sequence () 7572 (set targ (mul arg1 arg2)) 7573 (set (nextreg h-fr targ 1) 7574 (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1))) 7575 (set (nextreg h-fr targ 2) 7576 (mul (nextreg h-fr arg1 2) (nextreg h-fr arg2 2))) 7577 (set (nextreg h-fr targ 3) 7578 (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3)))) 7579 ) 7580 7581 (define-pmacro (float-dual-parallel-mul-add 7582 name add_sub arg1 arg2 targ op ope comment) 7583 (dni name 7584 (comment) 7585 ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv)) 7586 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7587 (+ pack targ op arg1 ope arg2) 7588 (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) 7589 () 7590 ) 7591 ) 7592 7593 (float-dual-parallel-mul-add fdmas add FRi FRj FRk OP_79 OPE1_1C "dual parallel mul/add, single") 7594 (float-dual-parallel-mul-add fdmss sub FRi FRj FRk OP_79 OPE1_1D "dual parallel mul/sub, single") 7595 7596 (define-pmacro (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) 7597 (sequence () 7598 (c-call VOID "@cpu@_set_ne_index" (index-of targ)) 7599 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1)) 7600 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 2)) 7601 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 3)) 7602 (set targ (mul arg1 arg2)) 7603 (set (nextreg h-fr targ 1) 7604 (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1))) 7605 (set (nextreg h-fr targ 2) 7606 (mul (nextreg h-fr arg1 2) (nextreg h-fr arg2 2))) 7607 (set (nextreg h-fr targ 3) 7608 (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3)))) 7609 ) 7610 7611 (define-pmacro (ne-float-dual-parallel-mul-add 7612 name add_sub arg1 arg2 targ op ope comment) 7613 (dni name 7614 (comment) 7615 ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv)) 7616 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7617 (+ pack targ op arg1 ope arg2) 7618 (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ) 7619 () 7620 ) 7621 ) 7622 7623 (ne-float-dual-parallel-mul-add nfdmas add FRi FRj FRk OP_79 OPE1_3C "non excepting dual parallel mul/add, single") 7624 (ne-float-dual-parallel-mul-add nfdmss sub FRi FRj FRk OP_79 OPE1_3D "non excepting dual parallel mul/sub, single") 7625 7626 (define-pmacro (conditional-float-parallel-mul-add name add_sub op ope comment) 7627 (dni name 7628 (comment) 7629 ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) CONDITIONAL (MACH simple,tomcat,fr500,fr550,frv)) 7630 (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond") 7631 (+ pack FRk op FRi CCi cond ope FRj) 7632 (float-parallel-mul-add-semantics (eq CCi (or cond 2)) 7633 add_sub FRi FRj FRk) 7634 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7635 ) 7636 ) 7637 7638 (conditional-float-parallel-mul-add cfmas add OP_6F OPE4_2 "conditional parallel mul/add, single") 7639 (conditional-float-parallel-mul-add cfmss sub OP_6F OPE4_3 "conditional parallel mul/sub, single") 7640 7641 (define-pmacro (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ) 7642 (sequence () 7643 (set targ (ftrunc SF FPCONV-DEFAULT 7644 (mul DF 7645 (fext DF FPCONV-DEFAULT arg1) 7646 (fext DF FPCONV-DEFAULT arg2)))) 7647 (set (nextreg h-fr targ 1) 7648 (ftrunc SF FPCONV-DEFAULT 7649 (add_sub DF 7650 (fext DF FPCONV-DEFAULT (nextreg h-fr arg1 1)) 7651 (fext DF FPCONV-DEFAULT (nextreg h-fr arg2 1)))))) 7652 ) 7653 7654 (define-pmacro (float-parallel-mul-add-double 7655 name add_sub arg1 arg2 targ op ope comment) 7656 (dni name 7657 (comment) 7658 ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv)) 7659 (.str name "$pack $" arg1 ",$" arg2 ",$" targ) 7660 (+ pack targ op arg1 ope arg2) 7661 (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ) 7662 () 7663 ) 7664 ) 7665 7666 (float-parallel-mul-add-double fmad add FRi FRj FRk OP_7A OPE1_0E "parallel mul/add, double") 7667 (float-parallel-mul-add-double fmsd sub FRi FRj FRk OP_7A OPE1_0F "parallel mul/sub, double") 7668 7669 (define-pmacro (ne-float-parallel-mul-add name add_sub op ope comment) 7670 (dni name 7671 (comment) 7672 ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) 7673 (.str name "$pack $FRi,$FRj,$FRk") 7674 (+ pack FRk op FRi ope FRj) 7675 (sequence () 7676 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7677 (set FRk (mul FRi FRj)) 7678 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7679 (set (nextreg h-fr FRk 1) 7680 (add_sub (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)))) 7681 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7682 ) 7683 ) 7684 7685 (ne-float-parallel-mul-add nfmas add OP_79 OPE1_2E "ne parallel mul/add,single") 7686 (ne-float-parallel-mul-add nfmss sub OP_79 OPE1_2F "ne parallel mul/sub,single") 7687 7688 (define-pmacro (float-dual-arith name attr oper1 oper2 op ope comment) 7689 (dni name 7690 (comment) 7691 (.splice (UNIT FM01) (.unsplice attr)) 7692 (.str name "$pack $FRi,$FRj,$FRk") 7693 (+ pack FRk op FRi ope FRj) 7694 (sequence () 7695 (set FRk (oper1 FRi FRj)) 7696 (set (nextreg h-fr FRk 1) 7697 (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)))) 7698 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7699 ) 7700 ) 7701 7702 (float-dual-arith fdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_16 "dual add, single") 7703 (float-dual-arith fdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_17 "dual sub, single") 7704 (float-dual-arith fdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_18 "dual mul, single") 7705 (float-dual-arith fddivs ((FR500-MAJOR F-7) (MACH frv)) div div OP_79 OPE1_19 "dual div,single") 7706 (float-dual-arith fdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_1E "dual add/sub, single") 7707 7708 (dni fdmulcs 7709 "Float dual cross multiply single" 7710 ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) 7711 "fdmulcs$pack $FRi,$FRj,$FRk" 7712 (+ pack FRk OP_79 FRi OPE1_1F FRj) 7713 (sequence () 7714 (set FRk (mul FRi (nextreg h-fr FRj 1))) 7715 (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj))) 7716 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7717 ) 7718 7719 (dni nfdmulcs 7720 "NE float dual cross multiply single" 7721 ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) 7722 "nfdmulcs$pack $FRi,$FRj,$FRk" 7723 (+ pack FRk OP_79 FRi OPE1_3F FRj) 7724 (sequence () 7725 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7726 (set FRk (mul FRi (nextreg h-fr FRj 1))) 7727 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7728 (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj))) 7729 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7730 ) 7731 7732 (define-pmacro (ne-float-dual-arith name attr oper1 oper2 op ope comment) 7733 (dni name 7734 (comment) 7735 (.splice (UNIT FM01) (.unsplice attr)) 7736 (.str name "$pack $FRi,$FRj,$FRk") 7737 (+ pack FRk op FRi ope FRj) 7738 (sequence () 7739 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7740 (set FRk (oper1 FRi FRj)) 7741 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7742 (set (nextreg h-fr FRk 1) 7743 (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)))) 7744 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith))) 7745 ) 7746 ) 7747 7748 (ne-float-dual-arith nfdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_36 "ne dual add, single") 7749 (ne-float-dual-arith nfdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_37 "ne dual sub, single") 7750 (ne-float-dual-arith nfdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_38 "ne dual mul, single") 7751 (ne-float-dual-arith nfddivs ((FR500-MAJOR F-7) (MACH frv)) div div OP_79 OPE1_39 "ne dual div,single") 7752 (ne-float-dual-arith nfdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_3E "ne dual add/sub, single") 7753 7754 (dni nfdcmps 7755 "non-excepting dual float compare" 7756 ((UNIT FM01) (FR500-MAJOR F-6) (MACH simple,tomcat,frv)) 7757 "nfdcmps$pack $FRi,$FRj,$FCCi_2" 7758 (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_3A FRj) 7759 (sequence () 7760 (c-call VOID "@cpu@_set_ne_index" (index-of FRk)) 7761 (compare-and-set-fcc FRi FRj FCCi_2) 7762 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1)) 7763 (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1) 7764 (nextreg h-fccr FCCi_2 1))) 7765 ((fr500 (unit u-float-dual-compare))) 7766 ) 7767 7768 ; Media Instructions 7769 ; 7770 (define-pmacro (halfword hilo arg offset) 7771 (reg (.sym h-fr_ hilo) (add (index-of arg) offset))) 7772 7773 (dni mhsetlos 7774 "Media set lower signed 12 bits" 7775 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) 7776 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7777 "mhsetlos$pack $u12,$FRklo" 7778 (+ pack FRklo OP_78 OPE1_20 u12) 7779 (set FRklo u12) 7780 ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo)) 7781 (fr550 (unit u-media-set (out FRintk FRklo)))) 7782 ) 7783 7784 (dni mhsethis 7785 "Media set upper signed 12 bits" 7786 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) 7787 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7788 "mhsethis$pack $u12,$FRkhi" 7789 (+ pack FRkhi OP_78 OPE1_22 u12) 7790 (set FRkhi u12) 7791 ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo)) 7792 (fr550 (unit u-media-set (out FRintk FRkhi)))) 7793 ) 7794 7795 (dni mhdsets 7796 "Media dual set halfword signed 12 bits" 7797 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) 7798 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7799 "mhdsets$pack $u12,$FRintk" 7800 (+ pack FRintk OP_78 OPE1_24 u12) 7801 (sequence () 7802 ; hack to get FRintk passed to modelling functions 7803 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 7804 (set (halfword hi FRintk 0) u12) 7805 (set (halfword lo FRintk 0) u12)) 7806 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7807 (fr550 (unit u-media-set))) 7808 ) 7809 7810 (define-pmacro (set-5-semantics target value) 7811 (sequence ((HI tmp)) 7812 (set tmp target) 7813 (set tmp (and tmp #x07ff)) 7814 (set tmp (or tmp (sll (and s5 #x1f) 11))) 7815 (set target tmp)) 7816 ) 7817 7818 (define-pmacro (media-set-5 name hilo op ope comment) 7819 (dni name 7820 (comment) 7821 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) 7822 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7823 (.str name "$pack $s5,$FRk" hilo) 7824 (+ pack (.sym FRk hilo) op (FRi-null) ope (misc-null-11) s5) 7825 (set-5-semantics (.sym FRk hilo) s5) 7826 ((fr400 (unit u-media-hilo)) (fr450 (unit u-media-hilo)) 7827 (fr550 (unit u-media-set (out FRintk (.sym FRk hilo))))) 7828 ) 7829 ) 7830 7831 (media-set-5 mhsetloh lo OP_78 OPE1_21 "Media set upper 5 bits lo") 7832 (media-set-5 mhsethih hi OP_78 OPE1_23 "Media set upper 5 bits hi") 7833 7834 (dni mhdseth 7835 "Media dual set halfword upper 5 bits" 7836 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-5) 7837 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7838 "mhdseth$pack $s5,$FRintk" 7839 (+ pack FRintk OP_78 (FRi-null) OPE1_25 (misc-null-11) s5) 7840 (sequence () 7841 ; hack to get FRintk passed to modelling functions 7842 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 7843 (set-5-semantics (halfword hi FRintk 0) s5) 7844 (set-5-semantics (halfword lo FRintk 0) s5)) 7845 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7846 (fr550 (unit u-media-set))) 7847 ) 7848 7849 (define-pmacro (media-logic-r-r name operation op ope comment) 7850 (dni name 7851 (comment) 7852 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 7853 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7854 (.str name "$pack $FRinti,$FRintj,$FRintk") 7855 (+ pack FRintk op FRinti ope FRintj) 7856 (set FRintk (operation FRinti FRintj)) 7857 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7858 (fr500 (unit u-media)) (fr550 (unit u-media))) 7859 ) 7860 ) 7861 7862 (media-logic-r-r mand and OP_7B OPE1_00 "and reg/reg") 7863 (media-logic-r-r mor or OP_7B OPE1_01 "or reg/reg") 7864 (media-logic-r-r mxor xor OP_7B OPE1_02 "xor reg/reg") 7865 7866 (define-pmacro (conditional-media-logic name operation op ope comment) 7867 (dni name 7868 (comment) 7869 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 7870 (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) 7871 (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond") 7872 (+ pack FRintk op FRinti CCi cond ope FRintj) 7873 (if (eq CCi (or cond 2)) 7874 (set FRintk (operation FRinti FRintj))) 7875 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7876 (fr500 (unit u-media)) (fr550 (unit u-media))) 7877 ) 7878 ) 7879 7880 (conditional-media-logic cmand and OP_70 OPE4_0 "conditional and reg/reg") 7881 (conditional-media-logic cmor or OP_70 OPE4_1 "conditional or reg/reg") 7882 (conditional-media-logic cmxor xor OP_70 OPE4_2 "conditional xor reg/reg") 7883 7884 (dni mnot 7885 ("mnot") 7886 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 7887 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7888 ("mnot$pack $FRintj,$FRintk") 7889 (+ pack FRintk OP_7B (rs-null) OPE1_03 FRintj) 7890 (set FRintk (inv FRintj)) 7891 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7892 (fr500 (unit u-media)) (fr550 (unit u-media))) 7893 ) 7894 7895 (dni cmnot 7896 ("cmnot") 7897 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 7898 (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) 7899 ("cmnot$pack $FRintj,$FRintk,$CCi,$cond") 7900 (+ pack FRintk OP_70 (rs-null) CCi cond OPE4_3 FRintj) 7901 (if (eq CCi (or cond 2)) 7902 (set FRintk (inv FRintj))) 7903 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 7904 (fr500 (unit u-media)) (fr550 (unit u-media))) 7905 ) 7906 7907 (define-pmacro (media-rotate-r-r name operation op ope comment) 7908 (dni name 7909 (comment) 7910 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 7911 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 7912 (.str name "$pack $FRinti,$u6,$FRintk") 7913 (+ pack FRintk op FRinti ope u6) 7914 (set FRintk (operation FRinti (and u6 #x1f))) 7915 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 7916 (fr500 (unit u-media)) (fr550 (unit u-media))) 7917 ) 7918 ) 7919 7920 (media-rotate-r-r mrotli rol OP_7B OPE1_04 "rotate left reg/reg") 7921 (media-rotate-r-r mrotri ror OP_7B OPE1_05 "rotate right reg/reg") 7922 7923 (define-pmacro (media-cut-r-r name arg op ope comment) 7924 (dni name 7925 (comment) 7926 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 7927 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 7928 (.str name "$pack $FRinti,$" arg ",$FRintk") 7929 (+ pack FRintk op FRinti ope arg) 7930 (set FRintk (c-call SI "@cpu@_cut" FRinti (nextreg h-fr_int FRinti 1) arg)) 7931 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 7932 (fr500 (unit u-media)) (fr550 (unit u-media))) 7933 ) 7934 ) 7935 7936 (media-cut-r-r mwcut FRintj OP_7B OPE1_06 "media cut") 7937 (media-cut-r-r mwcuti u6 OP_7B OPE1_07 "media cut") 7938 7939 (define-pmacro (media-cut-acc name arg op ope fr450-major comment) 7940 (dni name 7941 (comment) 7942 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 7943 (FR400-MAJOR M-1) (FR450-MAJOR fr450-major)) 7944 (.str name "$pack $ACC40Si,$" arg ",$FRintk") 7945 (+ pack FRintk op ACC40Si ope arg) 7946 (set FRintk (c-call SI "@cpu@_media_cut" ACC40Si arg)) 7947 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) 7948 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc))) 7949 ) 7950 ) 7951 7952 (media-cut-acc mcut FRintj OP_7B OPE1_2C M-1 "media accumulator cut reg") 7953 (media-cut-acc mcuti s6 OP_7B OPE1_2E M-5 "media accumulator cut immed") 7954 7955 (define-pmacro (media-cut-acc-ss name arg op ope fr450-major comment) 7956 (dni name 7957 (comment) 7958 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 7959 (FR400-MAJOR M-1) (FR450-MAJOR fr450-major)) 7960 (.str name "$pack $ACC40Si,$" arg ",$FRintk") 7961 (+ pack FRintk op ACC40Si ope arg) 7962 (set FRintk (c-call SI "@cpu@_media_cut_ss" ACC40Si arg)) 7963 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) 7964 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc))) 7965 ) 7966 ) 7967 7968 (media-cut-acc-ss mcutss FRintj OP_7B OPE1_2D M-1 "media accumulator cut reg with saturation") 7969 (media-cut-acc-ss mcutssi s6 OP_7B OPE1_2F M-5 "media accumulator cut immed with saturation") 7970 7971 ; Dual Media Instructions 7972 ; 7973 (define-pmacro (register-unaligned register alignment) 7974 (and (index-of register) (sub alignment 1)) 7975 ) 7976 7977 (dni mdcutssi 7978 "Media dual cut with signed saturation" 7979 ((UNIT MDCUTSSI) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) 7980 (FR400-MAJOR M-2) (FR450-MAJOR M-6)) 7981 "mdcutssi$pack $ACC40Si,$s6,$FRintkeven" 7982 (+ pack FRintkeven OP_78 ACC40Si OPE1_0E s6) 7983 (if (register-unaligned ACC40Si 2) 7984 (c-call VOID "@cpu@_media_acc_not_aligned") 7985 (if (register-unaligned FRintkeven 2) 7986 (c-call VOID "@cpu@_media_register_not_aligned") 7987 (sequence () 7988 (set FRintkeven (c-call SI "@cpu@_media_cut_ss" ACC40Si s6)) 7989 (set (nextreg h-fr_int FRintkeven 1) 7990 (c-call SI "@cpu@_media_cut_ss" 7991 (nextreg h-acc40S ACC40Si 1) s6))))) 7992 ((fr400 (unit u-media-4-acc-dual 7993 (out FRintk FRintkeven))) 7994 (fr450 (unit u-media-4-acc-dual 7995 (out FRintk FRintkeven))) 7996 (fr550 (unit u-media-3-acc-dual))) 7997 ) 7998 7999 ; The (add (xxxx) (mul arg 0)) is a hack to get a reference to arg generated 8000 ; so it will be passed to the unit modelers. YUCK!!!!! 8001 (define-pmacro (extract-hilo reg1 off1 reg2 off2 arg1hi arg1lo arg2hi arg2lo) 8002 (sequence () 8003 (set arg1hi (add (halfword hi reg1 off1) (mul reg1 0))) 8004 (set arg1lo (add (halfword lo reg1 off1) (mul reg1 0))) 8005 (set arg2hi (add (halfword hi reg2 off2) (mul reg2 0))) 8006 (set arg2lo (add (halfword lo reg2 off2) (mul reg2 0)))) 8007 ) 8008 8009 (dni maveh 8010 "Media dual average" 8011 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8012 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8013 "maveh$pack $FRinti,$FRintj,$FRintk" 8014 (+ pack FRintk OP_7B FRinti OPE1_08 FRintj) 8015 (set FRintk (c-call SI "@cpu@_media_average" FRinti FRintj)) 8016 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 8017 (fr500 (unit u-media)) (fr550 (unit u-media))) 8018 ) 8019 8020 (define-pmacro (media-dual-shift name operation op ope profile comment) 8021 (dni name 8022 (comment) 8023 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 8024 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8025 (.str name "$pack $FRinti,$u6,$FRintk") 8026 (+ pack FRintk op FRinti ope u6) 8027 (sequence () 8028 ; hack to get these referenced for profiling 8029 (set FRinti (c-raw-call SI "frv_ref_SI" FRinti)) 8030 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 8031 (set (halfword hi FRintk 0) 8032 (operation (halfword hi FRinti 0) (and u6 #xf))) 8033 (set (halfword lo FRintk 0) 8034 (operation (halfword lo FRinti 0) (and u6 #xf)))) 8035 profile 8036 ) 8037 ) 8038 8039 (media-dual-shift msllhi sll OP_7B OPE1_09 8040 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 8041 (fr500 (unit u-media)) (fr550 (unit u-media))) 8042 "Media dual shift left logical") 8043 (media-dual-shift msrlhi srl OP_7B OPE1_0A 8044 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 8045 (fr500 (unit u-media)) (fr550 (unit u-media))) 8046 "Media dual shift right logical") 8047 (media-dual-shift msrahi sra OP_7B OPE1_0B 8048 ((fr400 (unit u-media-6)) (fr450 (unit u-media-6)) 8049 (fr500 (unit u-media)) (fr550 (unit u-media))) 8050 "Media dual shift right arithmetic") 8051 8052 (define-pmacro (media-dual-word-rotate-r-r name operation op ope comment) 8053 (dni name 8054 (comment) 8055 ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) 8056 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 8057 (.str name "$pack $FRintieven,$s6,$FRintkeven") 8058 (+ pack FRintkeven op FRintieven ope s6) 8059 (if (orif (register-unaligned FRintieven 2) 8060 (register-unaligned FRintkeven 2)) 8061 (c-call VOID "@cpu@_media_register_not_aligned") 8062 (sequence () 8063 (set FRintkeven (operation FRintieven (and s6 #x1f))) 8064 (set (nextreg h-fr_int FRintkeven 1) 8065 (operation (nextreg h-fr_int FRintieven 1) 8066 (and s6 #x1f))))) 8067 ((fr400 (unit u-media-3-quad 8068 (in FRinti FRintieven) 8069 (out FRintk FRintkeven))) 8070 (fr450 (unit u-media-3-quad 8071 (in FRinti FRintieven) 8072 (out FRintk FRintkeven))) 8073 (fr550 (unit u-media-quad))) 8074 ) 8075 ) 8076 8077 (media-dual-word-rotate-r-r mdrotli rol OP_78 OPE1_0B "rotate left reg/reg") 8078 8079 (dni mcplhi 8080 "Media bit concatenate, halfword" 8081 ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) 8082 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 8083 "mcplhi$pack $FRinti,$u6,$FRintk" 8084 (+ pack FRintk OP_78 FRinti OPE1_0C u6) 8085 (sequence ((HI arg1) (HI arg2) (HI shift)) 8086 (set FRinti (c-raw-call SI "frv_ref_SI" FRinti)) 8087 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 8088 (set shift (and u6 #xf)) 8089 (set arg1 (sll (halfword hi FRinti 0) shift)) 8090 (if (ne shift 0) 8091 (sequence () 8092 (set arg2 (halfword hi FRinti 1)) 8093 (set arg2 (srl HI (sll HI arg2 (sub 15 shift)) 8094 (sub 15 shift))) 8095 (set arg1 (or HI arg1 arg2)))) 8096 (set (halfword hi FRintk 0) arg1)) 8097 ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual)) 8098 (fr550 (unit u-media-3-dual))) 8099 ) 8100 8101 (dni mcpli 8102 "Media bit concatenate, word" 8103 ((UNIT FMLOW) (MACH fr400,fr450,fr550) (FR550-MAJOR M-3) 8104 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 8105 "mcpli$pack $FRinti,$u6,$FRintk" 8106 (+ pack FRintk OP_78 FRinti OPE1_0D u6) 8107 (sequence ((SI tmp) (SI shift)) 8108 (set shift (and u6 #x1f)) 8109 (set tmp (sll FRinti shift)) 8110 (if (ne shift 0) 8111 (sequence ((SI tmp1)) 8112 (set tmp1 (srl (sll (nextreg h-fr_int FRinti 1) 8113 (sub 31 shift)) 8114 (sub 31 shift))) 8115 (set tmp (or tmp tmp1)))) 8116 (set FRintk tmp)) 8117 ((fr400 (unit u-media-3-dual)) (fr450 (unit u-media-3-dual)) 8118 (fr550 (unit u-media-3-dual))) 8119 ) 8120 8121 (define-pmacro (saturate arg max min result) 8122 (if (gt arg max) 8123 (set result max) 8124 (if (lt arg min) 8125 (set result min) 8126 (set result arg))) 8127 ) 8128 8129 (dni msaths 8130 "Media dual saturation signed" 8131 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8132 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8133 "msaths$pack $FRinti,$FRintj,$FRintk" 8134 (+ pack FRintk OP_7B FRinti OPE1_0C FRintj) 8135 (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo)) 8136 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) 8137 (saturate argihi argjhi (inv argjhi) (halfword hi FRintk 0)) 8138 (saturate argilo argjlo (inv argjlo) (halfword lo FRintk 0))) 8139 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 8140 (fr500 (unit u-media)) (fr550 (unit u-media))) 8141 ) 8142 8143 (dni mqsaths 8144 "Media quad saturation signed" 8145 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2) 8146 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 8147 "mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven" 8148 (+ pack FRintkeven OP_78 FRintieven OPE1_0F FRintjeven) 8149 (if (orif (register-unaligned FRintieven 2) 8150 (orif (register-unaligned FRintjeven 2) 8151 (register-unaligned FRintkeven 2))) 8152 (c-call VOID "@cpu@_media_register_not_aligned") 8153 (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo)) 8154 ; hack to get FRintkeven referenced as a target for profiling 8155 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 8156 (extract-hilo FRintieven 0 FRintjeven 0 argihi argilo argjhi argjlo) 8157 (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 0)) 8158 (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 0)) 8159 (extract-hilo FRintieven 1 FRintjeven 1 argihi argilo argjhi argjlo) 8160 (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 1)) 8161 (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 1)))) 8162 ((fr400 (unit u-media-1-quad 8163 (in FRinti FRintieven) 8164 (in FRintj FRintjeven) 8165 (out FRintk FRintkeven))) 8166 (fr450 (unit u-media-1-quad 8167 (in FRinti FRintieven) 8168 (in FRintj FRintjeven) 8169 (out FRintk FRintkeven))) 8170 (fr550 (unit u-media-quad))) 8171 ) 8172 8173 (define-pmacro (saturate-unsigned arg max result) 8174 (if (gt arg max) 8175 (set result max) 8176 (set result arg)) 8177 ) 8178 8179 (dni msathu 8180 "Media dual saturation unsigned" 8181 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8182 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8183 "msathu$pack $FRinti,$FRintj,$FRintk" 8184 (+ pack FRintk OP_7B FRinti OPE1_0D FRintj) 8185 (sequence ((UHI argihi) (UHI argilo) (UHI argjhi) (UHI argjlo)) 8186 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) 8187 (saturate-unsigned argihi argjhi (halfword hi FRintk 0)) 8188 (saturate-unsigned argilo argjlo (halfword lo FRintk 0))) 8189 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 8190 (fr500 (unit u-media)) (fr550 (unit u-media))) 8191 ) 8192 8193 (define-pmacro (media-dual-compare name mode op ope comment) 8194 (dni name 8195 (comment) 8196 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8197 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8198 (.str name "$pack $FRinti,$FRintj,$FCCk") 8199 (+ pack (cond-null) FCCk op FRinti ope FRintj) 8200 (if (register-unaligned FCCk 2) 8201 (c-call VOID "@cpu@_media_cr_not_aligned") 8202 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 8203 (extract-hilo FRinti 0 FRintj 0 8204 argihi argilo argjhi argjlo) 8205 (compare-and-set-fcc argihi argjhi FCCk) 8206 (compare-and-set-fcc argilo argjlo (nextreg h-fccr FCCk 1)))) 8207 ; TODO - doesn't handle second FCC 8208 ((fr400 (unit u-media-7)) (fr450 (unit u-media-7)) 8209 (fr500 (unit u-media)) (fr550 (unit u-media))) 8210 ) 8211 ) 8212 8213 (media-dual-compare mcmpsh HI OP_7B OPE1_0E "Media dual compare signed") 8214 (media-dual-compare mcmpuh UHI OP_7B OPE1_0F "Media dual compare unsigned") 8215 8216 ; Bits for the MSR.SIE field 8217 (define-pmacro (msr-sie-nil) 0) 8218 (define-pmacro (msr-sie-fri-hi) 8) 8219 (define-pmacro (msr-sie-fri-lo) 4) 8220 (define-pmacro (msr-sie-fri-1-hi) 2) 8221 (define-pmacro (msr-sie-fri-1-lo) 1) 8222 (define-pmacro (msr-sie-acci) 8) 8223 (define-pmacro (msr-sie-acci-1) 4) 8224 (define-pmacro (msr-sie-acci-2) 2) 8225 (define-pmacro (msr-sie-acci-3) 1) 8226 8227 (define-pmacro (saturate-v arg max min sie result) 8228 (if (gt DI arg max) 8229 (sequence () 8230 (set result max) 8231 (c-call VOID "@cpu@_media_overflow" sie)) 8232 (if (lt DI arg min) 8233 (sequence () 8234 (set result min) 8235 (c-call VOID "@cpu@_media_overflow" sie)) 8236 (set result arg))) 8237 ) 8238 8239 (dni mabshs 8240 "Media dual absolute value, halfword" 8241 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-2) 8242 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8243 "mabshs$pack $FRintj,$FRintk" 8244 (+ pack FRintk OP_78 (FRi-null) OPE1_0A FRintj) 8245 (sequence ((HI arghi) (HI arglo)) 8246 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) 8247 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 8248 (set arghi (halfword hi FRintj 0)) 8249 (set arglo (halfword lo FRintj 0)) 8250 ; We extend the argument before the abs operation so we can 8251 ; notice -32768 overflowing as 32768. 8252 (saturate-v (abs (ext DI arghi)) 32767 -32768 (msr-sie-fri-hi) 8253 (halfword hi FRintk 0)) 8254 (saturate-v (abs (ext DI arglo)) 32767 -32768 (msr-sie-fri-lo) 8255 (halfword lo FRintk 0))) 8256 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 8257 (fr550 (unit u-media))) 8258 ) 8259 8260 ; How to extend from a mode to get the intended signedness. 8261 (define-pmacro (DI-ext-HI x) (ext DI x)) 8262 (define-pmacro (DI-ext-UHI x) (zext DI x)) 8263 (define-pmacro (DI-ext-DI x) x) 8264 8265 (define-pmacro (media-arith-sat-semantics 8266 operation arg1 arg2 res mode max min sie) 8267 (sequence ((DI tmp)) 8268 ; Make sure we saturate at max/min against a value that is 8269 ; sign- or zero-extended appropriately from "mode". 8270 (set tmp (operation DI 8271 ((.sym DI-ext- mode) arg1) ((.sym DI-ext- mode) arg2))) 8272 (saturate-v tmp max min sie res)) 8273 ) 8274 8275 (define-pmacro (media-dual-arith-sat-semantics operation mode max min) 8276 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 8277 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) 8278 (media-arith-sat-semantics operation argihi argjhi 8279 (halfword hi FRintk 0) mode max min 8280 (msr-sie-fri-hi)) 8281 (media-arith-sat-semantics operation argilo argjlo 8282 (halfword lo FRintk 0) mode max min 8283 (msr-sie-fri-lo))) 8284 ) 8285 8286 (define-pmacro (media-dual-arith-sat name operation mode max min op ope comment) 8287 (dni name 8288 (comment) 8289 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8290 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 8291 (.str name "$pack $FRinti,$FRintj,$FRintk") 8292 (+ pack FRintk op FRinti ope FRintj) 8293 (media-dual-arith-sat-semantics operation mode max min) 8294 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 8295 (fr500 (unit u-media)) (fr550 (unit u-media))) 8296 ) 8297 ) 8298 8299 (media-dual-arith-sat maddhss add HI 32767 -32768 OP_7B OPE1_10 "Media dual add signed with saturation") 8300 (media-dual-arith-sat maddhus add UHI 65535 0 OP_7B OPE1_11 "Media dual add unsigned with saturation") 8301 8302 (media-dual-arith-sat msubhss sub HI 32767 -32768 OP_7B OPE1_12 "Media dual sub signed with saturation") 8303 (media-dual-arith-sat msubhus sub UHI 65535 0 OP_7B OPE1_13 "Media dual sub unsigned with saturation") 8304 8305 (define-pmacro (conditional-media-dual-arith-sat 8306 name operation mode max min op ope comment) 8307 (dni name 8308 (comment) 8309 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8310 (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) 8311 (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond") 8312 (+ pack FRintk op FRinti CCi cond ope FRintj) 8313 (if (eq CCi (or cond 2)) 8314 (media-dual-arith-sat-semantics operation mode max min)) 8315 ((fr400 (unit u-media-1)) (fr450 (unit u-media-1)) 8316 (fr500 (unit u-media)) (fr550 (unit u-media))) 8317 ) 8318 ) 8319 8320 (conditional-media-dual-arith-sat cmaddhss add HI 32767 -32768 OP_71 OPE4_0 "Conditional Media dual add signed with saturation") 8321 (conditional-media-dual-arith-sat cmaddhus add UHI 65535 0 OP_71 OPE4_1 "Conditional Media dual add unsigned with saturation") 8322 8323 (conditional-media-dual-arith-sat cmsubhss sub HI 32767 -32768 OP_71 OPE4_2 "Conditional Media dual sub signed with saturation") 8324 (conditional-media-dual-arith-sat cmsubhus sub UHI 65535 0 OP_71 OPE4_3 "Conditional Media dual sub unsigned with saturation") 8325 8326 (define-pmacro (media-quad-arith-sat-semantics cond operation mode max min) 8327 (if (orif (register-unaligned FRintieven 2) 8328 (orif (register-unaligned FRintjeven 2) 8329 (register-unaligned FRintkeven 2))) 8330 (c-call VOID "@cpu@_media_register_not_aligned") 8331 (if cond 8332 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 8333 ; hack to get FRintkeven referenced as a target for profiling 8334 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 8335 (extract-hilo FRintieven 0 FRintjeven 0 8336 argihi argilo argjhi argjlo) 8337 (media-arith-sat-semantics operation argihi argjhi 8338 (halfword hi FRintkeven 0) mode 8339 max min (msr-sie-fri-hi)) 8340 (media-arith-sat-semantics operation argilo argjlo 8341 (halfword lo FRintkeven 0) mode 8342 max min (msr-sie-fri-lo)) 8343 (extract-hilo FRintieven 1 FRintjeven 1 8344 argihi argilo argjhi argjlo) 8345 (media-arith-sat-semantics operation argihi argjhi 8346 (halfword hi FRintkeven 1) mode 8347 max min (msr-sie-fri-1-hi)) 8348 (media-arith-sat-semantics operation argilo argjlo 8349 (halfword lo FRintkeven 1) mode 8350 max min (msr-sie-fri-1-lo))))) 8351 ) 8352 8353 (define-pmacro (media-quad-arith-sat name operation mode max min op ope comment) 8354 (dni name 8355 (comment) 8356 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8357 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 8358 (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven") 8359 (+ pack FRintkeven op FRintieven ope FRintjeven) 8360 (media-quad-arith-sat-semantics 1 operation mode max min) 8361 ((fr400 (unit u-media-1-quad 8362 (in FRinti FRintieven) 8363 (in FRintj FRintjeven) 8364 (out FRintk FRintkeven))) 8365 (fr450 (unit u-media-1-quad 8366 (in FRinti FRintieven) 8367 (in FRintj FRintjeven) 8368 (out FRintk FRintkeven))) 8369 (fr500 (unit u-media-quad-arith 8370 (in FRinti FRintieven) 8371 (in FRintj FRintjeven) 8372 (out FRintk FRintkeven))) (fr550 (unit u-media-quad))) 8373 ) 8374 ) 8375 8376 (media-quad-arith-sat mqaddhss add HI 32767 -32768 OP_7B OPE1_18 "Media quad add signed with saturation") 8377 (media-quad-arith-sat mqaddhus add UHI 65535 0 OP_7B OPE1_19 "Media quad add unsigned with saturation") 8378 8379 (media-quad-arith-sat mqsubhss sub HI 32767 -32768 OP_7B OPE1_1A "Media quad sub signed with saturation") 8380 (media-quad-arith-sat mqsubhus sub UHI 65535 0 OP_7B OPE1_1B "Media quad sub unsigned with saturation") 8381 8382 (define-pmacro (conditional-media-quad-arith-sat 8383 name operation mode max min op ope comment) 8384 (dni name 8385 (comment) 8386 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) 8387 (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) 8388 (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond") 8389 (+ pack FRintkeven op FRintieven CCi cond ope FRintjeven) 8390 (media-quad-arith-sat-semantics (eq CCi (or cond 2)) 8391 operation mode max min) 8392 ((fr400 (unit u-media-1-quad 8393 (in FRinti FRintieven) 8394 (in FRintj FRintjeven) 8395 (out FRintk FRintkeven))) 8396 (fr450 (unit u-media-1-quad 8397 (in FRinti FRintieven) 8398 (in FRintj FRintjeven) 8399 (out FRintk FRintkeven))) 8400 (fr500 (unit u-media-quad-arith 8401 (in FRinti FRintieven) 8402 (in FRintj FRintjeven) 8403 (out FRintk FRintkeven))) (fr550 (unit u-media-quad))) 8404 ) 8405 ) 8406 8407 (conditional-media-quad-arith-sat cmqaddhss add HI 32767 -32768 OP_73 OPE4_0 "Conditional Media quad add signed with saturation") 8408 (conditional-media-quad-arith-sat cmqaddhus add UHI 65535 0 OP_73 OPE4_1 "Conditional Media quad add unsigned with saturation") 8409 8410 (conditional-media-quad-arith-sat cmqsubhss sub HI 32767 -32768 OP_73 OPE4_2 "Conditional Media quad sub signed with saturation") 8411 (conditional-media-quad-arith-sat cmqsubhus sub UHI 65535 0 OP_73 OPE4_3 "Conditional Media quad sub unsigned with saturation") 8412 8413 ;; Return A if |A| > |B| and B is positive. Return -A if |A| > |B| and 8414 ;; B is negative, saturating 0x8000 as 0x7fff. Return 0 otherwise. 8415 (define-pmacro (media-low-clear-semantics a b) 8416 (cond HI 8417 ((le UHI (abs a) (abs b)) 0) 8418 ((le HI 0 b) a) 8419 ((eq HI a -32768) 32767) 8420 (else (neg a)))) 8421 8422 ;; Return A if -|B| < A < |B|. Return -B if A <= -|B|, saturating 0x8000 8423 ;; as 0x7fff. Return B if A >= |B|. 8424 (define-pmacro (media-scope-limit-semantics a b) 8425 (cond HI 8426 ((andif (gt HI b -32768) 8427 (ge HI a (abs b))) b) 8428 ((gt HI a (neg (abs b))) a) 8429 ((eq HI b -32768) 32767) 8430 (else (neg b)))) 8431 8432 (define-pmacro (media-quad-limit name operation op ope comment) 8433 (dni name 8434 comment 8435 ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2)) 8436 (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven") 8437 (+ pack FRintkeven op FRintieven ope FRintjeven) 8438 (if (orif (register-unaligned FRintieven 2) 8439 (orif (register-unaligned FRintjeven 2) 8440 (register-unaligned FRintkeven 2))) 8441 (c-call VOID "@cpu@_media_register_not_aligned") 8442 (sequence ((HI a1) (HI a2) (HI a3) (HI a4) 8443 (HI b1) (HI b2) (HI b3) (HI b4)) 8444 ; hack to get FRintkeven referenced as a target 8445 ; for profiling 8446 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 8447 (extract-hilo FRintieven 0 FRintjeven 0 a1 a2 b1 b2) 8448 (extract-hilo FRintieven 1 FRintjeven 1 a3 a4 b3 b4) 8449 (set (halfword hi FRintkeven 0) (operation a1 b1)) 8450 (set (halfword lo FRintkeven 0) (operation a2 b2)) 8451 (set (halfword hi FRintkeven 1) (operation a3 b3)) 8452 (set (halfword lo FRintkeven 1) (operation a4 b4)))) 8453 ((fr450 (unit u-media-1-quad 8454 (in FRinti FRintieven) 8455 (in FRintj FRintjeven) 8456 (out FRintk FRintkeven)))) 8457 ) 8458 ) 8459 8460 (media-quad-limit mqlclrhs media-low-clear-semantics OP_78 OPE1_10 8461 "Media quad low clear") 8462 (media-quad-limit mqlmths media-scope-limit-semantics OP_78 OPE1_14 8463 "Media quad scope limitation") 8464 8465 (define-pmacro (media-quad-shift name operation op ope comment) 8466 (dni name 8467 (comment) 8468 ((UNIT FM0) (MACH fr450) (FR450-MAJOR M-2)) 8469 (.str name "$pack $FRintieven,$u6,$FRintkeven") 8470 (+ pack FRintkeven op FRintieven ope u6) 8471 (if (orif (register-unaligned FRintieven 2) 8472 (register-unaligned FRintkeven 2)) 8473 (c-call VOID "@cpu@_media_register_not_aligned") 8474 (sequence () 8475 ; hack to get these referenced for profiling 8476 (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven)) 8477 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 8478 (set (halfword hi FRintkeven 0) 8479 (operation HI (halfword hi FRintieven 0) 8480 (and u6 #xf))) 8481 (set (halfword lo FRintkeven 0) 8482 (operation HI (halfword lo FRintieven 0) 8483 (and u6 #xf))) 8484 (set (halfword hi FRintkeven 1) 8485 (operation HI (halfword hi FRintieven 1) 8486 (and u6 #xf))) 8487 (set (halfword lo FRintkeven 1) 8488 (operation HI (halfword lo FRintieven 1) 8489 (and u6 #xf))))) 8490 ((fr450 (unit u-media-3-quad 8491 (in FRinti FRintieven) 8492 (in FRintj FRintieven) 8493 (out FRintk FRintkeven)))) 8494 ) 8495 ) 8496 8497 (media-quad-shift mqsllhi sll OP_78 OPE1_11 "Media quad left shift") 8498 (media-quad-shift mqsrahi sra OP_78 OPE1_13 "Media quad right shift") 8499 8500 (define-pmacro (media-acc-arith-sat name operation mode max min op ope comment) 8501 (dni name 8502 (comment) 8503 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 8504 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 8505 (.str name "$pack $ACC40Si,$ACC40Sk") 8506 (+ pack ACC40Sk op ACC40Si ope (ACCj-null)) 8507 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) 8508 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8509 (if (register-unaligned ACC40Si 2) 8510 (c-call VOID "@cpu@_media_acc_not_aligned") 8511 (media-arith-sat-semantics operation ACC40Si 8512 (nextreg h-acc40S ACC40Si 1) 8513 ACC40Sk mode max min (msr-sie-acci))))) 8514 ((fr400 (unit u-media-2-acc)) (fr450 (unit u-media-2-acc)) 8515 (fr550 (unit u-media-4-acc))) 8516 ) 8517 ) 8518 8519 (media-acc-arith-sat maddaccs add DI #x7fffffffff (inv DI #x7fffffffff) 8520 OP_78 OPE1_04 "Media accumulator addition") 8521 (media-acc-arith-sat msubaccs sub DI #x7fffffffff (inv DI #x7fffffffff) 8522 OP_78 OPE1_05 "Media accumulator subtraction") 8523 8524 (define-pmacro (media-dual-acc-arith-sat name operation mode max min op ope 8525 comment) 8526 (dni name 8527 (comment) 8528 ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 8529 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 8530 (.str name "$pack $ACC40Si,$ACC40Sk") 8531 (+ pack ACC40Sk op ACC40Si ope (ACCj-null)) 8532 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) 8533 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8534 (if (register-unaligned ACC40Si 4) 8535 (c-call VOID "@cpu@_media_acc_not_aligned") 8536 (if (register-unaligned ACC40Sk 2) 8537 (c-call VOID "@cpu@_media_acc_not_aligned") 8538 (sequence () 8539 (media-arith-sat-semantics operation ACC40Si 8540 (nextreg h-acc40S ACC40Si 1) 8541 ACC40Sk mode max min 8542 (msr-sie-acci)) 8543 (media-arith-sat-semantics operation 8544 (nextreg h-acc40S ACC40Si 2) 8545 (nextreg h-acc40S ACC40Si 3) 8546 (nextreg h-acc40S ACC40Sk 1) 8547 mode max min 8548 (msr-sie-acci-1))))))) 8549 ((fr400 (unit u-media-2-acc-dual)) (fr450 (unit u-media-2-acc-dual)) 8550 (fr550 (unit u-media-4-acc-dual))) 8551 ) 8552 ) 8553 8554 (media-dual-acc-arith-sat mdaddaccs add DI #x7fffffffff (inv DI #x7fffffffff) 8555 OP_78 OPE1_06 "Media accumulator addition") 8556 (media-dual-acc-arith-sat mdsubaccs sub DI #x7fffffffff (inv DI #x7fffffffff) 8557 OP_78 OPE1_07 "Media accumulator subtraction") 8558 8559 (dni masaccs 8560 "Media add and subtract signed accumulator with saturation" 8561 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 8562 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 8563 "masaccs$pack $ACC40Si,$ACC40Sk" 8564 (+ pack ACC40Sk OP_78 ACC40Si OPE1_08 (ACCj-null)) 8565 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) 8566 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8567 (if (register-unaligned ACC40Si 2) 8568 (c-call VOID "@cpu@_media_acc_not_aligned") 8569 (if (register-unaligned ACC40Sk 2) 8570 (c-call VOID "@cpu@_media_acc_not_aligned") 8571 (sequence () 8572 (media-arith-sat-semantics add ACC40Si 8573 (nextreg h-acc40S ACC40Si 1) 8574 ACC40Sk DI 8575 #x7fffffffff 8576 (inv DI #x7fffffffff) 8577 (msr-sie-acci)) 8578 (media-arith-sat-semantics sub ACC40Si 8579 (nextreg h-acc40S ACC40Si 1) 8580 (nextreg h-acc40S ACC40Sk 1) 8581 DI 8582 #x7fffffffff 8583 (inv DI #x7fffffffff) 8584 (msr-sie-acci-1))))))) 8585 ((fr400 (unit u-media-2-add-sub)) (fr450 (unit u-media-2-add-sub)) 8586 (fr550 (unit u-media-4-add-sub))) 8587 ) 8588 8589 (dni mdasaccs 8590 "Media add and subtract signed accumulator with saturation" 8591 ((UNIT MDUALACC) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 8592 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 8593 "mdasaccs$pack $ACC40Si,$ACC40Sk" 8594 (+ pack ACC40Sk OP_78 ACC40Si OPE1_09 (ACCj-null)) 8595 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si)) 8596 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8597 (if (register-unaligned ACC40Si 4) 8598 (c-call VOID "@cpu@_media_acc_not_aligned") 8599 (if (register-unaligned ACC40Sk 4) 8600 (c-call VOID "@cpu@_media_acc_not_aligned") 8601 (sequence () 8602 (media-arith-sat-semantics add ACC40Si 8603 (nextreg h-acc40S ACC40Si 1) 8604 ACC40Sk DI 8605 #x7fffffffff 8606 (inv DI #x7fffffffff) 8607 (msr-sie-acci)) 8608 (media-arith-sat-semantics sub ACC40Si 8609 (nextreg h-acc40S ACC40Si 1) 8610 (nextreg h-acc40S ACC40Sk 1) 8611 DI 8612 #x7fffffffff 8613 (inv DI #x7fffffffff) 8614 (msr-sie-acci-1)) 8615 (media-arith-sat-semantics add 8616 (nextreg h-acc40S ACC40Si 2) 8617 (nextreg h-acc40S ACC40Si 3) 8618 (nextreg h-acc40S ACC40Sk 2) 8619 DI 8620 #x7fffffffff 8621 (inv DI #x7fffffffff) 8622 (msr-sie-acci-2)) 8623 (media-arith-sat-semantics sub 8624 (nextreg h-acc40S ACC40Si 2) 8625 (nextreg h-acc40S ACC40Si 3) 8626 (nextreg h-acc40S ACC40Sk 3) 8627 DI 8628 #x7fffffffff 8629 (inv DI #x7fffffffff) 8630 (msr-sie-acci-3))))))) 8631 ((fr400 (unit u-media-2-add-sub-dual)) 8632 (fr450 (unit u-media-2-add-sub-dual)) 8633 (fr550 (unit u-media-4-add-sub-dual))) 8634 ) 8635 8636 (define-pmacro (media-multiply-semantics conv arg1 arg2 res) 8637 (set res (mul DI (conv DI arg1) (conv DI arg2))) 8638 ) 8639 8640 (define-pmacro (media-dual-multiply-semantics cond mode conv rhs1 rhs2) 8641 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8642 (if (register-unaligned ACC40Sk 2) 8643 (c-call VOID "@cpu@_media_acc_not_aligned") 8644 (if cond 8645 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 8646 (extract-hilo FRinti 0 FRintj 0 8647 argihi argilo argjhi argjlo) 8648 (media-multiply-semantics conv argihi rhs1 ACC40Sk) 8649 (media-multiply-semantics conv argilo rhs2 8650 (nextreg h-acc40S ACC40Sk 1)))))) 8651 ) 8652 8653 (define-pmacro (media-dual-multiply name mode conv rhs1 rhs2 op ope comment) 8654 (dni name 8655 (comment) 8656 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8657 (FR400-MAJOR M-1) (FR450-MAJOR M-3) PRESERVE-OVF) 8658 (.str name "$pack $FRinti,$FRintj,$ACC40Sk") 8659 (+ pack ACC40Sk op FRinti ope FRintj) 8660 (media-dual-multiply-semantics 1 mode conv rhs1 rhs2) 8661 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 8662 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 8663 ) 8664 ) 8665 8666 (media-dual-multiply mmulhs HI ext argjhi argjlo OP_7B OPE1_14 "Media dual multiply signed") 8667 (media-dual-multiply mmulhu UHI zext argjhi argjlo OP_7B OPE1_15 "Media dual multiply unsigned") 8668 8669 (media-dual-multiply mmulxhs HI ext argjlo argjhi OP_7B OPE1_28 "Media dual cross multiply signed") 8670 (media-dual-multiply mmulxhu UHI zext argjlo argjhi OP_7B OPE1_29 "Media dual cross multiply unsigned") 8671 8672 (define-pmacro (conditional-media-dual-multiply 8673 name mode conv rhs1 rhs2 op ope comment) 8674 (dni name 8675 (comment) 8676 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8677 (FR400-MAJOR M-1) (FR450-MAJOR M-3) 8678 PRESERVE-OVF CONDITIONAL) 8679 (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") 8680 (+ pack ACC40Sk op FRinti CCi cond ope FRintj) 8681 (media-dual-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2) 8682 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 8683 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 8684 ) 8685 ) 8686 8687 (conditional-media-dual-multiply cmmulhs HI ext argjhi argjlo OP_72 OPE4_0 "Conditional Media dual multiply signed") 8688 (conditional-media-dual-multiply cmmulhu UHI zext argjhi argjlo OP_72 OPE4_1 "Conditional Media dual multiply unsigned") 8689 8690 (define-pmacro (media-quad-multiply-semantics cond mode conv rhs1 rhs2) 8691 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 8692 (if (register-unaligned ACC40Sk 4) 8693 (c-call VOID "@cpu@_media_acc_not_aligned") 8694 (if (orif (register-unaligned FRintieven 2) 8695 (register-unaligned FRintjeven 2)) 8696 (c-call VOID "@cpu@_media_register_not_aligned") 8697 (if cond 8698 (sequence ((mode argihi) (mode argilo) 8699 (mode argjhi) (mode argjlo)) 8700 (extract-hilo FRintieven 0 FRintjeven 0 8701 argihi argilo argjhi argjlo) 8702 (media-multiply-semantics conv argihi rhs1 ACC40Sk) 8703 (media-multiply-semantics conv argilo rhs2 8704 (nextreg h-acc40S ACC40Sk 1)) 8705 (extract-hilo FRintieven 1 FRintjeven 1 8706 argihi argilo argjhi argjlo) 8707 (media-multiply-semantics conv argihi rhs1 8708 (nextreg h-acc40S ACC40Sk 2)) 8709 (media-multiply-semantics conv argilo rhs2 8710 (nextreg h-acc40S ACC40Sk 3))))))) 8711 ) 8712 8713 (define-pmacro (media-quad-multiply name mode conv rhs1 rhs2 op ope comment) 8714 (dni name 8715 (comment) 8716 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8717 (FR400-MAJOR M-2) (FR450-MAJOR M-4) PRESERVE-OVF) 8718 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") 8719 (+ pack ACC40Sk op FRintieven ope FRintjeven) 8720 (media-quad-multiply-semantics 1 mode conv rhs1 rhs2) 8721 ((fr400 (unit u-media-2-quad 8722 (in FRinti FRintieven) 8723 (in FRintj FRintjeven))) 8724 (fr450 (unit u-media-2-quad 8725 (in FRinti FRintieven) 8726 (in FRintj FRintjeven))) 8727 (fr500 (unit u-media-quad-mul 8728 (in FRinti FRintieven) 8729 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 8730 ) 8731 ) 8732 8733 (media-quad-multiply mqmulhs HI ext argjhi argjlo OP_7B OPE1_1C "Media quad multiply signed") 8734 (media-quad-multiply mqmulhu UHI zext argjhi argjlo OP_7B OPE1_1D "Media quad multiply unsigned") 8735 8736 (media-quad-multiply mqmulxhs HI ext argjlo argjhi OP_7B OPE1_2A "Media quad cross multiply signed") 8737 (media-quad-multiply mqmulxhu UHI zext argjlo argjhi OP_7B OPE1_2B "Media quad cross multiply unsigned") 8738 8739 (define-pmacro (conditional-media-quad-multiply 8740 name mode conv rhs1 rhs2 op ope comment) 8741 (dni name 8742 (comment) 8743 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8744 (FR400-MAJOR M-2) (FR450-MAJOR M-4) 8745 PRESERVE-OVF CONDITIONAL) 8746 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond") 8747 (+ pack ACC40Sk op FRintieven CCi cond ope FRintjeven) 8748 (media-quad-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2) 8749 ((fr400 (unit u-media-2-quad 8750 (in FRinti FRintieven) 8751 (in FRintj FRintjeven))) 8752 (fr450 (unit u-media-2-quad 8753 (in FRinti FRintieven) 8754 (in FRintj FRintjeven))) 8755 (fr500 (unit u-media-quad-mul 8756 (in FRinti FRintieven) 8757 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 8758 ) 8759 ) 8760 8761 (conditional-media-quad-multiply cmqmulhs HI ext argjhi argjlo OP_74 OPE4_0 "Conditional Media quad multiply signed") 8762 (conditional-media-quad-multiply cmqmulhu UHI zext argjhi argjlo OP_74 OPE4_1 "Conditional Media quad multiply unsigned") 8763 8764 (define-pmacro (media-multiply-acc-semantics 8765 conv arg1 addop arg2 res max min sie) 8766 (sequence ((DI tmp)) 8767 (set tmp (addop res (mul DI (conv DI arg1) (conv DI arg2)))) 8768 (saturate-v tmp max min sie res)) 8769 ) 8770 8771 (define-pmacro (media-dual-multiply-acc-semantics 8772 cond mode conv addop rhw res max min) 8773 (if (c-call SI "@cpu@_check_acc_range" (index-of res)) 8774 (if (register-unaligned res 2) 8775 (c-call VOID "@cpu@_media_acc_not_aligned") 8776 (if cond 8777 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 8778 (extract-hilo FRinti 0 FRintj 0 8779 argihi argilo argjhi argjlo) 8780 (media-multiply-acc-semantics conv argihi addop argjhi 8781 res 8782 max min (msr-sie-acci)) 8783 (media-multiply-acc-semantics conv argilo addop argjlo 8784 (nextreg rhw res 1) 8785 max min (msr-sie-acci-1)))))) 8786 ) 8787 8788 (define-pmacro (media-dual-multiply-acc 8789 name mode conv addop rhw res max min op ope comment) 8790 (dni name 8791 (comment) 8792 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8793 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 8794 (.str name "$pack $FRinti,$FRintj,$" res) 8795 (+ pack res op FRinti ope FRintj) 8796 (media-dual-multiply-acc-semantics 1 mode conv addop rhw res max min) 8797 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 8798 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 8799 ) 8800 ) 8801 8802 (media-dual-multiply-acc mmachs HI ext add h-acc40S ACC40Sk 8803 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8804 OP_7B OPE1_16 8805 "Media dual multiply and accumulate signed") 8806 8807 (media-dual-multiply-acc mmachu UHI zext add h-acc40U ACC40Uk 8808 (const DI #xffffffffff) (const DI 0) 8809 OP_7B OPE1_17 8810 "Media dual multiply and accumulate unsigned") 8811 8812 (media-dual-multiply-acc mmrdhs HI ext sub h-acc40S ACC40Sk 8813 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8814 OP_7B OPE1_30 8815 "Media dual multiply and reduce signed") 8816 8817 (media-dual-multiply-acc mmrdhu UHI zext sub h-acc40U ACC40Uk 8818 (const DI #xffffffffff) (const DI 0) 8819 OP_7B OPE1_31 8820 "Media dual multiply and reduce unsigned") 8821 8822 (define-pmacro (conditional-media-dual-multiply-acc 8823 name mode conv addop rhw res max min op ope comment) 8824 (dni name 8825 (comment) 8826 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8827 (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL) 8828 (.str name "$pack $FRinti,$FRintj,$" res ",$CCi,$cond") 8829 (+ pack res op FRinti CCi cond ope FRintj) 8830 (media-dual-multiply-acc-semantics (eq CCi (or cond 2)) 8831 mode conv addop rhw res max min) 8832 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 8833 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 8834 ) 8835 ) 8836 8837 (conditional-media-dual-multiply-acc cmmachs HI ext add h-acc40S ACC40Sk 8838 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8839 OP_72 OPE4_2 8840 "Conditional Media dual multiply and accumulate signed") 8841 8842 (conditional-media-dual-multiply-acc cmmachu UHI zext add h-acc40U ACC40Uk 8843 (const DI #xffffffffff) (const DI 0) 8844 OP_72 OPE4_3 8845 "Conditional Media dual multiply and accumulate unsigned") 8846 8847 (define-pmacro (media-quad-multiply-acc-semantics 8848 cond mode conv addop rhw res max min) 8849 (if (c-call SI "@cpu@_check_acc_range" (index-of res)) 8850 (if (register-unaligned res 4) 8851 (c-call VOID "@cpu@_media_acc_not_aligned") 8852 (if (orif (register-unaligned FRintieven 2) 8853 (register-unaligned FRintjeven 2)) 8854 (c-call VOID "@cpu@_media_register_not_aligned") 8855 (if cond 8856 (sequence ((mode argihi) (mode argilo) 8857 (mode argjhi) (mode argjlo)) 8858 (extract-hilo FRintieven 0 FRintjeven 0 8859 argihi argilo argjhi argjlo) 8860 (media-multiply-acc-semantics conv argihi addop argjhi 8861 res 8862 max min (msr-sie-acci)) 8863 (media-multiply-acc-semantics conv argilo addop argjlo 8864 (nextreg rhw res 1) 8865 max min (msr-sie-acci-1)) 8866 (extract-hilo FRintieven 1 FRintjeven 1 8867 argihi argilo argjhi argjlo) 8868 (media-multiply-acc-semantics conv argihi addop argjhi 8869 (nextreg rhw res 2) 8870 max min (msr-sie-acci-2)) 8871 (media-multiply-acc-semantics conv argilo addop argjlo 8872 (nextreg rhw res 3) 8873 max min 8874 (msr-sie-acci-3))))))) 8875 ) 8876 8877 (define-pmacro (media-quad-multiply-acc 8878 name mode conv addop rhw res max min op ope comment) 8879 (dni name 8880 (comment) 8881 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8882 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 8883 (.str name "$pack $FRintieven,$FRintjeven,$" res) 8884 (+ pack res op FRintieven ope FRintjeven) 8885 (media-quad-multiply-acc-semantics 1 mode conv addop rhw res max min) 8886 ((fr400 (unit u-media-2-quad 8887 (in FRinti FRintieven) 8888 (in FRintj FRintjeven))) 8889 (fr450 (unit u-media-2-quad 8890 (in FRinti FRintieven) 8891 (in FRintj FRintjeven))) 8892 (fr500 (unit u-media-quad-mul 8893 (in FRinti FRintieven) 8894 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 8895 ) 8896 ) 8897 8898 (media-quad-multiply-acc mqmachs HI ext add h-acc40S ACC40Sk 8899 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8900 OP_7B OPE1_1E 8901 "Media quad multiply and accumulate signed") 8902 8903 (media-quad-multiply-acc mqmachu UHI zext add h-acc40U ACC40Uk 8904 (const DI #xffffffffff) (const DI 0) 8905 OP_7B OPE1_1F 8906 "Media quad multiply and accumulate unsigned") 8907 8908 (define-pmacro (conditional-media-quad-multiply-acc 8909 name mode conv addop rhw res max min op ope comment) 8910 (dni name 8911 (comment) 8912 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 8913 (FR400-MAJOR M-2) (FR450-MAJOR M-4) CONDITIONAL) 8914 (.str name "$pack $FRintieven,$FRintjeven,$" res ",$CCi,$cond") 8915 (+ pack res op FRintieven CCi cond ope FRintjeven) 8916 (media-quad-multiply-acc-semantics (eq CCi (or cond 2)) 8917 mode conv addop rhw res max min) 8918 ((fr400 (unit u-media-2-quad 8919 (in FRinti FRintieven) 8920 (in FRintj FRintjeven))) 8921 (fr450 (unit u-media-2-quad 8922 (in FRinti FRintieven) 8923 (in FRintj FRintjeven))) 8924 (fr500 (unit u-media-quad-mul 8925 (in FRinti FRintieven) 8926 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 8927 ) 8928 ) 8929 8930 (conditional-media-quad-multiply-acc cmqmachs HI ext add h-acc40S ACC40Sk 8931 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8932 OP_74 OPE4_2 8933 "Conditional Media quad multiply and accumulate signed") 8934 8935 (conditional-media-quad-multiply-acc cmqmachu UHI zext add h-acc40U ACC40Uk 8936 (const DI #xffffffffff) (const DI 0) 8937 OP_74 OPE4_3 8938 "Conditional media quad multiply and accumulate unsigned") 8939 8940 (define-pmacro (media-quad-multiply-cross-acc-semantics 8941 cond mode conv addop rhw res max min) 8942 (if (c-call SI "@cpu@_check_acc_range" (index-of res)) 8943 (if (register-unaligned res 4) 8944 (c-call VOID "@cpu@_media_acc_not_aligned") 8945 (if (orif (register-unaligned FRintieven 2) 8946 (register-unaligned FRintjeven 2)) 8947 (c-call VOID "@cpu@_media_register_not_aligned") 8948 (if cond 8949 (sequence ((mode argihi) (mode argilo) 8950 (mode argjhi) (mode argjlo)) 8951 (extract-hilo FRintieven 0 FRintjeven 0 8952 argihi argilo argjhi argjlo) 8953 (media-multiply-acc-semantics conv argihi addop argjhi 8954 (nextreg rhw res 2) 8955 max min (msr-sie-acci-2)) 8956 (media-multiply-acc-semantics conv argilo addop argjlo 8957 (nextreg rhw res 3) 8958 max min (msr-sie-acci-3)) 8959 (extract-hilo FRintieven 1 FRintjeven 1 8960 argihi argilo argjhi argjlo) 8961 (media-multiply-acc-semantics conv argihi addop argjhi 8962 res 8963 max min (msr-sie-acci)) 8964 (media-multiply-acc-semantics conv argilo addop argjlo 8965 (nextreg rhw res 1) 8966 max min 8967 (msr-sie-acci-1))))))) 8968 ) 8969 8970 (define-pmacro (media-quad-multiply-cross-acc 8971 name mode conv addop rhw res max min op ope comment) 8972 (dni name 8973 (comment) 8974 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 8975 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 8976 (.str name "$pack $FRintieven,$FRintjeven,$" res) 8977 (+ pack res op FRintieven ope FRintjeven) 8978 (media-quad-multiply-cross-acc-semantics 1 mode conv addop rhw res 8979 max min) 8980 ((fr400 (unit u-media-2-quad 8981 (in FRinti FRintieven) 8982 (in FRintj FRintjeven))) 8983 (fr450 (unit u-media-2-quad 8984 (in FRinti FRintieven) 8985 (in FRintj FRintjeven))) 8986 (fr550 (unit u-media-4-quad))) 8987 ) 8988 ) 8989 8990 (media-quad-multiply-cross-acc mqxmachs HI ext add h-acc40S ACC40Sk 8991 (const DI #x7fffffffff) (const DI #xffffff8000000000) 8992 OP_78 OPE1_00 8993 "Media quad multiply and cross accumulate signed") 8994 8995 (define-pmacro (media-quad-cross-multiply-cross-acc-semantics 8996 cond mode conv addop rhw res max min) 8997 (if (c-call SI "@cpu@_check_acc_range" (index-of res)) 8998 (if (register-unaligned res 4) 8999 (c-call VOID "@cpu@_media_acc_not_aligned") 9000 (if (orif (register-unaligned FRintieven 2) 9001 (register-unaligned FRintjeven 2)) 9002 (c-call VOID "@cpu@_media_register_not_aligned") 9003 (if cond 9004 (sequence ((mode argihi) (mode argilo) 9005 (mode argjhi) (mode argjlo)) 9006 (extract-hilo FRintieven 0 FRintjeven 0 9007 argihi argilo argjhi argjlo) 9008 (media-multiply-acc-semantics conv argihi addop argjlo 9009 (nextreg rhw res 2) 9010 max min (msr-sie-acci-2)) 9011 (media-multiply-acc-semantics conv argilo addop argjhi 9012 (nextreg rhw res 3) 9013 max min (msr-sie-acci-3)) 9014 (extract-hilo FRintieven 1 FRintjeven 1 9015 argihi argilo argjhi argjlo) 9016 (media-multiply-acc-semantics conv argihi addop argjlo 9017 res 9018 max min (msr-sie-acci)) 9019 (media-multiply-acc-semantics conv argilo addop argjhi 9020 (nextreg rhw res 1) 9021 max min 9022 (msr-sie-acci-1))))))) 9023 ) 9024 9025 (define-pmacro (media-quad-cross-multiply-cross-acc 9026 name mode conv addop rhw res max min op ope comment) 9027 (dni name 9028 (comment) 9029 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 9030 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 9031 (.str name "$pack $FRintieven,$FRintjeven,$" res) 9032 (+ pack res op FRintieven ope FRintjeven) 9033 (media-quad-cross-multiply-cross-acc-semantics 1 mode conv addop rhw res 9034 max min) 9035 ((fr400 (unit u-media-2-quad 9036 (in FRinti FRintieven) 9037 (in FRintj FRintjeven))) 9038 (fr450 (unit u-media-2-quad 9039 (in FRinti FRintieven) 9040 (in FRintj FRintjeven))) 9041 (fr550 (unit u-media-4-quad))) 9042 ) 9043 ) 9044 9045 (media-quad-cross-multiply-cross-acc mqxmacxhs HI ext add h-acc40S ACC40Sk 9046 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9047 OP_78 OPE1_01 9048 "Media quad cross multiply and cross accumulate signed") 9049 9050 (define-pmacro (media-quad-cross-multiply-acc-semantics 9051 cond mode conv addop rhw res max min) 9052 (if (c-call SI "@cpu@_check_acc_range" (index-of res)) 9053 (if (register-unaligned res 4) 9054 (c-call VOID "@cpu@_media_acc_not_aligned") 9055 (if (orif (register-unaligned FRintieven 2) 9056 (register-unaligned FRintjeven 2)) 9057 (c-call VOID "@cpu@_media_register_not_aligned") 9058 (if cond 9059 (sequence ((mode argihi) (mode argilo) 9060 (mode argjhi) (mode argjlo)) 9061 (extract-hilo FRintieven 0 FRintjeven 0 9062 argihi argilo argjhi argjlo) 9063 (media-multiply-acc-semantics conv argihi addop argjlo 9064 res 9065 max min (msr-sie-acci)) 9066 (media-multiply-acc-semantics conv argilo addop argjhi 9067 (nextreg rhw res 1) 9068 max min (msr-sie-acci-1)) 9069 (extract-hilo FRintieven 1 FRintjeven 1 9070 argihi argilo argjhi argjlo) 9071 (media-multiply-acc-semantics conv argihi addop argjlo 9072 (nextreg rhw res 2) 9073 max min (msr-sie-acci-2)) 9074 (media-multiply-acc-semantics conv argilo addop argjhi 9075 (nextreg rhw res 3) 9076 max min 9077 (msr-sie-acci-3))))))) 9078 ) 9079 9080 (define-pmacro (media-quad-cross-multiply-acc 9081 name mode conv addop rhw res max min op ope comment) 9082 (dni name 9083 (comment) 9084 ((UNIT FMALL) (MACH fr400,fr450,fr550) (FR550-MAJOR M-4) 9085 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 9086 (.str name "$pack $FRintieven,$FRintjeven,$" res) 9087 (+ pack res op FRintieven ope FRintjeven) 9088 (media-quad-cross-multiply-acc-semantics 1 mode conv addop rhw res 9089 max min) 9090 ((fr400 (unit u-media-2-quad 9091 (in FRinti FRintieven) 9092 (in FRintj FRintjeven))) 9093 (fr450 (unit u-media-2-quad 9094 (in FRinti FRintieven) 9095 (in FRintj FRintjeven))) 9096 (fr550 (unit u-media-4-quad))) 9097 ) 9098 ) 9099 9100 (media-quad-cross-multiply-acc mqmacxhs HI ext add h-acc40S ACC40Sk 9101 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9102 OP_78 OPE1_02 9103 "Media quad cross multiply and accumulate signed") 9104 9105 (define-pmacro (media-complex-semantics 9106 conv lhs1 rhs1 lhs2 rhs2 res max min sie) 9107 (sequence ((DI tmp1) (DI tmp2)) 9108 (media-multiply-semantics conv lhs1 rhs1 tmp1) 9109 (media-multiply-semantics conv lhs2 rhs2 tmp2) 9110 (set tmp1 (sub tmp1 tmp2)) 9111 (saturate-v tmp1 max min sie res)) 9112 ) 9113 9114 (define-pmacro (media-complex-semantics-i 9115 conv lhs1 rhs1 lhs2 rhs2 res max min sie) 9116 (sequence ((DI tmp1) (DI tmp2)) 9117 (media-multiply-semantics conv lhs1 rhs1 tmp1) 9118 (media-multiply-semantics conv lhs2 rhs2 tmp2) 9119 (set tmp1 (add tmp1 tmp2)) 9120 (saturate-v tmp1 max min sie res)) 9121 ) 9122 9123 (define-pmacro (media-dual-complex-semantics mode conv rhs1 rhs2 max min) 9124 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 9125 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 9126 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) 9127 (media-complex-semantics conv argihi rhs1 argilo rhs2 ACC40Sk 9128 max min (msr-sie-acci)))) 9129 ) 9130 9131 (define-pmacro (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min) 9132 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 9133 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo)) 9134 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo) 9135 (media-complex-semantics-i conv argihi rhs1 argilo rhs2 ACC40Sk 9136 max min (msr-sie-acci)))) 9137 ) 9138 9139 (define-pmacro (media-dual-complex 9140 name mode conv rhs1 rhs2 max min op ope comment) 9141 (dni name 9142 (comment) 9143 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9144 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 9145 (.str name "$pack $FRinti,$FRintj,$ACC40Sk") 9146 (+ pack ACC40Sk op FRinti ope FRintj) 9147 (media-dual-complex-semantics mode conv rhs1 rhs2 max min) 9148 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 9149 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 9150 ) 9151 ) 9152 9153 (define-pmacro (media-dual-complex-i 9154 name mode conv rhs1 rhs2 max min op ope comment) 9155 (dni name 9156 (comment) 9157 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9158 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 9159 (.str name "$pack $FRinti,$FRintj,$ACC40Sk") 9160 (+ pack ACC40Sk op FRinti ope FRintj) 9161 (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min) 9162 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 9163 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 9164 ) 9165 ) 9166 9167 (media-dual-complex mcpxrs HI ext argjhi argjlo 9168 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9169 OP_7B OPE1_20 9170 "Media dual complex real signed with saturation") 9171 9172 (media-dual-complex mcpxru UHI zext argjhi argjlo 9173 (const DI #xffffffffff) (const DI 0) 9174 OP_7B OPE1_21 9175 "Media dual complex real unsigned with saturation") 9176 9177 (media-dual-complex-i mcpxis HI ext argjlo argjhi 9178 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9179 OP_7B OPE1_22 9180 "Media dual complex imaginary signed with saturation") 9181 9182 (media-dual-complex-i mcpxiu UHI zext argjlo argjhi 9183 (const DI #xffffffffff) (const DI 0) 9184 OP_7B OPE1_23 9185 "Media dual complex imaginary unsigned with saturation") 9186 9187 (define-pmacro (conditional-media-dual-complex 9188 name mode conv rhs1 rhs2 max min op ope comment) 9189 (dni name 9190 (comment) 9191 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9192 (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL) 9193 (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") 9194 (+ pack ACC40Sk op FRinti CCi cond ope FRintj) 9195 (if (eq CCi (or cond 2)) 9196 (media-dual-complex-semantics mode conv rhs1 rhs2 max min)) 9197 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 9198 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 9199 ) 9200 ) 9201 9202 (define-pmacro (conditional-media-dual-complex-i 9203 name mode conv rhs1 rhs2 max min op ope comment) 9204 (dni name 9205 (comment) 9206 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9207 (FR400-MAJOR M-1) (FR450-MAJOR M-3) CONDITIONAL) 9208 (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond") 9209 (+ pack ACC40Sk op FRinti CCi cond ope FRintj) 9210 (if (eq CCi (or cond 2)) 9211 (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)) 9212 ((fr400 (unit u-media-2)) (fr450 (unit u-media-2)) 9213 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4))) 9214 ) 9215 ) 9216 9217 (conditional-media-dual-complex cmcpxrs HI ext argjhi argjlo 9218 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9219 OP_75 OPE4_0 9220 "Conditional Media dual complex real signed with saturation") 9221 9222 (conditional-media-dual-complex cmcpxru UHI zext argjhi argjlo 9223 (const DI #xffffffffff) (const DI 0) 9224 OP_75 OPE4_1 9225 "Conditional Media dual complex real unsigned with saturation") 9226 9227 (conditional-media-dual-complex-i cmcpxis HI ext argjlo argjhi 9228 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9229 OP_75 OPE4_2 9230 "Conditional Media dual complex imaginary signed with saturation") 9231 9232 (conditional-media-dual-complex-i cmcpxiu UHI zext argjlo argjhi 9233 (const DI #xffffffffff) (const DI 0) 9234 OP_75 OPE4_3 9235 "Conditional Media dual complex imaginary unsigned with saturation") 9236 9237 (define-pmacro (media-quad-complex 9238 name mode conv rhs1 rhs2 max min op ope comment) 9239 (dni name 9240 (comment) 9241 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9242 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 9243 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") 9244 (+ pack ACC40Sk op FRintieven ope FRintjeven) 9245 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 9246 (if (register-unaligned ACC40Sk 2) 9247 (c-call VOID "@cpu@_media_acc_not_aligned") 9248 (if (orif (register-unaligned FRintieven 2) 9249 (register-unaligned FRintjeven 2)) 9250 (c-call VOID "@cpu@_media_register_not_aligned") 9251 (sequence ((mode argihi) (mode argilo) 9252 (mode argjhi) (mode argjlo)) 9253 (extract-hilo FRintieven 0 FRintjeven 0 9254 argihi argilo argjhi argjlo) 9255 (media-complex-semantics conv argihi rhs1 argilo rhs2 9256 ACC40Sk 9257 max min (msr-sie-acci)) 9258 (extract-hilo FRintieven 1 FRintjeven 1 9259 argihi argilo argjhi argjlo) 9260 (media-complex-semantics conv argihi rhs1 argilo rhs2 9261 (nextreg h-acc40S ACC40Sk 1) 9262 max min (msr-sie-acci-1)))))) 9263 ((fr400 (unit u-media-2-quad 9264 (in FRinti FRintieven) 9265 (in FRintj FRintjeven))) 9266 (fr450 (unit u-media-2-quad 9267 (in FRinti FRintieven) 9268 (in FRintj FRintjeven))) 9269 (fr500 (unit u-media-quad-complex 9270 (in FRinti FRintieven) 9271 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 9272 ) 9273 ) 9274 9275 (define-pmacro (media-quad-complex-i 9276 name mode conv rhs1 rhs2 max min op ope comment) 9277 (dni name 9278 (comment) 9279 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) 9280 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 9281 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk") 9282 (+ pack ACC40Sk op FRintieven ope FRintjeven) 9283 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk)) 9284 (if (register-unaligned ACC40Sk 2) 9285 (c-call VOID "@cpu@_media_acc_not_aligned") 9286 (if (orif (register-unaligned FRintieven 2) 9287 (register-unaligned FRintjeven 2)) 9288 (c-call VOID "@cpu@_media_register_not_aligned") 9289 (sequence ((mode argihi) (mode argilo) 9290 (mode argjhi) (mode argjlo)) 9291 (extract-hilo FRintieven 0 FRintjeven 0 9292 argihi argilo argjhi argjlo) 9293 (media-complex-semantics-i conv argihi rhs1 argilo rhs2 9294 ACC40Sk 9295 max min (msr-sie-acci)) 9296 (extract-hilo FRintieven 1 FRintjeven 1 9297 argihi argilo argjhi argjlo) 9298 (media-complex-semantics-i conv argihi rhs1 argilo rhs2 9299 (nextreg h-acc40S ACC40Sk 1) 9300 max min (msr-sie-acci-1)))))) 9301 ((fr400 (unit u-media-2-quad 9302 (in FRinti FRintieven) 9303 (in FRintj FRintjeven))) 9304 (fr450 (unit u-media-2-quad 9305 (in FRinti FRintieven) 9306 (in FRintj FRintjeven))) 9307 (fr500 (unit u-media-quad-complex 9308 (in FRinti FRintieven) 9309 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad))) 9310 ) 9311 ) 9312 9313 (media-quad-complex mqcpxrs HI ext argjhi argjlo 9314 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9315 OP_7B OPE1_24 9316 "Media quad complex real signed with saturation") 9317 9318 (media-quad-complex mqcpxru UHI zext argjhi argjlo 9319 (const DI #xffffffffff) (const DI 0) 9320 OP_7B OPE1_25 9321 "Media quad complex real unsigned with saturation") 9322 9323 (media-quad-complex-i mqcpxis HI ext argjlo argjhi 9324 (const DI #x7fffffffff) (const DI #xffffff8000000000) 9325 OP_7B OPE1_26 9326 "Media quad complex imaginary signed with saturation") 9327 9328 (media-quad-complex-i mqcpxiu UHI zext argjlo argjhi 9329 (const DI #xffffffffff) (const DI 0) 9330 OP_7B OPE1_27 9331 "Media quad complex imaginary unsigned with saturation") 9332 9333 (define-pmacro (media-pack src1 src2 targ offset) 9334 (sequence () 9335 (set (halfword hi targ offset) (halfword lo src1 offset)) 9336 (set (halfword lo targ offset) (halfword lo src2 offset))) 9337 ) 9338 9339 (define-pmacro (media-expand-halfword-to-word-semantics cond) 9340 (if cond 9341 (sequence ((UHI tmp)) 9342 (if (and u6 1) 9343 (set tmp (halfword lo FRinti 0)) 9344 (set tmp (halfword hi FRinti 0))) 9345 (set (halfword hi FRintk 0) tmp) 9346 (set (halfword lo FRintk 0) tmp))) 9347 ) 9348 9349 (dni mexpdhw 9350 "Media expand halfword to word" 9351 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9352 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 9353 "mexpdhw$pack $FRinti,$u6,$FRintk" 9354 (+ pack FRintk OP_7B FRinti OPE1_32 u6) 9355 (media-expand-halfword-to-word-semantics 1) 9356 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 9357 (fr500 (unit u-media)) (fr550 (unit u-media))) 9358 ) 9359 9360 (dni cmexpdhw 9361 "Conditional media expand halfword to word" 9362 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9363 (FR400-MAJOR M-1) (FR450-MAJOR M-1) CONDITIONAL) 9364 "cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond" 9365 (+ pack FRintk OP_76 FRinti CCi cond OPE4_2 u6) 9366 (media-expand-halfword-to-word-semantics (eq CCi (or cond 2))) 9367 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 9368 (fr500 (unit u-media)) (fr550 (unit u-media))) 9369 ) 9370 9371 (define-pmacro (media-expand-halfword-to-double-semantics cond) 9372 (if (register-unaligned FRintkeven 2) 9373 (c-call VOID "@cpu@_media_register_not_aligned") 9374 (if cond 9375 (sequence ((UHI tmp)) 9376 ; a hack to get FRintkeven referenced for profiling 9377 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 9378 (if (and u6 1) 9379 (set tmp (halfword lo FRinti 0)) 9380 (set tmp (halfword hi FRinti 0))) 9381 (set (halfword hi FRintkeven 0) tmp) 9382 (set (halfword lo FRintkeven 0) tmp) 9383 (set (halfword hi FRintkeven 1) tmp) 9384 (set (halfword lo FRintkeven 1) tmp)))) 9385 ) 9386 9387 (dni mexpdhd 9388 "Media expand halfword to double" 9389 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9390 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 9391 "mexpdhd$pack $FRinti,$u6,$FRintkeven" 9392 (+ pack FRintkeven OP_7B FRinti OPE1_33 u6) 9393 (media-expand-halfword-to-double-semantics 1) 9394 ((fr400 (unit u-media-dual-expand 9395 (out FRintk FRintkeven))) 9396 (fr450 (unit u-media-dual-expand 9397 (out FRintk FRintkeven))) 9398 (fr500 (unit u-media-dual-expand 9399 (out FRintk FRintkeven))) 9400 (fr550 (unit u-media-dual-expand))) 9401 ) 9402 9403 (dni cmexpdhd 9404 "Conditional media expand halfword to double" 9405 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9406 (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) 9407 "cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond" 9408 (+ pack FRintkeven OP_76 FRinti CCi cond OPE4_3 u6) 9409 (media-expand-halfword-to-double-semantics (eq CCi (or cond 2))) 9410 ((fr400 (unit u-media-dual-expand 9411 (out FRintk FRintkeven))) 9412 (fr450 (unit u-media-dual-expand 9413 (out FRintk FRintkeven))) 9414 (fr500 (unit u-media-dual-expand 9415 (out FRintk FRintkeven))) 9416 (fr550 (unit u-media-dual-expand))) 9417 ) 9418 9419 (dni mpackh 9420 "Media halfword pack" 9421 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9422 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 9423 "mpackh$pack $FRinti,$FRintj,$FRintk" 9424 (+ pack FRintk OP_7B FRinti OPE1_34 FRintj) 9425 (media-pack FRinti FRintj FRintk 0) 9426 ((fr400 (unit u-media-3)) (fr450 (unit u-media-3)) 9427 (fr500 (unit u-media)) (fr550 (unit u-media))) 9428 ) 9429 9430 (dni mdpackh 9431 "Media dual pack" 9432 ((UNIT FM01) (FR500-MAJOR M-5) (FR550-MAJOR M-3) 9433 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 9434 "mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven" 9435 (+ pack FRintkeven OP_7B FRintieven OPE1_36 FRintjeven) 9436 (if (orif (register-unaligned FRintieven 2) 9437 (orif (register-unaligned FRintjeven 2) 9438 (register-unaligned FRintkeven 2))) 9439 (c-call VOID "@cpu@_media_register_not_aligned") 9440 (sequence () 9441 ; hack to get these referenced for profiling 9442 (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven)) 9443 (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven)) 9444 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 9445 (media-pack FRintieven FRintjeven FRintkeven 0) 9446 (media-pack FRintieven FRintjeven FRintkeven 1))) 9447 ((fr400 (unit u-media-3-quad 9448 (in FRinti FRintieven) 9449 (in FRintj FRintjeven) 9450 (out FRintk FRintkeven))) 9451 (fr450 (unit u-media-3-quad 9452 (in FRinti FRintieven) 9453 (in FRintj FRintjeven) 9454 (out FRintk FRintkeven))) 9455 (fr500 (unit u-media-quad-arith 9456 (in FRinti FRintieven) 9457 (in FRintj FRintjeven) 9458 (out FRintk FRintkeven))) 9459 (fr550 (unit u-media-quad))) 9460 ) 9461 9462 (define-pmacro (media-unpack src soff targ toff) 9463 (sequence () 9464 (set (halfword hi targ toff) (halfword hi src soff)) 9465 (set (halfword lo targ toff) (halfword hi src soff)) 9466 (set (halfword hi targ (add toff 1)) (halfword lo src soff)) 9467 (set (halfword lo targ (add toff 1)) (halfword lo src soff))) 9468 ) 9469 9470 (dni munpackh 9471 "Media halfword unpack" 9472 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9473 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 9474 "munpackh$pack $FRinti,$FRintkeven" 9475 (+ pack FRintkeven OP_7B FRinti OPE1_35 (FRj-null)) 9476 (if (register-unaligned FRintkeven 2) 9477 (c-call VOID "@cpu@_media_register_not_aligned") 9478 (sequence () 9479 ; hack to get these referenced for profiling 9480 (set FRinti (c-raw-call SI "frv_ref_SI" FRinti)) 9481 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 9482 (media-unpack FRinti 0 FRintkeven 0))) 9483 ((fr400 (unit u-media-dual-expand 9484 (out FRintk FRintkeven))) 9485 (fr450 (unit u-media-dual-expand 9486 (out FRintk FRintkeven))) 9487 (fr500 (unit u-media-dual-expand 9488 (out FRintk FRintkeven))) 9489 (fr550 (unit u-media-dual-expand))) 9490 ) 9491 9492 (dni mdunpackh 9493 "Media dual unpack" 9494 ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv)) 9495 "mdunpackh$pack $FRintieven,$FRintk" 9496 (+ pack FRintk OP_7B FRintieven OPE1_37 (FRj-null)) 9497 (if (orif (register-unaligned FRintieven 2) (register-unaligned FRintk 4)) 9498 (c-call VOID "@cpu@_media_register_not_aligned") 9499 (sequence () 9500 ; hack to get these referenced for profiling 9501 (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven)) 9502 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 9503 (media-unpack FRintieven 0 FRintk 0) 9504 (media-unpack FRintieven 1 FRintk 2))) 9505 ((fr500 (unit u-media-dual-unpack 9506 (in FRinti FRintieven)))) 9507 ) 9508 9509 (define-pmacro (ubyte num arg offset) 9510 (reg (.sym h-fr_ num) (add (index-of arg) offset))) 9511 9512 (define-pmacro (mbtoh-semantics cond) 9513 (if (register-unaligned FRintkeven 2) 9514 (c-call VOID "@cpu@_media_register_not_aligned") 9515 (if cond 9516 (sequence () 9517 (set (halfword hi FRintkeven 0) (ubyte 3 FRintj 0)) 9518 (set (halfword lo FRintkeven 0) (ubyte 2 FRintj 0)) 9519 (set (halfword hi FRintkeven 1) (ubyte 1 FRintj 0)) 9520 (set (halfword lo FRintkeven 1) (ubyte 0 FRintj 0))))) 9521 ) 9522 9523 (dni mbtoh 9524 "Media convert byte to halfword" 9525 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9526 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 9527 "mbtoh$pack $FRintj,$FRintkeven" 9528 (+ pack FRintkeven OP_7B (FRi-null) OPE1_38 FRintj) 9529 (sequence () 9530 ; hack to get these referenced for profiling 9531 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) 9532 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 9533 (mbtoh-semantics 1)) 9534 ((fr400 (unit u-media-dual-expand 9535 (out FRintk FRintkeven))) 9536 (fr450 (unit u-media-dual-expand 9537 (out FRintk FRintkeven))) 9538 (fr500 (unit u-media-dual-btoh 9539 (out FRintk FRintkeven))) 9540 (fr550 (unit u-media-dual-expand))) 9541 ) 9542 9543 (dni cmbtoh 9544 "Conditional media convert byte to halfword" 9545 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9546 (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) 9547 "cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond" 9548 (+ pack FRintkeven OP_77 (FRi-null) CCi cond OPE4_0 FRintj) 9549 (sequence () 9550 ; hack to get these referenced for profiling 9551 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) 9552 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven)) 9553 (mbtoh-semantics (eq CCi (or cond 2)))) 9554 ((fr400 (unit u-media-dual-expand 9555 (out FRintk FRintkeven))) 9556 (fr450 (unit u-media-dual-expand 9557 (out FRintk FRintkeven))) 9558 (fr500 (unit u-media-dual-btoh 9559 (out FRintk FRintkeven))) 9560 (fr550 (unit u-media-dual-expand 9561 (in FRinti FRintj)))) 9562 ) 9563 9564 (define-pmacro (mhtob-semantics cond) 9565 (if (register-unaligned FRintjeven 2) 9566 (c-call VOID "@cpu@_media_register_not_aligned") 9567 (if cond 9568 (sequence () 9569 (set (ubyte 3 FRintk 0) (halfword hi FRintjeven 0)) 9570 (set (ubyte 2 FRintk 0) (halfword lo FRintjeven 0)) 9571 (set (ubyte 1 FRintk 0) (halfword hi FRintjeven 1)) 9572 (set (ubyte 0 FRintk 0) (halfword lo FRintjeven 1))))) 9573 ) 9574 9575 (dni mhtob 9576 "Media convert halfword to byte" 9577 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9578 (FR400-MAJOR M-2) (FR450-MAJOR M-2)) 9579 "mhtob$pack $FRintjeven,$FRintk" 9580 (+ pack FRintk OP_7B (FRi-null) OPE1_39 FRintjeven) 9581 (sequence () 9582 ; hack to get these referenced for profiling 9583 (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven)) 9584 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 9585 (mhtob-semantics 1)) 9586 ((fr400 (unit u-media-dual-htob 9587 (in FRintj FRintjeven))) 9588 (fr450 (unit u-media-dual-htob 9589 (in FRintj FRintjeven))) 9590 (fr500 (unit u-media-dual-htob 9591 (in FRintj FRintjeven))) 9592 (fr550 (unit u-media-3-dual 9593 (in FRinti FRintjeven)))) 9594 ) 9595 9596 (dni cmhtob 9597 "Conditional media convert halfword to byte" 9598 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9599 (FR400-MAJOR M-2) (FR450-MAJOR M-2) CONDITIONAL) 9600 "cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond" 9601 (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_1 FRintjeven) 9602 (sequence () 9603 ; hack to get these referenced for profiling 9604 (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven)) 9605 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 9606 (mhtob-semantics (eq CCi (or cond 2)))) 9607 ((fr400 (unit u-media-dual-htob 9608 (in FRintj FRintjeven))) 9609 (fr450 (unit u-media-dual-htob 9610 (in FRintj FRintjeven))) 9611 (fr500 (unit u-media-dual-htob 9612 (in FRintj FRintjeven))) 9613 (fr550 (unit u-media-3-dual 9614 (in FRinti FRintjeven)))) 9615 ) 9616 9617 (define-pmacro (mbtohe-semantics cond) 9618 (if (register-unaligned FRintk 4) 9619 (c-call VOID "@cpu@_media_register_not_aligned") 9620 (if cond 9621 (sequence () 9622 (set (halfword hi FRintk 0) (ubyte 3 FRintj 0)) 9623 (set (halfword lo FRintk 0) (ubyte 3 FRintj 0)) 9624 (set (halfword hi FRintk 1) (ubyte 2 FRintj 0)) 9625 (set (halfword lo FRintk 1) (ubyte 2 FRintj 0)) 9626 (set (halfword hi FRintk 2) (ubyte 1 FRintj 0)) 9627 (set (halfword lo FRintk 2) (ubyte 1 FRintj 0)) 9628 (set (halfword hi FRintk 3) (ubyte 0 FRintj 0)) 9629 (set (halfword lo FRintk 3) (ubyte 0 FRintj 0))))) 9630 ) 9631 9632 (dni mbtohe 9633 "Media convert byte to halfword extended" 9634 ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv)) 9635 "mbtohe$pack $FRintj,$FRintk" 9636 (+ pack FRintk OP_7B (FRi-null) OPE1_3A FRintj) 9637 (sequence () 9638 ; hack to get these referenced for profiling 9639 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) 9640 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 9641 (mbtohe-semantics 1)) 9642 ((fr500 (unit u-media-dual-btohe))) 9643 ) 9644 9645 (dni cmbtohe 9646 "Conditional media convert byte to halfword extended" 9647 ((UNIT FM01) (FR500-MAJOR M-7) CONDITIONAL (MACH simple,tomcat,frv)) 9648 "cmbtohe$pack $FRintj,$FRintk,$CCi,$cond" 9649 (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_2 FRintj) 9650 (sequence () 9651 ; hack to get these referenced for profiling 9652 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj)) 9653 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk)) 9654 (mbtohe-semantics (eq CCi (or cond 2)))) 9655 ((fr500 (unit u-media-dual-btohe))) 9656 ) 9657 9658 ; Media NOP 9659 ; A special case of mclracc 9660 (dni mnop "Media nop" 9661 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-1) 9662 (FR400-MAJOR M-1) (FR450-MAJOR M-1)) 9663 "mnop$pack" 9664 (+ pack (f-ACC40Sk 63) OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null)) 9665 (nop) 9666 () 9667 ) 9668 9669 ; mclracc with #A==0 9670 (dni mclracc-0 9671 "Media clear accumulator(s)" 9672 ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) 9673 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 9674 "mclracc$pack $ACC40Sk,$A0" 9675 (+ pack ACC40Sk OP_7B (f-A 0) (misc-null-10) OPE1_3B (FRj-null)) 9676 (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 0) 9677 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) 9678 (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc))) 9679 ) 9680 9681 ; mclracc with #A==1 9682 (dni mclracc-1 9683 "Media clear accumulator(s)" 9684 ((UNIT MCLRACC-1) (FR500-MAJOR M-6) (FR550-MAJOR M-3) 9685 (FR400-MAJOR M-2) (FR450-MAJOR M-4)) 9686 "mclracc$pack $ACC40Sk,$A1" 9687 (+ pack ACC40Sk OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null)) 9688 (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 1) 9689 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4-mclracca)) 9690 (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc))) 9691 ) 9692 9693 (dni mrdacc 9694 "Media read accumulator" 9695 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9696 (FR400-MAJOR M-1) (FR450-MAJOR M-5)) 9697 "mrdacc$pack $ACC40Si,$FRintk" 9698 (+ pack FRintk OP_7B ACC40Si OPE1_3C (FRj-null)) 9699 (set FRintk ACC40Si) 9700 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) 9701 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc))) 9702 ) 9703 9704 (dni mrdaccg 9705 "Media read accumulator guard" 9706 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) 9707 (FR400-MAJOR M-1) (FR450-MAJOR M-5)) 9708 "mrdaccg$pack $ACCGi,$FRintk" 9709 (+ pack FRintk OP_7B ACCGi OPE1_3E (FRj-null)) 9710 (set FRintk ACCGi) 9711 ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg)) 9712 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc (in ACC40Si ACCGi)))) 9713 ) 9714 9715 (dni mwtacc 9716 "Media write accumulator" 9717 ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) 9718 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 9719 "mwtacc$pack $FRinti,$ACC40Sk" 9720 (+ pack ACC40Sk OP_7B FRinti OPE1_3D (FRj-null)) 9721 (set ACC40Sk (or (and ACC40Sk (const DI #xffffffff00000000)) 9722 FRinti)) 9723 ((fr400 (unit u-media-4)) (fr450 (unit u-media-4)) 9724 (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc))) 9725 ) 9726 9727 (dni mwtaccg 9728 "Media write accumulator guard" 9729 ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) 9730 (FR400-MAJOR M-1) (FR450-MAJOR M-3)) 9731 "mwtaccg$pack $FRinti,$ACCGk" 9732 (+ pack ACCGk OP_7B FRinti OPE1_3F (FRj-null)) 9733 (sequence () 9734 ; hack to get these referenced for profiling 9735 (c-raw-call VOID "frv_ref_SI" ACCGk) 9736 (set ACCGk FRinti)) 9737 ((fr400 (unit u-media-4-accg)) (fr450 (unit u-media-4-accg)) 9738 (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc (in ACC40Sk ACCGk)))) 9739 ) 9740 9741 (define-pmacro (media-cop num op) 9742 (dni (.sym mcop num) 9743 "Media custom instruction" 9744 ((UNIT FM01) (FR500-MAJOR M-1) (MACH frv)) 9745 (.str "mcop" num "$pack $FRi,$FRj,$FRk") 9746 (+ pack FRk op FRi OPE1_00 FRj) 9747 (c-call VOID "@cpu@_media_cop" num) 9748 () 9749 ) 9750 ) 9751 9752 (media-cop 1 OP_7C) 9753 (media-cop 2 OP_7D) 9754 9755 ; nop 9756 ; A nop is defined to be a "ori gr0,0,gr0" 9757 ; This needn't be a macro-insn, but making it one greatly simplifies decode.c 9758 ; On the other hand spending a little time in the decoder is often worth it. 9759 ; 9760 (dnmi nop "nop" 9761 ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 9762 "nop$pack" 9763 (emit ori pack (GRi 0) (s12 0) (GRk 0)) 9764 ) 9765 9766 ; Floating point NOP 9767 (dni fnop 9768 "Floating point nop" 9769 ((UNIT FMALL) (FR500-MAJOR F-8) (FR550-MAJOR F-1) (MACH simple,tomcat,fr500,fr550,frv)) 9770 "fnop$pack" 9771 (+ pack (rd-null) OP_79 (FRi-null) OPE1_0D (FRj-null)) 9772 (nop) 9773 () 9774 ) 9775 9776 ; A return instruction 9777 (dnmi ret "return" 9778 (NO-DIS (UNIT B01) (FR500-MAJOR B-3) 9779 (FR400-MAJOR B-3) (FR450-MAJOR B-3)) 9780 "ret$pack" 9781 (emit bralr pack (hint_taken 2)) 9782 ) 9783 9784 (dnmi cmp "compare" 9785 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) 9786 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 9787 "cmp$pack $GRi,$GRj,$ICCi_1" 9788 (emit subcc pack GRi GRj (GRk 0) ICCi_1) 9789 ) 9790 9791 (dnmi cmpi "compare immediate" 9792 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) 9793 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 9794 "cmpi$pack $GRi,$s10,$ICCi_1" 9795 (emit subicc pack GRi s10 (GRk 0) ICCi_1) 9796 ) 9797 9798 (dnmi ccmp "conditional compare" 9799 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) 9800 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 9801 "ccmp$pack $GRi,$GRj,$CCi,$cond" 9802 (emit csubcc pack GRi GRj (GRk 0) CCi cond) 9803 ) 9804 9805 (dnmi mov "move" 9806 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) 9807 (FR400-MAJOR I-1) (FR450-MAJOR I-1)) 9808 "mov$pack $GRi,$GRk" 9809 (emit ori pack GRi (s12 0) GRk) 9810 ) 9811 9812 (dnmi cmov "conditional move" 9813 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) 9814 (FR400-MAJOR I-1) (FR450-MAJOR I-1) CONDITIONAL) 9815 "cmov$pack $GRi,$GRk,$CCi,$cond" 9816 (emit cor pack GRi (GRj 0) GRk CCi cond) 9817 ) 9818
