1 ; Lattice Mico32 CPU description. -*- Scheme -*- 2 ; Copyright 2008-2013 Free Software Foundation, Inc. 3 ; Contributed by Jon Beniston <jon (a] beniston.com> 4 ; 5 ; This file is part of the GNU Binutils. 6 ; 7 ; This program is free software; you can redistribute it and/or modify 8 ; it under the terms of the GNU General Public License as published by 9 ; the Free Software Foundation; either version 3 of the License, or 10 ; (at your option) any later version. 11 ; 12 ; This program is distributed in the hope that it will be useful, 13 ; but WITHOUT ANY WARRANTY; without even the implied warranty of 14 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 ; GNU General Public License for more details. 16 ; 17 ; You should have received a copy of the GNU General Public License 18 ; along with this program; if not, write to the Free Software 19 ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 20 ; MA 02110-1301, USA. 21 22 (include "simplify.inc") 23 24 (define-arch 25 (name lm32) ; name of cpu family 26 (comment "Lattice Mico32") 27 (default-alignment aligned) 28 (insn-lsb0? #t) 29 (machs lm32) 30 (isas lm32) 31 ) 32 33 35 ; Instruction sets. 36 37 (define-isa 38 (name lm32) 39 (comment "Lattice Mico32 ISA") 40 (default-insn-word-bitsize 32) 41 (default-insn-bitsize 32) 42 (base-insn-bitsize 32) 43 (decode-assist (31 30 29 28 27 26)) 44 ) 45 46 48 ; Cpu family definitions. 49 50 (define-cpu 51 ; cpu names must be distinct from the architecture name and machine name 52 (name lm32bf) 53 (comment "Lattice Mico32 CPU") 54 (endian big) 55 (word-bitsize 32) 56 ) 57 58 (define-mach 59 (name lm32) 60 (comment "Lattice Mico32 MACH") 61 (cpu lm32bf) 62 ) 63 64 (define-model 65 (name lm32) 66 (comment "Lattice Mico32 reference implementation") 67 (mach lm32) 68 (unit u-exec "Execution unit" () 69 1 1 () () () ()) 70 ) 71 72 74 ; Hardware elements. 75 76 (dnh h-pc "Program counter" (PC) (pc) () () ()) 77 78 (dnh h-gr "General purpose registers" 79 () 80 (register SI (32)) 81 (keyword "" ( 82 (gp 26) (fp 27) (sp 28) (ra 29) (ea 30) (ba 31) 83 (r0 0) (r1 1) (r2 2) (r3 3) 84 (r4 4) (r5 5) (r6 6) (r7 7) 85 (r8 8) (r9 9) (r10 10) (r11 11) 86 (r12 12) (r13 13) (r14 14) (r15 15) 87 (r16 16) (r17 17) (r18 18) (r19 19) 88 (r20 20) (r21 21) (r22 22) (r23 23) 89 (r24 24) (r25 25) (r26 26) (r27 27) 90 (r28 28) (r29 29) (r30 30) (r31 31) 91 ) 92 ) 93 () () 94 ) 95 96 (dnh h-csr "Control and status registers" 97 () 98 (register SI (32)) 99 (keyword "" ( 100 (IE 0) (IM 1) (IP 2) 101 (ICC 3) (DCC 4) 102 (CC 5) 103 (CFG 6) 104 (EBA 7) 105 (DC 8) 106 (DEBA 9) 107 (CFG2 10) 108 (JTX 14) (JRX 15) 109 (BP0 16) (BP1 17) (BP2 18) (BP3 19) 110 (WP0 24) (WP1 25) (WP2 26) (WP3 27) 111 (PSW 29) (TLBVADDR 30) (TLBPADDR 31) (TLBBADVADDR 31) 112 ) 113 ) 114 () () 115 ) 116 117 119 ; Instruction fields. 120 121 (dnf f-opcode "opcode field" () 31 6) 122 (dnf f-r0 "register index 0 field" () 25 5) 123 (dnf f-r1 "register index 1 field" () 20 5) 124 (dnf f-r2 "register index 2 field" () 15 5) 125 (dnf f-resv0 "reserved" (RESERVED) 10 11) 126 (dnf f-shift "shift amount field" () 4 5) 127 (df f-imm "signed immediate field" () 15 16 INT #f #f) 128 (dnf f-uimm "unsigned immediate field" () 15 16) 129 (dnf f-csr "csr field" () 25 5) 130 (dnf f-user "user defined field" () 10 11) 131 (dnf f-exception "exception field" () 25 26) 132 133 (df f-branch "branch offset field" (PCREL-ADDR) 15 16 INT 134 ((value pc) (sra SI (sub SI value pc) 2)) 135 ((value pc) (add SI pc (sra SI (sll SI value 16) 14))) 136 ) 137 (df f-call "call offset field" (PCREL-ADDR) 25 26 INT 138 ((value pc) (sra SI (sub SI value pc) 2)) 139 ((value pc) (add SI pc (sra SI (sll SI value 6) 4))) 140 ) 141 142 144 ; Operands. 145 146 (dnop r0 "register 0" () h-gr f-r0) 147 (dnop r1 "register 1" () h-gr f-r1) 148 (dnop r2 "register 2" () h-gr f-r2) 149 (dnop shift "shift amout" () h-uint f-shift) 150 (dnop imm "signed immediate" () h-sint f-imm) 151 (dnop uimm "unsigned immediate" () h-uint f-uimm) 152 (dnop branch "branch offset" () h-iaddr f-branch) 153 (dnop call "call offset" () h-iaddr f-call) 154 (dnop csr "csr" () h-csr f-csr) 155 (dnop user "user" () h-uint f-user) 156 (dnop exception "exception" () h-uint f-exception) 157 158 (define-operand 159 (name hi16) 160 (comment "high 16-bit immediate") 161 (attrs) 162 (type h-uint) 163 (index f-uimm) 164 (handlers (parse "hi16")) 165 ) 166 167 (define-operand 168 (name lo16) 169 (comment "low 16-bit immediate") 170 (attrs) 171 (type h-uint) 172 (index f-uimm) 173 (handlers (parse "lo16")) 174 ) 175 176 (define-operand 177 (name gp16) 178 (comment "gp relative 16-bit immediate") 179 (attrs) 180 (type h-sint) 181 (index f-imm) 182 (handlers (parse "gp16")) 183 ) 184 185 (define-operand 186 (name got16) 187 (comment "got 16-bit immediate") 188 (attrs) 189 (type h-sint) 190 (index f-imm) 191 (handlers (parse "got16")) 192 ) 193 194 (define-operand 195 (name gotoffhi16) 196 (comment "got offset high 16-bit immediate") 197 (attrs) 198 (type h-sint) 199 (index f-imm) 200 (handlers (parse "gotoff_hi16")) 201 ) 202 203 (define-operand 204 (name gotofflo16) 205 (comment "got offset low 16-bit immediate") 206 (attrs) 207 (type h-sint) 208 (index f-imm) 209 (handlers (parse "gotoff_lo16")) 210 ) 211 212 214 ; Enumerations. 215 216 (define-normal-insn-enum 217 opcodes "opcodes" () OP_ f-opcode 218 (("ADD" 45) 219 ("ADDI" 13) 220 ("AND" 40) 221 ("ANDI" 8) 222 ("ANDHI" 24) 223 ("B" 48) 224 ("BI" 56) 225 ("BE" 17) 226 ("BG" 18) 227 ("BGE" 19) 228 ("BGEU" 20) 229 ("BGU" 21) 230 ("BNE" 23) 231 ("CALL" 54) 232 ("CALLI" 62) 233 ("CMPE" 57) 234 ("CMPEI" 25) 235 ("CMPG" 58) 236 ("CMPGI" 26) 237 ("CMPGE" 59) 238 ("CMPGEI" 27) 239 ("CMPGEU" 60) 240 ("CMPGEUI" 28) 241 ("CMPGU" 61) 242 ("CMPGUI" 29) 243 ("CMPNE" 63) 244 ("CMPNEI" 31) 245 ("DIVU" 35) 246 ("LB" 4) 247 ("LBU" 16) 248 ("LH" 7) 249 ("LHU" 11) 250 ("LW" 10) 251 ("MODU" 49) 252 ("MUL" 34) 253 ("MULI" 2) 254 ("NOR" 33) 255 ("NORI" 1) 256 ("OR" 46) 257 ("ORI" 14) 258 ("ORHI" 30) 259 ("RAISE" 43) 260 ("RCSR" 36) 261 ("SB" 12) 262 ("SEXTB" 44) 263 ("SEXTH" 55) 264 ("SH" 3) 265 ("SL" 47) 266 ("SLI" 15) 267 ("SR" 37) 268 ("SRI" 5) 269 ("SRU" 32) 270 ("SRUI" 0) 271 ("SUB" 50) 272 ("SW" 22) 273 ("USER" 51) 274 ("WCSR" 52) 275 ("XNOR" 41) 276 ("XNORI" 9) 277 ("XOR" 38) 278 ("XORI" 6) 279 ) 280 ) 281 282 284 ; Instructions. Note: Reg-reg must come before reg-imm. 285 286 (dni add "add" () 287 "add $r2,$r0,$r1" 288 (+ OP_ADD r0 r1 r2 (f-resv0 0)) 289 (set r2 (add r0 r1)) 290 () 291 ) 292 293 (dni addi "add immediate" () 294 "addi $r1,$r0,$imm" 295 (+ OP_ADDI r0 r1 imm) 296 (set r1 (add r0 (ext SI (trunc HI imm)))) 297 () 298 ) 299 300 (dni and "and" () 301 "and $r2,$r0,$r1" 302 (+ OP_AND r0 r1 r2 (f-resv0 0)) 303 (set r2 (and r0 r1)) 304 () 305 ) 306 307 (dni andi "and immediate" () 308 "andi $r1,$r0,$uimm" 309 (+ OP_ANDI r0 r1 uimm) 310 (set r1 (and r0 (zext SI uimm))) 311 () 312 ) 313 314 (dni andhii "and high immediate" () 315 "andhi $r1,$r0,$hi16" 316 (+ OP_ANDHI r0 r1 hi16) 317 (set r1 (and r0 (sll SI hi16 16))) 318 () 319 ) 320 321 (dni b "branch" () 322 "b $r0" 323 (+ OP_B r0 (f-r1 0) (f-r2 0) (f-resv0 0)) 324 (set pc (c-call USI "@cpu@_b_insn" r0 f-r0)) 325 () 326 ) 327 328 (dni bi "branch immediate" () 329 "bi $call" 330 (+ OP_BI call) 331 (set pc (ext SI call)) 332 () 333 ) 334 335 (dni be "branch equal" () 336 "be $r0,$r1,$branch" 337 (+ OP_BE r0 r1 branch) 338 (if (eq r0 r1) 339 (set pc branch) 340 ) 341 () 342 ) 343 344 (dni bg "branch greater" () 345 "bg $r0,$r1,$branch" 346 (+ OP_BG r0 r1 branch) 347 (if (gt r0 r1) 348 (set pc branch) 349 ) 350 () 351 ) 352 353 (dni bge "branch greater or equal" () 354 "bge $r0,$r1,$branch" 355 (+ OP_BGE r0 r1 branch) 356 (if (ge r0 r1) 357 (set pc branch) 358 ) 359 () 360 ) 361 362 (dni bgeu "branch greater or equal unsigned" () 363 "bgeu $r0,$r1,$branch" 364 (+ OP_BGEU r0 r1 branch) 365 (if (geu r0 r1) 366 (set pc branch) 367 ) 368 () 369 ) 370 371 (dni bgu "branch greater unsigned" () 372 "bgu $r0,$r1,$branch" 373 (+ OP_BGU r0 r1 branch) 374 (if (gtu r0 r1) 375 (set pc branch) 376 ) 377 () 378 ) 379 380 (dni bne "branch not equal" () 381 "bne $r0,$r1,$branch" 382 (+ OP_BNE r0 r1 branch) 383 (if (ne r0 r1) 384 (set pc branch) 385 ) 386 () 387 ) 388 389 (dni call "call" () 390 "call $r0" 391 (+ OP_CALL r0 (f-r1 0) (f-r2 0) (f-resv0 0)) 392 (sequence () 393 (set (reg h-gr 29) (add pc 4)) 394 (set pc r0) 395 ) 396 () 397 ) 398 399 (dni calli "call immediate" () 400 "calli $call" 401 (+ OP_CALLI call) 402 (sequence () 403 (set (reg h-gr 29) (add pc 4)) 404 (set pc (ext SI call)) 405 ) 406 () 407 ) 408 409 (dni cmpe "compare equal" () 410 "cmpe $r2,$r0,$r1" 411 (+ OP_CMPE r0 r1 r2 (f-resv0 0)) 412 (set r2 (eq SI r0 r1)) 413 () 414 ) 415 416 (dni cmpei "compare equal immediate" () 417 "cmpei $r1,$r0,$imm" 418 (+ OP_CMPEI r0 r1 imm) 419 (set r1 (eq SI r0 (ext SI (trunc HI imm)))) 420 () 421 ) 422 423 (dni cmpg "compare greater than" () 424 "cmpg $r2,$r0,$r1" 425 (+ OP_CMPG r0 r1 r2 (f-resv0 0)) 426 (set r2 (gt SI r0 r1)) 427 () 428 ) 429 430 (dni cmpgi "compare greater than immediate" () 431 "cmpgi $r1,$r0,$imm" 432 (+ OP_CMPGI r0 r1 imm) 433 (set r1 (gt SI r0 (ext SI (trunc HI imm)))) 434 () 435 ) 436 437 (dni cmpge "compare greater or equal" () 438 "cmpge $r2,$r0,$r1" 439 (+ OP_CMPGE r0 r1 r2 (f-resv0 0)) 440 (set r2 (ge SI r0 r1)) 441 () 442 ) 443 444 (dni cmpgei "compare greater or equal immediate" () 445 "cmpgei $r1,$r0,$imm" 446 (+ OP_CMPGEI r0 r1 imm) 447 (set r1 (ge SI r0 (ext SI (trunc HI imm)))) 448 () 449 ) 450 451 (dni cmpgeu "compare greater or equal unsigned" () 452 "cmpgeu $r2,$r0,$r1" 453 (+ OP_CMPGEU r0 r1 r2 (f-resv0 0)) 454 (set r2 (geu SI r0 r1)) 455 () 456 ) 457 458 (dni cmpgeui "compare greater or equal unsigned immediate" () 459 "cmpgeui $r1,$r0,$uimm" 460 (+ OP_CMPGEUI r0 r1 uimm) 461 (set r1 (geu SI r0 (zext SI uimm))) 462 () 463 ) 464 465 (dni cmpgu "compare greater than unsigned" () 466 "cmpgu $r2,$r0,$r1" 467 (+ OP_CMPGU r0 r1 r2 (f-resv0 0)) 468 (set r2 (gtu SI r0 r1)) 469 () 470 ) 471 472 (dni cmpgui "compare greater than unsigned immediate" () 473 "cmpgui $r1,$r0,$uimm" 474 (+ OP_CMPGUI r0 r1 uimm) 475 (set r1 (gtu SI r0 (zext SI uimm))) 476 () 477 ) 478 479 (dni cmpne "compare not equal" () 480 "cmpne $r2,$r0,$r1" 481 (+ OP_CMPNE r0 r1 r2 (f-resv0 0)) 482 (set r2 (ne SI r0 r1)) 483 () 484 ) 485 486 (dni cmpnei "compare not equal immediate" () 487 "cmpnei $r1,$r0,$imm" 488 (+ OP_CMPNEI r0 r1 imm) 489 (set r1 (ne SI r0 (ext SI (trunc HI imm)))) 490 () 491 ) 492 493 (dni divu "unsigned divide" () 494 "divu $r2,$r0,$r1" 495 (+ OP_DIVU r0 r1 r2 (f-resv0 0)) 496 (set pc (c-call USI "@cpu@_divu_insn" pc f-r0 f-r1 f-r2)) 497 () 498 ) 499 500 (dni lb "load byte" () 501 "lb $r1,($r0+$imm)" 502 (+ OP_LB r0 r1 imm) 503 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI imm)))))) 504 () 505 ) 506 507 (dni lbu "load byte unsigned" () 508 "lbu $r1,($r0+$imm)" 509 (+ OP_LBU r0 r1 imm) 510 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI imm)))))) 511 () 512 ) 513 514 (dni lh "load halfword" () 515 "lh $r1,($r0+$imm)" 516 (+ OP_LH r0 r1 imm) 517 (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI imm)))))) 518 () 519 ) 520 521 (dni lhu "load halfword unsigned" () 522 "lhu $r1,($r0+$imm)" 523 (+ OP_LHU r0 r1 imm) 524 (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI imm)))))) 525 () 526 ) 527 528 (dni lw "load word" () 529 "lw $r1,($r0+$imm)" 530 (+ OP_LW r0 r1 imm) 531 (set r1 (mem SI (add r0 (ext SI (trunc HI imm))))) 532 () 533 ) 534 535 (dni modu "unsigned modulus" () 536 "modu $r2,$r0,$r1" 537 (+ OP_MODU r0 r1 r2 (f-resv0 0)) 538 (set pc (c-call USI "@cpu@_modu_insn" pc f-r0 f-r1 f-r2)) 539 () 540 ) 541 542 (dni mul "mulitply" () 543 "mul $r2,$r0,$r1" 544 (+ OP_MUL r0 r1 r2 (f-resv0 0)) 545 (set r2 (mul r0 r1)) 546 () 547 ) 548 549 (dni muli "multiply immediate" () 550 "muli $r1,$r0,$imm" 551 (+ OP_MULI r0 r1 imm) 552 (set r1 (mul r0 (ext SI (trunc HI imm)))) 553 () 554 ) 555 556 (dni nor "nor" () 557 "nor $r2,$r0,$r1" 558 (+ OP_NOR r0 r1 r2 (f-resv0 0)) 559 (set r2 (inv (or r0 r1))) 560 () 561 ) 562 563 (dni nori "nor immediate" () 564 "nori $r1,$r0,$uimm" 565 (+ OP_NORI r0 r1 uimm) 566 (set r1 (inv (or r0 (zext SI uimm)))) 567 () 568 ) 569 570 (dni or "or" () 571 "or $r2,$r0,$r1" 572 (+ OP_OR r0 r1 r2 (f-resv0 0)) 573 (set r2 (or r0 r1)) 574 () 575 ) 576 577 (dni ori "or immediate" () 578 "ori $r1,$r0,$lo16" 579 (+ OP_ORI r0 r1 lo16) 580 (set r1 (or r0 (zext SI lo16))) 581 () 582 ) 583 584 (dni orhii "or high immediate" () 585 "orhi $r1,$r0,$hi16" 586 (+ OP_ORHI r0 r1 hi16) 587 (set r1 (or r0 (sll SI hi16 16))) 588 () 589 ) 590 591 (dni rcsr "read control or status register" () 592 "rcsr $r2,$csr" 593 (+ OP_RCSR csr (f-r1 0) r2 (f-resv0 0)) 594 (set r2 csr) 595 () 596 ) 597 598 (dni sb "store byte" () 599 "sb ($r0+$imm),$r1" 600 (+ OP_SB r0 r1 imm) 601 (set (mem QI (add r0 (ext SI (trunc HI imm)))) r1) 602 () 603 ) 604 605 (dni sextb "sign extend byte" () 606 "sextb $r2,$r0" 607 (+ OP_SEXTB r0 (f-r1 0) r2 (f-resv0 0)) 608 (set r2 (ext SI (trunc QI r0))) 609 () 610 ) 611 612 (dni sexth "sign extend half-word" () 613 "sexth $r2,$r0" 614 (+ OP_SEXTH r0 (f-r1 0) r2 (f-resv0 0)) 615 (set r2 (ext SI (trunc HI r0))) 616 () 617 ) 618 619 (dni sh "store halfword" () 620 "sh ($r0+$imm),$r1" 621 (+ OP_SH r0 r1 imm) 622 (set (mem HI (add r0 (ext SI (trunc HI imm)))) r1) 623 () 624 ) 625 626 (dni sl "shift left" () 627 "sl $r2,$r0,$r1" 628 (+ OP_SL r0 r1 r2 (f-resv0 0)) 629 (set r2 (sll SI r0 r1)) 630 () 631 ) 632 633 (dni sli "shift left immediate" () 634 "sli $r1,$r0,$imm" 635 (+ OP_SLI r0 r1 imm) 636 (set r1 (sll SI r0 imm)) 637 () 638 ) 639 640 (dni sr "shift right" () 641 "sr $r2,$r0,$r1" 642 (+ OP_SR r0 r1 r2 (f-resv0 0)) 643 (set r2 (sra SI r0 r1)) 644 () 645 ) 646 647 (dni sri "shift right immediate" () 648 "sri $r1,$r0,$imm" 649 (+ OP_SRI r0 r1 imm) 650 (set r1 (sra SI r0 imm)) 651 () 652 ) 653 654 (dni sru "shift right unsigned" () 655 "sru $r2,$r0,$r1" 656 (+ OP_SRU r0 r1 r2 (f-resv0 0)) 657 (set r2 (srl SI r0 r1)) 658 () 659 ) 660 661 (dni srui "shift right unsigned immediate" () 662 "srui $r1,$r0,$imm" 663 (+ OP_SRUI r0 r1 imm) 664 (set r1 (srl SI r0 imm)) 665 () 666 ) 667 668 (dni sub "subtract" () 669 "sub $r2,$r0,$r1" 670 (+ OP_SUB r0 r1 r2 (f-resv0 0)) 671 (set r2 (sub r0 r1)) 672 () 673 ) 674 675 (dni sw "store word" () 676 "sw ($r0+$imm),$r1" 677 (+ OP_SW r0 r1 imm) 678 (set (mem SI (add r0 (ext SI (trunc HI imm)))) r1) 679 () 680 ) 681 682 (dni user "user defined instruction" () 683 "user $r2,$r0,$r1,$user" 684 (+ OP_USER r0 r1 r2 user) 685 (set r2 (c-call SI "@cpu@_user_insn" r0 r1 user)) 686 () 687 ) 688 689 (dni wcsr "write control or status register" () 690 "wcsr $csr,$r1" 691 (+ OP_WCSR csr r1 (f-r2 0) (f-resv0 0)) 692 (c-call VOID "@cpu@_wcsr_insn" f-csr r1) 693 () 694 ) 695 696 (dni xor "xor" () 697 "xor $r2,$r0,$r1" 698 (+ OP_XOR r0 r1 r2 (f-resv0 0)) 699 (set r2 (xor r0 r1)) 700 () 701 ) 702 703 (dni xori "xor immediate" () 704 "xori $r1,$r0,$uimm" 705 (+ OP_XORI r0 r1 uimm) 706 (set r1 (xor r0 (zext SI uimm))) 707 () 708 ) 709 710 (dni xnor "xnor" () 711 "xnor $r2,$r0,$r1" 712 (+ OP_XNOR r0 r1 r2 (f-resv0 0)) 713 (set r2 (inv (xor r0 r1))) 714 () 715 ) 716 717 (dni xnori "xnor immediate" () 718 "xnori $r1,$r0,$uimm" 719 (+ OP_XNORI r0 r1 uimm) 720 (set r1 (inv (xor r0 (zext SI uimm)))) 721 () 722 ) 723 724 ; Pseudo instructions 725 726 (dni break "breakpoint" () 727 "break" 728 (+ OP_RAISE (f-exception 2)) 729 (set pc (c-call USI "@cpu@_break_insn" pc)) 730 () 731 ) 732 733 (dni scall "system call" () 734 "scall" 735 (+ OP_RAISE (f-exception 7)) 736 (set pc (c-call USI "@cpu@_scall_insn" pc)) 737 () 738 ) 739 740 (dni bret "return from breakpoint" (ALIAS) 741 "bret" 742 (+ OP_B (f-r0 31) (f-r1 0) (f-r2 0) (f-resv0 0)) 743 (set pc (c-call USI "@cpu@_bret_insn" r0)) 744 () 745 ) 746 747 (dni eret "return from exception" (ALIAS) 748 "eret" 749 (+ OP_B (f-r0 30) (f-r1 0) (f-r2 0) (f-resv0 0)) 750 (set pc (c-call USI "@cpu@_eret_insn" r0)) 751 () 752 ) 753 754 (dni ret "return" (ALIAS) 755 "ret" 756 (+ OP_B (f-r0 29) (f-r1 0) (f-r2 0) (f-resv0 0)) 757 (set pc r0) 758 () 759 ) 760 761 (dni mv "move" (ALIAS) 762 "mv $r2,$r0" 763 (+ OP_OR r0 (f-r1 0) r2 (f-resv0 0)) 764 (set r2 r0) 765 () 766 ) 767 768 (dni mvi "move immediate" (ALIAS) 769 "mvi $r1,$imm" 770 (+ OP_ADDI (f-r0 0) r1 imm) 771 (set r1 (add r0 (ext SI (trunc HI imm)))) 772 () 773 ) 774 775 (dni mvui "move unsigned immediate" (ALIAS) 776 "mvu $r1,$lo16" 777 (+ OP_ORI (f-r0 0) r1 lo16) 778 (set r1 (zext SI lo16)) 779 () 780 ) 781 782 (dni mvhi "move high immediate" (ALIAS) 783 "mvhi $r1,$hi16" 784 (+ OP_ORHI (f-r0 0) r1 hi16) 785 (set r1 (or r0 (sll SI hi16 16))) 786 () 787 ) 788 789 (dni mva "move address" (ALIAS) 790 "mva $r1,$gp16" 791 (+ OP_ADDI (f-r0 26) r1 gp16) 792 (set r1 (add r0 (ext SI (trunc HI gp16)))) 793 () 794 ) 795 796 (dni not "not" (ALIAS) 797 "not $r2,$r0" 798 (+ OP_XNOR r0 (f-r1 0) r2 (f-resv0 0)) 799 (set r2 (inv r0)) 800 () 801 ) 802 803 (dni nop "nop" (ALIAS) 804 "nop" 805 (+ OP_ADDI (f-r0 0) (f-r1 0) (f-imm 0)) 806 (set r0 r0) 807 () 808 ) 809 810 (dni lbgprel "load byte gp relative" (ALIAS) 811 "lb $r1,$gp16" 812 (+ OP_LB (f-r0 26) r1 gp16) 813 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI gp16)))))) 814 () 815 ) 816 817 (dni lbugprel "load byte unsigned gp relative" (ALIAS) 818 "lbu $r1,$gp16" 819 (+ OP_LBU (f-r0 26) r1 gp16) 820 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI gp16)))))) 821 () 822 ) 823 824 (dni lhgprel "load halfword gp relative" (ALIAS) 825 "lh $r1,$gp16" 826 (+ OP_LH (f-r0 26) r1 gp16) 827 (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI gp16)))))) 828 () 829 ) 830 831 (dni lhugprel "load halfword unsigned gp relative" (ALIAS) 832 "lhu $r1,$gp16" 833 (+ OP_LHU (f-r0 26) r1 gp16) 834 (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI gp16)))))) 835 () 836 ) 837 838 (dni lwgprel "load word gp relative" (ALIAS) 839 "lw $r1,$gp16" 840 (+ OP_LW (f-r0 26) r1 gp16) 841 (set r1 (mem SI (add r0 (ext SI (trunc HI gp16))))) 842 () 843 ) 844 845 (dni sbgprel "store byte gp relative" (ALIAS) 846 "sb $gp16,$r1" 847 (+ OP_SB (f-r0 26) r1 gp16) 848 (set (mem QI (add r0 (ext SI (trunc HI gp16)))) r1) 849 () 850 ) 851 852 (dni shgprel "store halfword gp relative" (ALIAS) 853 "sh $gp16,$r1" 854 (+ OP_SH (f-r0 26) r1 gp16) 855 (set (mem HI (add r0 (ext SI (trunc HI gp16)))) r1) 856 () 857 ) 858 859 (dni swgprel "store word gp relative" (ALIAS) 860 "sw $gp16,$r1" 861 (+ OP_SW (f-r0 26) r1 gp16) 862 (set (mem SI (add r0 (ext SI (trunc HI gp16)))) r1) 863 () 864 ) 865 866 (dni lwgotrel "load word got relative" (ALIAS) 867 "lw $r1,(gp+$got16)" 868 (+ OP_LW (f-r0 26) r1 got16) 869 (set r1 (mem SI (add r0 (ext SI (trunc HI got16))))) 870 () 871 ) 872 873 (dni orhigotoffi "or high got offset immediate" (ALIAS) 874 "orhi $r1,$r0,$gotoffhi16" 875 (+ OP_ORHI r0 r1 gotoffhi16) 876 (set r1 (or r0 (sll SI gotoffhi16 16))) 877 () 878 ) 879 880 (dni addgotoff "add got offset" (ALIAS) 881 "addi $r1,$r0,$gotofflo16" 882 (+ OP_ADDI r0 r1 gotofflo16) 883 (set r1 (add r0 (ext SI (trunc HI gotofflo16)))) 884 () 885 ) 886 887 (dni swgotoff "store word got offset" (ALIAS) 888 "sw ($r0+$gotofflo16),$r1" 889 (+ OP_SW r0 r1 gotofflo16) 890 (set (mem SI (add r0 (ext SI (trunc HI gotofflo16)))) r1) 891 () 892 ) 893 894 (dni lwgotoff "load word got offset" (ALIAS) 895 "lw $r1,($r0+$gotofflo16)" 896 (+ OP_LW r0 r1 gotofflo16) 897 (set r1 (mem SI (add r0 (ext SI (trunc HI gotofflo16))))) 898 () 899 ) 900 901 (dni shgotoff "store half word got offset" (ALIAS) 902 "sh ($r0+$gotofflo16),$r1" 903 (+ OP_SH r0 r1 gotofflo16) 904 (set (mem HI (add r0 (ext SI (trunc HI gotofflo16)))) r1) 905 () 906 ) 907 908 (dni lhgotoff "load half word got offset" (ALIAS) 909 "lh $r1,($r0+$gotofflo16)" 910 (+ OP_LH r0 r1 gotofflo16) 911 (set r1 (ext SI (mem HI (add r0 (ext SI (trunc HI gotofflo16)))))) 912 () 913 ) 914 915 (dni lhugotoff "load half word got offset unsigned" (ALIAS) 916 "lhu $r1,($r0+$gotofflo16)" 917 (+ OP_LHU r0 r1 gotofflo16) 918 (set r1 (zext SI (mem HI (add r0 (ext SI (trunc HI gotofflo16)))))) 919 () 920 ) 921 922 (dni sbgotoff "store byte got offset" (ALIAS) 923 "sb ($r0+$gotofflo16),$r1" 924 (+ OP_SB r0 r1 gotofflo16) 925 (set (mem QI (add r0 (ext SI (trunc HI gotofflo16)))) r1) 926 () 927 ) 928 929 (dni lbgotoff "load byte got offset" (ALIAS) 930 "lb $r1,($r0+$gotofflo16)" 931 (+ OP_LB r0 r1 gotofflo16) 932 (set r1 (ext SI (mem QI (add r0 (ext SI (trunc HI gotofflo16)))))) 933 () 934 ) 935 936 (dni lbugotoff "load byte got offset unsigned" (ALIAS) 937 "lbu $r1,($r0+$gotofflo16)" 938 (+ OP_LBU r0 r1 gotofflo16) 939 (set r1 (zext SI (mem QI (add r0 (ext SI (trunc HI gotofflo16)))))) 940 () 941 ) 942