1 MEMORY 2 { 3 ram : ORIGIN = 0x10000, LENGTH = 0x10000 4 rom : ORIGIN = 0x20000, LENGTH = 0x10000 5 } 6 7 SECTIONS 8 { 9 .text : ALIGN_WITH_INPUT {*(.text)} > ram AT> rom 10 .tbss : {*(.tbss)} > ram AT> rom 11 .data : ALIGN_WITH_INPUT {*(.data)} > ram AT> rom 12 /DISCARD/ : {*(*)} 13 } 14
