1 /* Disassembler interface for targets using CGEN. -*- C -*- 2 CGEN: Cpu tools GENerator 3 4 THIS FILE IS MACHINE GENERATED WITH CGEN. 5 - the resultant file is machine generated, cgen-dis.in isn't 6 7 Copyright (C) 1996-2014 Free Software Foundation, Inc. 8 9 This file is part of libopcodes. 10 11 This library is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 3, or (at your option) 14 any later version. 15 16 It is distributed in the hope that it will be useful, but WITHOUT 17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software Foundation, Inc., 23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 24 25 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 26 Keep that in mind. */ 27 28 #include "sysdep.h" 29 #include <stdio.h> 30 #include "ansidecl.h" 31 #include "dis-asm.h" 32 #include "bfd.h" 33 #include "symcat.h" 34 #include "libiberty.h" 35 #include "iq2000-desc.h" 36 #include "iq2000-opc.h" 37 #include "opintl.h" 38 39 /* Default text to print if an instruction isn't recognized. */ 40 #define UNKNOWN_INSN_MSG _("*unknown*") 41 42 static void print_normal 43 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int); 44 static void print_address 45 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED; 46 static void print_keyword 47 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED; 48 static void print_insn_normal 49 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); 50 static int print_insn 51 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); 52 static int default_print_insn 53 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; 54 static int read_insn 55 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, 56 unsigned long *); 57 58 /* -- disassembler routines inserted here. */ 60 61 62 void iq2000_cgen_print_operand 63 (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); 64 65 /* Main entry point for printing operands. 66 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement 67 of dis-asm.h on cgen.h. 68 69 This function is basically just a big switch statement. Earlier versions 70 used tables to look up the function to use, but 71 - if the table contains both assembler and disassembler functions then 72 the disassembler contains much of the assembler and vice-versa, 73 - there's a lot of inlining possibilities as things grow, 74 - using a switch statement avoids the function call overhead. 75 76 This function could be moved into `print_insn_normal', but keeping it 77 separate makes clear the interface between `print_insn_normal' and each of 78 the handlers. */ 79 80 void 81 iq2000_cgen_print_operand (CGEN_CPU_DESC cd, 82 int opindex, 83 void * xinfo, 84 CGEN_FIELDS *fields, 85 void const *attrs ATTRIBUTE_UNUSED, 86 bfd_vma pc, 87 int length) 88 { 89 disassemble_info *info = (disassemble_info *) xinfo; 90 91 switch (opindex) 92 { 93 case IQ2000_OPERAND__INDEX : 94 print_normal (cd, info, fields->f_index, 0, pc, length); 95 break; 96 case IQ2000_OPERAND_BASE : 97 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rs, 0); 98 break; 99 case IQ2000_OPERAND_BASEOFF : 100 print_address (cd, info, fields->f_imm, 0, pc, length); 101 break; 102 case IQ2000_OPERAND_BITNUM : 103 print_normal (cd, info, fields->f_rt, 0, pc, length); 104 break; 105 case IQ2000_OPERAND_BYTECOUNT : 106 print_normal (cd, info, fields->f_bytecount, 0, pc, length); 107 break; 108 case IQ2000_OPERAND_CAM_Y : 109 print_normal (cd, info, fields->f_cam_y, 0, pc, length); 110 break; 111 case IQ2000_OPERAND_CAM_Z : 112 print_normal (cd, info, fields->f_cam_z, 0, pc, length); 113 break; 114 case IQ2000_OPERAND_CM_3FUNC : 115 print_normal (cd, info, fields->f_cm_3func, 0, pc, length); 116 break; 117 case IQ2000_OPERAND_CM_3Z : 118 print_normal (cd, info, fields->f_cm_3z, 0, pc, length); 119 break; 120 case IQ2000_OPERAND_CM_4FUNC : 121 print_normal (cd, info, fields->f_cm_4func, 0, pc, length); 122 break; 123 case IQ2000_OPERAND_CM_4Z : 124 print_normal (cd, info, fields->f_cm_4z, 0, pc, length); 125 break; 126 case IQ2000_OPERAND_COUNT : 127 print_normal (cd, info, fields->f_count, 0, pc, length); 128 break; 129 case IQ2000_OPERAND_EXECODE : 130 print_normal (cd, info, fields->f_excode, 0, pc, length); 131 break; 132 case IQ2000_OPERAND_HI16 : 133 print_normal (cd, info, fields->f_imm, 0, pc, length); 134 break; 135 case IQ2000_OPERAND_IMM : 136 print_normal (cd, info, fields->f_imm, 0, pc, length); 137 break; 138 case IQ2000_OPERAND_JMPTARG : 139 print_address (cd, info, fields->f_jtarg, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length); 140 break; 141 case IQ2000_OPERAND_JMPTARGQ10 : 142 print_address (cd, info, fields->f_jtargq10, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length); 143 break; 144 case IQ2000_OPERAND_LO16 : 145 print_normal (cd, info, fields->f_imm, 0, pc, length); 146 break; 147 case IQ2000_OPERAND_MASK : 148 print_normal (cd, info, fields->f_mask, 0, pc, length); 149 break; 150 case IQ2000_OPERAND_MASKL : 151 print_normal (cd, info, fields->f_maskl, 0, pc, length); 152 break; 153 case IQ2000_OPERAND_MASKQ10 : 154 print_normal (cd, info, fields->f_maskq10, 0, pc, length); 155 break; 156 case IQ2000_OPERAND_MASKR : 157 print_normal (cd, info, fields->f_rs, 0, pc, length); 158 break; 159 case IQ2000_OPERAND_MLO16 : 160 print_normal (cd, info, fields->f_imm, 0, pc, length); 161 break; 162 case IQ2000_OPERAND_OFFSET : 163 print_address (cd, info, fields->f_offset, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); 164 break; 165 case IQ2000_OPERAND_RD : 166 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rd, 0); 167 break; 168 case IQ2000_OPERAND_RD_RS : 169 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rd_rs, 0|(1<<CGEN_OPERAND_VIRTUAL)); 170 break; 171 case IQ2000_OPERAND_RD_RT : 172 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rd_rt, 0|(1<<CGEN_OPERAND_VIRTUAL)); 173 break; 174 case IQ2000_OPERAND_RS : 175 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rs, 0); 176 break; 177 case IQ2000_OPERAND_RT : 178 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rt, 0); 179 break; 180 case IQ2000_OPERAND_RT_RS : 181 print_keyword (cd, info, & iq2000_cgen_opval_gr_names, fields->f_rt_rs, 0|(1<<CGEN_OPERAND_VIRTUAL)); 182 break; 183 case IQ2000_OPERAND_SHAMT : 184 print_normal (cd, info, fields->f_shamt, 0, pc, length); 185 break; 186 187 default : 188 /* xgettext:c-format */ 189 fprintf (stderr, _("Unrecognized field %d while printing insn.\n"), 190 opindex); 191 abort (); 192 } 193 } 194 195 cgen_print_fn * const iq2000_cgen_print_handlers[] = 196 { 197 print_insn_normal, 198 }; 199 200 201 void 202 iq2000_cgen_init_dis (CGEN_CPU_DESC cd) 203 { 204 iq2000_cgen_init_opcode_table (cd); 205 iq2000_cgen_init_ibld_table (cd); 206 cd->print_handlers = & iq2000_cgen_print_handlers[0]; 207 cd->print_operand = iq2000_cgen_print_operand; 208 } 209 210 211 /* Default print handler. */ 213 214 static void 215 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 216 void *dis_info, 217 long value, 218 unsigned int attrs, 219 bfd_vma pc ATTRIBUTE_UNUSED, 220 int length ATTRIBUTE_UNUSED) 221 { 222 disassemble_info *info = (disassemble_info *) dis_info; 223 224 /* Print the operand as directed by the attributes. */ 225 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 226 ; /* nothing to do */ 227 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 228 (*info->fprintf_func) (info->stream, "%ld", value); 229 else 230 (*info->fprintf_func) (info->stream, "0x%lx", value); 231 } 232 233 /* Default address handler. */ 234 235 static void 236 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 237 void *dis_info, 238 bfd_vma value, 239 unsigned int attrs, 240 bfd_vma pc ATTRIBUTE_UNUSED, 241 int length ATTRIBUTE_UNUSED) 242 { 243 disassemble_info *info = (disassemble_info *) dis_info; 244 245 /* Print the operand as directed by the attributes. */ 246 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 247 ; /* Nothing to do. */ 248 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) 249 (*info->print_address_func) (value, info); 250 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) 251 (*info->print_address_func) (value, info); 252 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 253 (*info->fprintf_func) (info->stream, "%ld", (long) value); 254 else 255 (*info->fprintf_func) (info->stream, "0x%lx", (long) value); 256 } 257 258 /* Keyword print handler. */ 259 260 static void 261 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 262 void *dis_info, 263 CGEN_KEYWORD *keyword_table, 264 long value, 265 unsigned int attrs ATTRIBUTE_UNUSED) 266 { 267 disassemble_info *info = (disassemble_info *) dis_info; 268 const CGEN_KEYWORD_ENTRY *ke; 269 270 ke = cgen_keyword_lookup_value (keyword_table, value); 271 if (ke != NULL) 272 (*info->fprintf_func) (info->stream, "%s", ke->name); 273 else 274 (*info->fprintf_func) (info->stream, "???"); 275 } 276 277 /* Default insn printer. 279 280 DIS_INFO is defined as `void *' so the disassembler needn't know anything 281 about disassemble_info. */ 282 283 static void 284 print_insn_normal (CGEN_CPU_DESC cd, 285 void *dis_info, 286 const CGEN_INSN *insn, 287 CGEN_FIELDS *fields, 288 bfd_vma pc, 289 int length) 290 { 291 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 292 disassemble_info *info = (disassemble_info *) dis_info; 293 const CGEN_SYNTAX_CHAR_TYPE *syn; 294 295 CGEN_INIT_PRINT (cd); 296 297 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 298 { 299 if (CGEN_SYNTAX_MNEMONIC_P (*syn)) 300 { 301 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); 302 continue; 303 } 304 if (CGEN_SYNTAX_CHAR_P (*syn)) 305 { 306 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); 307 continue; 308 } 309 310 /* We have an operand. */ 311 iq2000_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, 312 fields, CGEN_INSN_ATTRS (insn), pc, length); 313 } 314 } 315 316 /* Subroutine of print_insn. Reads an insn into the given buffers and updates 318 the extract info. 319 Returns 0 if all is well, non-zero otherwise. */ 320 321 static int 322 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 323 bfd_vma pc, 324 disassemble_info *info, 325 bfd_byte *buf, 326 int buflen, 327 CGEN_EXTRACT_INFO *ex_info, 328 unsigned long *insn_value) 329 { 330 int status = (*info->read_memory_func) (pc, buf, buflen, info); 331 332 if (status != 0) 333 { 334 (*info->memory_error_func) (status, pc, info); 335 return -1; 336 } 337 338 ex_info->dis_info = info; 339 ex_info->valid = (1 << buflen) - 1; 340 ex_info->insn_bytes = buf; 341 342 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); 343 return 0; 344 } 345 346 /* Utility to print an insn. 347 BUF is the base part of the insn, target byte order, BUFLEN bytes long. 348 The result is the size of the insn in bytes or zero for an unknown insn 349 or -1 if an error occurs fetching data (memory_error_func will have 350 been called). */ 351 352 static int 353 print_insn (CGEN_CPU_DESC cd, 354 bfd_vma pc, 355 disassemble_info *info, 356 bfd_byte *buf, 357 unsigned int buflen) 358 { 359 CGEN_INSN_INT insn_value; 360 const CGEN_INSN_LIST *insn_list; 361 CGEN_EXTRACT_INFO ex_info; 362 int basesize; 363 364 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ 365 basesize = cd->base_insn_bitsize < buflen * 8 ? 366 cd->base_insn_bitsize : buflen * 8; 367 insn_value = cgen_get_insn_value (cd, buf, basesize); 368 369 370 /* Fill in ex_info fields like read_insn would. Don't actually call 371 read_insn, since the incoming buffer is already read (and possibly 372 modified a la m32r). */ 373 ex_info.valid = (1 << buflen) - 1; 374 ex_info.dis_info = info; 375 ex_info.insn_bytes = buf; 376 377 /* The instructions are stored in hash lists. 378 Pick the first one and keep trying until we find the right one. */ 379 380 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); 381 while (insn_list != NULL) 382 { 383 const CGEN_INSN *insn = insn_list->insn; 384 CGEN_FIELDS fields; 385 int length; 386 unsigned long insn_value_cropped; 387 388 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 389 /* Not needed as insn shouldn't be in hash lists if not supported. */ 390 /* Supported by this cpu? */ 391 if (! iq2000_cgen_insn_supported (cd, insn)) 392 { 393 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 394 continue; 395 } 396 #endif 397 398 /* Basic bit mask must be correct. */ 399 /* ??? May wish to allow target to defer this check until the extract 400 handler. */ 401 402 /* Base size may exceed this instruction's size. Extract the 403 relevant part from the buffer. */ 404 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && 405 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 406 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 407 info->endian == BFD_ENDIAN_BIG); 408 else 409 insn_value_cropped = insn_value; 410 411 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) 412 == CGEN_INSN_BASE_VALUE (insn)) 413 { 414 /* Printing is handled in two passes. The first pass parses the 415 machine insn and extracts the fields. The second pass prints 416 them. */ 417 418 /* Make sure the entire insn is loaded into insn_value, if it 419 can fit. */ 420 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && 421 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 422 { 423 unsigned long full_insn_value; 424 int rc = read_insn (cd, pc, info, buf, 425 CGEN_INSN_BITSIZE (insn) / 8, 426 & ex_info, & full_insn_value); 427 if (rc != 0) 428 return rc; 429 length = CGEN_EXTRACT_FN (cd, insn) 430 (cd, insn, &ex_info, full_insn_value, &fields, pc); 431 } 432 else 433 length = CGEN_EXTRACT_FN (cd, insn) 434 (cd, insn, &ex_info, insn_value_cropped, &fields, pc); 435 436 /* Length < 0 -> error. */ 437 if (length < 0) 438 return length; 439 if (length > 0) 440 { 441 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); 442 /* Length is in bits, result is in bytes. */ 443 return length / 8; 444 } 445 } 446 447 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 448 } 449 450 return 0; 451 } 452 453 /* Default value for CGEN_PRINT_INSN. 454 The result is the size of the insn in bytes or zero for an unknown insn 455 or -1 if an error occured fetching bytes. */ 456 457 #ifndef CGEN_PRINT_INSN 458 #define CGEN_PRINT_INSN default_print_insn 459 #endif 460 461 static int 462 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) 463 { 464 bfd_byte buf[CGEN_MAX_INSN_SIZE]; 465 int buflen; 466 int status; 467 468 /* Attempt to read the base part of the insn. */ 469 buflen = cd->base_insn_bitsize / 8; 470 status = (*info->read_memory_func) (pc, buf, buflen, info); 471 472 /* Try again with the minimum part, if min < base. */ 473 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) 474 { 475 buflen = cd->min_insn_bitsize / 8; 476 status = (*info->read_memory_func) (pc, buf, buflen, info); 477 } 478 479 if (status != 0) 480 { 481 (*info->memory_error_func) (status, pc, info); 482 return -1; 483 } 484 485 return print_insn (cd, pc, info, buf, buflen); 486 } 487 488 /* Main entry point. 489 Print one instruction from PC on INFO->STREAM. 490 Return the size of the instruction (in bytes). */ 491 492 typedef struct cpu_desc_list 493 { 494 struct cpu_desc_list *next; 495 CGEN_BITSET *isa; 496 int mach; 497 int endian; 498 CGEN_CPU_DESC cd; 499 } cpu_desc_list; 500 501 int 502 print_insn_iq2000 (bfd_vma pc, disassemble_info *info) 503 { 504 static cpu_desc_list *cd_list = 0; 505 cpu_desc_list *cl = 0; 506 static CGEN_CPU_DESC cd = 0; 507 static CGEN_BITSET *prev_isa; 508 static int prev_mach; 509 static int prev_endian; 510 int length; 511 CGEN_BITSET *isa; 512 int mach; 513 int endian = (info->endian == BFD_ENDIAN_BIG 514 ? CGEN_ENDIAN_BIG 515 : CGEN_ENDIAN_LITTLE); 516 enum bfd_architecture arch; 517 518 /* ??? gdb will set mach but leave the architecture as "unknown" */ 519 #ifndef CGEN_BFD_ARCH 520 #define CGEN_BFD_ARCH bfd_arch_iq2000 521 #endif 522 arch = info->arch; 523 if (arch == bfd_arch_unknown) 524 arch = CGEN_BFD_ARCH; 525 526 /* There's no standard way to compute the machine or isa number 527 so we leave it to the target. */ 528 #ifdef CGEN_COMPUTE_MACH 529 mach = CGEN_COMPUTE_MACH (info); 530 #else 531 mach = info->mach; 532 #endif 533 534 #ifdef CGEN_COMPUTE_ISA 535 { 536 static CGEN_BITSET *permanent_isa; 537 538 if (!permanent_isa) 539 permanent_isa = cgen_bitset_create (MAX_ISAS); 540 isa = permanent_isa; 541 cgen_bitset_clear (isa); 542 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); 543 } 544 #else 545 isa = info->insn_sets; 546 #endif 547 548 /* If we've switched cpu's, try to find a handle we've used before */ 549 if (cd 550 && (cgen_bitset_compare (isa, prev_isa) != 0 551 || mach != prev_mach 552 || endian != prev_endian)) 553 { 554 cd = 0; 555 for (cl = cd_list; cl; cl = cl->next) 556 { 557 if (cgen_bitset_compare (cl->isa, isa) == 0 && 558 cl->mach == mach && 559 cl->endian == endian) 560 { 561 cd = cl->cd; 562 prev_isa = cd->isas; 563 break; 564 } 565 } 566 } 567 568 /* If we haven't initialized yet, initialize the opcode table. */ 569 if (! cd) 570 { 571 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); 572 const char *mach_name; 573 574 if (!arch_type) 575 abort (); 576 mach_name = arch_type->printable_name; 577 578 prev_isa = cgen_bitset_copy (isa); 579 prev_mach = mach; 580 prev_endian = endian; 581 cd = iq2000_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, 582 CGEN_CPU_OPEN_BFDMACH, mach_name, 583 CGEN_CPU_OPEN_ENDIAN, prev_endian, 584 CGEN_CPU_OPEN_END); 585 if (!cd) 586 abort (); 587 588 /* Save this away for future reference. */ 589 cl = xmalloc (sizeof (struct cpu_desc_list)); 590 cl->cd = cd; 591 cl->isa = prev_isa; 592 cl->mach = mach; 593 cl->endian = endian; 594 cl->next = cd_list; 595 cd_list = cl; 596 597 iq2000_cgen_init_dis (cd); 598 } 599 600 /* We try to have as much common code as possible. 601 But at this point some targets need to take over. */ 602 /* ??? Some targets may need a hook elsewhere. Try to avoid this, 603 but if not possible try to move this hook elsewhere rather than 604 have two hooks. */ 605 length = CGEN_PRINT_INSN (cd, pc, info); 606 if (length > 0) 607 return length; 608 if (length < 0) 609 return -1; 610 611 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); 612 return cd->default_insn_bitsize / 8; 613 } 614
