Lines Matching defs:Def
202 /// existing subregister number of the def / use being updated is not zero,
210 /// %vreg0:sub0<def,read-undef> = ...
505 if (BValNo->def != CopyIdx) return false;
516 MachineInstr *ACopyMI = LIS->getInstructionFromIndex(AValNo->def);
523 IntB.FindSegmentContaining(AValNo->def.getPrevSlot());
545 BValNo->def = FillerStart;
560 VNInfo *SubValSNo = S.getVNInfoAt(AValNo->def.getPrevSlot());
657 assert(BValNo != nullptr && BValNo->def == CopyIdx);
664 MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def);
692 if (NewReg != IntB.reg || !IntB.Query(AValNo->def).isKill())
709 // If this use is tied to a def, we can't rewrite the register.
714 DEBUG(dbgs() << "\tremoveCopyByCommutingDef: " << AValNo->def << '\t'
785 assert(DVNI->def == DefIdx);
792 assert(SubBValNo->def == CopyIdx);
839 assert(BSubValNo->def == CopyIdx);
840 BSubValNo->def = ASubValNo->def;
853 BValNo->def = AValNo->def;
857 LIS->removeVRegDefAt(IntA, AValNo->def);
897 MachineInstr *DefMI = LIS->getInstructionFromIndex(ValNo->def);
916 // Only support subregister destinations when the def is read-undef.
1045 // vreg2:sub_16bit<def, read-undef> = COPY vreg1:sub_16bit
1076 // Record small dead def live-ranges for all the subregisters
1087 // ECX<def, dead> = remat ; CL<imp-def>
1169 // Remove value or merge with previous one in case of a subregister def.
1181 assert(SVNI != nullptr && SlotIndex::isSameInstr(SVNI->def, RegIndex));
1269 // the UseMI operands removes them from the SrcReg use-def chain, but when
1289 // turn a full def into a read-modify-write sub-register def and vice
1588 // register. However, for this case, where we intent to move up the def of
1610 DEBUG(dbgs() << "\t\tRemoving phys reg def of " << DstReg << " at "
1614 // Create a new dead def at the new def location.
1640 // This means that two SSA values overlap if and only if the def of one value
1644 // The interference from an overlapping def can be resolved in these cases:
1659 // 3. Copy of external value. The overlapping def may be a copy of a value that
1670 // %dst:ssub0<def,read-undef> = FOO
1672 // %dst:ssub1<def> = COPY %src
1683 // 5. Clobbering dead lanes. A def may clobber a lane of a vector register that
1687 // %dst<def> = FOO
1689 // %dst:ssub1<def> = COPY %src
1748 /// before and after this def.
1765 /// Lanes written by this def, 0 for unanalyzed values.
1772 /// Value in LI being redefined by this def.
1775 /// Value in the other live range that overlaps this def, if any.
1926 SlotIndex Def = VNI->def;
1927 MachineInstr *MI = Indexes->getInstructionFromIndex(Def);
1939 LiveQueryResult LRQ = LI.Query(Def);
1949 LiveQueryResult LRQ = S.Query(Def);
1978 return Orig0->def == Orig1->def && Reg0 == Reg1;
1998 DefMI = Indexes->getInstructionFromIndex(VNI->def);
2018 // %src:ssub1<def> = FOO
2022 // %src:ssub1<def,read-undef> = FOO %src:ssub2
2024 // The <read-undef> flag on the def operand means that old lane values are
2027 V.RedefVNI = LR.Query(VNI->def).valueIn();
2047 // Find the value in Other that overlaps VNI->def, if any.
2048 LiveQueryResult OtherLRQ = Other.LR.Query(VNI->def);
2055 assert(SlotIndex::isSameInstr(VNI->def, OtherVNI->def) && "Broken LRQ");
2059 if (OtherVNI->def < VNI->def)
2061 else if (VNI->def < OtherVNI->def && OtherLRQ.valueIn()) {
2062 // This is an early-clobber def overlapping a live-in value in the other
2084 // No simultaneous def. Is Other live at the def?
2090 assert(!SlotIndex::isSameInstr(VNI->def, V.OtherVNI->def) && "Broken LRQ");
2105 DefMI->getParent() != Indexes->getMBBFromIndex(V.OtherVNI->def)) {
2106 DEBUG(dbgs() << "IMPLICIT_DEF defined at " << V.OtherVNI->def
2119 // We need the def for the subregister if there is nothing else live at the
2138 if (OtherLRQ.isKill() && OtherLRQ.endPoint() <= VNI->def)
2166 // overlapping, it must be because we're looking at an early clobber def:
2168 // %dst<def,early-clobber> = ASM %src<kill>
2171 // clobber def would clobber %src before it was read.
2173 // This case where the def doesn't overlap the kill is handled above.
2174 assert(VNI->def.isEarlyClobber() &&
2189 MachineBasicBlock *MBB = Indexes->getMBBFromIndex(VNI->def);
2219 << LR.getValNumInfo(ValNo)->def << " into "
2221 << V.OtherVNI->def << " --> @"
2222 << NewVNInfo[Assignments[ValNo]]->def << '\n');
2249 << '@' << LR.getValNumInfo(i)->def << '\n');
2260 MachineBasicBlock *MBB = Indexes->getMBBFromIndex(VNI->def);
2263 // Scan Other.LR from VNI.def to MBBEnd.
2264 LiveInterval::iterator OtherI = Other.LR.find(VNI->def);
2278 // A dead def is not a problem.
2283 // Check for another def in the MBB.
2287 // Lanes written by the new def are no longer tainted.
2319 << '@' << LR.getValNumInfo(i)->def << '\n');
2339 // Now look at the instructions from VNI->def to TaintExtent (inclusive).
2340 MachineBasicBlock *MBB = Indexes->getMBBFromIndex(VNI->def);
2343 MI = Indexes->getInstructionFromIndex(VNI->def);
2347 assert(!SlotIndex::isSameInstr(VNI->def, TaintExtent.front().first) &&
2348 "Interference ends on VNI->def. Should have been handled earlier");
2396 SlotIndex Def = LR.getValNumInfo(i)->def;
2402 LIS->pruneValue(Other.LR, Def, &EndPoints);
2410 if (!Def.isBlock()) {
2412 // Remove <def,read-undef> flags. This def is now a partial redef.
2413 // Also remove <def,dead> flags since the joined live range will
2416 Indexes->getInstructionFromIndex(Def)->operands()) {
2424 // the live range also reaches the instruction at Def.
2426 EndPoints.push_back(Def);
2428 DEBUG(dbgs() << "\t\tpruned " << PrintReg(Other.Reg) << " at " << Def
2439 LIS->pruneValue(LR, Def, &EndPoints);
2441 << Def << ": " << LR << '\n');
2460 SlotIndex Def = LR.getValNumInfo(i)->def;
2462 LiveQueryResult Q = S.Query(Def);
2469 << " at " << Def << "\n");
2470 LIS->pruneValue(S, Def, nullptr);
2480 << " at " << Def << "\n");
2504 // Get the def location before markUnused() below invalidates it.
2505 SlotIndex Def = LR.getValNumInfo(i)->def;
2519 DEBUG(dbgs() << "\t\tremoved " << i << '@' << Def << ": " << LR << '\n');
2524 MachineInstr *MI = Indexes->getInstructionFromIndex(Def);
2533 DEBUG(dbgs() << "\t\terased:\t" << Def << '\t' << *MI);
