Lines Matching defs:MBB
179 /// Find the compare instruction in MBB that controls the conditional branch.
181 MachineInstr *findConvertibleCompare(MachineBasicBlock *MBB);
183 /// Return true if all non-terminator instructions in MBB can be safely
185 bool canSpeculateInstrs(MachineBasicBlock *MBB, const MachineInstr *CmpMI);
196 /// If the sub-CFG headed by MBB can be cmp-converted, initialize the
198 bool canConvert(MachineBasicBlock *MBB);
217 // PHI operands come in (VReg, MBB) pairs.
219 MachineBasicBlock *MBB = I.getOperand(oi + 1).getMBB();
221 if (MBB == Head) {
225 if (MBB == CmpBB) {
244 // PHI operands are (Reg, MBB) at (oi-2, oi-1).
295 MachineInstr *SSACCmpConv::findConvertibleCompare(MachineBasicBlock *MBB) {
296 MachineBasicBlock::iterator I = MBB->getFirstTerminator();
297 if (I == MBB->end())
315 for (MachineBasicBlock::iterator B = MBB->begin(); I != B;) {
368 DEBUG(dbgs() << "Flags not defined in BB#" << MBB->getNumber() << '\n');
372 /// Determine if all the instructions in MBB can safely
377 bool SSACCmpConv::canSpeculateInstrs(MachineBasicBlock *MBB,
381 if (!MBB->livein_empty()) {
382 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " has live-ins.\n");
390 for (auto &I : make_range(MBB->begin(), MBB->getFirstTerminator())) {
395 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " has more than "
430 /// Analyze the sub-cfg rooted in MBB, and return true if it is a potential
433 bool SSACCmpConv::canConvert(MachineBasicBlock *MBB) {
434 Head = MBB;
873 bool AArch64ConditionalCompares::tryConvert(MachineBasicBlock *MBB) {
875 while (CmpConv.canConvert(MBB) && shouldConvert()) {
