Lines Matching full:shiftreg
3594 unsigned ShiftReg = emitLSR_ri(MVT::i64, MVT::i64, MulReg,3598 ShiftReg = fastEmitInst_extractsubreg(VT, ShiftReg, /*IsKill=*/true,3600 emitSubs_rs(VT, ShiftReg, /*IsKill=*/true, MulReg, /*IsKill=*/false,
