Lines Matching full:bsub
1381 defm : ScalToVecROLoadPat<ro8, extloadi8, i32, v8i8, LDRBroW, LDRBroX, bsub>;
1382 defm : ScalToVecROLoadPat<ro8, extloadi8, i32, v16i8, LDRBroW, LDRBroX, bsub>;
1534 (LDRBui GPR64sp:$Rn, uimm12s1:$offset), bsub)>;
1538 (LDRBui GPR64sp:$Rn, uimm12s1:$offset), bsub)>;
3466 UCVTFv1i32, ro8, LDRBroW, LDRBroX, bsub>;
3470 (LDRBui GPR64sp:$Rn, uimm12s1:$offset), bsub))>;
3474 (LDURBi GPR64sp:$Rn, simm9:$offset), bsub))>;
3495 UCVTFv1i64, ro8, LDRBroW, LDRBroX, bsub>;
3499 (LDRBui GPR64sp:$Rn, uimm12s1:$offset), bsub))>;
3503 (LDURBi GPR64sp:$Rn, simm9:$offset), bsub))>;
4146 (!cast<Instruction>(!strconcat(baseOpc, "v8i8v")) V64:$Rn), bsub)>;
4149 (!cast<Instruction>(!strconcat(baseOpc, "v16i8v")) V128:$Rn), bsub)>;
4166 bsub), ssub)>;
4170 bsub), ssub)>;
4196 (!cast<Instruction>(!strconcat(baseOpc, "v8i8v")) V64:$Rn), bsub),
4202 (!cast<Instruction>(!strconcat(baseOpc, "v16i8v")) V128:$Rn), bsub),
4227 (!cast<Instruction>(!strconcat(baseOpc, "v8i8v")) V64:$Rn), bsub),
4233 (!cast<Instruction>(!strconcat(baseOpc, "v16i8v")) V128:$Rn), bsub),
4941 bsub),
