Lines Matching full:getnode
656 return DAG.getNode(AMDGPUISD::ENDPGM, DL, MVT::Other, Chain);
791 SDValue Ptr = DAG.getNode(ISD::ADD, DL, PtrVT, InitPtr, Offset);
797 getNode(ISD::TokenFactor, DL, MVT::Other, Chains);
815 SDValue Ptr = DAG.getNode(ISD::ADD, DL, PtrVT, InitPtr, Offset);
821 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains);
856 return DAG.getNode(AMDGPUISD::CONST_DATA_PTR, SDLoc(G), ConstPtrVT, GA);
926 return DAG.getNode(AMDGPUISD::CLAMP, DL, VT,
930 return DAG.getNode(AMDGPUISD::LDEXP, DL, VT, Op.getOperand(1),
934 return DAG.getNode(AMDGPUISD::BFE_I32, DL, VT,
940 return DAG.getNode(AMDGPUISD::BFE_U32, DL, VT,
946 return DAG.getNode(ISD::BITREVERSE, DL, VT, Op.getOperand(1));
981 return DAG.getNode(AMDGPUISD::FMIN_LEGACY, DL, VT, RHS, LHS);
982 return DAG.getNode(AMDGPUISD::FMAX_LEGACY, DL, VT, LHS, RHS);
1000 return DAG.getNode(AMDGPUISD::FMIN_LEGACY, DL, VT, LHS, RHS);
1001 return DAG.getNode(AMDGPUISD::FMAX_LEGACY, DL, VT, RHS, LHS);
1006 return DAG.getNode(AMDGPUISD::FMAX_LEGACY, DL, VT, RHS, LHS);
1007 return DAG.getNode(AMDGPUISD::FMIN_LEGACY, DL, VT, LHS, RHS);
1018 return DAG.getNode(AMDGPUISD::FMAX_LEGACY, DL, VT, LHS, RHS);
1019 return DAG.getNode(AMDGPUISD::FMIN_LEGACY, DL, VT, RHS, LHS);
1031 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1036 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero);
1037 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One);
1045 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1047 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero);
1053 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1055 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One);
1095 SDValue HiPtr = DAG.getNode(ISD::ADD, SL, PtrVT, BasePtr,
1106 DAG.getNode(ISD::CONCAT_VECTORS, SL, VT, LoLoad, HiLoad),
1107 DAG.getNode(ISD::TokenFactor, SL, MVT::Other,
1144 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ElemVT, Value,
1147 Elt = DAG.getNode(ISD::AND, DL, MVT::i32, Elt, Mask); // getZeroExtendInReg
1150 Elt = DAG.getNode(ISD::SHL, DL, MVT::i32, Elt, Shift);
1155 PackedValue = DAG.getNode(ISD::OR, DL, MVT::i32, PackedValue, Elt);
1199 SDValue HiPtr = DAG.getNode(ISD::ADD, SL, PtrVT, BasePtr,
1225 return DAG.getNode(ISD::TokenFactor, SL, MVT::Other, LoStore, HiStore);
1261 jq = DAG.getNode(ISD::XOR, DL, VT, LHS, RHS);
1264 jq = DAG.getNode(ISD::SRA, DL, VT, jq,
1268 jq = DAG.getNode(ISD::OR, DL, VT, jq, DAG.getConstant(1, DL, VT));
1278 SDValue fa = DAG.getNode(ToFp, DL, FltVT, ia);
1281 SDValue fb = DAG.getNode(ToFp, DL, FltVT, ib);
1283 SDValue fq = DAG.getNode(ISD::FMUL, DL, FltVT,
1284 fa, DAG.getNode(AMDGPUISD::RCP, DL, FltVT, fb));
1287 fq = DAG.getNode(ISD::FTRUNC, DL, FltVT, fq);
1290 SDValue fqneg = DAG.getNode(ISD::FNEG, DL, FltVT, fq);
1293 SDValue fr = DAG.getNode(ISD::FMAD, DL, FltVT, fqneg, fb, fa);
1296 SDValue iq = DAG.getNode(ToInt, DL, IntVT, fq);
1299 fr = DAG.getNode(ISD::FABS, DL, FltVT, fr);
1302 fb = DAG.getNode(ISD::FABS, DL, FltVT, fb);
1310 jq = DAG.getNode(ISD::SELECT, DL, VT, cv, jq, DAG.getConstant(0, DL, VT));
1313 SDValue Div = DAG.getNode(ISD::ADD, DL, VT, iq, jq);
1316 SDValue Rem = DAG.getNode(ISD::MUL, DL, VT, Div, RHS);
1317 Rem = DAG.getNode(ISD::SUB, DL, VT, LHS, Rem);
1323 Div = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Div, InRegSize);
1324 Rem = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Rem, InRegSize);
1327 Div = DAG.getNode(ISD::AND, DL, VT, Div, TruncMask);
1328 Rem = DAG.getNode(ISD::AND, DL, VT, Rem, TruncMask);
1348 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, zero);
1349 SDValue LHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, one);
1352 SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, zero);
1353 SDValue RHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, one);
1359 SDValue Res = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(HalfVT, HalfVT),
1365 Results.push_back(DAG.getNode(ISD::BITCAST, DL, MVT::i64, DIV));
1366 Results.push_back(DAG.getNode(ISD::BITCAST, DL, MVT::i64, REM));
1371 SDValue DIV_Part = DAG.getNode(ISD::UDIV, DL, HalfVT, LHS_Hi, RHS_Lo);
1372 SDValue REM_Part = DAG.getNode(ISD::UREM, DL, HalfVT, LHS_Hi, RHS_Lo);
1376 REM = DAG.getNode(ISD::BITCAST, DL, MVT::i64, REM);
1387 SDValue HBit = DAG.getNode(ISD::SRL, DL, HalfVT, LHS_Lo, POS);
1388 HBit = DAG.getNode(ISD::AND, DL, HalfVT, HBit, one);
1389 HBit = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, HBit);
1392 REM = DAG.getNode(ISD::SHL, DL, VT, REM, DAG.getConstant(1, DL, VT));
1394 REM = DAG.getNode(ISD::OR, DL, VT, REM, HBit);
1399 DIV_Lo = DAG.getNode(ISD::OR, DL, HalfVT, DIV_Lo, realBIT);
1402 SDValue REM_sub = DAG.getNode(ISD::SUB, DL, VT, REM, RHS);
1407 DIV = DAG.getNode(ISD::BITCAST, DL, MVT::i64, DIV);
1433 SDValue RCP = DAG.getNode(AMDGPUISD::URECIP, DL, VT, Den);
1436 SDValue RCP_LO = DAG.getNode(ISD::MUL, DL, VT, RCP, Den);
1439 SDValue RCP_HI = DAG.getNode(ISD::MULHU, DL, VT, RCP, Den);
1442 SDValue NEG_RCP_LO = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT),
1451 SDValue E = DAG.getNode(ISD::MULHU, DL, VT, ABS_RCP_LO, RCP);
1454 SDValue RCP_A_E = DAG.getNode(ISD::ADD, DL, VT, RCP, E);
1457 SDValue RCP_S_E = DAG.getNode(ISD::SUB, DL, VT, RCP, E);
1464 SDValue Quotient = DAG.getNode(ISD::MULHU, DL, VT, Tmp0, Num);
1467 SDValue Num_S_Remainder = DAG.getNode(ISD::MUL, DL, VT, Quotient, Den);
1470 SDValue Remainder = DAG.getNode(ISD::SUB, DL, VT, Num, Num_S_Remainder);
1484 SDValue Tmp1 = DAG.getNode(ISD::AND, DL, VT, Remainder_GE_Den,
1490 SDValue Quotient_A_One = DAG.getNode(ISD::ADD, DL, VT, Quotient,
1494 SDValue Quotient_S_One = DAG.getNode(ISD::SUB, DL, VT, Quotient,
1508 SDValue Remainder_S_Den = DAG.getNode(ISD::SUB, DL, VT, Remainder, Den);
1511 SDValue Remainder_A_Den = DAG.getNode(ISD::ADD, DL, VT, Remainder, Den);
1549 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, Zero);
1550 SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, Zero);
1551 SDValue DIVREM = DAG.getNode(ISD::SDIVREM, DL, DAG.getVTList(HalfVT, HalfVT),
1554 DAG.getNode(ISD::SIGN_EXTEND, DL, VT, DIVREM.getValue(0)),
1555 DAG.getNode(ISD::SIGN_EXTEND, DL, VT, DIVREM.getValue(1))
1562 SDValue DSign = DAG.getNode(ISD::XOR, DL, VT, LHSign, RHSign);
1565 LHS = DAG.getNode(ISD::ADD, DL, VT, LHS, LHSign);
1566 RHS = DAG.getNode(ISD::ADD, DL, VT, RHS, RHSign);
1568 LHS = DAG.getNode(ISD::XOR, DL, VT, LHS, LHSign);
1569 RHS = DAG.getNode(ISD::XOR, DL, VT, RHS, RHSign);
1571 SDValue Div = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(VT, VT), LHS, RHS);
1574 Div = DAG.getNode(ISD::XOR, DL, VT, Div, DSign);
1575 Rem = DAG.getNode(ISD::XOR, DL, VT, Rem, RSign);
1577 Div = DAG.getNode(ISD::SUB, DL, VT, Div, DSign);
1578 Rem = DAG.getNode(ISD::SUB, DL, VT, Rem, RSign);
1596 SDValue Div = DAG.getNode(ISD::FDIV, SL, VT, X, Y);
1597 SDValue Floor = DAG.getNode(ISD::FTRUNC, SL, VT, Div);
1598 SDValue Mul = DAG.getNode(ISD::FMUL, SL, VT, Floor, Y);
1600 return DAG.getNode(ISD::FSUB, SL, VT, X, Mul);
1611 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src);
1621 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc);
1623 SDValue Add = DAG.getNode(ISD::SELECT, SL, MVT::f64, And, One, Zero);
1625 return DAG.getNode(ISD::FADD, SL, MVT::f64, Trunc, Add);
1633 SDValue ExpPart = DAG.getNode(AMDGPUISD::BFE_U32, SL, MVT::i32,
1637 SDValue Exp = DAG.getNode(ISD::SUB, SL, MVT::i32, ExpPart,
1652 SDValue VecSrc = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src);
1656 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, VecSrc, One);
1664 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask);
1668 SignBit64 = DAG.getNode(ISD::BITCAST, SL, MVT::i64, SignBit64);
1670 SDValue BcInt = DAG.getNode(ISD::BITCAST, SL, MVT::i64, Src);
1674 SDValue Shr = DAG.getNode(ISD::SRA, SL, MVT::i64, FractMask, Exp);
1676 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, BcInt, Not);
1686 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0);
1687 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpGt51, BcInt, Tmp1);
1689 return DAG.getNode(ISD::BITCAST, SL, MVT::f64, Tmp2);
1700 SDValue CopySign = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, C1, Src);
1704 SDValue Tmp1 = DAG.getNode(ISD::FADD, SL, MVT::f64, Src, CopySign);
1705 SDValue Tmp2 = DAG.getNode(ISD::FSUB, SL, MVT::f64, Tmp1, CopySign);
1707 SDValue Fabs = DAG.getNode
1723 return DAG.getNode(ISD::FRINT, SDLoc(Op), Op.getValueType(), Op.getOperand(0));
1731 SDValue T = DAG.getNode(ISD::FTRUNC, SL, MVT::f32, X);
1735 SDValue Diff = DAG.getNode(ISD::FSUB, SL, MVT::f32, X, T);
1737 SDValue AbsDiff = DAG.getNode(ISD::FABS, SL, MVT::f32, Diff);
1743 SDValue SignOne = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f32, One, X);
1750 SDValue Sel = DAG.getNode(ISD::SELECT, SL, MVT::f32, Cmp, SignOne, Zero);
1752 return DAG.getNode(ISD::FADD, SL, MVT::f32, T, Sel);
1759 SDValue L = DAG.getNode(ISD::BITCAST, SL, MVT::i64, X);
1768 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X);
1770 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC, One);
1777 SDValue M = DAG.getNode(ISD::SRA, SL, MVT::i64, Mask, Exp);
1778 SDValue D = DAG.getNode(ISD::SRA, SL, MVT::i64,
1783 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, L, M);
1788 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, Tmp1,
1790 SDValue K = DAG.getNode(ISD::ADD, SL, MVT::i64, L, Tmp2);
1792 K = DAG.getNode(ISD::AND, SL, MVT::i64, K, DAG.getNOT(SL, M, MVT::i64));
1793 K = DAG.getNode(ISD::BITCAST, SL, MVT::f64, K);
1799 SDValue Mag = DAG.getNode(ISD::SELECT, SL, MVT::f64,
1804 SDValue S = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, Mag, X);
1806 K = DAG.getNode(ISD::SELECT, SL, MVT::f64, ExpLt0, S, K);
1807 K = DAG.getNode(ISD::SELECT, SL, MVT::f64, ExpGt51, X, K);
1832 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src);
1842 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc);
1844 SDValue Add = DAG.getNode(ISD::SELECT, SL, MVT::f64, And, NegOne, Zero);
1846 return DAG.getNode(ISD::FADD, SL, MVT::f64, Trunc, Add);
1855 return DAG.getNode(AMDGPUISD::FFBH_U32, SL, MVT::i32, Src);
1857 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src);
1862 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero);
1863 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One);
1870 SDValue CtlzLo = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i32, Lo);
1871 SDValue CtlzHi = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i32, Hi);
1874 SDValue Add = DAG.getNode(ISD::ADD, SL, MVT::i32, CtlzLo, Bits32);
1877 SDValue NewCtlz = DAG.getNode(ISD::SELECT, SL, MVT::i32, Hi0, Add, CtlzHi);
1885 SDValue SrcIsZero = DAG.getNode(ISD::AND, SL, SetCCVT, Lo0, Hi0);
1896 NewCtlz = DAG.getNode(ISD::SELECT, SL, MVT::i32,
1900 return DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i64, NewCtlz);
1931 S = DAG.getNode(ISD::SRA, SL, MVT::i64, L, SignBit);
1933 SDValue LPlusS = DAG.getNode(ISD::ADD, SL, MVT::i64, L, S);
1934 L = DAG.getNode(ISD::XOR, SL, MVT::i64, LPlusS, S);
1943 SDValue LZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i64, L);
1944 LZ = DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, LZ);
1949 DAG.getNode(ISD::SUB, SL, MVT::i32, K, LZ),
1952 SDValue U = DAG.getNode(ISD::AND, SL, MVT::i64,
1953 DAG.getNode(ISD::SHL, SL, MVT::i64, L, LZ),
1956 SDValue T = DAG.getNode(ISD::AND, SL, MVT::i64, U,
1959 SDValue UShl = DAG.getNode(ISD::SRL, SL, MVT::i64,
1962 SDValue V = DAG.getNode(ISD::OR, SL, MVT::i32,
1963 DAG.getNode(ISD::SHL, SL, MVT::i32, E, DAG.getConstant(23, SL, MVT::i32)),
1964 DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, UShl));
1972 SDValue VTrunc1 = DAG.getNode(ISD::AND, SL, MVT::i32, V, One);
1978 R = DAG.getNode(ISD::ADD, SL, MVT::i32, V, R);
1979 R = DAG.getNode(ISD::BITCAST, SL, MVT::f32, R);
1984 SDValue RNeg = DAG.getNode(ISD::FNEG, SL, MVT::f32, R);
1993 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src);
1995 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC,
1997 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC,
2000 SDValue CvtHi = DAG.getNode(Signed ? ISD::SINT_TO_FP : ISD::UINT_TO_FP,
2003 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo);
2005 SDValue LdExp = DAG.getNode(AMDGPUISD::LDEXP, SL, MVT::f64, CvtHi,
2008 return DAG.getNode(ISD::FADD, SL, MVT::f64, LdExp, CvtLo);
2047 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src);
2054 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, Trunc, K0);
2056 SDValue FloorMul = DAG.getNode(ISD::FFLOOR, SL, MVT::f64, Mul);
2059 SDValue Fma = DAG.getNode(ISD::FMA, SL, MVT::f64, FloorMul, K1, Trunc);
2061 SDValue Hi = DAG.getNode(Signed ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, SL,
2063 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma);
2067 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Result);
2109 Args[I] = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, ScalarVT, Args[I], VTOp);
2234 SDValue BC = DAG.getNode(ISD::BITCAST, SL, VT, NewLoad);
2277 //DCI.AddToWorklist(Val.getNode());
2280 SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, NewVT, Val);
2282 SDValue CastBack = DAG.getNode(ISD::BITCAST, SL, VT, CastVal);
2320 SDValue LoAnd = DAG.getNode(ISD::AND, SL, MVT::i32, Lo, LoRHS);
2321 SDValue HiAnd = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, HiRHS);
2325 DCI.AddToWorklist(Lo.getNode());
2326 DCI.AddToWorklist(Hi.getNode());
2329 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec);
2357 SDValue Lo = DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, LHS);
2358 SDValue NewShift = DAG.getNode(ISD::SHL, SL, MVT::i32, Lo, ShiftAmt);
2363 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec);
2382 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi,
2386 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec);
2392 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi,
2395 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec);
2424 SDValue VecOp = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, N->getOperand(0));
2425 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32,
2429 SDValue NewShift = DAG.getNode(ISD::SRL, SL, MVT::i32, Hi, NewConst);
2433 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildPair);
2453 Mul = DAG.getNode(AMDGPUISD::MUL_U24, DL, MVT::i32, N0, N1);
2457 Mul = DAG.getNode(AMDGPUISD::MUL_I24, DL, MVT::i32, N0, N1);
2489 Op = DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i32, Op);
2491 SDValue FFBH = DAG.getNode(AMDGPUISD::FFBH_U32, SL, MVT::i32, Op);
2493 FFBH = DAG.getNode(ISD::TRUNCATE, SL, VT, FFBH);
2553 //DCI.AddToWorklist(MinMax.getNode());
2583 return DAG.getNode(ISD::BUILD_VECTOR, SL, DestVT,
2592 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32,
2596 return DAG.getNode(ISD::BITCAST, SL, DestVT, Vec);
2674 return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, MVT::i32, BitsFrom,
2699 return DAG.getNode(Signed ? ISD::SRA : ISD::SRL, DL, MVT::i32,
2886 return DAG.getNode(AMDGPUISD::RSQ, SDLoc(Operand), VT, Operand);
2908 return DAG.getNode(AMDGPUISD::RCP, SDLoc(Operand), VT, Operand);
