Lines Matching refs:SL
784 const StructLayout *SL = TD.getStructLayout(ST);
790 SDValue Offset = DAG.getConstant(SL->getElementOffset(I), DL, PtrVT);
1029 SDLoc SL(Op);
1031 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1033 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
1034 const SDValue One = DAG.getConstant(1, SL, MVT::i32);
1036 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero);
1037 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One);
1043 SDLoc SL(Op);
1045 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1046 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
1047 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero);
1051 SDLoc SL(Op);
1053 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op);
1054 const SDValue One = DAG.getConstant(1, SL, MVT::i32);
1055 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One);
1072 SDLoc SL(Op);
1082 std::tie(Lo, Hi) = DAG.SplitVector(Op, SL, LoVT, HiVT);
1089 = DAG.getExtLoad(Load->getExtensionType(), SL, LoVT,
1095 SDValue HiPtr = DAG.getNode(ISD::ADD, SL, PtrVT, BasePtr,
1096 DAG.getConstant(Size, SL, PtrVT));
1099 = DAG.getExtLoad(Load->getExtensionType(), SL, HiVT,
1106 DAG.getNode(ISD::CONCAT_VECTORS, SL, VT, LoLoad, HiLoad),
1107 DAG.getNode(ISD::TokenFactor, SL, MVT::Other,
1111 return DAG.getMergeValues(Ops, SL);
1188 SDLoc SL(Op);
1196 std::tie(Lo, Hi) = DAG.SplitVector(Val, SL, LoVT, HiVT);
1199 SDValue HiPtr = DAG.getNode(ISD::ADD, SL, PtrVT, BasePtr,
1200 DAG.getConstant(LoMemVT.getStoreSize(), SL,
1209 = DAG.getTruncStore(Chain, SL, Lo,
1217 = DAG.getTruncStore(Chain, SL, Hi,
1225 return DAG.getNode(ISD::TokenFactor, SL, MVT::Other, LoStore, HiStore);
1589 SDLoc SL(Op);
1596 SDValue Div = DAG.getNode(ISD::FDIV, SL, VT, X, Y);
1597 SDValue Floor = DAG.getNode(ISD::FTRUNC, SL, VT, Div);
1598 SDValue Mul = DAG.getNode(ISD::FMUL, SL, VT, Floor, Y);
1600 return DAG.getNode(ISD::FSUB, SL, VT, X, Mul);
1604 SDLoc SL(Op);
1611 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src);
1613 const SDValue Zero = DAG.getConstantFP(0.0, SL, MVT::f64);
1614 const SDValue One = DAG.getConstantFP(1.0, SL, MVT::f64);
1619 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT);
1620 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE);
1621 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc);
1623 SDValue Add = DAG.getNode(ISD::SELECT, SL, MVT::f64, And, One, Zero);
1625 return DAG.getNode(ISD::FADD, SL, MVT::f64, Trunc, Add);
1628 static SDValue extractF64Exponent(SDValue Hi, const SDLoc &SL,
1633 SDValue ExpPart = DAG.getNode(AMDGPUISD::BFE_U32, SL, MVT::i32,
1635 DAG.getConstant(FractBits - 32, SL, MVT::i32),
1636 DAG.getConstant(ExpBits, SL, MVT::i32));
1637 SDValue Exp = DAG.getNode(ISD::SUB, SL, MVT::i32, ExpPart,
1638 DAG.getConstant(1023, SL, MVT::i32));
1644 SDLoc SL(Op);
1649 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
1650 const SDValue One = DAG.getConstant(1, SL, MVT::i32);
1652 SDValue VecSrc = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src);
1656 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, VecSrc, One);
1658 SDValue Exp = extractF64Exponent(Hi, SL, DAG);
1663 const SDValue SignBitMask = DAG.getConstant(UINT32_C(1) << 31, SL, MVT::i32);
1664 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask);
1667 SDValue SignBit64 = DAG.getBuildVector(MVT::v2i32, SL, {Zero, SignBit});
1668 SignBit64 = DAG.getNode(ISD::BITCAST, SL, MVT::i64, SignBit64);
1670 SDValue BcInt = DAG.getNode(ISD::BITCAST, SL, MVT::i64, Src);
1672 = DAG.getConstant((UINT64_C(1) << FractBits) - 1, SL, MVT::i64);
1674 SDValue Shr = DAG.getNode(ISD::SRA, SL, MVT::i64, FractMask, Exp);
1675 SDValue Not = DAG.getNOT(SL, Shr, MVT::i64);
1676 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, BcInt, Not);
1681 const SDValue FiftyOne = DAG.getConstant(FractBits - 1, SL, MVT::i32);
1683 SDValue ExpLt0 = DAG.getSetCC(SL, SetCCVT, Exp, Zero, ISD::SETLT);
1684 SDValue ExpGt51 = DAG.getSetCC(SL, SetCCVT, Exp, FiftyOne, ISD::SETGT);
1686 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0);
1687 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpGt51, BcInt, Tmp1);
1689 return DAG.getNode(ISD::BITCAST, SL, MVT::f64, Tmp2);
1693 SDLoc SL(Op);
1699 SDValue C1 = DAG.getConstantFP(C1Val, SL, MVT::f64);
1700 SDValue CopySign = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, C1, Src);
1704 SDValue Tmp1 = DAG.getNode(ISD::FADD, SL, MVT::f64, Src, CopySign);
1705 SDValue Tmp2 = DAG.getNode(ISD::FSUB, SL, MVT::f64, Tmp1, CopySign);
1707 SL, MVT::f64, Src);
1710 SDValue C2 = DAG.getConstantFP(C2Val, SL, MVT::f64);
1714 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT);
1716 return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2);
1728 SDLoc SL(Op);
1731 SDValue T = DAG.getNode(ISD::FTRUNC, SL, MVT::f32, X);
1735 SDValue Diff = DAG.getNode(ISD::FSUB, SL, MVT::f32, X, T);
1737 SDValue AbsDiff = DAG.getNode(ISD::FABS, SL, MVT::f32, Diff);
1739 const SDValue Zero = DAG.getConstantFP(0.0, SL, MVT::f32);
1740 const SDValue One = DAG.getConstantFP(1.0, SL, MVT::f32);
1741 const SDValue Half = DAG.getConstantFP(0.5, SL, MVT::f32);
1743 SDValue SignOne = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f32, One, X);
1748 SDValue Cmp = DAG.getSetCC(SL, SetCCVT, AbsDiff, Half, ISD::SETOGE);
1750 SDValue Sel = DAG.getNode(ISD::SELECT, SL, MVT::f32, Cmp, SignOne, Zero);
1752 return DAG.getNode(ISD::FADD, SL, MVT::f32, T, Sel);
1756 SDLoc SL(Op);
1759 SDValue L = DAG.getNode(ISD::BITCAST, SL, MVT::i64, X);
1761 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
1762 const SDValue One = DAG.getConstant(1, SL, MVT::i32);
1763 const SDValue NegOne = DAG.getConstant(-1, SL, MVT::i32);
1764 const SDValue FiftyOne = DAG.getConstant(51, SL, MVT::i32);
1768 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X);
1770 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC, One);
1772 SDValue Exp = extractF64Exponent(Hi, SL, DAG);
1774 const SDValue Mask = DAG.getConstant(INT64_C(0x000fffffffffffff), SL,
1777 SDValue M = DAG.getNode(ISD::SRA, SL, MVT::i64, Mask, Exp);
1778 SDValue D = DAG.getNode(ISD::SRA, SL, MVT::i64,
1779 DAG.getConstant(INT64_C(0x0008000000000000), SL,
1783 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, L, M);
1784 SDValue Tmp1 = DAG.getSetCC(SL, SetCCVT,
1785 DAG.getConstant(0, SL, MVT::i64), Tmp0,
1788 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, Tmp1,
1789 D, DAG.getConstant(0, SL, MVT::i64));
1790 SDValue K = DAG.getNode(ISD::ADD, SL, MVT::i64, L, Tmp2);
1792 K = DAG.getNode(ISD::AND, SL, MVT::i64, K, DAG.getNOT(SL, M, MVT::i64));
1793 K = DAG.getNode(ISD::BITCAST, SL, MVT::f64, K);
1795 SDValue ExpLt0 = DAG.getSetCC(SL, SetCCVT, Exp, Zero, ISD::SETLT);
1796 SDValue ExpGt51 = DAG.getSetCC(SL, SetCCVT, Exp, FiftyOne, ISD::SETGT);
1797 SDValue ExpEqNegOne = DAG.getSetCC(SL, SetCCVT, NegOne, Exp, ISD::SETEQ);
1799 SDValue Mag = DAG.getNode(ISD::SELECT, SL, MVT::f64,
1801 DAG.getConstantFP(1.0, SL, MVT::f64),
1802 DAG.getConstantFP(0.0, SL, MVT::f64));
1804 SDValue S = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, Mag, X);
1806 K = DAG.getNode(ISD::SELECT, SL, MVT::f64, ExpLt0, S, K);
1807 K = DAG.getNode(ISD::SELECT, SL, MVT::f64, ExpGt51, X, K);
1825 SDLoc SL(Op);
1832 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src);
1834 const SDValue Zero = DAG.getConstantFP(0.0, SL, MVT::f64);
1835 const SDValue NegOne = DAG.getConstantFP(-1.0, SL, MVT::f64);
1840 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOLT);
1841 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE);
1842 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc);
1844 SDValue Add = DAG.getNode(ISD::SELECT, SL, MVT::f64, And, NegOne, Zero);
1846 return DAG.getNode(ISD::FADD, SL, MVT::f64, Trunc, Add);
1850 SDLoc SL(Op);
1855 return DAG.getNode(AMDGPUISD::FFBH_U32, SL, MVT::i32, Src);
1857 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src);
1859 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
1860 const SDValue One = DAG.getConstant(1, SL, MVT::i32);
1862 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero);
1863 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One);
1868 SDValue Hi0 = DAG.getSetCC(SL, SetCCVT, Hi, Zero, ISD::SETEQ);
1870 SDValue CtlzLo = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i32, Lo);
1871 SDValue CtlzHi = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i32, Hi);
1873 const SDValue Bits32 = DAG.getConstant(32, SL, MVT::i32);
1874 SDValue Add = DAG.getNode(ISD::ADD, SL, MVT::i32, CtlzLo, Bits32);
1877 SDValue NewCtlz = DAG.getNode(ISD::SELECT, SL, MVT::i32, Hi0, Add, CtlzHi);
1884 SDValue Lo0 = DAG.getSetCC(SL, SetCCVT, Lo, Zero, ISD::SETEQ);
1885 SDValue SrcIsZero = DAG.getNode(ISD::AND, SL, SetCCVT, Lo0, Hi0);
1889 // SDValue SrcIsZero = DAG.getSetCC(SL, SetCCVT, Src,
1890 // DAG.getConstant(0, SL, MVT::i64), ISD::SETEQ);
1892 const SDValue Bits32 = DAG.getConstant(64, SL, MVT::i32);
1896 NewCtlz = DAG.getNode(ISD::SELECT, SL, MVT::i32,
1900 return DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i64, NewCtlz);
1924 SDLoc SL(Op);
1930 const SDValue SignBit = DAG.getConstant(63, SL, MVT::i64);
1931 S = DAG.getNode(ISD::SRA, SL, MVT::i64, L, SignBit);
1933 SDValue LPlusS = DAG.getNode(ISD::ADD, SL, MVT::i64, L, S);
1934 L = DAG.getNode(ISD::XOR, SL, MVT::i64, LPlusS, S);
1941 SDValue ZeroI32 = DAG.getConstant(0, SL, MVT::i32);
1942 SDValue ZeroI64 = DAG.getConstant(0, SL, MVT::i64);
1943 SDValue LZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i64, L);
1944 LZ = DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, LZ);
1946 SDValue K = DAG.getConstant(127U + 63U, SL, MVT::i32);
1947 SDValue E = DAG.getSelect(SL, MVT::i32,
1948 DAG.getSetCC(SL, SetCCVT, L, ZeroI64, ISD::SETNE),
1949 DAG.getNode(ISD::SUB, SL, MVT::i32, K, LZ),
1952 SDValue U = DAG.getNode(ISD::AND, SL, MVT::i64,
1953 DAG.getNode(ISD::SHL, SL, MVT::i64, L, LZ),
1954 DAG.getConstant((-1ULL) >> 1, SL, MVT::i64));
1956 SDValue T = DAG.getNode(ISD::AND, SL, MVT::i64, U,
1957 DAG.getConstant(0xffffffffffULL, SL, MVT::i64));
1959 SDValue UShl = DAG.getNode(ISD::SRL, SL, MVT::i64,
1960 U, DAG.getConstant(40, SL, MVT::i64));
1962 SDValue V = DAG.getNode(ISD::OR, SL, MVT::i32,
1963 DAG.getNode(ISD::SHL, SL, MVT::i32, E, DAG.getConstant(23, SL, MVT::i32)),
1964 DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, UShl));
1966 SDValue C = DAG.getConstant(0x8000000000ULL, SL, MVT::i64);
1967 SDValue RCmp = DAG.getSetCC(SL, SetCCVT, T, C, ISD::SETUGT);
1968 SDValue TCmp = DAG.getSetCC(SL, SetCCVT, T, C, ISD::SETEQ);
1970 SDValue One = DAG.getConstant(1, SL, MVT::i32);
1972 SDValue VTrunc1 = DAG.getNode(ISD::AND, SL, MVT::i32, V, One);
1974 SDValue R = DAG.getSelect(SL, MVT::i32,
1977 DAG.getSelect(SL, MVT::i32, TCmp, VTrunc1, ZeroI32));
1978 R = DAG.getNode(ISD::ADD, SL, MVT::i32, V, R);
1979 R = DAG.getNode(ISD::BITCAST, SL, MVT::f32, R);
1984 SDValue RNeg = DAG.getNode(ISD::FNEG, SL, MVT::f32, R);
1985 return DAG.getSelect(SL, MVT::f32, DAG.getSExtOrTrunc(S, SL, SetCCVT), RNeg, R);
1990 SDLoc SL(Op);
1993 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src);
1995 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC,
1996 DAG.getConstant(0, SL, MVT::i32));
1997 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC,
1998 DAG.getConstant(1, SL, MVT::i32));
2001 SL, MVT::f64, Hi);
2003 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo);
2005 SDValue LdExp = DAG.getNode(AMDGPUISD::LDEXP, SL, MVT::f64, CvtHi,
2006 DAG.getConstant(32, SL, MVT::i32));
2008 return DAG.getNode(ISD::FADD, SL, MVT::f64, LdExp, CvtLo);
2043 SDLoc SL(Op);
2047 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src);
2049 SDValue K0 = DAG.getConstantFP(BitsToDouble(UINT64_C(0x3df0000000000000)), SL,
2051 SDValue K1 = DAG.getConstantFP(BitsToDouble(UINT64_C(0xc1f0000000000000)), SL,
2054 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, Trunc, K0);
2056 SDValue FloorMul = DAG.getNode(ISD::FFLOOR, SL, MVT::f64, Mul);
2059 SDValue Fma = DAG.getNode(ISD::FMA, SL, MVT::f64, FloorMul, K1, Trunc);
2061 SDValue Hi = DAG.getNode(Signed ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, SL,
2063 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma);
2065 SDValue Result = DAG.getBuildVector(MVT::v2i32, SL, {Lo, Hi});
2067 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Result);
2202 SDLoc SL(N);
2231 = DAG.getLoad(NewVT, SL, LN->getChain(),
2234 SDValue BC = DAG.getNode(ISD::BITCAST, SL, VT, NewLoad);
2253 SDLoc SL(N);
2280 SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, NewVT, Val);
2282 SDValue CastBack = DAG.getNode(ISD::BITCAST, SL, VT, CastVal);
2286 return DAG.getStore(SN->getChain(), SL, CastVal,
2311 SDLoc SL(N);
2317 SDValue LoRHS = DAG.getConstant(Lo_32(Val), SL, MVT::i32);
2318 SDValue HiRHS = DAG.getConstant(Hi_32(Val), SL, MVT::i32);
2320 SDValue LoAnd = DAG.getNode(ISD::AND, SL, MVT::i32, Lo, LoRHS);
2321 SDValue HiAnd = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, HiRHS);
2328 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {LoAnd, HiAnd});
2329 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec);
2352 SDLoc SL(N);
2355 SDValue ShiftAmt = DAG.getConstant(RHSVal - 32, SL, MVT::i32);
2357 SDValue Lo = DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, LHS);
2358 SDValue NewShift = DAG.getNode(ISD::SHL, SL, MVT::i32, Lo, ShiftAmt);
2360 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
2362 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {Zero, NewShift});
2363 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec);
2376 SDLoc SL(N);
2382 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi,
2383 DAG.getConstant(31, SL, MVT::i32));
2385 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {Hi, NewShift});
2386 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec);
2392 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi,
2393 DAG.getConstant(31, SL, MVT::i32));
2394 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, NewShift});
2395 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec);
2419 SDLoc SL(N);
2421 SDValue One = DAG.getConstant(1, SL, MVT::i32);
2422 SDValue Zero = DAG.getConstant(0, SL, MVT::i32);
2424 SDValue VecOp = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, N->getOperand(0));
2425 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32,
2428 SDValue NewConst = DAG.getConstant(ShiftAmt - 32, SL, MVT::i32);
2429 SDValue NewShift = DAG.getNode(ISD::SRL, SL, MVT::i32, Hi, NewConst);
2431 SDValue BuildPair = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, Zero});
2433 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildPair);
2482 const SDLoc &SL, SDValue Op) {
2489 Op = DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i32, Op);
2491 SDValue FFBH = DAG.getNode(AMDGPUISD::FFBH_U32, SL, MVT::i32, Op);
2493 FFBH = DAG.getNode(ISD::TRUNCATE, SL, VT, FFBH);
2505 SDValue AMDGPUTargetLowering::performCtlzCombine(const SDLoc &SL, SDValue Cond,
2521 return getFFBH_U32(*this, DAG, SL, CmpLHS);
2529 return getFFBH_U32(*this, DAG, SL, CmpLHS);
2581 SDLoc SL(N);
2583 return DAG.getNode(ISD::BUILD_VECTOR, SL, DestVT,
2584 DAG.getConstant(Lo_32(CVal), SL, MVT::i32),
2585 DAG.getConstant(Hi_32(CVal), SL, MVT::i32));
2590 SDLoc SL(N);
2592 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32,
2593 DAG.getConstant(Lo_32(CVal), SL, MVT::i32),
2594 DAG.getConstant(Hi_32(CVal), SL, MVT::i32));
2596 return DAG.getNode(ISD::BITCAST, SL, DestVT, Vec);
