Lines Matching full:src_gpr
128 // XXX: We can infer this field based on the SRC_GPR. This would allow us
136 : VTX_READ_eg <"VTX_READ_8 $dst_gpr, $src_gpr", buffer_id,
148 : VTX_READ_eg <"VTX_READ_16 $dst_gpr, $src_gpr", buffer_id,
160 : VTX_READ_eg <"VTX_READ_32 $dst_gpr, $src_gpr", buffer_id,
172 // to the $src_gpr registers of the VTX_READ.
177 let Constraints = "$src_gpr.ptr = $dst_gpr";
181 : VTX_READ_eg <"VTX_READ_64 $dst_gpr.XY, $src_gpr", buffer_id,
193 : VTX_READ_eg <"VTX_READ_128 $dst_gpr.XYZW, $src_gpr", buffer_id,
205 // the same constraint as VTX_READ_32_eg, because the $src_gpr.ptr and $dst
214 [(set i32:$dst_gpr, (load_param_exti8 ADDRVTX_READ:$src_gpr))]
218 [(set i32:$dst_gpr, (load_param_exti16 ADDRVTX_READ:$src_gpr))]
222 [(set i32:$dst_gpr, (load_param ADDRVTX_READ:$src_gpr))]
226 [(set v2i32:$dst_gpr, (load_param ADDRVTX_READ:$src_gpr))]
230 [(set v4i32:$dst_gpr, (load_param ADDRVTX_READ:$src_gpr))]
239 [(set i32:$dst_gpr, (vtx_id1_az_extloadi8 ADDRVTX_READ:$src_gpr))]
244 [(set i32:$dst_gpr, (vtx_id1_az_extloadi16 ADDRVTX_READ:$src_gpr))]
249 [(set i32:$dst_gpr, (vtx_id1_load ADDRVTX_READ:$src_gpr))]
254 [(set v2i32:$dst_gpr, (vtx_id1_load ADDRVTX_READ:$src_gpr))]
259 [(set v4i32:$dst_gpr, (vtx_id1_load ADDRVTX_READ:$src_gpr))]
264 [(set i32:$dst_gpr, (vtx_id2_az_extloadi8 ADDRVTX_READ:$src_gpr))]
269 [(set i32:$dst_gpr, (vtx_id2_az_extloadi16 ADDRVTX_READ:$src_gpr))]
274 [(set i32:$dst_gpr, (vtx_id2_load ADDRVTX_READ:$src_gpr))]
279 [(set v2i32:$dst_gpr, (vtx_id2_load ADDRVTX_READ:$src_gpr))]
284 [(set v4i32:$dst_gpr, (vtx_id2_load ADDRVTX_READ:$src_gpr))]
