Lines Matching defs:MBB
271 void SIRegisterInfo::materializeFrameBaseRegister(MachineBasicBlock *MBB,
275 MachineBasicBlock::iterator Ins = MBB->begin();
278 if (Ins != MBB->end())
281 MachineFunction *MF = MBB->getParent();
286 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_MOV_B32_e32), BaseReg)
295 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::S_MOV_B32), OffsetReg)
297 BuildMI(*MBB, Ins, DL, TII->get(AMDGPU::V_ADD_I32_e64), BaseReg)
306 MachineBasicBlock *MBB = MI.getParent();
307 MachineFunction *MF = MBB->getParent();
351 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::S_MOV_B32), OffsetReg)
353 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_ADD_I32_e64), NewReg)
420 MachineBasicBlock *MBB = MI->getParent();
457 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::S_ADD_U32), SOffset)
476 BuildMI(*MBB, MI, DL, TII->get(LoadStoreOp))
489 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::S_SUB_U32), ScratchOffset)
500 MachineBasicBlock *MBB = MI->getParent();
532 BuildMI(*MBB, MI, DL,
545 = BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_MOV_B32_e32), TmpReg)
566 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::SI_SPILL_V32_SAVE))
596 BuildMI(*MBB, MI, DL,
615 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::SI_SPILL_V32_RESTORE), TmpReg)
621 BuildMI(*MBB, MI, DL,
669 BuildMI(*MBB, MI, MI->getDebugLoc(),
