Lines Matching defs:DestVT
175 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1737 EVT DestVT = TLI.getValueType(DL, I->getType(), true);
1741 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)
1948 MVT DestVT = VA.getLocVT();
1949 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false);
1951 ArgVT = DestVT;
1957 MVT DestVT = VA.getLocVT();
1958 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/true);
1960 ArgVT = DestVT;
2035 MVT DestVT = RVLocs[0].getValVT();
2036 const TargetRegisterClass* DstRC = TLI.getRegClassFor(DestVT);
2122 MVT DestVT = VA.getValVT();
2124 if (RVVT != DestVT) {
2128 assert(DestVT == MVT::i32 && "ARM should always ext to i32");
2133 SrcReg = ARMEmitIntExt(RVVT, SrcReg, DestVT, Outs[0].Flags.isZExt());
2566 EVT SrcVT, DestVT;
2568 DestVT = TLI.getValueType(DL, I->getType(), true);
2572 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)
2584 unsigned ARMFastISel::ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
2586 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8)
2658 unsigned DestBits = DestVT.getSizeInBits();
2739 MVT DestVT = DestEVT.getSimpleVT();
2740 unsigned ResultReg = ARMEmitIntExt(SrcVT, SrcReg, DestVT, isZExt);
2754 EVT DestVT
2755 if (DestVT != MVT::i32)
