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Lines Matching refs:Subtarget

75   /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
77 const ARMSubtarget *Subtarget;
92 Subtarget(
95 TM(funcInfo.MF->getTarget()), TII(*Subtarget->getInstrInfo()),
96 TLI(*Subtarget->getTargetLowering()) {
451 if (!Subtarget->hasVFP2()) return false;
479 if (Subtarget->hasV6T2Ops() && isUInt<16>(CI->getZExtValue())) {
491 if (VT == MVT::i32 && Subtarget->hasV6T2Ops() && CI->isNegative()) {
508 if (Subtarget->useMovt(*FuncInfo.MF))
549 bool IsIndirect = Subtarget->isGVIndirectSymbol(GV);
557 if (!Subtarget->isTargetMachO() && IsThreadLocal) return 0;
562 if (Subtarget->useMovt(*FuncInfo.MF) &&
563 (Subtarget->isTargetMachO() || !IsPositionIndependent)) {
566 if (Subtarget->isTargetMachO())
583 if (Subtarget->isTargetELF() && IsPositionIndependent)
587 unsigned PCAdj = IsPositionIndependent ? (Subtarget->isThumb() ? 4 : 8) : 0;
835 needsLowering = !(Subtarget->hasV6T2Ops() && Addr.Offset < 0 &&
931 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops())
946 if (Alignment && Alignment < 2 && !Subtarget->allowsUnalignedMem())
950 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops())
961 if (Alignment && Alignment < 4 && !Subtarget->allowsUnalignedMem())
965 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops())
975 if (!Subtarget->hasVFP2()) return false;
988 if (!Subtarget->hasVFP2()) return false;
1076 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops())
1085 if (Alignment && Alignment < 2 && !Subtarget->allowsUnalignedMem())
1089 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops())
1099 if (Alignment && Alignment < 4 && !Subtarget->allowsUnalignedMem())
1103 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops())
1112 if (!Subtarget->hasVFP2()) return false;
1127 if (!Subtarget->hasVFP2()) return false;
1357 if (isFloat && !Subtarget->hasVFP2())
1498 if (!Subtarget->hasVFP2()) return false;
1517 if (!Subtarget->hasVFP2()) return false;
1536 if (!Subtarget->hasVFP2()) return false;
1580 if (!Subtarget->hasVFP2()) return false;
1695 if (Subtarget->hasDivide()) return false;
1791 if (isFloat && !Subtarget->hasVFP2())
1833 if (Subtarget->hasVFP2() && !isVarArg) {
1834 if (!Subtarget->isAAPCS_ABI())
1842 // Use target triple & subtarget features to do actual dispatch.
1843 if (Subtarget->isAAPCS_ABI()) {
1844 if (Subtarget->hasVFP2() &&
1912 if (!Subtarget->hasVFP2())
1916 if (!Subtarget->hasVFP2())
2243 if (Subtarget->genLongCalls()) {
2249 unsigned CallOpc = ARMSelectCallOp(Subtarget->genLongCalls());
2255 if (Subtarget->genLongCalls())
2378 if (!GV || Subtarget->genLongCalls()) UseReg = true;
2484 static_cast<const ARMBaseRegisterInfo *>(Subtarget->getRegisterInfo());
2555 Subtarget->useNaClTrap() ? ARM::TRAPNaCl : ARM::TRAP));
2666 bool hasV6Ops = Subtarget->hasV6Ops();
2940 unsigned PCAdj = Subtarget->isThumb() ? 4 : 8;
2961 Opc = Subtarget->isThumb() ? ARM::tPICADD : UseGOT_PREL ? ARM::PICLDR
2967 if (!Subtarget->isThumb())
2970 if (UseGOT_PREL && Subtarget->isThumb()) {