Lines Matching full:v8i8
1081 def VLD1LNd8 : VLD1LN<0b0000, {?,?,?,0}, "8", v8i8, extloadi8> {
1371 def VLD1DUPd8 : VLD1DUP<{0,0,0,?}, "8", v8i8, extloadi8,
2065 def VST1LNd8 : VST1LN<0b0000, {?,?,?,0}, "8", v8i8, truncstorei8,
2108 def VST1LNd8_UPD : VST1LNWB<0b0000, {?,?,?,0}, "8", v8i8, post_truncsti8,
3235 def v8i8 : N2V<op24_23, op21_20, 0b00, op17_16, op11_7, 0, op4,
3238 [(set DPR:$Vd, (v8i8 (OpNode (v8i8 DPR:$Vm))))]>;
3297 def v8i8 : N2VDInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3298 itinD, OpcodeStr, !strconcat(Dt, "8"), v8i8, v8i8, IntOp>;
3320 def v8i8 : N2VN<op24_23, op21_20, 0b00, op17_16, op11_7, op6, op4,
3322 v8i8, v8i16, OpNode>;
3337 def v8i8 : N2VNInt<op24_23, op21_20, 0b00, op17_16, op11_7, op6, op4,
3339 v8i8, v8i16, IntOp>;
3354 OpcodeStr, !strconcat(Dt, "8"), v8i16, v8i8, OpNode>;
3371 def v8i8 : N3VD<op24, op23, 0b00, op11_8, op4, itinD16,
3373 v8i8, v8i8, OpNode, Commutable>;
3485 def v8i8 : N3VDInt<op24, op23, 0b00, op11_8, op4, f, itinD16,
3487 v8i8, v8i8, IntOp, Commutable>;
3499 def v8i8 : N3VDIntSh<op24, op23, 0b00, op11_8, op4, f, itinD16,
3501 v8i8, v8i8, IntOp>;
3543 def v8i8 : N3VNInt<op24, op23, 0b00, op11_8, op4,
3545 v8i8, v8i16, IntOp, Commutable>;
3563 v8i16, v8i8, OpNode, Commutable>;
3587 v8i16, v8i8, OpNode, ExtOp, Commutable>;
3629 v8i16, v8i8, IntOp, Commutable>;
3638 v8i16, v8i8, IntOp, ExtOp, Commutable>;
3655 v8i16, v8i8, OpNode, ExtOp, Commutable>;
3672 def v8i8 : N3VDMulOp<op24, op23, 0b00, op11_8, op4, itinD16,
3673 OpcodeStr, !strconcat(Dt, "8"), v8i8, mul, OpNode>;
3711 def v8i8 : N3VDIntOp<op24, op23, 0b00, op11_8, op4, itinD,
3712 OpcodeStr, !strconcat(Dt, "8"), v8i8, IntOp, OpNode>;
3754 def v8i8 : N3VDInt3<op24, op23, 0b00, op11_8, op4, itinD16,
3755 OpcodeStr, !strconcat(Dt, "8"), v8i8, v8i8, IntOp>;
3768 !strconcat(Dt, "8"), v8i16, v8i8, MulOp, OpNode>;
3810 OpcodeStr, !strconcat(Dt, "8"), v8i16, v8i8, IntOp>;
3818 OpcodeStr, !strconcat(Dt, "8"), v8i16, v8i8,
3835 def v8i8 : N2VDPLInt<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3836 OpcodeStr, !strconcat(Dt, "8"), v4i16, v8i8, IntOp>;
3858 def v8i8 : N2VDPLInt2<op24_23, op21_20, 0b00, op17_16, op11_7, op4,
3859 OpcodeStr, !strconcat(Dt, "8"), v4i16, v8i8, IntOp>;
3882 def v8i8 : N2VDSh<op24, op23, op11_8, 0, op4, N2RegVShLFrm, itin, i32imm,
3883 OpcodeStr, !strconcat(Dt, "8"), v8i8, OpNode> {
3919 def v8i8 : N2VDSh<op24, op23, op11_8, 0, op4, N2RegVShRFrm, itin, shr_imm8,
3920 OpcodeStr, !strconcat(Dt, "8"), v8i8, OpNode> {
3958 def v8i8 : N2VDShAdd<op24, op23, op11_8, 0, op4, shr_imm8,
3959 OpcodeStr, !strconcat(Dt, "8"), v8i8, ShOp> {
3998 def v8i8 : N2VDShIns<op24, op23, op11_8, 0, op4, i32imm,
3999 N2RegVShLFrm, OpcodeStr, "8", v8i8, NEONvsli> {
4034 def v8i8 : N2VDShIns<op24, op23, op11_8, 0, op4, shr_imm8,
4035 N2RegVShRFrm, OpcodeStr, "8", v8i8, NEONvsri> {
4074 OpcodeStr, !strconcat(Dt, "8"), v8i16, v8i8, imm1_7, OpNode> {
4092 def v8i8 : N2VNSh<op24, op23, op11_8, op7, op6, op4, itin,
4094 v8i8, v8i16, shr_imm8, OpNode> {
4163 def : Pat<(v8i8 (trunc (NEONvshru (add (v8i16 QPR:$Vn), QPR:$Vm), 8))),
4176 "p8", v8i8, v8i8, int_arm_neon_vmulp, 1>;
4281 v8i16, v8i8, int_arm_neon_vmullp, 1>;
4702 def : Pat<(v8i8 (trunc (NEONvshru (sub (v8i16 QPR:$Vn), QPR:$Vm), 8))),
4842 (xor node:$in, (bitconvert (v8i8 NEONimmAllOnesV)))>;
5016 def : Pat<(v8i8 (int_arm_neon_vbsl (v8i8 DPR:$src1),
5017 (v8i8 DPR:$Vn), (v8i8 DPR:$Vm))),
5147 def : Pat<(xor (v4i32 (bitconvert (v8i16 (abd_shr (v8i8 DPR:$opA), (v8i8 DPR:$opB), 15)))),
5148 (v4i32 (bitconvert (v8i16 (add (sub (zext (v8i8 DPR:$opA)),
5149 (zext (v8i8 DPR:$opB))),
5150 (v8i16 (abd_shr (v8i8 DPR:$opA), (v8i8 DPR:$opB), 15))))))),
5268 v8i8, v8i8, int_arm_neon_vpadd, 0>;
5297 "s8", v8i8, v8i8, int_arm_neon_vpmaxs, 0>;
5303 "u8", v8i8, v8i8, int_arm_neon_vpmaxu, 0>;
5316 "s8", v8i8, v8i8, int_arm_neon_vpmins, 0>;
5322 "u8", v8i8, v8i8, int_arm_neon_vpminu, 0>;
5446 v8i16, v8i8, imm8>;
5452 def : Pat<(v8i16 (NEONvshl (zext (v8i8 DPR:$Rn)), (i32 8))),
5458 def : Pat<(v8i16 (NEONvshl (sext (v8i8 DPR:$Rn)), (i32 8))),
5470 def : Pat<(v8i8 (trunc (NEONvshru (v8i16 QPR:$Vn), shr_imm8:$amt))),
5570 def : Pat<(xor (v2i32 (bitconvert (v8i8 (NEONvshrs DPR:$src, (i32 7))))),
5571 (v2i32 (bitconvert (v8i8 (add DPR:$src,
5615 def VNEGs8d : VNEGD<0b00, "vneg", "s8", v8i8>;
5642 def : Pat<(v8i8 (vnegd DPR:$src)), (VNEGs8d DPR:$src)>;
5667 v8i8, v8i8, ctpop>;
5699 [(set DPR:$Vd, (v8i8 (NEONvmovImm timm:$SIMM)))]>;
5806 [(set GPR:$R, (NEONvgetlanes (v8i8 DPR:$V),
5822 [(set GPR:$R, (NEONvgetlaneu (v8i8 DPR:$V),
5845 (VGETLNs8 (v8i8 (EXTRACT_SUBREG QPR:$src,
5853 (VGETLNu8 (v8i8 (EXTRACT_SUBREG QPR:$src,
5891 [(set DPR:$V, (vector_insert (v8i8 DPR:$src1),
5918 (v8i8 (VSETLNi8 (v8i8 (EXTRACT_SUBREG QPR:$src1,
5954 def : Pat<(v8i8 (scalar_to_vector GPR:$src)),
5955 (VSETLNi8 (v8i8 (IMPLICIT_DEF)), GPR:$src, (i32 0))>;
5963 (VSETLNi8 (v8i8 (IMPLICIT_DEF)), GPR:$src, (i32 0)),
5985 def VDUP8d : VDUPD<0b11101100, 0b00, "8", v8i8>;
6021 def VDUPLN8d : VDUPLND<{?,?,?,1}, "vdup", "8", v8i8, VectorIndex8> {
6033 def VDUPLN8q : VDUPLNQ<{?,?,?,1}, "vdup", "8", v16i8, v8i8, VectorIndex8> {
6053 (v16i8 (VDUPLN8q (v8i8 (EXTRACT_SUBREG QPR:$src,
6089 def : Pat<(v8i16 (anyext (v8i8 DPR:$Vm))), (VMOVLuv8i16 DPR:$Vm)>;
6277 def VREV64d8 : VREV64D<0b00, "vrev64", "8", v8i8>;
6300 def VREV32d8 : VREV32D<0b00, "vrev32", "8", v8i8>;
6319 def VREV16d8 : VREV16D<0b00, "vrev16", "8", v8i8>;
6330 def : AlignedVEXTq<v8i8, v16i8, DSubReg_i8_reg>;
6368 def VEXTd8 : VEXTd<"vext", "8", v8i8, imm0_7> {
6446 [(set DPR:$Vd, (v8i8 (int_arm_neon_vtbl1 VecListOneD:$Vn, DPR:$Vm)))]>;
6473 [(set DPR:$Vd, (v8i8 (int_arm_neon_vtbx1
6715 def : Pat<(v1i64 (bitconvert (v8i8 DPR:$src))), (v1i64 DPR:$src)>;
6722 def : Pat<(v2i32 (bitconvert (v8i8 DPR:$src))), (v2i32 DPR:$src)>;
6729 def : Pat<(v4i16 (bitconvert (v8i8 DPR:$src))), (v4i16 DPR:$src)>;
6732 def : Pat<(v8i8 (bitconvert (v1i64 DPR:$src))), (v8i8 DPR:$src)>;
6733 def : Pat<(v8i8 (bitconvert (v2i32 DPR:$src))), (v8i8 DPR:$src)>;
6734 def : Pat<(v8i8 (bitconvert (v4i16 DPR:$src))), (v8i8 DPR:$src)>;
6735 def : Pat<(v8i8 (bitconvert (f64 DPR:$src))), (v8i8 DPR:$src)>;
6736 def : Pat<(v8i8 (bitconvert (v2f32 DPR:$src))), (v8i8 DPR:$src)>;
6742 def : Pat<(f64 (bitconvert (v8i8 DPR:$src))), (f64 DPR:$src)>;
6750 def : Pat<(v2f32 (bitconvert (v8i8 DPR:$src))), (v2f32 DPR:$src)>;
6798 def : Pat<(v1i64 (bitconvert (v8i8 DPR:$src))), (VREV64d8 DPR:$src)>;
6802 def : Pat<(v2i32 (bitconvert (v8i8 DPR:$src))), (VREV32d8 DPR:$src)>;
6806 def : Pat<(v4i16 (bitconvert (v8i8 DPR:$src))), (VREV16d8 DPR:$src)>;
6809 def : Pat<(v8i8 (bitconvert (v1i64 DPR:$src))), (VREV64d8 DPR:$src)>;
6810 def : Pat<(v8i8 (bitconvert (v2i32 DPR:$src))), (VREV32d8 DPR:$src)>;
6811 def : Pat<(v8i8 (bitconvert (v4i16 DPR:$src))), (VREV16d8 DPR:$src)>;
6812 def : Pat<(v8i8 (bitconvert (f64 DPR:$src))), (VREV64d8 DPR:$src)>;
6813 def : Pat<(v8i8 (bitconvert (v2f32 DPR:$src))), (VREV32d8 DPR:$src)>;
6816 def : Pat<(f64 (bitconvert (v8i8 DPR:$src))), (VREV64d8 DPR:$src)>;
6821 def : Pat<(v2f32 (bitconvert (v8i8 DPR:$src))), (VREV32d8 DPR:$src)>;
7068 defm : Lengthen_Single<"8", "i16", "8">; // v8i8 -> v8i16
