Lines Matching full:rdlo
542 bits<4> RdLo;
550 let Inst{15-12} = RdLo;
559 bits<4> RdLo;
567 let Inst{15-12} = RdLo;
2573 (outs rGPR:$RdLo, rGPR:$RdHi),
2575 "smull", "\t$RdLo, $RdHi, $Rn, $Rm", []>;
2578 (outs rGPR:$RdLo, rGPR:$RdHi),
2580 "umull", "\t$RdLo, $RdHi, $Rn, $Rm", []>;
2585 (outs rGPR:$RdLo, rGPR:$RdHi),
2587 "smlal", "\t$RdLo, $RdHi, $Rn, $Rm", []>,
2588 RegConstraint<"$RLo = $RdLo, $RHi = $RdHi">;
2591 (outs rGPR:$RdLo, rGPR:$RdHi),
2593 "umlal", "\t$RdLo, $RdHi, $Rn, $Rm", []>,
2594 RegConstraint<"$RLo = $RdLo, $RHi = $RdHi">;
2597 (outs rGPR:$RdLo, rGPR:$RdHi),
2599 "umaal", "\t$RdLo, $RdHi, $Rn, $Rm", []>,
2600 RegConstraint<"$RLo = $RdLo, $RHi = $RdHi">,
