Lines Matching refs:RegInfo
75 const MipsRegisterInfo &RegInfo;
83 RegInfo(*Subtarget.getRegisterInfo()) {}
154 const TargetRegisterClass *RC = RegInfo.intRegClass(4);
158 TII.loadRegFromStack(MBB, I, VR, FI, RC, &RegInfo, 0);
169 const TargetRegisterClass *RC = RegInfo.intRegClass(4);
175 TII.storeRegToStack(MBB, I, VR, true, FI, RC, &RegInfo, 0);
187 const TargetRegisterClass *RC = RegInfo.intRegClass(RegSize);
191 unsigned Lo = RegInfo.getSubReg(Dst, Mips::sub_lo);
192 unsigned Hi = RegInfo.getSubReg(Dst, Mips::sub_hi);
196 TII.loadRegFromStack(MBB, I, VR0, FI, RC, &RegInfo, 0);
198 TII.loadRegFromStack(MBB, I, VR1, FI, RC, &RegInfo, RegSize);
212 const TargetRegisterClass *RC = RegInfo.intRegClass(RegSize);
220 TII.storeRegToStack(MBB, I, VR0, true, FI, RC, &RegInfo, 0);
222 TII.storeRegToStack(MBB, I, VR1, true, FI, RC, &RegInfo, RegSize);
243 unsigned VRegSize = RegInfo.getMinimalPhysRegClass(Dst)->getSize() / 2;
244 const TargetRegisterClass *RC = RegInfo.intRegClass(VRegSize);
248 unsigned DstLo = RegInfo.getSubReg(Dst, Mips::sub_lo);
249 unsigned DstHi = RegInfo.getSubReg(Dst, Mips::sub_hi);
303 &RegInfo, 0);
305 &RegInfo, 4);
306 TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, 0);
363 TII.storeRegToStack(MBB, I, SrcReg, Op1.isKill(), FI, RC, &RegInfo, 0);
364 TII.loadRegFromStack(MBB, I, DstReg, FI, RC2, &RegInfo, Offset);
382 const MipsRegisterInfo &RegInfo =
439 MRI->getDwarfRegNum(RegInfo.getSubReg(Reg, Mips::sub_lo), true);
441 MRI->getDwarfRegNum(RegInfo.getSubReg(Reg, Mips::sub_hi), true);
487 MipsFI->getEhDataRegFI(I), RC, &RegInfo);
513 if (RegInfo.needsStackRealignment(MF)) {
672 const MipsRegisterInfo &RegInfo =
706 MipsFI->getEhDataRegFI(J), RC, &RegInfo);
