Lines Matching full:v2i64
468 int_ppc_vsx_xvcmpeqdp, v2i64, v2f64>;
474 int_ppc_vsx_xvcmpgedp, v2i64, v2f64>;
480 int_ppc_vsx_xvcmpgtdp, v2i64, v2f64>;
578 [(set v2i64:$XT, (fp_to_sint v2f64:$XB))]>;
585 [(set v2i64:$XT, (fp_to_uint v2f64:$XB))]>;
608 [(set v2f64:$XT, (sint_to_fp v2i64:$XB))]>;
622 [(set v2f64:$XT, (uint_to_fp v2i64:$XB))]>;
900 def : Pat<(v2i64 (bitconvert v4f32:$A)),
902 def : Pat<(v2i64 (bitconvert v4i32:$A)),
904 def : Pat<(v2i64 (bitconvert v8i16:$A)),
906 def : Pat<(v2i64 (bitconvert v16i8:$A)),
909 def : Pat<(v4f32 (bitconvert v2i64:$A)),
911 def : Pat<(v4i32 (bitconvert v2i64:$A)),
913 def : Pat<(v8i16 (bitconvert v2i64:$A)),
915 def : Pat<(v16i8 (bitconvert v2i64:$A)),
918 def : Pat<(v2f64 (bitconvert v2i64:$A)),
920 def : Pat<(v2i64 (bitconvert v2f64:$A)),
929 // To extend "in place" from v2i32 to v2i64, we have input data like:
935 def : Pat<(sext_inreg v2i64:$C, v2i32),
937 def : Pat<(v2f64 (sint_to_fp (sext_inreg v2i64:$C, v2i32))),
941 (v2f64 (XVCVSXWDP (v2i64 (XXMRGHW $C, $C))))>;
943 (v2f64 (XVCVSXWDP (v2i64 (XXMRGLW $C, $C))))>;
946 (v2f64 (XVCVUXWDP (v2i64 (XXMRGHW $C, $C))))>;
948 (v2f64 (XVCVUXWDP (v2i64 (XXMRGLW $C, $C))))>;
952 def : Pat<(v2i64 (load xoaddr:$src)), (LXVD2X xoaddr:$src)>;
959 def : Pat<(store v2i64:$rS, xoaddr:$dst), (STXVD2X $rS, xoaddr:$dst)>;
966 def : Pat<(v2i64 (PPCxxswapd v2i64:$src)), (XXPERMDI $src, $src, 2)>;
1036 /* FIXME: if the operands are v2i64, these patterns will not match.
1298 dag LE_WORD_1 = (v2i64 (INSERT_SUBREG (v2i64 (IMPLICIT_DEF)),
1301 dag LE_DWORD_1 = (v2i64 (INSERT_SUBREG (v2i64 (IMPLICIT_DEF)),
1322 (v2i64 (COPY_TO_REGCLASS $S, VSRC)), sub_64));
1328 (v2i64 (COPY_TO_REGCLASS $S, VSRC)), sub_64));
1395 (v2i64 (COPY_TO_REGCLASS LE_VBYTE_PERMUTE, VSRC)),
1427 (v2i64 (COPY_TO_REGCLASS LE_VHALF_PERMUTE, VSRC)),
1456 (v2i64 (COPY_TO_REGCLASS LE_VWORD_PERMUTE, VSRC)),
1486 (v2i64 (COPY_TO_REGCLASS LE_VDWORD_PERMUTE, VSRC)),
1516 (v2i64 (COPY_TO_REGCLASS BE_VBYTE_PERMUTE, VSRC)),
1534 (v2i64 (COPY_TO_REGCLASS BE_VHALF_PERMUTE, VSRC)),
1551 (v2i64 (COPY_TO_REGCLASS BE_VWORD_PERMUTE, VSRC)),
1566 (v2i64 (COPY_TO_REGCLASS BE_VDWORD_PERMUTE, VSRC)),
1615 def : Pat<(v2i64 (scalar_to_vector i64:$A)),
1616 (v2i64 (SUBREG_TO_REG (i64 1), MovesToVSR.BE_DWORD_0, sub_64))>;
1684 // v2i64 scalar <-> vector conversions (BE)
1685 def : Pat<(i64 (vector_extract v2i64:$S, 0)),
1687 def : Pat<(i64 (vector_extract v2i64:$S, 1)),
1689 def : Pat<(i64 (vector_extract v2i64:$S, i64:$Idx)),
1722 def : Pat<(v2i64 (scalar_to_vector i64:$A)),
1723 (v2i64 MovesToVSR.LE_DWORD_0)>;
1791 // v2i64 scalar <-> vector conversions (LE)
1792 def : Pat<(i64 (vector_extract v2i64:$S, 0)),
1794 def : Pat<(i64 (vector_extract v2i64:$S, 1)),
1796 def : Pat<(i64 (vector_extract v2i64:$S, i64:$Idx)),
