Lines Matching refs:ImmSize
740 LogicOp() : RegSize(0), ImmLSB(0), ImmSize(0) {}
741 LogicOp(unsigned regSize, unsigned immLSB, unsigned immSize)
742 : RegSize(regSize), ImmLSB(immLSB), ImmSize(immSize) {}
746 unsigned RegSize, ImmLSB, ImmSize;
842 Imm |= allOnes(And.RegSize) & ~(allOnes(And.ImmSize) << And.ImmLSB);
