Lines Matching refs:Address
40 // (1) Work out the address that each block would have if no branches
44 // (2) Work out the address that each block would have if all branches
47 // (3) Walk through the block calculating the final address of each instruction
49 // this check uses the final address of the target block, as calculated
51 // address of the target block that was calculated in (2). Both checks
75 // The address that we currently assume the block has.
76 uint64_t Address;
90 : Address(0), Size(0), Alignment(0), NumTerminators(0) {}
99 // The address that we currently assume the terminator has.
100 uint64_t Address;
119 // The address that we assume this position has.
120 uint64_t Address;
122 // The number of low bits in Address that are known to be the same
123 // as the runtime address.
127 : Address(0), KnownBits(InitialAlignment) {}
152 bool mustRelaxBranch(const TerminatorInfo &Terminator, uint64_t Address);
182 // When calculating the address of Block, we need to conservatively
184 Position.Address += ((uint64_t(1) << Block.Alignment) -
191 Position.Address = (Position.Address + AlignMask) & ~AlignMask;
194 Block.Address = Position.Address;
197 Position.Address += Block.Size;
206 Terminator.Address = Position.Address;
207 Position.Address += Terminator.Size;
209 Position.Address += Terminator.ExtraRelaxSize;
303 return Position.Address;
307 // relaxed if it were placed at address Address.
309 uint64_t Address) {
314 if (Address >= Target.Address) {
315 if (Address - Target.Address <= MaxBackwardRange)
318 if (Target.Address - Address <= MaxForwardRange)
329 if (mustRelaxBranch(Terminator, Terminator.Address))
334 // Set the address of each block on the assumption that all branches
443 assert(Position.Address <= TI->Address &&
445 if (mustRelaxBranch(*TI, Position.Address))
