Lines Matching full:sse41
904 // SSE41 brings specific instructions for doing vector sign extend even in
912 // SSE41 also has vector sign/zero extending loads, PMOV[SZ]X
12576 // TODO: pre-SSE41 targets will tend to use bit masking - this could still
16078 // SSE41 targets can use the pmovsx* instructions directly.
16082 // pre-SSE41 targets unpack lower lanes and then sign-extend using SRAI.
19464 // With SSE41 we can use sign/zero extend, but for pre-SSE41 we unpack
20210 // optimally zero-extend each lanes on SSE2/SSE41/AVX targets.
20233 // On SSE41 targets we make use of the fact that VSELECT lowers
20242 // On pre-SSE41 targets we test for the sign bit by comparing to
20369 // If we have a constant shift amount, the non-SSE41 path is best as
20375 // On SSE41 targets we make use of the fact that VSELECT lowers
20385 // On pre-SSE41 targets we splat the sign bit - a negative value will
20395 // On SSE41 targets we need to replicate the shift mask in both
27491 // pmulld is supported since SSE41. It is better to use pmulld
30130 // Also use this if we don't have SSE41 to allow the legalizer do its job.
