Lines Matching refs:Custom
170 // f32/f64 are legal, f80 is custom.
171 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom);
174 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom);
178 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom);
181 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom);
194 setOperationAction(ISD::SINT_TO_FP , MVT::i32 , Custom);
196 setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Custom);
197 setOperationAction(ISD::SINT_TO_FP , MVT::i32 , Custom);
210 // In 32-bit mode these are custom lowered. In 64-bit mode F32 and F64
211 // are Legal, f80 is custom lowered.
212 setOperationAction(ISD::FP_TO_SINT , MVT::i64 , Custom);
213 setOperationAction(ISD::SINT_TO_FP , MVT::i64 , Custom);
218 setOperationAction(ISD::FP_TO_SINT , MVT::i32 , Custom);
220 setOperationAction(ISD::FP_TO_SINT , MVT::i16 , Custom);
221 setOperationAction(ISD::FP_TO_SINT , MVT::i32 , Custom);
237 // FP_TO_UINT-i32/i64 is legal for f32/f64, but custom for f80.
238 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Custom);
239 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Custom);
248 // FIXME: We would like to use a Custom expander here eventually to do
252 // With AVX512 we can use vcvts[ds]2usi for f32/f64->i32, f80 is custom.
255 setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Custom);
257 setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Custom);
270 setOperationAction(ISD::BITCAST , MVT::i64 , Custom);
291 setOperationAction(ISD::ADDC, VT, Custom);
292 setOperationAction(ISD::ADDE, VT, Custom);
293 setOperationAction(ISD::SUBC, VT, Custom);
294 setOperationAction(ISD::SUBE, VT, Custom);
298 setOperationAction(ISD::BRCOND , MVT::Other, Custom);
314 setOperationAction(ISD::FLT_ROUNDS_ , MVT::i32 , Custom);
321 setOperationAction(ISD::CTTZ , MVT::i16 , Custom);
322 setOperationAction(ISD::CTTZ , MVT::i32 , Custom);
326 setOperationAction(ISD::CTTZ , MVT::i64 , Custom);
337 setOperationAction(ISD::CTLZ , MVT::i8 , Custom);
338 setOperationAction(ISD::CTLZ , MVT::i16 , Custom);
339 setOperationAction(ISD::CTLZ , MVT::i32 , Custom);
340 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i8 , Custom);
341 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i16 , Custom);
342 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32 , Custom);
344 setOperationAction(ISD::CTLZ , MVT::i64 , Custom);
345 setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Custom);
380 setOperationAction(ISD::READCYCLECOUNTER , MVT::i64 , Custom);
389 setOperationAction(ISD::SELECT, VT, Custom);
390 setOperationAction(ISD::SETCC, VT, Custom);
395 setOperationAction(ISD::SELECT, VT, Custom);
396 setOperationAction(ISD::SETCC, VT, Custom);
397 setOperationAction(ISD::SETCCE, VT, Custom);
399 setOperationAction(ISD::EH_RETURN , MVT::Other, Custom);
406 setOperationAction(ISD::EH_SJLJ_SETJMP, MVT::i32, Custom);
407 setOperationAction(ISD::EH_SJLJ_LONGJMP, MVT::Other, Custom);
408 setOperationAction(ISD::EH_SJLJ_SETUP_DISPATCH, MVT::Other, Custom);
416 setOperationAction(ISD::ConstantPool , VT, Custom);
417 setOperationAction(ISD::JumpTable , VT, Custom);
418 setOperationAction(ISD::GlobalAddress , VT, Custom);
419 setOperationAction(ISD::GlobalTLSAddress, VT, Custom);
420 setOperationAction(ISD::ExternalSymbol , VT, Custom);
421 setOperationAction(ISD::BlockAddress , VT, Custom);
427 setOperationAction(ISD::SHL_PARTS, VT, Custom);
428 setOperationAction(ISD::SRA_PARTS, VT, Custom);
429 setOperationAction(ISD::SRL_PARTS, VT, Custom);
435 setOperationAction(ISD::ATOMIC_FENCE , MVT::Other, Custom);
439 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Custom);
440 setOperationAction(ISD::ATOMIC_LOAD_SUB, VT, Custom);
441 setOperationAction(ISD::ATOMIC_LOAD_ADD, VT, Custom);
442 setOperationAction(ISD::ATOMIC_LOAD_OR, VT, Custom);
443 setOperationAction(ISD::ATOMIC_LOAD_XOR, VT, Custom);
444 setOperationAction(ISD::ATOMIC_LOAD_AND, VT, Custom);
445 setOperationAction(ISD::ATOMIC_STORE, VT, Custom);
449 setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, MVT::i128, Custom);
459 setOperationAction(ISD::FRAME_TO_ARGS_OFFSET, MVT::i32, Custom);
460 setOperationAction(ISD::FRAME_TO_ARGS_OFFSET, MVT::i64, Custom);
462 setOperationAction(ISD::INIT_TRAMPOLINE, MVT::Other, Custom);
463 setOperationAction(ISD::ADJUST_TRAMPOLINE, MVT::Other, Custom);
468 // VASTART needs to be custom lowered to use the VarArgsFrameIndex
469 setOperationAction(ISD::VASTART , MVT::Other, Custom);
472 setOperationAction(ISD::VAARG, MVT::Other, Is64Bit ? Custom : Expand);
473 setOperationAction(ISD::VACOPY, MVT::Other, Is64Bit ? Custom : Expand);
478 setOperationAction(ISD::DYNAMIC_STACKALLOC, PtrVT, Custom);
480 // GC_TRANSITION_START and GC_TRANSITION_END need custom lowering.
481 setOperationAction(ISD::GC_TRANSITION_START, MVT::Other, Custom);
482 setOperationAction(ISD::GC_TRANSITION_END, MVT::Other, Custom);
492 setOperationAction(ISD::FABS, VT, Custom);
495 setOperationAction(ISD::FNEG, VT, Custom);
498 setOperationAction(ISD::FCOPYSIGN, VT, Custom);
507 setOperationAction(ISD::FGETSIGN, MVT::i64, Custom);
508 setOperationAction(ISD::FGETSIGN, MVT::i32, Custom);
521 setOperationAction(ISD::FABS , MVT::f32, Custom);
524 setOperationAction(ISD::FNEG , MVT::f32, Custom);
530 setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom);
584 setOperationAction(ISD::FABS , MVT::f128, Custom);
585 setOperationAction(ISD::FNEG , MVT::f128, Custom);
586 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Custom);
722 setOperationAction(ISD::FNEG, MVT::v4f32, Custom);
723 setOperationAction(ISD::FABS, MVT::v4f32, Custom);
724 setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom);
725 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4f32, Custom);
726 setOperationAction(ISD::VSELECT, MVT::v4f32, Custom);
727 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Custom);
728 setOperationAction(ISD::SELECT, MVT::v4f32, Custom);
729 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Custom);
742 setOperationAction(ISD::MUL, MVT::v16i8, Custom);
743 setOperationAction(ISD::MUL, MVT::v4i32, Custom);
744 setOperationAction(ISD::MUL, MVT::v2i64, Custom);
745 setOperationAction(ISD::UMUL_LOHI, MVT::v4i32, Custom);
746 setOperationAction(ISD::SMUL_LOHI, MVT::v4i32, Custom);
747 setOperationAction(ISD::MULHU, MVT::v16i8, Custom);
748 setOperationAction(ISD::MULHS, MVT::v16i8, Custom);
752 Custom);
753 setOperationAction(ISD::FABS, MVT::v2f64, Custom);
760 setOperationAction(ISD::SETCC, MVT::v2i64, Custom);
761 setOperationAction(ISD::SETCC, MVT::v16i8, Custom);
762 setOperationAction(ISD::SETCC, MVT::v8i16, Custom);
763 setOperationAction(ISD::SETCC, MVT::v4i32, Custom);
765 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Custom);
766 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i16, Custom);
767 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom);
768 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom);
769 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom);
771 setOperationAction(ISD::CTPOP, MVT::v16i8, Custom);
772 setOperationAction(ISD::CTPOP, MVT::v8i16, Custom);
773 setOperationAction(ISD::CTPOP, MVT::v4i32, Custom);
774 setOperationAction(ISD::CTPOP, MVT::v2i64, Custom);
776 setOperationAction(ISD::CTTZ, MVT::v16i8, Custom);
777 setOperationAction(ISD::CTTZ, MVT::v8i16, Custom);
778 setOperationAction(ISD::CTTZ, MVT::v4i32, Custom);
781 // Custom lower build_vector, vector_shuffle, and extract_vector_elt.
783 setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
784 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
785 setOperationAction(ISD::VSELECT, VT, Custom);
786 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
789 // We support custom legalizing of sext and anyext loads for specific
794 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Custom);
795 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i16, Custom);
796 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v8i8, Custom);
797 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i8, Custom);
798 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i16, Custom);
799 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v2i32, Custom);
800 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Custom);
801 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i16, Custom);
802 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v8i8, Custom);
806 setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
807 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
808 setOperationAction(ISD::VSELECT, VT, Custom);
813 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom);
814 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
826 // Custom lower v2i64 and v2f64 selects.
827 setOperationAction(ISD::SELECT, MVT::v2f64, Custom);
828 setOperationAction(ISD::SELECT, MVT::v2i64, Custom);
833 setOperationAction(ISD::SINT_TO_FP, MVT::v2i32, Custom);
835 setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Custom);
836 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom);
837 // As there is no 64-bit GPR available, we need build a special custom
840 setOperationAction(ISD::UINT_TO_FP, MVT::v2f32, Custom);
842 setOperationAction(ISD::FP_EXTEND, MVT::v2f32, Custom);
843 setOperationAction(ISD::FP_ROUND, MVT::v2f32, Custom);
848 setOperationAction(ISD::BITCAST, MVT::v2i32, Custom);
849 setOperationAction(ISD::BITCAST, MVT::v4i16, Custom);
850 setOperationAction(ISD::BITCAST, MVT::v8i8, Custom);
852 setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v2i64, Custom);
853 setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v4i32, Custom);
854 setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v8i16, Custom);
857 setOperationAction(ISD::SRL, VT, Custom);
858 setOperationAction(ISD::SHL, VT, Custom);
859 setOperationAction(ISD::SRA, VT, Custom);
865 setOperationAction(ISD::SRL, VT, Custom);
866 setOperationAction(ISD::SHL, VT, Custom);
867 setOperationAction(ISD::SRA, VT, Custom);
872 setOperationAction(ISD::BITREVERSE, MVT::v16i8, Custom);
873 setOperationAction(ISD::CTLZ, MVT::v16i8, Custom);
874 setOperationAction(ISD::CTLZ, MVT::v8i16, Custom);
907 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Custom);
908 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Custom);
909 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i32, Custom);
927 // i8 vectors are custom because the source register and source
929 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i8, Custom);
935 setOperationAction(ISD::ROTL, VT, Custom);
939 setOperationAction(ISD::BITREVERSE, VT, Custom);
943 setOperationAction(ISD::BITREVERSE, VT, Custom);
962 setOperationAction(ISD::FNEG, VT, Custom);
963 setOperationAction(ISD::FABS, VT, Custom);
976 setOperationAction(ISD::UINT_TO_FP, MVT::v8i8, Custom);
977 setOperationAction(ISD::UINT_TO_FP, MVT::v8i16, Custom);
983 setOperationAction(ISD::SRL, VT, Custom);
984 setOperationAction(ISD::SHL, VT, Custom);
985 setOperationAction(ISD::SRA, VT, Custom);
988 setOperationAction(ISD::SETCC, MVT::v32i8, Custom);
989 setOperationAction(ISD::SETCC, MVT::v16i16, Custom);
990 setOperationAction(ISD::SETCC, MVT::v8i32, Custom);
991 setOperationAction(ISD::SETCC, MVT::v4i64, Custom);
993 setOperationAction(ISD::SELECT, MVT::v4f64, Custom);
994 setOperationAction(ISD::SELECT, MVT::v4i64, Custom);
995 setOperationAction(ISD::SELECT, MVT::v8f32, Custom);
997 setOperationAction(ISD::SIGN_EXTEND, MVT::v4i64, Custom);
998 setOperationAction(ISD::SIGN_EXTEND, MVT::v8i32, Custom);
999 setOperationAction(ISD::SIGN_EXTEND, MVT::v16i16, Custom);
1000 setOperationAction(ISD::ZERO_EXTEND, MVT::v4i64, Custom);
1001 setOperationAction(ISD::ZERO_EXTEND, MVT::v8i32, Custom);
1002 setOperationAction(ISD::ZERO_EXTEND, MVT::v16i16, Custom);
1003 setOperationAction(ISD::ANY_EXTEND, MVT::v4i64, Custom);
1004 setOperationAction(ISD::ANY_EXTEND, MVT::v8i32, Custom);
1005 setOperationAction(ISD::ANY_EXTEND, MVT::v16i16, Custom);
1006 setOperationAction(ISD::TRUNCATE, MVT::v16i8, Custom);
1007 setOperationAction(ISD::TRUNCATE, MVT::v8i16, Custom);
1008 setOperationAction(ISD::TRUNCATE, MVT::v4i32, Custom);
1009 setOperationAction(ISD::BITREVERSE, MVT::v32i8, Custom);
1012 setOperationAction(ISD::CTPOP, VT, Custom);
1013 setOperationAction(ISD::CTTZ, VT, Custom);
1019 setOperationAction(ISD::CTLZ, VT, Custom);
1023 setOperationAction(ISD::CTLZ, VT, Custom);
1032 setOperationAction(ISD::ADD, VT, HasInt256 ? Legal : Custom);
1033 setOperationAction(ISD::SUB, VT, HasInt256 ? Legal : Custom);
1036 setOperationAction(ISD::MUL, MVT::v4i64, Custom);
1037 setOperationAction(ISD::MUL, MVT::v8i32, HasInt256 ? Legal : Custom);
1038 setOperationAction(ISD::MUL, MVT::v16i16, HasInt256 ? Legal : Custom);
1039 setOperationAction(ISD::MUL, MVT::v32i8, Custom);
1041 setOperationAction(ISD::UMUL_LOHI, MVT::v8i32, Custom);
1042 setOperationAction(ISD::SMUL_LOHI, MVT::v8i32, Custom);
1044 setOperationAction(ISD::MULHU, MVT::v16i16, HasInt256 ? Legal : Custom);
1045 setOperationAction(ISD::MULHS, MVT::v16i16, HasInt256 ? Legal : Custom);
1046 setOperationAction(ISD::MULHU, MVT::v32i8, Custom);
1047 setOperationAction(ISD::MULHS, MVT::v32i8, Custom);
1050 setOperationAction(ISD::SMAX, VT, HasInt256 ? Legal : Custom);
1051 setOperationAction(ISD::UMAX, VT, HasInt256 ? Legal : Custom);
1052 setOperationAction(ISD::SMIN, VT, HasInt256 ? Legal : Custom);
1053 setOperationAction(ISD::UMIN, VT, HasInt256 ? Legal : Custom);
1057 setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v4i64, Custom);
1058 setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v8i32, Custom);
1059 setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v16i16, Custom);
1061 // The custom lowering for UINT_TO_FP for v8i32 becomes interesting
1063 setOperationAction(ISD::UINT_TO_FP, MVT::v8i32, Custom);
1084 setOperationAction(ISD::SRL, VT, Custom);
1085 setOperationAction(ISD::SHL, VT, Custom);
1086 setOperationAction(ISD::SRA, VT, Custom);
1099 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Custom);
1102 // Custom lower several nodes for 256-bit types.
1105 setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
1106 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
1107 setOperationAction(ISD::VSELECT, VT, Custom);
1108 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom);
1109 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
1110 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom);
1111 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom);
1112 setOperationAction(ISD::CONCAT_VECTORS, VT, Custom);
1150 setOperationAction(ISD::SETCC, MVT::i1, Custom);
1151 setOperationAction(ISD::SETCCE, MVT::i1, Custom);
1156 setOperationAction(ISD::SUB, MVT::i1, Custom);
1157 setOperationAction(ISD::ADD, MVT::i1, Custom);
1158 setOperationAction(ISD::MUL, MVT::i1, Custom);
1164 setLoadExtAction(ISD::SEXTLOAD, VT, MaskVT, Custom);
1165 setLoadExtAction(ISD::ZEXTLOAD, VT, MaskVT, Custom);
1166 setLoadExtAction(ISD::EXTLOAD, VT, MaskVT, Custom);
1167 setTruncStoreAction(VT, MaskVT, Custom);
1171 setOperationAction(ISD::FNEG, VT, Custom);
1172 setOperationAction(ISD::FABS, VT, Custom);
1181 setOperationAction(ISD::SINT_TO_FP, MVT::v8i1, Custom);
1182 setOperationAction(ISD::SINT_TO_FP, MVT::v16i1, Custom);
1188 setOperationAction(ISD::UINT_TO_FP, MVT::v16i8, Custom);
1189 setOperationAction(ISD::UINT_TO_FP, MVT::v16i16, Custom);
1211 setOperationAction(ISD::MLOAD, MVT::v8i32, Custom);
1212 setOperationAction(ISD::MLOAD, MVT::v8f32, Custom);
1213 setOperationAction(ISD::MSTORE, MVT::v8i32, Custom);
1214 setOperationAction(ISD::MSTORE, MVT::v8f32, Custom);
1216 setOperationAction(ISD::TRUNCATE, MVT::i1, Custom);
1217 setOperationAction(ISD::TRUNCATE, MVT::v16i8, Custom);
1218 setOperationAction(ISD::TRUNCATE, MVT::v8i32, Custom);
1219 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i1, Custom);
1220 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i1, Custom);
1248 setOperationAction(ISD::ZERO_EXTEND, MVT::v4i32, Custom);
1249 setOperationAction(ISD::ZERO_EXTEND, MVT::v2i64, Custom);
1264 setOperationAction(ISD::TRUNCATE, MVT::v8i1, Custom);
1265 setOperationAction(ISD::TRUNCATE, MVT::v16i1, Custom);
1266 setOperationAction(ISD::TRUNCATE, MVT::v16i16, Custom);
1267 setOperationAction(ISD::ZERO_EXTEND, MVT::v16i32, Custom);
1268 setOperationAction(ISD::ZERO_EXTEND, MVT::v8i64, Custom);
1269 setOperationAction(ISD::ANY_EXTEND, MVT::v16i32, Custom);
1270 setOperationAction(ISD::ANY_EXTEND, MVT::v8i64, Custom);
1271 setOperationAction(ISD::SIGN_EXTEND, MVT::v16i32, Custom);
1272 setOperationAction(ISD::SIGN_EXTEND, MVT::v8i64, Custom);
1273 setOperationAction(ISD::SIGN_EXTEND, MVT::v16i8, Custom);
1274 setOperationAction(ISD::SIGN_EXTEND, MVT::v8i16, Custom);
1275 setOperationAction(ISD::SIGN_EXTEND, MVT::v16i16, Custom);
1277 setOperationAction(ISD::SIGN_EXTEND, MVT::v4i32, Custom);
1278 setOperationAction(ISD::SIGN_EXTEND, MVT::v2i64, Custom);
1288 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f64, Custom);
1289 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i64, Custom);
1290 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16f32, Custom);
1291 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i32, Custom);
1292 setOperationAction(ISD::CONCAT_VECTORS, MVT::v16i1, Custom);
1294 setOperationAction(ISD::SETCC, MVT::v16i1, Custom);
1295 setOperationAction(ISD::SETCC, MVT::v8i1, Custom);
1297 setOperationAction(ISD::MUL, MVT::v8i64, Custom);
1299 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v8i1, Custom);
1300 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v16i1, Custom);
1301 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v16i1, Custom);
1302 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i1, Custom);
1303 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i1, Custom);
1304 setOperationAction(ISD::BUILD_VECTOR, MVT::v8i1, Custom);
1305 setOperationAction(ISD::BUILD_VECTOR, MVT::v16i1, Custom);
1306 setOperationAction(ISD::SELECT, MVT::v8f64, Custom);
1307 setOperationAction(ISD::SELECT, MVT::v8i64, Custom);
1308 setOperationAction(ISD::SELECT, MVT::v16f32, Custom);
1309 setOperationAction(ISD::SELECT, MVT::v16i1, Custom);
1310 setOperationAction(ISD::SELECT, MVT::v8i1, Custom);
1331 setOperationAction(ISD::SRL, VT, Custom);
1332 setOperationAction(ISD::SHL, VT, Custom);
1333 setOperationAction(ISD::SRA, VT, Custom);
1337 setOperationAction(ISD::CTPOP, VT, Custom);
1338 setOperationAction(ISD::CTTZ, VT, Custom);
1345 setOperationAction(ISD::CTLZ, MVT::v8i16, Custom);
1346 setOperationAction(ISD::CTLZ, MVT::v16i8, Custom);
1347 setOperationAction(ISD::CTLZ, MVT::v16i16, Custom);
1348 setOperationAction(ISD::CTLZ, MVT::v32i8, Custom);
1350 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v8i64, Custom);
1351 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v16i32, Custom);
1359 setOperationAction(ISD::CTLZ, MVT::v4i64, Custom);
1360 setOperationAction(ISD::CTLZ, MVT::v8i32, Custom);
1361 setOperationAction(ISD::CTLZ, MVT::v2i64, Custom);
1362 setOperationAction(ISD::CTLZ, MVT::v4i32, Custom);
1365 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v4i64, Custom);
1366 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v8i32, Custom);
1367 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v2i64, Custom);
1368 setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::v4i32, Custom);
1378 // Custom lower several nodes.
1381 setOperationAction(ISD::MGATHER, VT, Custom);
1382 setOperationAction(ISD::MSCATTER, VT, Custom);
1386 // 128-bit was made Custom under AVX1.
1389 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Custom);
1395 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom);
1396 setOperationAction(ISD::INSERT_VECTOR_ELT, VT, Custom);
1397 Custom);
1399 setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
1400 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom);
1401 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom);
1405 setOperationAction(ISD::MSCATTER, VT, Custom);
1426 setOperationAction(ISD::SETCC, MVT::v32i1, Custom);
1427 setOperationAction(ISD::SETCC, MVT::v64i1, Custom);
1429 setOperationAction(ISD::MUL, MVT::v64i8, Custom);
1432 setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i1, Custom);
1433 setOperationAction(ISD::CONCAT_VECTORS, MVT::v64i1, Custom);
1434 setOperationAction(ISD::CONCAT_VECTORS, MVT::v32i16, Custom);
1435 setOperationAction(ISD::CONCAT_VECTORS, MVT::v64i8, Custom);
1436 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v32i1, Custom);
1437 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v64i1, Custom);
1438 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v32i16, Custom);
1439 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v64i8, Custom);
1440 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v32i16, Custom);
1441 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v64i8, Custom);
1442 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v32i16, Custom);
1443 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v64i8, Custom);
1444 setOperationAction(ISD::SELECT, MVT::v32i1, Custom);
1445 setOperationAction(ISD::SELECT, MVT::v64i1, Custom);
1446 setOperationAction(ISD::SIGN_EXTEND, MVT::v32i8, Custom);
1447 setOperationAction(ISD::ZERO_EXTEND, MVT::v32i8, Custom);
1448 setOperationAction(ISD::SIGN_EXTEND, MVT::v32i16, Custom);
1449 setOperationAction(ISD::ZERO_EXTEND, MVT::v32i16, Custom);
1450 setOperationAction(ISD::ANY_EXTEND, MVT::v32i16, Custom);
1451 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v32i16, Custom);
1452 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v64i8, Custom);
1453 setOperationAction(ISD::SIGN_EXTEND, MVT::v64i8, Custom);
1454 setOperationAction(ISD::ZERO_EXTEND, MVT::v64i8, Custom);
1455 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v32i1, Custom);
1456 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v64i1, Custom);
1457 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v32i16, Custom);
1458 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v64i8, Custom);
1461 setOperationAction(ISD::TRUNCATE, MVT::v32i1, Custom);
1462 setOperationAction(ISD::TRUNCATE, MVT::v64i1, Custom);
1463 setOperationAction(ISD::TRUNCATE, MVT::v32i8, Custom);
1464 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v32i1, Custom);
1465 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v64i1, Custom);
1466 setOperationAction(ISD::BUILD_VECTOR, MVT::v32i1, Custom);
1467 setOperationAction(ISD::BUILD_VECTOR, MVT::v64i1, Custom);
1470 setOperationAction(ISD::BITREVERSE, MVT::v64i8, Custom);
1486 LegalizeAction Action = Subtarget.hasVLX() ? Legal : Custom;
1493 setOperationAction(ISD::CTLZ, MVT::v32i16, Custom);
1494 setOperationAction(ISD::CTLZ, MVT::v64i8, Custom);
1498 setOperationAction(ISD::BUILD_VECTOR, VT, Custom);
1500 setOperationAction(ISD::SRL, VT, Custom);
1501 setOperationAction(ISD::SHL, VT, Custom);
1502 setOperationAction(ISD::SRA, VT, Custom);
1505 setOperationAction(ISD::CTPOP, VT, Custom);
1506 setOperationAction(ISD::CTTZ, VT, Custom);
1534 setOperationAction(ISD::TRUNCATE, MVT::v2i1, Custom);
1535 setOperationAction(ISD::TRUNCATE, MVT::v4i1, Custom);
1536 setOperationAction(ISD::SETCC, MVT::v4i1, Custom);
1537 setOperationAction(ISD::SETCC, MVT::v2i1, Custom);
1538 setOperationAction(ISD::CONCAT_VECTORS, MVT::v4i1, Custom);
1539 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8i1, Custom);
1540 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8i1, Custom);
1541 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v4i1, Custom);
1542 setOperationAction(ISD::SELECT, MVT::v4i1, Custom);
1543 setOperationAction(ISD::SELECT, MVT::v2i1, Custom);
1544 setOperationAction(ISD::BUILD_VECTOR, MVT::v4i1, Custom);
1545 setOperationAction(ISD::BUILD_VECTOR, MVT::v2i1, Custom);
1546 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i1, Custom);
1547 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4i1, Custom);
1565 // We want to custom lower some of our intrinsics.
1566 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
1567 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
1568 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom);
1570 setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::i64, Custom);
1571 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i64, Custom);
1574 // Only custom-lower 64-bit SADDO and friends on 64-bit because we don't
1577 // FIXME: We really should do custom legalization for addition and
1583 // Add/Sub/Mul with overflow operations are custom lowered.
1584 setOperationAction(ISD::SADDO, VT, Custom);
1585 setOperationAction(ISD::UADDO, VT, Custom);
1586 setOperationAction(ISD::SSUBO, VT, Custom);
1587 setOperationAction(ISD::USUBO, VT, Custom);
1588 setOperationAction(ISD::SMULO, VT, Custom);
1589 setOperationAction(ISD::UMULO, VT, Custom);
1606 setOperationAction(ISD::FSINCOS, MVT::f64, Custom);
1607 setOperationAction(ISD::FSINCOS, MVT::f32, Custom);
1612 setOperationAction(ISD::SDIV, MVT::i128, Custom);
1613 setOperationAction(ISD::UDIV, MVT::i128, Custom);
1614 setOperationAction(ISD::SREM, MVT::i128, Custom);
1615 setOperationAction(ISD::UREM, MVT::i128, Custom);
1616 setOperationAction(ISD::SDIVREM, MVT::i128, Custom);
1617 setOperationAction(ISD::UDIVREM, MVT::i128, Custom);
5262 /// Custom lower build_vector of v16i8.
5332 /// Custom lower build_vector of v8i16.
5363 /// Custom lower build_vector of v4i32 or v4f32.
9242 // have custom ways we can lower more complex single-element blends below that
12314 // FIXME: We should custom lower this by fixing the condition and using i8
13599 "Unsupported custom type");
13667 llvm_unreachable("Custom UINT_TO_FP is not supported!");
13696 // Since UINT_TO_FP is legal (it's marked custom), dag combiner won't
14398 // type, and that won't be f80 since that is not custom lowered.
16173 assert(St->isTruncatingStore() && "We only custom truncating store.");
16328 assert(RegVT.isVector() && "We only custom lower vector sext loads.");
16330 "We only custom lower integer vector sext loads.");
16333 assert(Subtarget.hasSSE2() && "We only custom lower sext loads with SSE2.");
16400 "Non-power-of-two elements are not custom lowered!");
17950 default: return SDValue(); // Don't custom lower most intrinsics.
18268 /// (x86_rdtsc and x86_rdtscp). This function is also used to custom lower
19193 "Only scalar CTTZ requires custom lowering");
19383 "Should not custom lower when pmuldq is available!");
19455 // Only i8 vectors should need custom lowering after this.
20015 assert(VT.isVector() && "Custom lowering only for vector shifts!");
20016 assert(Subtarget.hasSSE2() && "Only custom lower when we have SSE2!");
20446 assert(VT.isVector() && "Custom lowering only for vector rotates!");
20810 Subtarget.hasMMX() && "Unexpected custom BITCAST");
20813 "Unexpected custom BITCAST");
21061 "We only do custom lowering for vector population count.");
21659 /// Provide custom lowering hooks for some operations.
21662 default: llvm_unreachable("Should not custom lower this!");
21777 /// to be custom lowered after all.
21797 /// custom code.
21805 llvm_unreachable("Do not know how to custom type legalize this operation!");
21921 default : llvm_unreachable("Do not know how to custom type "
22634 // FIXME: Custom handling because TableGen doesn't support multiple implicit
23208 // because this custom-inserter would have generated:
26071 // potentially need to be further expanded (or custom lowered) into a
26150 /// shuffles have been custom lowered so we need to handle those here.
26860 // subtarget. We custom lower VSELECT nodes with constant conditions and
26864 // blend could be custom lowered.
26867 // pre-legalization into shuffles and not mark as many types as custom
