Lines Matching defs:Opcode
2139 // If we could not find a frame destroy opcode, then it has already
2184 static bool isFrameLoadOpcode(int Opcode) {
2185 switch (Opcode) {
2217 static bool isFrameStoreOpcode(int Opcode) {
2218 switch (Opcode) {
3035 /// Returns true if the given instruction opcode is FMA3.
3038 /// the function. It is set to true if the given instruction has FMA3 opcode
3041 static bool isFMA3(unsigned Opcode, bool *IsIntrinsic = nullptr) {
3045 switch (Opcode) {
3184 llvm_unreachable("Opcode not handled by the switch");
3424 // regardless of the FMA opcode. The FMA opcode is adjusted later.
3462 // Check if we can adjust the opcode to preserve the semantics when
3590 // Look for the input opcode in the corresponding opcodes table.
3601 // The input opcode does not match with any of the opcodes from the tables.
3602 // The unsupported FMA opcode must be added to one of the two opcode groups
3604 assert(FoundOpcodesGroup != nullptr && "Unexpected FMA3 opcode");
3650 // Everything is ready, just adjust the FMA opcode and return it.
3708 /// Return condition code of a SET opcode.
3731 /// Return condition code of a CMov opcode.
3852 /// Return a set opcode for the given condition and
3878 /// Return a cmov opcode for the given condition,
5211 // We decode the condition code from opcode.
5250 // We swap the condition code and synthesize the new opcode.
5256 // Synthesize the new opcode.
5614 static MachineInstr *FuseTwoAddrInst(MachineFunction &MF, unsigned Opcode,
5622 MF.CreateMachineInstr(TII.get(Opcode), MI.getDebugLoc(), true);
5643 static MachineInstr *FuseInst(MachineFunction &MF, unsigned Opcode,
5650 MF.CreateMachineInstr(TII.get(Opcode), MI.getDebugLoc(), true);
5669 static MachineInstr *MakeM0Inst(const TargetInstrInfo &TII, unsigned Opcode,
5674 MI.getDebugLoc(), TII.get(Opcode));
5793 // Find the Opcode to fuse
5796 unsigned Opcode = I->second.first;
5806 if (Opcode != X86::MOV64rm || RCSize != 8 || Size != 4)
5813 Opcode = X86::MOV32rm;
5819 NewMI = FuseTwoAddrInst(MF, Opcode, MOs, InsertPt, MI, *this);
5821 NewMI = FuseInst(MF, Opcode, OpNum, MOs, InsertPt, MI, *this);
5915 static bool hasPartialRegUpdate(unsigned Opcode) {
5916 switch (Opcode) {
5992 static bool hasUndefRegUpdate(unsigned Opcode) {
5993 switch (Opcode) {
7033 static const uint16_t *lookup(unsigned opcode, unsigned domain) {
7035 if (Row[domain-1] == opcode)
7040 static const uint16_t *lookupAVX2(unsigned opcode, unsigned domain) {
7042 if (Row[domain-1] == opcode)
