1 # 2 # Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. 3 # 4 # SPDX-License-Identifier: BSD-3-Clause 5 # 6 7 # Default, static values for build variables, listed in alphabetic order. 8 # Dependencies between build options, if any, are handled in the top-level 9 # Makefile, after this file is included. This ensures that the former is better 10 # poised to handle dependencies, as all build variables would have a default 11 # value by then. 12 13 # The AArch32 Secure Payload to be built as BL32 image 14 AARCH32_SP := none 15 16 # The Target build architecture. Supported values are: aarch64, aarch32. 17 ARCH := aarch64 18 19 # ARM Architecture major and minor versions: 8.0 by default. 20 ARM_ARCH_MAJOR := 8 21 ARM_ARCH_MINOR := 0 22 23 # Determine the version of ARM GIC architecture to use for interrupt management 24 # in EL3. The platform port can change this value if needed. 25 ARM_GIC_ARCH := 2 26 27 # Flag used to indicate if ASM_ASSERTION should be enabled for the build. 28 ASM_ASSERTION := 0 29 30 # Base commit to perform code check on 31 BASE_COMMIT := origin/master 32 33 # By default, consider that the platform may release several CPUs out of reset. 34 # The platform Makefile is free to override this value. 35 COLD_BOOT_SINGLE_CPU := 0 36 37 # For Chain of Trust 38 CREATE_KEYS := 1 39 40 # Build flag to include AArch32 registers in cpu context save and restore during 41 # world switch. This flag must be set to 0 for AArch64-only platforms. 42 CTX_INCLUDE_AARCH32_REGS := 1 43 44 # Include FP registers in cpu context 45 CTX_INCLUDE_FPREGS := 0 46 47 # Debug build 48 DEBUG := 0 49 50 # Build platform 51 DEFAULT_PLAT := fvp 52 53 # Flag to enable Performance Measurement Framework 54 ENABLE_PMF := 0 55 56 # Flag to enable PSCI STATs functionality 57 ENABLE_PSCI_STAT := 0 58 59 # Flag to enable runtime instrumentation using PMF 60 ENABLE_RUNTIME_INSTRUMENTATION := 0 61 62 # Flag to enable stack corruption protection 63 ENABLE_STACK_PROTECTOR := 0 64 65 # Build flag to treat usage of deprecated platform and framework APIs as error. 66 ERROR_DEPRECATED := 0 67 68 # Byte alignment that each component in FIP is aligned to 69 FIP_ALIGN := 0 70 71 # Default FIP file name 72 FIP_NAME := fip.bin 73 74 # Default FWU_FIP file name 75 FWU_FIP_NAME := fwu_fip.bin 76 77 # For Chain of Trust 78 GENERATE_COT := 0 79 80 # Hint platform interrupt control layer that Group 0 interrupts are for EL3. By 81 # default, they are for Secure EL1. 82 GICV2_G0_FOR_EL3 := 0 83 84 # Whether system coherency is managed in hardware, without explicit software 85 # operations. 86 HW_ASSISTED_COHERENCY := 0 87 88 # Set the default algorithm for the generation of Trusted Board Boot keys 89 KEY_ALG := rsa 90 91 # Flag to enable new version of image loading 92 LOAD_IMAGE_V2 := 0 93 94 # NS timer register save and restore 95 NS_TIMER_SWITCH := 0 96 97 # Build PL011 UART driver in minimal generic UART mode 98 PL011_GENERIC_UART := 0 99 100 # By default, consider that the platform's reset address is not programmable. 101 # The platform Makefile is free to override this value. 102 PROGRAMMABLE_RESET_ADDRESS := 0 103 104 # Flag used to choose the power state format viz Extended State-ID or the 105 # Original format. 106 PSCI_EXTENDED_STATE_ID := 0 107 108 # By default, BL1 acts as the reset handler, not BL31 109 RESET_TO_BL31 := 0 110 111 # For Chain of Trust 112 SAVE_KEYS := 0 113 114 # Whether code and read-only data should be put on separate memory pages. The 115 # platform Makefile is free to override this value. 116 SEPARATE_CODE_AND_RODATA := 0 117 118 # SPD choice 119 SPD := none 120 121 # Flag to introduce an infinite loop in BL1 just before it exits into the next 122 # image. This is meant to help debugging the post-BL2 phase. 123 SPIN_ON_BL1_EXIT := 0 124 125 # Flags to build TF with Trusted Boot support 126 TRUSTED_BOARD_BOOT := 0 127 128 # Build option to choose whether Trusted firmware uses Coherent memory or not. 129 USE_COHERENT_MEM := 1 130 131 # Use tbbr_oid.h instead of platform_oid.h 132 USE_TBBR_DEFS = $(ERROR_DEPRECATED) 133 134 # Build verbosity 135 V := 0 136 137 # Whether to enable D-Cache early during warm boot. This is usually 138 # applicable for platforms wherein interconnect programming is not 139 # required to enable cache coherency after warm reset (eg: single cluster 140 # platforms). 141 WARMBOOT_ENABLE_DCACHE_EARLY := 0 142 143 # By default, enable Statistical Profiling Extensions. 144 # The top level Makefile will disable this feature depending on 145 # the target architecture and version number. 146 ENABLE_SPE_FOR_LOWER_ELS := 1 147 148 # SPE is enabled by default but only supported on AArch64 8.2 onwards. 149 # Disable it in all other cases. 150 ifeq (${ARCH},aarch32) 151 override ENABLE_SPE_FOR_LOWER_ELS := 0 152 else 153 ifeq (${ARM_ARCH_MAJOR},8) 154 ifeq ($(ARM_ARCH_MINOR),$(filter $(ARM_ARCH_MINOR),0 1)) 155 ENABLE_SPE_FOR_LOWER_ELS := 0 156 endif 157 endif 158 endif 159
