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      1 /** @file
      2 
      3   Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
      4   This program and the accompanying materials
      5   are licensed and made available under the terms and conditions of the BSD License
      6   which accompanies this distribution.  The full text of the license may be found at
      7   http://opensource.org/licenses/bsd-license.php.
      8 
      9   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     10   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     11 
     12 **/
     13 
     14 #ifndef _SD_MMC_PCI_HOST_CONTROLLER_PEI_H_
     15 #define _SD_MMC_PCI_HOST_CONTROLLER_PEI_H_
     16 
     17 #include <PiPei.h>
     18 
     19 #include <Ppi/MasterBootMode.h>
     20 #include <Ppi/SdMmcHostController.h>
     21 
     22 #include <IndustryStandard/Pci.h>
     23 
     24 #include <Library/DebugLib.h>
     25 #include <Library/BaseLib.h>
     26 #include <Library/BaseMemoryLib.h>
     27 #include <Library/PciLib.h>
     28 #include <Library/PeiServicesLib.h>
     29 #include <Library/MemoryAllocationLib.h>
     30 
     31 #define SD_MMC_HC_PEI_SIGNATURE    SIGNATURE_32 ('S', 'D', 'M', 'C')
     32 
     33 #define MAX_SD_MMC_HCS             8
     34 #define MAX_SD_MMC_SLOTS           6
     35 
     36 //
     37 // SD Host Controller SlotInfo Register Offset
     38 //
     39 #define SD_MMC_HC_PEI_SLOT_OFFSET  0x40
     40 
     41 typedef struct {
     42   UINT8    FirstBar:3;        // bit 0:2
     43   UINT8    Reserved:1;        // bit 3
     44   UINT8    SlotNum:3;         // bit 4:6
     45   UINT8    Reserved1:1;       // bit 7
     46 } SD_MMC_HC_PEI_SLOT_INFO;
     47 
     48 typedef struct {
     49   UINTN                            SlotNum;
     50   UINTN                            MmioBarAddr[MAX_SD_MMC_SLOTS];
     51 } SD_MMC_HC_PEI_BAR;
     52 
     53 typedef struct {
     54   UINTN                            Signature;
     55   EDKII_SD_MMC_HOST_CONTROLLER_PPI SdMmcHostControllerPpi;
     56   EFI_PEI_PPI_DESCRIPTOR           PpiList;
     57   UINTN                            TotalSdMmcHcs;
     58   SD_MMC_HC_PEI_BAR                MmioBar[MAX_SD_MMC_HCS];
     59 } SD_MMC_HC_PEI_PRIVATE_DATA;
     60 
     61 #define SD_MMC_HC_PEI_PRIVATE_DATA_FROM_THIS(a)  CR (a, SD_MMC_HC_PEI_PRIVATE_DATA, SdMmcHostControllerPpi, SD_MMC_HC_PEI_SIGNATURE)
     62 
     63 /**
     64   Get the MMIO base address of SD/MMC host controller.
     65 
     66   @param[in]     This            The protocol instance pointer.
     67   @param[in]     ControllerId    The ID of the SD/MMC host controller.
     68   @param[in,out] MmioBar         The pointer to store the array of available
     69                                  SD/MMC host controller slot MMIO base addresses.
     70                                  The entry number of the array is specified by BarNum.
     71   @param[out]    BarNum          The pointer to store the supported bar number.
     72 
     73   @retval EFI_SUCCESS            The operation succeeds.
     74   @retval EFI_INVALID_PARAMETER  The parameters are invalid.
     75 
     76 **/
     77 EFI_STATUS
     78 EFIAPI
     79 GetSdMmcHcMmioBar (
     80   IN     EDKII_SD_MMC_HOST_CONTROLLER_PPI *This,
     81   IN     UINT8                            ControllerId,
     82   IN OUT UINTN                            **MmioBar,
     83      OUT UINT8                            *BarNum
     84   );
     85 
     86 #endif
     87