| /external/llvm/lib/Target/Hexagon/ |
| HexagonPeephole.cpp | 243 unsigned Reg0 = Op0.getReg();
244 const TargetRegisterClass *RC0 = MRI->getRegClass(Reg0);
248 if (TargetRegisterInfo::isVirtualRegister(Reg0)) {
250 if (unsigned PeepholeSrc = PeepholeMap.lookup(Reg0)) {
|
| /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/ |
| value.go | 283 // Reg0 returns the register assigned to the first output of v, in cmd/internal/obj/$ARCH numbering.
284 func (v *Value) Reg0() int16 {
|
| /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/ |
| value.go | 283 // Reg0 returns the register assigned to the first output of v, in cmd/internal/obj/$ARCH numbering.
284 func (v *Value) Reg0() int16 {
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 225 unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg();
248 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0,
263 SDValue T0 = CurDAG->getCopyFromReg(Chain, dl, Reg0, MVT::i32,
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| TargetInstrInfoImpl.cpp | 77 unsigned Reg0 = HasDef ? MI->getOperand(0).getReg() : 0;
84 if (HasDef && Reg0 == Reg1 &&
87 Reg0 = Reg2;
88 } else if (HasDef && Reg0 == Reg2 &&
91 Reg0 = Reg1;
100 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead))
110 MI->getOperand(0).setReg(Reg0);
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 117 unsigned Reg0 = MI->getOperand(0).getReg();
125 if (Reg0 == Reg1) {
139 unsigned Reg0 = ChangeReg0 ? Reg2 : MI->getOperand(0).getReg();
142 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead))
|
| /external/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 613 uint16_t Reg0;
616 MCRegUnitRootIterator() : Reg0(0), Reg1(0) {}
619 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
625 return Reg0;
630 return Reg0;
636 Reg0 = Reg1;
|
| /external/llvm/lib/Target/ARM/ |
| Thumb2SizeReduction.cpp | 706 unsigned Reg0 = MI->getOperand(0).getReg();
712 if (!isARMLowRegister(Reg0) || !isARMLowRegister(Reg1)
715 if (Reg0 != Reg2) {
718 if (Reg1 != Reg0)
725 } else if (Reg0 != Reg1) {
730 MI->getOperand(CommOpIdx2).getReg() != Reg0)
737 if (Entry.LowRegs2 && !isARMLowRegister(Reg0))
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEFrameLowering.cpp | 438 unsigned Reg0 =
444 std::swap(Reg0, Reg1);
447 MCCFIInstruction::createOffset(nullptr, Reg0, Offset));
456 unsigned Reg0 = MRI->getDwarfRegNum(Reg, true);
460 std::swap(Reg0, Reg1);
463 MCCFIInstruction::createOffset(nullptr, Reg0, Offset));
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 348 unsigned Reg0 = MI.getOperand(0).getReg();
358 if (Reg0 == Reg1) {
378 unsigned Reg0 = ChangeReg0 ? Reg2 : MI.getOperand(0).getReg();
381 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead))
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| Thumb2SizeReduction.cpp | 587 unsigned Reg0 = MI->getOperand(0).getReg();
589 if (Reg0 != Reg1) {
593 CommOpIdx1 != 1 || MI->getOperand(CommOpIdx2).getReg() != Reg0)
599 if (Entry.LowRegs2 && !isARMLowRegister(Reg0))
|
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/MC/ |
| MCRegisterInfo.h | 633 uint16_t Reg0 = 0;
641 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
647 return Reg0;
652 return Reg0;
658 Reg0 = Reg1;
|
