| /external/libcxx/test/std/strings/string.view/string.view.hash/ |
| string_view.pass.cpp | 40 typedef std::hash<String> SH;
48 SH sh; local
55 assert(sh(ss1) == h(s1));
56 assert(sh(ss2) == h(s2));
|
| /prebuilts/ndk/r16/sources/cxx-stl/llvm-libc++/test/std/strings/string.view/string.view.hash/ |
| string_view.pass.cpp | 40 typedef std::hash<String> SH;
48 SH sh; local
55 assert(sh(ss1) == h(s1));
56 assert(sh(ss2) == h(s2));
|
| /external/skia/gm/ |
| beziers.cpp | 16 constexpr SkScalar SH = SkIntToScalar(H);
82 canvas->translate(0, SH);
|
| strokerects.cpp | 20 constexpr SkScalar SH = SkIntToScalar(H);
58 canvas->translate(SW * x, SH * y);
61 , SW - SkIntToScalar(2), SH - SkIntToScalar(2)
|
| strokes.cpp | 20 constexpr SkScalar SH = SkIntToScalar(H);
60 canvas->translate(0, SH * y);
63 , SW - SkIntToScalar(2), SH - SkIntToScalar(2)
304 canvas->translate(0, SH * y);
308 SH - SkIntToScalar(2)));
314 canvas->rotate(SkIntToScalar(15), SW/2, SH/2);
[all...] |
| /external/skqp/gm/ |
| beziers.cpp | 16 constexpr SkScalar SH = SkIntToScalar(H);
82 canvas->translate(0, SH);
|
| strokerects.cpp | 20 constexpr SkScalar SH = SkIntToScalar(H);
58 canvas->translate(SW * x, SH * y);
61 , SW - SkIntToScalar(2), SH - SkIntToScalar(2)
|
| strokes.cpp | 20 constexpr SkScalar SH = SkIntToScalar(H);
60 canvas->translate(0, SH * y);
63 , SW - SkIntToScalar(2), SH - SkIntToScalar(2)
304 canvas->translate(0, SH * y);
308 SH - SkIntToScalar(2)));
314 canvas->rotate(SkIntToScalar(15), SW/2, SH/2);
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 60 unsigned char SH = MI->getOperand(2).getImm();
64 if (SH <= 31 && MB == 0 && ME == (31-SH)) {
67 if (SH <= 31 && MB == (32-SH) && ME == 31) {
69 SH = 32-SH;
75 O << ", " << (unsigned int)SH;
93 unsigned char SH = MI->getOperand(2).getImm();
95 // rldicr RA, RS, SH, 63-SH == sldi RA, RS, S
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 38 unsigned char SH = MI->getOperand(2).getImm();
42 if (SH <= 31 && MB == 0 && ME == (31-SH)) {
45 if (SH <= 31 && MB == (32-SH) && ME == 31) {
47 SH = 32-SH;
53 O << ", " << (unsigned int)SH;
71 unsigned char SH = MI->getOperand(2).getImm();
73 // rldicr RA, RS, SH, 63-SH == sldi RA, RS, S
[all...] |
| /external/capstone/arch/PowerPC/ |
| PPCInstPrinter.c | 88 unsigned char SH = (unsigned char)MCOperand_getImm(MCInst_getOperand(MI, 2));
93 if (SH <= 31 && MB == 0 && ME == (31-SH)) {
99 if (SH <= 31 && MB == (32-SH) && ME == 31) {
103 SH = 32-SH;
110 if (SH > HEX_THRESHOLD)
111 SStream_concat(O, ", 0x%x", (unsigned int)SH);
113 SStream_concat(O, ", %u", (unsigned int)SH);
[all...] |
| /external/libpng/mips/ |
| filter_msa_intrinsics.c | 59 #define SH(val, pdst) \
65 "sh %[val_m], %[pdst_sh_m] \n\t" \
130 #define SH(val, pdst) \
136 "sh %[val_m], %[pdst_sh_m] \n\t" \
198 #define SH(val, pdst) \
617 SH(out2, nxt);
753 SH(out2, nxt);
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 88 unsigned &SH, unsigned &MB, unsigned &ME);
332 bool isShiftMask, unsigned &SH,
366 SH = Shift & 31;
390 unsigned Value, SH = 0;
422 SH = (Op1Opc == ISD::SHL) ? Value : 32 - Value;
429 SH = (SHOpc == ISD::SHL) ? Value : 32 - Value;
435 SH &= 31;
436 SDValue Ops[] = { Op0, Op1, getI32Imm(SH), getI32Imm(MB),
[all...] |
| /libcore/ojluni/src/main/native/ |
| zip_util.h | 66 #define SH(b, n) (CH(b, n) | (CH(b, n+1) << 8))
67 #define LG(b, n) ((SH(b, n) | (SH(b, n+2) << 16)) &0xffffffffUL)
74 #define LOCVER(b) SH(b, 4) /* version needed to extract */
75 #define LOCFLG(b) SH(b, 6) /* general purpose bit flags */
76 #define LOCHOW(b) SH(b, 8) /* compression method */
81 #define LOCNAM(b) SH(b, 26) /* filename length */
82 #define LOCEXT(b) SH(b, 28) /* extra field length */
94 #define CENVEM(b) SH(b, 4) /* version made by */
95 #define CENVER(b) SH(b, 6) /* version needed to extract *
[all...] |
| /frameworks/base/services/net/java/android/net/apf/ |
| ApfGenerator.java | 52 SH(12), // Left shift, e.g, "sh R0, 5" or "sh R0, -5" (shifts right)
555 Instruction instruction = new Instruction(Opcodes.SH);
566 Instruction instruction = new Instruction(Opcodes.SH);
624 Instruction instruction = new Instruction(Opcodes.SH, Register.R1);
[all...] |
| /frameworks/rs/tests/java_api/VrDemo/src/com/example/android/rs/vr/loaders/ |
| LoaderDicom.java | 95 static final short SH = vr("SH");
108 AE, AS, CS, DA, DS, DT, IS, LO, LT, PN, SH, ST, TM, UT
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | [all...] |
| /system/core/libpixelflinger/codeflinger/ |
| MIPSAssembler.cpp | 943 mMips->SH(Rd, Rn, amode.value);
946 mMips->SH(Rd, Rn, 0);
956 mMips->SH(Rd, R_at, 0);
[all...] |
| /toolchain/binutils/binutils-2.27/bfd/ |
| coff-sh.c | 29 #include "coff/sh.h"
373 #define SH 1
465 /* This structure is used to map BFD reloc codes to SH PE relocs. */
473 /* An array mapping BFD reloc codes to SH PE relocs. */
481 /* An array mapping BFD reloc codes to SH PE relocs. */
490 corresponding SH PE reloc. */
504 (*_bfd_error_handler) (_("SH Error: unknown reloc type %d"), code);
558 /* This is the howto function for the SH relocations. */
661 /* This function handles relaxing on the SH.
663 Function calls on the SH look like this
[all...] |
| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| vp8_macros_msa.h | 87 #define SH(val, pdst) \
92 asm volatile("sh %[val_m], %[pdst_m] \n\t" \
163 #define SH(val, pdst) \
411 SH(out0_m, pblk_2x4_m); \
412 SH(out1_m, pblk_2x4_m + stride); \
413 SH(out2_m, pblk_2x4_m + 2 * stride); \
414 SH(out3_m, pblk_2x4_m + 3 * stride); \
[all...] |
| /external/libvpx/libvpx/vpx_dsp/mips/ |
| macros_msa.h | 69 #define SH(val, pdst) *(uint16_t *)(pdst) = (val);
130 #define SH(val, pdst) \
360 SH(out0_m, pblk_2x4_m); \
361 SH(out1_m, pblk_2x4_m + stride); \
362 SH(out2_m, pblk_2x4_m + 2 * stride); \
363 SH(out3_m, pblk_2x4_m + 3 * stride); \
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 113 unsigned &SH, unsigned &MB, unsigned &ME);
470 bool isShiftMask, unsigned &SH,
504 SH = Shift & 31;
528 unsigned Value, SH = 0;
560 SH = (Op1Opc == ISD::SHL) ? Value : 32 - Value;
576 SH = (SHOpc == ISD::SHL) ? Value : 32 - Value;
580 SH &= 31;
581 SDValue Ops[] = { Op0, Op1, getI32Imm(SH, dl), getI32Imm(MB, dl),
[all...] |
| /external/webp/src/dsp/ |
| msa_macro.h | 110 MSA_STORE_FUNC(uint16_t, sh, msa_sh);
111 #define SH(val, pdst) MSA_STORE(val, pdst, msa_sh)
130 #define SH(val, pdst) MSA_STORE(val, pdst, msa_ush)
374 SH(out0_m, pblk_2x4_m); \
376 SH(out1_m, pblk_2x4_m); \
378 SH(out2_m, pblk_2x4_m); \
380 SH(out3_m, pblk_2x4_m); \
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | [all...] |
| /prebuilts/jdk/jdk8/darwin-x86/jre/lib/ext/ |
| zipfs.jar | |
