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    Searched defs:ShiftOp (Results 1 - 10 of 10) sorted by null

  /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/
InstCombineShifts.cpp 526 BinaryOperator *ShiftOp = dyn_cast<BinaryOperator>(Op0);
527 if (ShiftOp && !ShiftOp->isShift())
528 ShiftOp = 0;
530 if (ShiftOp && isa<ConstantInt>(ShiftOp->getOperand(1))) {
531 ConstantInt *ShiftAmt1C = cast<ConstantInt>(ShiftOp->getOperand(1));
536 Value *X = ShiftOp->getOperand(0);
543 if (I.getOpcode() == ShiftOp->getOpcode()) {
559 ShiftOp->getOpcode() != Instruction::Shl)
    [all...]
  /external/llvm/lib/Transforms/InstCombine/
InstCombineShifts.cpp 543 BinaryOperator *ShiftOp = dyn_cast<BinaryOperator>(Op0);
544 if (ShiftOp && !ShiftOp->isShift())
545 ShiftOp = nullptr;
547 if (ShiftOp && isa<ConstantInt>(ShiftOp->getOperand(1))) {
561 ConstantInt *ShiftAmt1C = cast<ConstantInt>(ShiftOp->getOperand(1));
566 Value *X = ShiftOp->getOperand(0);
571 if (I.getOpcode() == ShiftOp->getOpcode()) {
588 ShiftOp->getOpcode() == Instruction::Shl)
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/
ARMInstPrinter.cpp 566 unsigned ShiftOp = MI->getOperand(OpNum).getImm();
567 bool isASR = (ShiftOp & (1 << 5)) != 0;
568 unsigned Amt = ShiftOp & 0x1f;
  /external/capstone/arch/ARM/
ARMInstPrinter.c     [all...]
  /external/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp     [all...]
  /external/swiftshader/third_party/subzero/src/
IceInstARM32.h 114 Variable *Index, ShiftKind ShiftOp = kNoShift,
118 OperandARM32Mem(Func, Ty, Base, Index, ShiftOp, ShiftAmt, Mode);
123 ShiftKind getShiftOp() const { return ShiftOp; }
155 ShiftKind ShiftOp, uint16_t ShiftAmt, AddrMode Mode);
160 ShiftKind ShiftOp;
311 ShiftKind ShiftOp, Operand *ShiftAmt) {
313 OperandARM32FlexReg(Func, Ty, Reg, ShiftOp, ShiftAmt);
325 ShiftKind getShiftOp() const { return ShiftOp; }
330 OperandARM32FlexReg(Cfg *Func, Type Ty, Variable *Reg, ShiftKind ShiftOp,
334 ShiftKind ShiftOp;
    [all...]
  /external/v8/src/arm/
constants-arm.h 256 enum ShiftOp {
263 // Use a special code to make the distinction. The RRX ShiftOp is only used
588 inline int ShiftValue() const { return static_cast<ShiftOp>(Bits(6, 5)); }
589 inline ShiftOp ShiftField() const {
590 return static_cast<ShiftOp>(BitField(6, 5));
  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeIntegerTypes.cpp     [all...]
  /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
SelectionDAGBuilder.cpp     [all...]
  /external/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]

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