1 2 /*---------------------------------------------------------------*/ 3 /*--- begin ir_defs.c ---*/ 4 /*---------------------------------------------------------------*/ 5 6 /* 7 This file is part of Valgrind, a dynamic binary instrumentation 8 framework. 9 10 Copyright (C) 2004-2017 OpenWorks LLP 11 info (at) open-works.net 12 13 This program is free software; you can redistribute it and/or 14 modify it under the terms of the GNU General Public License as 15 published by the Free Software Foundation; either version 2 of the 16 License, or (at your option) any later version. 17 18 This program is distributed in the hope that it will be useful, but 19 WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 21 General Public License for more details. 22 23 You should have received a copy of the GNU General Public License 24 along with this program; if not, write to the Free Software 25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 26 02110-1301, USA. 27 28 The GNU General Public License is contained in the file COPYING. 29 30 Neither the names of the U.S. Department of Energy nor the 31 University of California nor the names of its contributors may be 32 used to endorse or promote products derived from this software 33 without prior written permission. 34 */ 35 36 #include "libvex_basictypes.h" 37 #include "libvex_ir.h" 38 #include "libvex.h" 39 40 #include "main_util.h" 41 42 43 /*---------------------------------------------------------------*/ 44 /*--- Printing the IR ---*/ 45 /*---------------------------------------------------------------*/ 46 47 void ppIRType ( IRType ty ) 48 { 49 switch (ty) { 50 case Ity_INVALID: vex_printf("Ity_INVALID"); break; 51 case Ity_I1: vex_printf( "I1"); break; 52 case Ity_I8: vex_printf( "I8"); break; 53 case Ity_I16: vex_printf( "I16"); break; 54 case Ity_I32: vex_printf( "I32"); break; 55 case Ity_I64: vex_printf( "I64"); break; 56 case Ity_I128: vex_printf( "I128"); break; 57 case Ity_F16: vex_printf( "F16"); break; 58 case Ity_F32: vex_printf( "F32"); break; 59 case Ity_F64: vex_printf( "F64"); break; 60 case Ity_F128: vex_printf( "F128"); break; 61 case Ity_D32: vex_printf( "D32"); break; 62 case Ity_D64: vex_printf( "D64"); break; 63 case Ity_D128: vex_printf( "D128"); break; 64 case Ity_V128: vex_printf( "V128"); break; 65 case Ity_V256: vex_printf( "V256"); break; 66 default: vex_printf("ty = 0x%x\n", (UInt)ty); 67 vpanic("ppIRType"); 68 } 69 } 70 71 void ppIRConst ( const IRConst* con ) 72 { 73 union { ULong i64; Double f64; UInt i32; Float f32; } u; 74 vassert(sizeof(ULong) == sizeof(Double)); 75 switch (con->tag) { 76 case Ico_U1: vex_printf( "%d:I1", con->Ico.U1 ? 1 : 0); break; 77 case Ico_U8: vex_printf( "0x%x:I8", (UInt)(con->Ico.U8)); break; 78 case Ico_U16: vex_printf( "0x%x:I16", (UInt)(con->Ico.U16)); break; 79 case Ico_U32: vex_printf( "0x%x:I32", (UInt)(con->Ico.U32)); break; 80 case Ico_U64: vex_printf( "0x%llx:I64", (ULong)(con->Ico.U64)); break; 81 case Ico_F32: u.f32 = con->Ico.F32; 82 vex_printf( "F32{0x%x}", u.i32); 83 break; 84 case Ico_F32i: vex_printf( "F32i{0x%x}", con->Ico.F32i); break; 85 case Ico_F64: u.f64 = con->Ico.F64; 86 vex_printf( "F64{0x%llx}", u.i64); 87 break; 88 case Ico_F64i: vex_printf( "F64i{0x%llx}", con->Ico.F64i); break; 89 case Ico_V128: vex_printf( "V128{0x%04x}", (UInt)(con->Ico.V128)); break; 90 case Ico_V256: vex_printf( "V256{0x%08x}", con->Ico.V256); break; 91 default: vpanic("ppIRConst"); 92 } 93 } 94 95 void ppIRCallee ( const IRCallee* ce ) 96 { 97 vex_printf("%s", ce->name); 98 if (ce->regparms > 0) 99 vex_printf("[rp=%d]", ce->regparms); 100 if (ce->mcx_mask > 0) 101 vex_printf("[mcx=0x%x]", ce->mcx_mask); 102 vex_printf("{%p}", (void*)ce->addr); 103 } 104 105 void ppIRRegArray ( const IRRegArray* arr ) 106 { 107 vex_printf("(%d:%dx", arr->base, arr->nElems); 108 ppIRType(arr->elemTy); 109 vex_printf(")"); 110 } 111 112 void ppIRTemp ( IRTemp tmp ) 113 { 114 if (tmp == IRTemp_INVALID) 115 vex_printf("IRTemp_INVALID"); 116 else 117 vex_printf( "t%u", tmp); 118 } 119 120 void ppIROp ( IROp op ) 121 { 122 const HChar* str = NULL; 123 IROp base; 124 switch (op) { 125 case Iop_Add8 ... Iop_Add64: 126 str = "Add"; base = Iop_Add8; break; 127 case Iop_Sub8 ... Iop_Sub64: 128 str = "Sub"; base = Iop_Sub8; break; 129 case Iop_Mul8 ... Iop_Mul64: 130 str = "Mul"; base = Iop_Mul8; break; 131 case Iop_Or8 ... Iop_Or64: 132 str = "Or"; base = Iop_Or8; break; 133 case Iop_And8 ... Iop_And64: 134 str = "And"; base = Iop_And8; break; 135 case Iop_Xor8 ... Iop_Xor64: 136 str = "Xor"; base = Iop_Xor8; break; 137 case Iop_Shl8 ... Iop_Shl64: 138 str = "Shl"; base = Iop_Shl8; break; 139 case Iop_Shr8 ... Iop_Shr64: 140 str = "Shr"; base = Iop_Shr8; break; 141 case Iop_Sar8 ... Iop_Sar64: 142 str = "Sar"; base = Iop_Sar8; break; 143 case Iop_CmpEQ8 ... Iop_CmpEQ64: 144 str = "CmpEQ"; base = Iop_CmpEQ8; break; 145 case Iop_CmpNE8 ... Iop_CmpNE64: 146 str = "CmpNE"; base = Iop_CmpNE8; break; 147 case Iop_CasCmpEQ8 ... Iop_CasCmpEQ64: 148 str = "CasCmpEQ"; base = Iop_CasCmpEQ8; break; 149 case Iop_CasCmpNE8 ... Iop_CasCmpNE64: 150 str = "CasCmpNE"; base = Iop_CasCmpNE8; break; 151 case Iop_ExpCmpNE8 ... Iop_ExpCmpNE64: 152 str = "ExpCmpNE"; base = Iop_ExpCmpNE8; break; 153 case Iop_Not8 ... Iop_Not64: 154 str = "Not"; base = Iop_Not8; break; 155 /* other cases must explicitly "return;" */ 156 case Iop_8Uto16: vex_printf("8Uto16"); return; 157 case Iop_8Uto32: vex_printf("8Uto32"); return; 158 case Iop_16Uto32: vex_printf("16Uto32"); return; 159 case Iop_8Sto16: vex_printf("8Sto16"); return; 160 case Iop_8Sto32: vex_printf("8Sto32"); return; 161 case Iop_16Sto32: vex_printf("16Sto32"); return; 162 case Iop_32Sto64: vex_printf("32Sto64"); return; 163 case Iop_32Uto64: vex_printf("32Uto64"); return; 164 case Iop_32to8: vex_printf("32to8"); return; 165 case Iop_16Uto64: vex_printf("16Uto64"); return; 166 case Iop_16Sto64: vex_printf("16Sto64"); return; 167 case Iop_8Uto64: vex_printf("8Uto64"); return; 168 case Iop_8Sto64: vex_printf("8Sto64"); return; 169 case Iop_64to16: vex_printf("64to16"); return; 170 case Iop_64to8: vex_printf("64to8"); return; 171 172 case Iop_Not1: vex_printf("Not1"); return; 173 case Iop_32to1: vex_printf("32to1"); return; 174 case Iop_64to1: vex_printf("64to1"); return; 175 case Iop_1Uto8: vex_printf("1Uto8"); return; 176 case Iop_1Uto32: vex_printf("1Uto32"); return; 177 case Iop_1Uto64: vex_printf("1Uto64"); return; 178 case Iop_1Sto8: vex_printf("1Sto8"); return; 179 case Iop_1Sto16: vex_printf("1Sto16"); return; 180 case Iop_1Sto32: vex_printf("1Sto32"); return; 181 case Iop_1Sto64: vex_printf("1Sto64"); return; 182 183 case Iop_MullS8: vex_printf("MullS8"); return; 184 case Iop_MullS16: vex_printf("MullS16"); return; 185 case Iop_MullS32: vex_printf("MullS32"); return; 186 case Iop_MullS64: vex_printf("MullS64"); return; 187 case Iop_MullU8: vex_printf("MullU8"); return; 188 case Iop_MullU16: vex_printf("MullU16"); return; 189 case Iop_MullU32: vex_printf("MullU32"); return; 190 case Iop_MullU64: vex_printf("MullU64"); return; 191 192 case Iop_Clz64: vex_printf("Clz64"); return; 193 case Iop_Clz32: vex_printf("Clz32"); return; 194 case Iop_Ctz64: vex_printf("Ctz64"); return; 195 case Iop_Ctz32: vex_printf("Ctz32"); return; 196 197 case Iop_CmpLT32S: vex_printf("CmpLT32S"); return; 198 case Iop_CmpLE32S: vex_printf("CmpLE32S"); return; 199 case Iop_CmpLT32U: vex_printf("CmpLT32U"); return; 200 case Iop_CmpLE32U: vex_printf("CmpLE32U"); return; 201 202 case Iop_CmpLT64S: vex_printf("CmpLT64S"); return; 203 case Iop_CmpLE64S: vex_printf("CmpLE64S"); return; 204 case Iop_CmpLT64U: vex_printf("CmpLT64U"); return; 205 case Iop_CmpLE64U: vex_printf("CmpLE64U"); return; 206 207 case Iop_CmpNEZ8: vex_printf("CmpNEZ8"); return; 208 case Iop_CmpNEZ16: vex_printf("CmpNEZ16"); return; 209 case Iop_CmpNEZ32: vex_printf("CmpNEZ32"); return; 210 case Iop_CmpNEZ64: vex_printf("CmpNEZ64"); return; 211 212 case Iop_CmpwNEZ32: vex_printf("CmpwNEZ32"); return; 213 case Iop_CmpwNEZ64: vex_printf("CmpwNEZ64"); return; 214 215 case Iop_Left8: vex_printf("Left8"); return; 216 case Iop_Left16: vex_printf("Left16"); return; 217 case Iop_Left32: vex_printf("Left32"); return; 218 case Iop_Left64: vex_printf("Left64"); return; 219 case Iop_Max32U: vex_printf("Max32U"); return; 220 221 case Iop_CmpORD32U: vex_printf("CmpORD32U"); return; 222 case Iop_CmpORD32S: vex_printf("CmpORD32S"); return; 223 224 case Iop_CmpORD64U: vex_printf("CmpORD64U"); return; 225 case Iop_CmpORD64S: vex_printf("CmpORD64S"); return; 226 227 case Iop_DivU32: vex_printf("DivU32"); return; 228 case Iop_DivS32: vex_printf("DivS32"); return; 229 case Iop_DivU64: vex_printf("DivU64"); return; 230 case Iop_DivS64: vex_printf("DivS64"); return; 231 case Iop_DivU64E: vex_printf("DivU64E"); return; 232 case Iop_DivS64E: vex_printf("DivS64E"); return; 233 case Iop_DivU32E: vex_printf("DivU32E"); return; 234 case Iop_DivS32E: vex_printf("DivS32E"); return; 235 236 case Iop_DivModU64to32: vex_printf("DivModU64to32"); return; 237 case Iop_DivModS64to32: vex_printf("DivModS64to32"); return; 238 239 case Iop_DivModU128to64: vex_printf("DivModU128to64"); return; 240 case Iop_DivModS128to64: vex_printf("DivModS128to64"); return; 241 242 case Iop_DivModS64to64: vex_printf("DivModS64to64"); return; 243 244 case Iop_16HIto8: vex_printf("16HIto8"); return; 245 case Iop_16to8: vex_printf("16to8"); return; 246 case Iop_8HLto16: vex_printf("8HLto16"); return; 247 248 case Iop_32HIto16: vex_printf("32HIto16"); return; 249 case Iop_32to16: vex_printf("32to16"); return; 250 case Iop_16HLto32: vex_printf("16HLto32"); return; 251 252 case Iop_64HIto32: vex_printf("64HIto32"); return; 253 case Iop_64to32: vex_printf("64to32"); return; 254 case Iop_32HLto64: vex_printf("32HLto64"); return; 255 256 case Iop_128HIto64: vex_printf("128HIto64"); return; 257 case Iop_128to64: vex_printf("128to64"); return; 258 case Iop_64HLto128: vex_printf("64HLto128"); return; 259 260 case Iop_CmpF32: vex_printf("CmpF32"); return; 261 case Iop_F32toI32S: vex_printf("F32toI32S"); return; 262 case Iop_F32toI64S: vex_printf("F32toI64S"); return; 263 case Iop_I32StoF32: vex_printf("I32StoF32"); return; 264 case Iop_I64StoF32: vex_printf("I64StoF32"); return; 265 266 case Iop_AddF64: vex_printf("AddF64"); return; 267 case Iop_SubF64: vex_printf("SubF64"); return; 268 case Iop_MulF64: vex_printf("MulF64"); return; 269 case Iop_DivF64: vex_printf("DivF64"); return; 270 case Iop_AddF64r32: vex_printf("AddF64r32"); return; 271 case Iop_SubF64r32: vex_printf("SubF64r32"); return; 272 case Iop_MulF64r32: vex_printf("MulF64r32"); return; 273 case Iop_DivF64r32: vex_printf("DivF64r32"); return; 274 case Iop_AddF32: vex_printf("AddF32"); return; 275 case Iop_SubF32: vex_printf("SubF32"); return; 276 case Iop_MulF32: vex_printf("MulF32"); return; 277 case Iop_DivF32: vex_printf("DivF32"); return; 278 279 /* 128 bit floating point */ 280 case Iop_AddF128: vex_printf("AddF128"); return; 281 case Iop_SubF128: vex_printf("SubF128"); return; 282 case Iop_MulF128: vex_printf("MulF128"); return; 283 case Iop_DivF128: vex_printf("DivF128"); return; 284 285 case Iop_TruncF128toI64S: vex_printf("TruncF128toI64S"); return; 286 case Iop_TruncF128toI32S: vex_printf("TruncF128toI32S"); return; 287 case Iop_TruncF128toI64U: vex_printf("TruncF128toI64U"); return; 288 case Iop_TruncF128toI32U: vex_printf("TruncF128toI32U"); return; 289 290 case Iop_MAddF128: vex_printf("MAddF128"); return; 291 case Iop_MSubF128: vex_printf("MSubF128"); return; 292 case Iop_NegMAddF128: vex_printf("NegMAddF128"); return; 293 case Iop_NegMSubF128: vex_printf("NegMSubF128"); return; 294 295 case Iop_AbsF128: vex_printf("AbsF128"); return; 296 case Iop_NegF128: vex_printf("NegF128"); return; 297 case Iop_SqrtF128: vex_printf("SqrtF128"); return; 298 case Iop_CmpF128: vex_printf("CmpF128"); return; 299 300 case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return; 301 case Iop_F128HItoF64: vex_printf("F128HItoF64"); return; 302 case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return; 303 case Iop_I32StoF128: vex_printf("I32StoF128"); return; 304 case Iop_I64StoF128: vex_printf("I64StoF128"); return; 305 case Iop_I32UtoF128: vex_printf("I32UtoF128"); return; 306 case Iop_I64UtoF128: vex_printf("I64UtoF128"); return; 307 case Iop_F128toI32S: vex_printf("F128toI32S"); return; 308 case Iop_F128toI64S: vex_printf("F128toI64S"); return; 309 case Iop_F128toI32U: vex_printf("F128toI32U"); return; 310 case Iop_F128toI64U: vex_printf("F128toI64U"); return; 311 case Iop_F32toF128: vex_printf("F32toF128"); return; 312 case Iop_F64toF128: vex_printf("F64toF128"); return; 313 case Iop_F128toF64: vex_printf("F128toF64"); return; 314 case Iop_F128toF32: vex_printf("F128toF32"); return; 315 case Iop_F128toI128S: vex_printf("F128toI128"); return; 316 case Iop_RndF128: vex_printf("RndF128"); return; 317 318 /* s390 specific */ 319 case Iop_MAddF32: vex_printf("s390_MAddF32"); return; 320 case Iop_MSubF32: vex_printf("s390_MSubF32"); return; 321 322 case Iop_ScaleF64: vex_printf("ScaleF64"); return; 323 case Iop_AtanF64: vex_printf("AtanF64"); return; 324 case Iop_Yl2xF64: vex_printf("Yl2xF64"); return; 325 case Iop_Yl2xp1F64: vex_printf("Yl2xp1F64"); return; 326 case Iop_PRemF64: vex_printf("PRemF64"); return; 327 case Iop_PRemC3210F64: vex_printf("PRemC3210F64"); return; 328 case Iop_PRem1F64: vex_printf("PRem1F64"); return; 329 case Iop_PRem1C3210F64: vex_printf("PRem1C3210F64"); return; 330 case Iop_NegF64: vex_printf("NegF64"); return; 331 case Iop_AbsF64: vex_printf("AbsF64"); return; 332 case Iop_NegF32: vex_printf("NegF32"); return; 333 case Iop_AbsF32: vex_printf("AbsF32"); return; 334 case Iop_SqrtF64: vex_printf("SqrtF64"); return; 335 case Iop_SqrtF32: vex_printf("SqrtF32"); return; 336 case Iop_SinF64: vex_printf("SinF64"); return; 337 case Iop_CosF64: vex_printf("CosF64"); return; 338 case Iop_TanF64: vex_printf("TanF64"); return; 339 case Iop_2xm1F64: vex_printf("2xm1F64"); return; 340 341 case Iop_MAddF64: vex_printf("MAddF64"); return; 342 case Iop_MSubF64: vex_printf("MSubF64"); return; 343 case Iop_MAddF64r32: vex_printf("MAddF64r32"); return; 344 case Iop_MSubF64r32: vex_printf("MSubF64r32"); return; 345 346 case Iop_RSqrtEst5GoodF64: vex_printf("RSqrtEst5GoodF64"); return; 347 case Iop_RoundF64toF64_NEAREST: vex_printf("RoundF64toF64_NEAREST"); return; 348 case Iop_RoundF64toF64_NegINF: vex_printf("RoundF64toF64_NegINF"); return; 349 case Iop_RoundF64toF64_PosINF: vex_printf("RoundF64toF64_PosINF"); return; 350 case Iop_RoundF64toF64_ZERO: vex_printf("RoundF64toF64_ZERO"); return; 351 352 case Iop_TruncF64asF32: vex_printf("TruncF64asF32"); return; 353 354 case Iop_RecpExpF64: vex_printf("RecpExpF64"); return; 355 case Iop_RecpExpF32: vex_printf("RecpExpF32"); return; 356 357 case Iop_MaxNumF64: vex_printf("MaxNumF64"); return; 358 case Iop_MinNumF64: vex_printf("MinNumF64"); return; 359 case Iop_MaxNumF32: vex_printf("MaxNumF32"); return; 360 case Iop_MinNumF32: vex_printf("MinNumF32"); return; 361 362 case Iop_F16toF64: vex_printf("F16toF64"); return; 363 case Iop_F64toF16: vex_printf("F64toF16"); return; 364 case Iop_F16toF32: vex_printf("F16toF32"); return; 365 case Iop_F32toF16: vex_printf("F32toF16"); return; 366 367 case Iop_QAdd32S: vex_printf("QAdd32S"); return; 368 case Iop_QSub32S: vex_printf("QSub32S"); return; 369 case Iop_Add16x2: vex_printf("Add16x2"); return; 370 case Iop_Sub16x2: vex_printf("Sub16x2"); return; 371 case Iop_QAdd16Sx2: vex_printf("QAdd16Sx2"); return; 372 case Iop_QAdd16Ux2: vex_printf("QAdd16Ux2"); return; 373 case Iop_QSub16Sx2: vex_printf("QSub16Sx2"); return; 374 case Iop_QSub16Ux2: vex_printf("QSub16Ux2"); return; 375 case Iop_HAdd16Ux2: vex_printf("HAdd16Ux2"); return; 376 case Iop_HAdd16Sx2: vex_printf("HAdd16Sx2"); return; 377 case Iop_HSub16Ux2: vex_printf("HSub16Ux2"); return; 378 case Iop_HSub16Sx2: vex_printf("HSub16Sx2"); return; 379 380 case Iop_Add8x4: vex_printf("Add8x4"); return; 381 case Iop_Sub8x4: vex_printf("Sub8x4"); return; 382 case Iop_QAdd8Sx4: vex_printf("QAdd8Sx4"); return; 383 case Iop_QAdd8Ux4: vex_printf("QAdd8Ux4"); return; 384 case Iop_QSub8Sx4: vex_printf("QSub8Sx4"); return; 385 case Iop_QSub8Ux4: vex_printf("QSub8Ux4"); return; 386 case Iop_HAdd8Ux4: vex_printf("HAdd8Ux4"); return; 387 case Iop_HAdd8Sx4: vex_printf("HAdd8Sx4"); return; 388 case Iop_HSub8Ux4: vex_printf("HSub8Ux4"); return; 389 case Iop_HSub8Sx4: vex_printf("HSub8Sx4"); return; 390 case Iop_Sad8Ux4: vex_printf("Sad8Ux4"); return; 391 392 case Iop_CmpNEZ16x2: vex_printf("CmpNEZ16x2"); return; 393 case Iop_CmpNEZ8x4: vex_printf("CmpNEZ8x4"); return; 394 395 case Iop_CmpF64: vex_printf("CmpF64"); return; 396 397 case Iop_F64toI16S: vex_printf("F64toI16S"); return; 398 case Iop_F64toI32S: vex_printf("F64toI32S"); return; 399 case Iop_F64toI64S: vex_printf("F64toI64S"); return; 400 case Iop_F64toI64U: vex_printf("F64toI64U"); return; 401 case Iop_F32toI32U: vex_printf("F32toI32U"); return; 402 case Iop_F32toI64U: vex_printf("F32toI64U"); return; 403 404 case Iop_F64toI32U: vex_printf("F64toI32U"); return; 405 406 case Iop_I32StoF64: vex_printf("I32StoF64"); return; 407 case Iop_I64StoF64: vex_printf("I64StoF64"); return; 408 case Iop_I64UtoF64: vex_printf("I64UtoF64"); return; 409 case Iop_I32UtoF32: vex_printf("I32UtoF32"); return; 410 case Iop_I64UtoF32: vex_printf("I64UtoF32"); return; 411 412 case Iop_I32UtoF64: vex_printf("I32UtoF64"); return; 413 414 case Iop_F32toF64: vex_printf("F32toF64"); return; 415 case Iop_F64toF32: vex_printf("F64toF32"); return; 416 417 case Iop_RoundF128toInt: vex_printf("RoundF128toInt"); return; 418 case Iop_RoundF64toInt: vex_printf("RoundF64toInt"); return; 419 case Iop_RoundF32toInt: vex_printf("RoundF32toInt"); return; 420 case Iop_RoundF64toF32: vex_printf("RoundF64toF32"); return; 421 422 case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return; 423 case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return; 424 case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return; 425 case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return; 426 427 case Iop_I32UtoFx4: vex_printf("I32UtoFx4"); return; 428 case Iop_I32StoFx4: vex_printf("I32StoFx4"); return; 429 430 case Iop_F32toF16x4: vex_printf("F32toF16x4"); return; 431 case Iop_F16toF32x4: vex_printf("F16toF32x4"); return; 432 case Iop_F16toF64x2: vex_printf("F16toF64x2"); return; 433 case Iop_F64toF16x2: vex_printf("F64toF16x2"); return; 434 435 case Iop_RSqrtEst32Fx4: vex_printf("RSqrtEst32Fx4"); return; 436 case Iop_RSqrtEst32Ux4: vex_printf("RSqrtEst32Ux4"); return; 437 case Iop_RSqrtEst32Fx2: vex_printf("RSqrtEst32Fx2"); return; 438 case Iop_RSqrtEst32Ux2: vex_printf("RSqrtEst32Ux2"); return; 439 440 case Iop_QFtoI32Ux4_RZ: vex_printf("QFtoI32Ux4_RZ"); return; 441 case Iop_QFtoI32Sx4_RZ: vex_printf("QFtoI32Sx4_RZ"); return; 442 443 case Iop_FtoI32Ux4_RZ: vex_printf("FtoI32Ux4_RZ"); return; 444 case Iop_FtoI32Sx4_RZ: vex_printf("FtoI32Sx4_RZ"); return; 445 446 case Iop_I32UtoFx2: vex_printf("I32UtoFx2"); return; 447 case Iop_I32StoFx2: vex_printf("I32StoFx2"); return; 448 449 case Iop_FtoI32Ux2_RZ: vex_printf("FtoI32Ux2_RZ"); return; 450 case Iop_FtoI32Sx2_RZ: vex_printf("FtoI32Sx2_RZ"); return; 451 452 case Iop_RoundF32x4_RM: vex_printf("RoundF32x4_RM"); return; 453 case Iop_RoundF32x4_RP: vex_printf("RoundF32x4_RP"); return; 454 case Iop_RoundF32x4_RN: vex_printf("RoundF32x4_RN"); return; 455 case Iop_RoundF32x4_RZ: vex_printf("RoundF32x4_RZ"); return; 456 457 case Iop_Abs8x8: vex_printf("Abs8x8"); return; 458 case Iop_Abs16x4: vex_printf("Abs16x4"); return; 459 case Iop_Abs32x2: vex_printf("Abs32x2"); return; 460 case Iop_Add8x8: vex_printf("Add8x8"); return; 461 case Iop_Add16x4: vex_printf("Add16x4"); return; 462 case Iop_Add32x2: vex_printf("Add32x2"); return; 463 case Iop_QAdd8Ux8: vex_printf("QAdd8Ux8"); return; 464 case Iop_QAdd16Ux4: vex_printf("QAdd16Ux4"); return; 465 case Iop_QAdd32Ux2: vex_printf("QAdd32Ux2"); return; 466 case Iop_QAdd64Ux1: vex_printf("QAdd64Ux1"); return; 467 case Iop_QAdd8Sx8: vex_printf("QAdd8Sx8"); return; 468 case Iop_QAdd16Sx4: vex_printf("QAdd16Sx4"); return; 469 case Iop_QAdd32Sx2: vex_printf("QAdd32Sx2"); return; 470 case Iop_QAdd64Sx1: vex_printf("QAdd64Sx1"); return; 471 case Iop_PwAdd8x8: vex_printf("PwAdd8x8"); return; 472 case Iop_PwAdd16x4: vex_printf("PwAdd16x4"); return; 473 case Iop_PwAdd32x2: vex_printf("PwAdd32x2"); return; 474 case Iop_PwAdd32Fx2: vex_printf("PwAdd32Fx2"); return; 475 case Iop_PwAddL8Ux8: vex_printf("PwAddL8Ux8"); return; 476 case Iop_PwAddL16Ux4: vex_printf("PwAddL16Ux4"); return; 477 case Iop_PwAddL32Ux2: vex_printf("PwAddL32Ux2"); return; 478 case Iop_PwAddL8Sx8: vex_printf("PwAddL8Sx8"); return; 479 case Iop_PwAddL16Sx4: vex_printf("PwAddL16Sx4"); return; 480 case Iop_PwAddL32Sx2: vex_printf("PwAddL32Sx2"); return; 481 case Iop_Sub8x8: vex_printf("Sub8x8"); return; 482 case Iop_Sub16x4: vex_printf("Sub16x4"); return; 483 case Iop_Sub32x2: vex_printf("Sub32x2"); return; 484 case Iop_QSub8Ux8: vex_printf("QSub8Ux8"); return; 485 case Iop_QSub16Ux4: vex_printf("QSub16Ux4"); return; 486 case Iop_QSub32Ux2: vex_printf("QSub32Ux2"); return; 487 case Iop_QSub64Ux1: vex_printf("QSub64Ux1"); return; 488 case Iop_QSub8Sx8: vex_printf("QSub8Sx8"); return; 489 case Iop_QSub16Sx4: vex_printf("QSub16Sx4"); return; 490 case Iop_QSub32Sx2: vex_printf("QSub32Sx2"); return; 491 case Iop_QSub64Sx1: vex_printf("QSub64Sx1"); return; 492 case Iop_Mul8x8: vex_printf("Mul8x8"); return; 493 case Iop_Mul16x4: vex_printf("Mul16x4"); return; 494 case Iop_Mul32x2: vex_printf("Mul32x2"); return; 495 case Iop_Mul32Fx2: vex_printf("Mul32Fx2"); return; 496 case Iop_PolynomialMul8x8: vex_printf("PolynomialMul8x8"); return; 497 case Iop_MulHi16Ux4: vex_printf("MulHi16Ux4"); return; 498 case Iop_MulHi16Sx4: vex_printf("MulHi16Sx4"); return; 499 case Iop_QDMulHi16Sx4: vex_printf("QDMulHi16Sx4"); return; 500 case Iop_QDMulHi32Sx2: vex_printf("QDMulHi32Sx2"); return; 501 case Iop_QRDMulHi16Sx4: vex_printf("QRDMulHi16Sx4"); return; 502 case Iop_QRDMulHi32Sx2: vex_printf("QRDMulHi32Sx2"); return; 503 case Iop_QDMull16Sx4: vex_printf("QDMull16Sx4"); return; 504 case Iop_QDMull32Sx2: vex_printf("QDMull32Sx2"); return; 505 case Iop_Avg8Ux8: vex_printf("Avg8Ux8"); return; 506 case Iop_Avg16Ux4: vex_printf("Avg16Ux4"); return; 507 case Iop_Max8Sx8: vex_printf("Max8Sx8"); return; 508 case Iop_Max16Sx4: vex_printf("Max16Sx4"); return; 509 case Iop_Max32Sx2: vex_printf("Max32Sx2"); return; 510 case Iop_Max8Ux8: vex_printf("Max8Ux8"); return; 511 case Iop_Max16Ux4: vex_printf("Max16Ux4"); return; 512 case Iop_Max32Ux2: vex_printf("Max32Ux2"); return; 513 case Iop_Min8Sx8: vex_printf("Min8Sx8"); return; 514 case Iop_Min16Sx4: vex_printf("Min16Sx4"); return; 515 case Iop_Min32Sx2: vex_printf("Min32Sx2"); return; 516 case Iop_Min8Ux8: vex_printf("Min8Ux8"); return; 517 case Iop_Min16Ux4: vex_printf("Min16Ux4"); return; 518 case Iop_Min32Ux2: vex_printf("Min32Ux2"); return; 519 case Iop_PwMax8Sx8: vex_printf("PwMax8Sx8"); return; 520 case Iop_PwMax16Sx4: vex_printf("PwMax16Sx4"); return; 521 case Iop_PwMax32Sx2: vex_printf("PwMax32Sx2"); return; 522 case Iop_PwMax8Ux8: vex_printf("PwMax8Ux8"); return; 523 case Iop_PwMax16Ux4: vex_printf("PwMax16Ux4"); return; 524 case Iop_PwMax32Ux2: vex_printf("PwMax32Ux2"); return; 525 case Iop_PwMin8Sx8: vex_printf("PwMin8Sx8"); return; 526 case Iop_PwMin16Sx4: vex_printf("PwMin16Sx4"); return; 527 case Iop_PwMin32Sx2: vex_printf("PwMin32Sx2"); return; 528 case Iop_PwMin8Ux8: vex_printf("PwMin8Ux8"); return; 529 case Iop_PwMin16Ux4: vex_printf("PwMin16Ux4"); return; 530 case Iop_PwMin32Ux2: vex_printf("PwMin32Ux2"); return; 531 case Iop_CmpEQ8x8: vex_printf("CmpEQ8x8"); return; 532 case Iop_CmpEQ16x4: vex_printf("CmpEQ16x4"); return; 533 case Iop_CmpEQ32x2: vex_printf("CmpEQ32x2"); return; 534 case Iop_CmpGT8Ux8: vex_printf("CmpGT8Ux8"); return; 535 case Iop_CmpGT16Ux4: vex_printf("CmpGT16Ux4"); return; 536 case Iop_CmpGT32Ux2: vex_printf("CmpGT32Ux2"); return; 537 case Iop_CmpGT8Sx8: vex_printf("CmpGT8Sx8"); return; 538 case Iop_CmpGT16Sx4: vex_printf("CmpGT16Sx4"); return; 539 case Iop_CmpGT32Sx2: vex_printf("CmpGT32Sx2"); return; 540 case Iop_Cnt8x8: vex_printf("Cnt8x8"); return; 541 case Iop_Clz8x8: vex_printf("Clz8x8"); return; 542 case Iop_Clz16x4: vex_printf("Clz16x4"); return; 543 case Iop_Clz32x2: vex_printf("Clz32x2"); return; 544 case Iop_Cls8x8: vex_printf("Cls8x8"); return; 545 case Iop_Cls16x4: vex_printf("Cls16x4"); return; 546 case Iop_Cls32x2: vex_printf("Cls32x2"); return; 547 case Iop_ShlN8x8: vex_printf("ShlN8x8"); return; 548 case Iop_ShlN16x4: vex_printf("ShlN16x4"); return; 549 case Iop_ShlN32x2: vex_printf("ShlN32x2"); return; 550 case Iop_ShrN8x8: vex_printf("ShrN8x8"); return; 551 case Iop_ShrN16x4: vex_printf("ShrN16x4"); return; 552 case Iop_ShrN32x2: vex_printf("ShrN32x2"); return; 553 case Iop_SarN8x8: vex_printf("SarN8x8"); return; 554 case Iop_SarN16x4: vex_printf("SarN16x4"); return; 555 case Iop_SarN32x2: vex_printf("SarN32x2"); return; 556 case Iop_QNarrowBin16Sto8Ux8: vex_printf("QNarrowBin16Sto8Ux8"); return; 557 case Iop_QNarrowBin16Sto8Sx8: vex_printf("QNarrowBin16Sto8Sx8"); return; 558 case Iop_QNarrowBin32Sto16Sx4: vex_printf("QNarrowBin32Sto16Sx4"); return; 559 case Iop_QNarrowBin64Sto32Sx4: vex_printf("QNarrowBin64Sto32Sx4"); return; 560 case Iop_QNarrowBin64Uto32Ux4: vex_printf("QNarrowBin64Uto32Ux4"); return; 561 case Iop_NarrowBin16to8x8: vex_printf("NarrowBin16to8x8"); return; 562 case Iop_NarrowBin32to16x4: vex_printf("NarrowBin32to16x4"); return; 563 case Iop_NarrowBin64to32x4: vex_printf("NarrowBin64to32x4"); return; 564 case Iop_InterleaveHI8x8: vex_printf("InterleaveHI8x8"); return; 565 case Iop_InterleaveHI16x4: vex_printf("InterleaveHI16x4"); return; 566 case Iop_InterleaveHI32x2: vex_printf("InterleaveHI32x2"); return; 567 case Iop_InterleaveLO8x8: vex_printf("InterleaveLO8x8"); return; 568 case Iop_InterleaveLO16x4: vex_printf("InterleaveLO16x4"); return; 569 case Iop_InterleaveLO32x2: vex_printf("InterleaveLO32x2"); return; 570 case Iop_CatOddLanes8x8: vex_printf("CatOddLanes8x8"); return; 571 case Iop_CatOddLanes16x4: vex_printf("CatOddLanes16x4"); return; 572 case Iop_CatEvenLanes8x8: vex_printf("CatEvenLanes8x8"); return; 573 case Iop_CatEvenLanes16x4: vex_printf("CatEvenLanes16x4"); return; 574 case Iop_InterleaveOddLanes8x8: vex_printf("InterleaveOddLanes8x8"); return; 575 case Iop_InterleaveOddLanes16x4: vex_printf("InterleaveOddLanes16x4"); return; 576 case Iop_InterleaveEvenLanes8x8: vex_printf("InterleaveEvenLanes8x8"); return; 577 case Iop_InterleaveEvenLanes16x4: vex_printf("InterleaveEvenLanes16x4"); return; 578 case Iop_Shl8x8: vex_printf("Shl8x8"); return; 579 case Iop_Shl16x4: vex_printf("Shl16x4"); return; 580 case Iop_Shl32x2: vex_printf("Shl32x2"); return; 581 case Iop_Shr8x8: vex_printf("Shr8x8"); return; 582 case Iop_Shr16x4: vex_printf("Shr16x4"); return; 583 case Iop_Shr32x2: vex_printf("Shr32x2"); return; 584 case Iop_QShl8x8: vex_printf("QShl8x8"); return; 585 case Iop_QShl16x4: vex_printf("QShl16x4"); return; 586 case Iop_QShl32x2: vex_printf("QShl32x2"); return; 587 case Iop_QShl64x1: vex_printf("QShl64x1"); return; 588 case Iop_QSal8x8: vex_printf("QSal8x8"); return; 589 case Iop_QSal16x4: vex_printf("QSal16x4"); return; 590 case Iop_QSal32x2: vex_printf("QSal32x2"); return; 591 case Iop_QSal64x1: vex_printf("QSal64x1"); return; 592 case Iop_QShlNsatUU8x8: vex_printf("QShlNsatUU8x8"); return; 593 case Iop_QShlNsatUU16x4: vex_printf("QShlNsatUU16x4"); return; 594 case Iop_QShlNsatUU32x2: vex_printf("QShlNsatUU32x2"); return; 595 case Iop_QShlNsatUU64x1: vex_printf("QShlNsatUU64x1"); return; 596 case Iop_QShlNsatSU8x8: vex_printf("QShlNsatSU8x8"); return; 597 case Iop_QShlNsatSU16x4: vex_printf("QShlNsatSU16x4"); return; 598 case Iop_QShlNsatSU32x2: vex_printf("QShlNsatSU32x2"); return; 599 case Iop_QShlNsatSU64x1: vex_printf("QShlNsatSU64x1"); return; 600 case Iop_QShlNsatSS8x8: vex_printf("QShlNsatSS8x8"); return; 601 case Iop_QShlNsatSS16x4: vex_printf("QShlNsatSS16x4"); return; 602 case Iop_QShlNsatSS32x2: vex_printf("QShlNsatSS32x2"); return; 603 case Iop_QShlNsatSS64x1: vex_printf("QShlNsatSS64x1"); return; 604 case Iop_Sar8x8: vex_printf("Sar8x8"); return; 605 case Iop_Sar16x4: vex_printf("Sar16x4"); return; 606 case Iop_Sar32x2: vex_printf("Sar32x2"); return; 607 case Iop_Sal8x8: vex_printf("Sal8x8"); return; 608 case Iop_Sal16x4: vex_printf("Sal16x4"); return; 609 case Iop_Sal32x2: vex_printf("Sal32x2"); return; 610 case Iop_Sal64x1: vex_printf("Sal64x1"); return; 611 case Iop_Perm8x8: vex_printf("Perm8x8"); return; 612 case Iop_Reverse8sIn16_x4: vex_printf("Reverse8sIn16_x4"); return; 613 case Iop_Reverse8sIn32_x2: vex_printf("Reverse8sIn32_x2"); return; 614 case Iop_Reverse16sIn32_x2: vex_printf("Reverse16sIn32_x2"); return; 615 case Iop_Reverse8sIn64_x1: vex_printf("Reverse8sIn64_x1"); return; 616 case Iop_Reverse16sIn64_x1: vex_printf("Reverse16sIn64_x1"); return; 617 case Iop_Reverse32sIn64_x1: vex_printf("Reverse32sIn64_x1"); return; 618 case Iop_Abs32Fx2: vex_printf("Abs32Fx2"); return; 619 case Iop_GetMSBs8x8: vex_printf("GetMSBs8x8"); return; 620 case Iop_GetMSBs8x16: vex_printf("GetMSBs8x16"); return; 621 622 case Iop_CmpNEZ32x2: vex_printf("CmpNEZ32x2"); return; 623 case Iop_CmpNEZ16x4: vex_printf("CmpNEZ16x4"); return; 624 case Iop_CmpNEZ8x8: vex_printf("CmpNEZ8x8"); return; 625 626 case Iop_Add32Fx4: vex_printf("Add32Fx4"); return; 627 case Iop_Add32Fx2: vex_printf("Add32Fx2"); return; 628 case Iop_Add32F0x4: vex_printf("Add32F0x4"); return; 629 case Iop_Add64Fx2: vex_printf("Add64Fx2"); return; 630 case Iop_Add64F0x2: vex_printf("Add64F0x2"); return; 631 632 case Iop_Div32Fx4: vex_printf("Div32Fx4"); return; 633 case Iop_Div32F0x4: vex_printf("Div32F0x4"); return; 634 case Iop_Div64Fx2: vex_printf("Div64Fx2"); return; 635 case Iop_Div64F0x2: vex_printf("Div64F0x2"); return; 636 637 case Iop_Max32Fx8: vex_printf("Max32Fx8"); return; 638 case Iop_Max32Fx4: vex_printf("Max32Fx4"); return; 639 case Iop_Max32Fx2: vex_printf("Max32Fx2"); return; 640 case Iop_PwMax32Fx4: vex_printf("PwMax32Fx4"); return; 641 case Iop_PwMax32Fx2: vex_printf("PwMax32Fx2"); return; 642 case Iop_Max32F0x4: vex_printf("Max32F0x4"); return; 643 case Iop_Max64Fx4: vex_printf("Max64Fx4"); return; 644 case Iop_Max64Fx2: vex_printf("Max64Fx2"); return; 645 case Iop_Max64F0x2: vex_printf("Max64F0x2"); return; 646 647 case Iop_Min32Fx8: vex_printf("Min32Fx8"); return; 648 case Iop_Min32Fx4: vex_printf("Min32Fx4"); return; 649 case Iop_Min32Fx2: vex_printf("Min32Fx2"); return; 650 case Iop_PwMin32Fx4: vex_printf("PwMin32Fx4"); return; 651 case Iop_PwMin32Fx2: vex_printf("PwMin32Fx2"); return; 652 case Iop_Min32F0x4: vex_printf("Min32F0x4"); return; 653 case Iop_Min64Fx4: vex_printf("Min64Fx4"); return; 654 case Iop_Min64Fx2: vex_printf("Min64Fx2"); return; 655 case Iop_Min64F0x2: vex_printf("Min64F0x2"); return; 656 657 case Iop_Mul32Fx4: vex_printf("Mul32Fx4"); return; 658 case Iop_Mul32F0x4: vex_printf("Mul32F0x4"); return; 659 case Iop_Mul64Fx2: vex_printf("Mul64Fx2"); return; 660 case Iop_Mul64F0x2: vex_printf("Mul64F0x2"); return; 661 662 case Iop_RecipEst32Ux2: vex_printf("RecipEst32Ux2"); return; 663 case Iop_RecipEst32Fx2: vex_printf("RecipEst32Fx2"); return; 664 case Iop_RecipEst32Fx4: vex_printf("RecipEst32Fx4"); return; 665 case Iop_RecipEst32Fx8: vex_printf("RecipEst32Fx8"); return; 666 case Iop_RecipEst32Ux4: vex_printf("RecipEst32Ux4"); return; 667 case Iop_RecipEst32F0x4: vex_printf("RecipEst32F0x4"); return; 668 case Iop_RecipStep32Fx2: vex_printf("RecipStep32Fx2"); return; 669 case Iop_RecipStep32Fx4: vex_printf("RecipStep32Fx4"); return; 670 case Iop_RecipEst64Fx2: vex_printf("RecipEst64Fx2"); return; 671 case Iop_RecipStep64Fx2: vex_printf("RecipStep64Fx2"); return; 672 673 case Iop_Abs32Fx4: vex_printf("Abs32Fx4"); return; 674 case Iop_Abs64Fx2: vex_printf("Abs64Fx2"); return; 675 case Iop_RSqrtStep32Fx4: vex_printf("RSqrtStep32Fx4"); return; 676 case Iop_RSqrtStep64Fx2: vex_printf("RSqrtStep64Fx2"); return; 677 case Iop_RSqrtStep32Fx2: vex_printf("RSqrtStep32Fx2"); return; 678 case Iop_RSqrtEst64Fx2: vex_printf("RSqrtEst64Fx2"); return; 679 680 case Iop_RSqrtEst32F0x4: vex_printf("RSqrtEst32F0x4"); return; 681 case Iop_RSqrtEst32Fx8: vex_printf("RSqrtEst32Fx8"); return; 682 683 case Iop_Sqrt32Fx4: vex_printf("Sqrt32Fx4"); return; 684 case Iop_Sqrt32F0x4: vex_printf("Sqrt32F0x4"); return; 685 case Iop_Sqrt64Fx2: vex_printf("Sqrt64Fx2"); return; 686 case Iop_Sqrt64F0x2: vex_printf("Sqrt64F0x2"); return; 687 case Iop_Sqrt32Fx8: vex_printf("Sqrt32Fx8"); return; 688 case Iop_Sqrt64Fx4: vex_printf("Sqrt64Fx4"); return; 689 690 case Iop_Sub32Fx4: vex_printf("Sub32Fx4"); return; 691 case Iop_Sub32Fx2: vex_printf("Sub32Fx2"); return; 692 case Iop_Sub32F0x4: vex_printf("Sub32F0x4"); return; 693 case Iop_Sub64Fx2: vex_printf("Sub64Fx2"); return; 694 case Iop_Sub64F0x2: vex_printf("Sub64F0x2"); return; 695 696 case Iop_CmpEQ32Fx4: vex_printf("CmpEQ32Fx4"); return; 697 case Iop_CmpLT32Fx4: vex_printf("CmpLT32Fx4"); return; 698 case Iop_CmpLE32Fx4: vex_printf("CmpLE32Fx4"); return; 699 case Iop_CmpGT32Fx4: vex_printf("CmpGT32Fx4"); return; 700 case Iop_CmpGE32Fx4: vex_printf("CmpGE32Fx4"); return; 701 case Iop_CmpUN32Fx4: vex_printf("CmpUN32Fx4"); return; 702 case Iop_CmpEQ64Fx2: vex_printf("CmpEQ64Fx2"); return; 703 case Iop_CmpLT64Fx2: vex_printf("CmpLT64Fx2"); return; 704 case Iop_CmpLE64Fx2: vex_printf("CmpLE64Fx2"); return; 705 case Iop_CmpUN64Fx2: vex_printf("CmpUN64Fx2"); return; 706 case Iop_CmpGT32Fx2: vex_printf("CmpGT32Fx2"); return; 707 case Iop_CmpEQ32Fx2: vex_printf("CmpEQ32Fx2"); return; 708 case Iop_CmpGE32Fx2: vex_printf("CmpGE32Fx2"); return; 709 710 case Iop_CmpEQ32F0x4: vex_printf("CmpEQ32F0x4"); return; 711 case Iop_CmpLT32F0x4: vex_printf("CmpLT32F0x4"); return; 712 case Iop_CmpLE32F0x4: vex_printf("CmpLE32F0x4"); return; 713 case Iop_CmpUN32F0x4: vex_printf("CmpUN32F0x4"); return; 714 case Iop_CmpEQ64F0x2: vex_printf("CmpEQ64F0x2"); return; 715 case Iop_CmpLT64F0x2: vex_printf("CmpLT64F0x2"); return; 716 case Iop_CmpLE64F0x2: vex_printf("CmpLE64F0x2"); return; 717 case Iop_CmpUN64F0x2: vex_printf("CmpUN64F0x2"); return; 718 719 case Iop_Neg64Fx2: vex_printf("Neg64Fx2"); return; 720 case Iop_Neg32Fx4: vex_printf("Neg32Fx4"); return; 721 case Iop_Neg32Fx2: vex_printf("Neg32Fx2"); return; 722 723 case Iop_V128to64: vex_printf("V128to64"); return; 724 case Iop_V128HIto64: vex_printf("V128HIto64"); return; 725 case Iop_64HLtoV128: vex_printf("64HLtoV128"); return; 726 727 case Iop_64UtoV128: vex_printf("64UtoV128"); return; 728 case Iop_SetV128lo64: vex_printf("SetV128lo64"); return; 729 730 case Iop_ZeroHI64ofV128: vex_printf("ZeroHI64ofV128"); return; 731 case Iop_ZeroHI96ofV128: vex_printf("ZeroHI96ofV128"); return; 732 case Iop_ZeroHI112ofV128: vex_printf("ZeroHI112ofV128"); return; 733 case Iop_ZeroHI120ofV128: vex_printf("ZeroHI120ofV128"); return; 734 735 case Iop_32UtoV128: vex_printf("32UtoV128"); return; 736 case Iop_V128to32: vex_printf("V128to32"); return; 737 case Iop_SetV128lo32: vex_printf("SetV128lo32"); return; 738 739 case Iop_Dup8x16: vex_printf("Dup8x16"); return; 740 case Iop_Dup16x8: vex_printf("Dup16x8"); return; 741 case Iop_Dup32x4: vex_printf("Dup32x4"); return; 742 case Iop_Dup8x8: vex_printf("Dup8x8"); return; 743 case Iop_Dup16x4: vex_printf("Dup16x4"); return; 744 case Iop_Dup32x2: vex_printf("Dup32x2"); return; 745 746 case Iop_NotV128: vex_printf("NotV128"); return; 747 case Iop_AndV128: vex_printf("AndV128"); return; 748 case Iop_OrV128: vex_printf("OrV128"); return; 749 case Iop_XorV128: vex_printf("XorV128"); return; 750 751 case Iop_CmpNEZ8x16: vex_printf("CmpNEZ8x16"); return; 752 case Iop_CmpNEZ16x8: vex_printf("CmpNEZ16x8"); return; 753 case Iop_CmpNEZ32x4: vex_printf("CmpNEZ32x4"); return; 754 case Iop_CmpNEZ64x2: vex_printf("CmpNEZ64x2"); return; 755 756 case Iop_Abs8x16: vex_printf("Abs8x16"); return; 757 case Iop_Abs16x8: vex_printf("Abs16x8"); return; 758 case Iop_Abs32x4: vex_printf("Abs32x4"); return; 759 case Iop_Abs64x2: vex_printf("Abs64x2"); return; 760 761 case Iop_Add8x16: vex_printf("Add8x16"); return; 762 case Iop_Add16x8: vex_printf("Add16x8"); return; 763 case Iop_Add32x4: vex_printf("Add32x4"); return; 764 case Iop_Add64x2: vex_printf("Add64x2"); return; 765 case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return; 766 case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return; 767 case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return; 768 case Iop_QAdd8Sx16: vex_printf("QAdd8Sx16"); return; 769 case Iop_QAdd16Sx8: vex_printf("QAdd16Sx8"); return; 770 case Iop_QAdd32Sx4: vex_printf("QAdd32Sx4"); return; 771 case Iop_QAdd64Ux2: vex_printf("QAdd64Ux2"); return; 772 case Iop_QAdd64Sx2: vex_printf("QAdd64Sx2"); return; 773 774 case Iop_QAddExtUSsatSS8x16: vex_printf("QAddExtUSsatSS8x16"); return; 775 case Iop_QAddExtUSsatSS16x8: vex_printf("QAddExtUSsatSS16x8"); return; 776 case Iop_QAddExtUSsatSS32x4: vex_printf("QAddExtUSsatSS32x4"); return; 777 case Iop_QAddExtUSsatSS64x2: vex_printf("QAddExtUSsatSS64x2"); return; 778 case Iop_QAddExtSUsatUU8x16: vex_printf("QAddExtSUsatUU8x16"); return; 779 case Iop_QAddExtSUsatUU16x8: vex_printf("QAddExtSUsatUU16x8"); return; 780 case Iop_QAddExtSUsatUU32x4: vex_printf("QAddExtSUsatUU32x4"); return; 781 case Iop_QAddExtSUsatUU64x2: vex_printf("QAddExtSUsatUU64x2"); return; 782 783 case Iop_PwAdd8x16: vex_printf("PwAdd8x16"); return; 784 case Iop_PwAdd16x8: vex_printf("PwAdd16x8"); return; 785 case Iop_PwAdd32x4: vex_printf("PwAdd32x4"); return; 786 case Iop_PwAddL8Ux16: vex_printf("PwAddL8Ux16"); return; 787 case Iop_PwAddL16Ux8: vex_printf("PwAddL16Ux8"); return; 788 case Iop_PwAddL32Ux4: vex_printf("PwAddL32Ux4"); return; 789 case Iop_PwAddL8Sx16: vex_printf("PwAddL8Sx16"); return; 790 case Iop_PwAddL16Sx8: vex_printf("PwAddL16Sx8"); return; 791 case Iop_PwAddL32Sx4: vex_printf("PwAddL32Sx4"); return; 792 793 case Iop_Sub8x16: vex_printf("Sub8x16"); return; 794 case Iop_Sub16x8: vex_printf("Sub16x8"); return; 795 case Iop_Sub32x4: vex_printf("Sub32x4"); return; 796 case Iop_Sub64x2: vex_printf("Sub64x2"); return; 797 case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return; 798 case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return; 799 case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return; 800 case Iop_QSub8Sx16: vex_printf("QSub8Sx16"); return; 801 case Iop_QSub16Sx8: vex_printf("QSub16Sx8"); return; 802 case Iop_QSub32Sx4: vex_printf("QSub32Sx4"); return; 803 case Iop_QSub64Ux2: vex_printf("QSub64Ux2"); return; 804 case Iop_QSub64Sx2: vex_printf("QSub64Sx2"); return; 805 806 case Iop_Mul8x16: vex_printf("Mul8x16"); return; 807 case Iop_Mul16x8: vex_printf("Mul16x8"); return; 808 case Iop_Mul32x4: vex_printf("Mul32x4"); return; 809 case Iop_Mull8Ux8: vex_printf("Mull8Ux8"); return; 810 case Iop_Mull8Sx8: vex_printf("Mull8Sx8"); return; 811 case Iop_Mull16Ux4: vex_printf("Mull16Ux4"); return; 812 case Iop_Mull16Sx4: vex_printf("Mull16Sx4"); return; 813 case Iop_Mull32Ux2: vex_printf("Mull32Ux2"); return; 814 case Iop_Mull32Sx2: vex_printf("Mull32Sx2"); return; 815 case Iop_PolynomialMul8x16: vex_printf("PolynomialMul8x16"); return; 816 case Iop_PolynomialMull8x8: vex_printf("PolynomialMull8x8"); return; 817 case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return; 818 case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return; 819 case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return; 820 case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return; 821 case Iop_QDMulHi16Sx8: vex_printf("QDMulHi16Sx8"); return; 822 case Iop_QDMulHi32Sx4: vex_printf("QDMulHi32Sx4"); return; 823 case Iop_QRDMulHi16Sx8: vex_printf("QRDMulHi16Sx8"); return; 824 case Iop_QRDMulHi32Sx4: vex_printf("QRDMulHi32Sx4"); return; 825 826 case Iop_MullEven8Ux16: vex_printf("MullEven8Ux16"); return; 827 case Iop_MullEven16Ux8: vex_printf("MullEven16Ux8"); return; 828 case Iop_MullEven32Ux4: vex_printf("MullEven32Ux4"); return; 829 case Iop_MullEven8Sx16: vex_printf("MullEven8Sx16"); return; 830 case Iop_MullEven16Sx8: vex_printf("MullEven16Sx8"); return; 831 case Iop_MullEven32Sx4: vex_printf("MullEven32Sx4"); return; 832 833 case Iop_PolynomialMulAdd8x16: 834 vex_printf("PolynomialMulAdd8x16"); return; 835 case Iop_PolynomialMulAdd16x8: 836 vex_printf("PolynomialMulAdd16x8"); return; 837 case Iop_PolynomialMulAdd32x4: 838 vex_printf("PolynomialMulAdd32x4"); return; 839 case Iop_PolynomialMulAdd64x2: 840 vex_printf("PolynomialMulAdd64x2"); return; 841 842 case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return; 843 case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return; 844 case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return; 845 case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return; 846 case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return; 847 case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return; 848 849 case Iop_Max8Sx16: vex_printf("Max8Sx16"); return; 850 case Iop_Max16Sx8: vex_printf("Max16Sx8"); return; 851 case Iop_Max32Sx4: vex_printf("Max32Sx4"); return; 852 case Iop_Max64Sx2: vex_printf("Max64Sx2"); return; 853 case Iop_Max8Ux16: vex_printf("Max8Ux16"); return; 854 case Iop_Max16Ux8: vex_printf("Max16Ux8"); return; 855 case Iop_Max32Ux4: vex_printf("Max32Ux4"); return; 856 case Iop_Max64Ux2: vex_printf("Max64Ux2"); return; 857 858 case Iop_Min8Sx16: vex_printf("Min8Sx16"); return; 859 case Iop_Min16Sx8: vex_printf("Min16Sx8"); return; 860 case Iop_Min32Sx4: vex_printf("Min32Sx4"); return; 861 case Iop_Min64Sx2: vex_printf("Min64Sx2"); return; 862 case Iop_Min8Ux16: vex_printf("Min8Ux16"); return; 863 case Iop_Min16Ux8: vex_printf("Min16Ux8"); return; 864 case Iop_Min32Ux4: vex_printf("Min32Ux4"); return; 865 case Iop_Min64Ux2: vex_printf("Min64Ux2"); return; 866 867 case Iop_CmpEQ8x16: vex_printf("CmpEQ8x16"); return; 868 case Iop_CmpEQ16x8: vex_printf("CmpEQ16x8"); return; 869 case Iop_CmpEQ32x4: vex_printf("CmpEQ32x4"); return; 870 case Iop_CmpEQ64x2: vex_printf("CmpEQ64x2"); return; 871 case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return; 872 case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return; 873 case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return; 874 case Iop_CmpGT64Sx2: vex_printf("CmpGT64Sx2"); return; 875 case Iop_CmpGT8Ux16: vex_printf("CmpGT8Ux16"); return; 876 case Iop_CmpGT16Ux8: vex_printf("CmpGT16Ux8"); return; 877 case Iop_CmpGT32Ux4: vex_printf("CmpGT32Ux4"); return; 878 case Iop_CmpGT64Ux2: vex_printf("CmpGT64Ux2"); return; 879 880 case Iop_Cnt8x16: vex_printf("Cnt8x16"); return; 881 case Iop_Clz8x16: vex_printf("Clz8x16"); return; 882 case Iop_Clz16x8: vex_printf("Clz16x8"); return; 883 case Iop_Clz32x4: vex_printf("Clz32x4"); return; 884 case Iop_Clz64x2: vex_printf("Clz64x2"); return; 885 case Iop_Cls8x16: vex_printf("Cls8x16"); return; 886 case Iop_Cls16x8: vex_printf("Cls16x8"); return; 887 case Iop_Cls32x4: vex_printf("Cls32x4"); return; 888 case Iop_Ctz8x16: vex_printf("Iop_Ctz8x16"); return; 889 case Iop_Ctz16x8: vex_printf("Iop_Ctz16x8"); return; 890 case Iop_Ctz32x4: vex_printf("Iop_Ctz32x4"); return; 891 case Iop_Ctz64x2: vex_printf("Iop_Ctz64x2"); return; 892 893 case Iop_ShlV128: vex_printf("ShlV128"); return; 894 case Iop_ShrV128: vex_printf("ShrV128"); return; 895 896 case Iop_ShlN8x16: vex_printf("ShlN8x16"); return; 897 case Iop_ShlN16x8: vex_printf("ShlN16x8"); return; 898 case Iop_ShlN32x4: vex_printf("ShlN32x4"); return; 899 case Iop_ShlN64x2: vex_printf("ShlN64x2"); return; 900 case Iop_ShrN8x16: vex_printf("ShrN8x16"); return; 901 case Iop_ShrN16x8: vex_printf("ShrN16x8"); return; 902 case Iop_ShrN32x4: vex_printf("ShrN32x4"); return; 903 case Iop_ShrN64x2: vex_printf("ShrN64x2"); return; 904 case Iop_SarN8x16: vex_printf("SarN8x16"); return; 905 case Iop_SarN16x8: vex_printf("SarN16x8"); return; 906 case Iop_SarN32x4: vex_printf("SarN32x4"); return; 907 case Iop_SarN64x2: vex_printf("SarN64x2"); return; 908 909 case Iop_Shl8x16: vex_printf("Shl8x16"); return; 910 case Iop_Shl16x8: vex_printf("Shl16x8"); return; 911 case Iop_Shl32x4: vex_printf("Shl32x4"); return; 912 case Iop_Shl64x2: vex_printf("Shl64x2"); return; 913 case Iop_QSal8x16: vex_printf("QSal8x16"); return; 914 case Iop_QSal16x8: vex_printf("QSal16x8"); return; 915 case Iop_QSal32x4: vex_printf("QSal32x4"); return; 916 case Iop_QSal64x2: vex_printf("QSal64x2"); return; 917 case Iop_QShl8x16: vex_printf("QShl8x16"); return; 918 case Iop_QShl16x8: vex_printf("QShl16x8"); return; 919 case Iop_QShl32x4: vex_printf("QShl32x4"); return; 920 case Iop_QShl64x2: vex_printf("QShl64x2"); return; 921 case Iop_QShlNsatSS8x16: vex_printf("QShlNsatSS8x16"); return; 922 case Iop_QShlNsatSS16x8: vex_printf("QShlNsatSS16x8"); return; 923 case Iop_QShlNsatSS32x4: vex_printf("QShlNsatSS32x4"); return; 924 case Iop_QShlNsatSS64x2: vex_printf("QShlNsatSS64x2"); return; 925 case Iop_QShlNsatUU8x16: vex_printf("QShlNsatUU8x16"); return; 926 case Iop_QShlNsatUU16x8: vex_printf("QShlNsatUU16x8"); return; 927 case Iop_QShlNsatUU32x4: vex_printf("QShlNsatUU32x4"); return; 928 case Iop_QShlNsatUU64x2: vex_printf("QShlNsatUU64x2"); return; 929 case Iop_QShlNsatSU8x16: vex_printf("QShlNsatSU8x16"); return; 930 case Iop_QShlNsatSU16x8: vex_printf("QShlNsatSU16x8"); return; 931 case Iop_QShlNsatSU32x4: vex_printf("QShlNsatSU32x4"); return; 932 case Iop_QShlNsatSU64x2: vex_printf("QShlNsatSU64x2"); return; 933 case Iop_Shr8x16: vex_printf("Shr8x16"); return; 934 case Iop_Shr16x8: vex_printf("Shr16x8"); return; 935 case Iop_Shr32x4: vex_printf("Shr32x4"); return; 936 case Iop_Shr64x2: vex_printf("Shr64x2"); return; 937 case Iop_Sar8x16: vex_printf("Sar8x16"); return; 938 case Iop_Sar16x8: vex_printf("Sar16x8"); return; 939 case Iop_Sar32x4: vex_printf("Sar32x4"); return; 940 case Iop_Sar64x2: vex_printf("Sar64x2"); return; 941 case Iop_Sal8x16: vex_printf("Sal8x16"); return; 942 case Iop_Sal16x8: vex_printf("Sal16x8"); return; 943 case Iop_Sal32x4: vex_printf("Sal32x4"); return; 944 case Iop_Sal64x2: vex_printf("Sal64x2"); return; 945 case Iop_Rol8x16: vex_printf("Rol8x16"); return; 946 case Iop_Rol16x8: vex_printf("Rol16x8"); return; 947 case Iop_Rol32x4: vex_printf("Rol32x4"); return; 948 case Iop_Rol64x2: vex_printf("Rol64x2"); return; 949 950 case Iop_QandUQsh8x16: vex_printf("QandUQsh8x16"); return; 951 case Iop_QandUQsh16x8: vex_printf("QandUQsh16x8"); return; 952 case Iop_QandUQsh32x4: vex_printf("QandUQsh32x4"); return; 953 case Iop_QandUQsh64x2: vex_printf("QandUQsh64x2"); return; 954 case Iop_QandSQsh8x16: vex_printf("QandSQsh8x16"); return; 955 case Iop_QandSQsh16x8: vex_printf("QandSQsh16x8"); return; 956 case Iop_QandSQsh32x4: vex_printf("QandSQsh32x4"); return; 957 case Iop_QandSQsh64x2: vex_printf("QandSQsh64x2"); return; 958 case Iop_QandUQRsh8x16: vex_printf("QandUQRsh8x16"); return; 959 case Iop_QandUQRsh16x8: vex_printf("QandUQRsh16x8"); return; 960 case Iop_QandUQRsh32x4: vex_printf("QandUQRsh32x4"); return; 961 case Iop_QandUQRsh64x2: vex_printf("QandUQRsh64x2"); return; 962 case Iop_QandSQRsh8x16: vex_printf("QandSQRsh8x16"); return; 963 case Iop_QandSQRsh16x8: vex_printf("QandSQRsh16x8"); return; 964 case Iop_QandSQRsh32x4: vex_printf("QandSQRsh32x4"); return; 965 case Iop_QandSQRsh64x2: vex_printf("QandSQRsh64x2"); return; 966 967 case Iop_Sh8Sx16: vex_printf("Sh8Sx16"); return; 968 case Iop_Sh16Sx8: vex_printf("Sh16Sx8"); return; 969 case Iop_Sh32Sx4: vex_printf("Sh32Sx4"); return; 970 case Iop_Sh64Sx2: vex_printf("Sh64Sx2"); return; 971 case Iop_Sh8Ux16: vex_printf("Sh8Ux16"); return; 972 case Iop_Sh16Ux8: vex_printf("Sh16Ux8"); return; 973 case Iop_Sh32Ux4: vex_printf("Sh32Ux4"); return; 974 case Iop_Sh64Ux2: vex_printf("Sh64Ux2"); return; 975 case Iop_Rsh8Sx16: vex_printf("Rsh8Sx16"); return; 976 case Iop_Rsh16Sx8: vex_printf("Rsh16Sx8"); return; 977 case Iop_Rsh32Sx4: vex_printf("Rsh32Sx4"); return; 978 case Iop_Rsh64Sx2: vex_printf("Rsh64Sx2"); return; 979 case Iop_Rsh8Ux16: vex_printf("Rsh8Ux16"); return; 980 case Iop_Rsh16Ux8: vex_printf("Rsh16Ux8"); return; 981 case Iop_Rsh32Ux4: vex_printf("Rsh32Ux4"); return; 982 case Iop_Rsh64Ux2: vex_printf("Rsh64Ux2"); return; 983 984 case Iop_QandQShrNnarrow16Uto8Ux8: 985 vex_printf("QandQShrNnarrow16Uto8Ux8"); return; 986 case Iop_QandQShrNnarrow32Uto16Ux4: 987 vex_printf("QandQShrNnarrow32Uto16Ux4"); return; 988 case Iop_QandQShrNnarrow64Uto32Ux2: 989 vex_printf("QandQShrNnarrow64Uto32Ux2"); return; 990 case Iop_QandQSarNnarrow16Sto8Sx8: 991 vex_printf("QandQSarNnarrow16Sto8Sx8"); return; 992 case Iop_QandQSarNnarrow32Sto16Sx4: 993 vex_printf("QandQSarNnarrow32Sto16Sx4"); return; 994 case Iop_QandQSarNnarrow64Sto32Sx2: 995 vex_printf("QandQSarNnarrow64Sto32Sx2"); return; 996 case Iop_QandQSarNnarrow16Sto8Ux8: 997 vex_printf("QandQSarNnarrow16Sto8Ux8"); return; 998 case Iop_QandQSarNnarrow32Sto16Ux4: 999 vex_printf("QandQSarNnarrow32Sto16Ux4"); return; 1000 case Iop_QandQSarNnarrow64Sto32Ux2: 1001 vex_printf("QandQSarNnarrow64Sto32Ux2"); return; 1002 case Iop_QandQRShrNnarrow16Uto8Ux8: 1003 vex_printf("QandQRShrNnarrow16Uto8Ux8"); return; 1004 case Iop_QandQRShrNnarrow32Uto16Ux4: 1005 vex_printf("QandQRShrNnarrow32Uto16Ux4"); return; 1006 case Iop_QandQRShrNnarrow64Uto32Ux2: 1007 vex_printf("QandQRShrNnarrow64Uto32Ux2"); return; 1008 case Iop_QandQRSarNnarrow16Sto8Sx8: 1009 vex_printf("QandQRSarNnarrow16Sto8Sx8"); return; 1010 case Iop_QandQRSarNnarrow32Sto16Sx4: 1011 vex_printf("QandQRSarNnarrow32Sto16Sx4"); return; 1012 case Iop_QandQRSarNnarrow64Sto32Sx2: 1013 vex_printf("QandQRSarNnarrow64Sto32Sx2"); return; 1014 case Iop_QandQRSarNnarrow16Sto8Ux8: 1015 vex_printf("QandQRSarNnarrow16Sto8Ux8"); return; 1016 case Iop_QandQRSarNnarrow32Sto16Ux4: 1017 vex_printf("QandQRSarNnarrow32Sto16Ux4"); return; 1018 case Iop_QandQRSarNnarrow64Sto32Ux2: 1019 vex_printf("QandQRSarNnarrow64Sto32Ux2"); return; 1020 1021 case Iop_NarrowBin16to8x16: vex_printf("NarrowBin16to8x16"); return; 1022 case Iop_NarrowBin32to16x8: vex_printf("NarrowBin32to16x8"); return; 1023 case Iop_QNarrowBin16Uto8Ux16: vex_printf("QNarrowBin16Uto8Ux16"); return; 1024 case Iop_QNarrowBin32Sto16Ux8: vex_printf("QNarrowBin32Sto16Ux8"); return; 1025 case Iop_QNarrowBin16Sto8Ux16: vex_printf("QNarrowBin16Sto8Ux16"); return; 1026 case Iop_QNarrowBin32Uto16Ux8: vex_printf("QNarrowBin32Uto16Ux8"); return; 1027 case Iop_QNarrowBin16Sto8Sx16: vex_printf("QNarrowBin16Sto8Sx16"); return; 1028 case Iop_QNarrowBin32Sto16Sx8: vex_printf("QNarrowBin32Sto16Sx8"); return; 1029 case Iop_NarrowUn16to8x8: vex_printf("NarrowUn16to8x8"); return; 1030 case Iop_NarrowUn32to16x4: vex_printf("NarrowUn32to16x4"); return; 1031 case Iop_NarrowUn64to32x2: vex_printf("NarrowUn64to32x2"); return; 1032 case Iop_QNarrowUn16Uto8Ux8: vex_printf("QNarrowUn16Uto8Ux8"); return; 1033 case Iop_QNarrowUn32Uto16Ux4: vex_printf("QNarrowUn32Uto16Ux4"); return; 1034 case Iop_QNarrowUn64Uto32Ux2: vex_printf("QNarrowUn64Uto32Ux2"); return; 1035 case Iop_QNarrowUn16Sto8Sx8: vex_printf("QNarrowUn16Sto8Sx8"); return; 1036 case Iop_QNarrowUn32Sto16Sx4: vex_printf("QNarrowUn32Sto16Sx4"); return; 1037 case Iop_QNarrowUn64Sto32Sx2: vex_printf("QNarrowUn64Sto32Sx2"); return; 1038 case Iop_QNarrowUn16Sto8Ux8: vex_printf("QNarrowUn16Sto8Ux8"); return; 1039 case Iop_QNarrowUn32Sto16Ux4: vex_printf("QNarrowUn32Sto16Ux4"); return; 1040 case Iop_QNarrowUn64Sto32Ux2: vex_printf("QNarrowUn64Sto32Ux2"); return; 1041 case Iop_Widen8Uto16x8: vex_printf("Widen8Uto16x8"); return; 1042 case Iop_Widen16Uto32x4: vex_printf("Widen16Uto32x4"); return; 1043 case Iop_Widen32Uto64x2: vex_printf("Widen32Uto64x2"); return; 1044 case Iop_Widen8Sto16x8: vex_printf("Widen8Sto16x8"); return; 1045 case Iop_Widen16Sto32x4: vex_printf("Widen16Sto32x4"); return; 1046 case Iop_Widen32Sto64x2: vex_printf("Widen32Sto64x2"); return; 1047 1048 case Iop_InterleaveHI8x16: vex_printf("InterleaveHI8x16"); return; 1049 case Iop_InterleaveHI16x8: vex_printf("InterleaveHI16x8"); return; 1050 case Iop_InterleaveHI32x4: vex_printf("InterleaveHI32x4"); return; 1051 case Iop_InterleaveHI64x2: vex_printf("InterleaveHI64x2"); return; 1052 case Iop_InterleaveLO8x16: vex_printf("InterleaveLO8x16"); return; 1053 case Iop_InterleaveLO16x8: vex_printf("InterleaveLO16x8"); return; 1054 case Iop_InterleaveLO32x4: vex_printf("InterleaveLO32x4"); return; 1055 case Iop_InterleaveLO64x2: vex_printf("InterleaveLO64x2"); return; 1056 1057 case Iop_CatOddLanes8x16: vex_printf("CatOddLanes8x16"); return; 1058 case Iop_CatOddLanes16x8: vex_printf("CatOddLanes16x8"); return; 1059 case Iop_CatOddLanes32x4: vex_printf("CatOddLanes32x4"); return; 1060 case Iop_CatEvenLanes8x16: vex_printf("CatEvenLanes8x16"); return; 1061 case Iop_CatEvenLanes16x8: vex_printf("CatEvenLanes16x8"); return; 1062 case Iop_CatEvenLanes32x4: vex_printf("CatEvenLanes32x4"); return; 1063 1064 case Iop_InterleaveOddLanes8x16: vex_printf("InterleaveOddLanes8x16"); return; 1065 case Iop_InterleaveOddLanes16x8: vex_printf("InterleaveOddLanes16x8"); return; 1066 case Iop_InterleaveOddLanes32x4: vex_printf("InterleaveOddLanes32x4"); return; 1067 case Iop_InterleaveEvenLanes8x16: vex_printf("InterleaveEvenLanes8x16"); return; 1068 case Iop_InterleaveEvenLanes16x8: vex_printf("InterleaveEvenLanes16x8"); return; 1069 case Iop_InterleaveEvenLanes32x4: vex_printf("InterleaveEvenLanes32x4"); return; 1070 1071 case Iop_GetElem8x16: vex_printf("GetElem8x16"); return; 1072 case Iop_GetElem16x8: vex_printf("GetElem16x8"); return; 1073 case Iop_GetElem32x4: vex_printf("GetElem32x4"); return; 1074 case Iop_GetElem64x2: vex_printf("GetElem64x2"); return; 1075 1076 case Iop_GetElem8x8: vex_printf("GetElem8x8"); return; 1077 case Iop_GetElem16x4: vex_printf("GetElem16x4"); return; 1078 case Iop_GetElem32x2: vex_printf("GetElem32x2"); return; 1079 case Iop_SetElem8x8: vex_printf("SetElem8x8"); return; 1080 case Iop_SetElem16x4: vex_printf("SetElem16x4"); return; 1081 case Iop_SetElem32x2: vex_printf("SetElem32x2"); return; 1082 1083 case Iop_Slice64: vex_printf("Slice64"); return; 1084 case Iop_SliceV128: vex_printf("SliceV128"); return; 1085 1086 case Iop_Perm8x16: vex_printf("Perm8x16"); return; 1087 case Iop_Perm32x4: vex_printf("Perm32x4"); return; 1088 case Iop_Reverse8sIn16_x8: vex_printf("Reverse8sIn16_x8"); return; 1089 case Iop_Reverse8sIn32_x4: vex_printf("Reverse8sIn32_x4"); return; 1090 case Iop_Reverse16sIn32_x4: vex_printf("Reverse16sIn32_x4"); return; 1091 case Iop_Reverse8sIn64_x2: vex_printf("Reverse8sIn64_x2"); return; 1092 case Iop_Reverse16sIn64_x2: vex_printf("Reverse16sIn64_x2"); return; 1093 case Iop_Reverse32sIn64_x2: vex_printf("Reverse32sIn64_x2"); return; 1094 case Iop_Reverse1sIn8_x16: vex_printf("Reverse1sIn8_x16"); return; 1095 1096 case Iop_F32ToFixed32Ux4_RZ: vex_printf("F32ToFixed32Ux4_RZ"); return; 1097 case Iop_F32ToFixed32Sx4_RZ: vex_printf("F32ToFixed32Sx4_RZ"); return; 1098 case Iop_Fixed32UToF32x4_RN: vex_printf("Fixed32UToF32x4_RN"); return; 1099 case Iop_Fixed32SToF32x4_RN: vex_printf("Fixed32SToF32x4_RN"); return; 1100 case Iop_F32ToFixed32Ux2_RZ: vex_printf("F32ToFixed32Ux2_RZ"); return; 1101 case Iop_F32ToFixed32Sx2_RZ: vex_printf("F32ToFixed32Sx2_RZ"); return; 1102 case Iop_Fixed32UToF32x2_RN: vex_printf("Fixed32UToF32x2_RN"); return; 1103 case Iop_Fixed32SToF32x2_RN: vex_printf("Fixed32SToF32x2_RN"); return; 1104 1105 case Iop_D32toD64: vex_printf("D32toD64"); return; 1106 case Iop_D64toD32: vex_printf("D64toD32"); return; 1107 case Iop_AddD64: vex_printf("AddD64"); return; 1108 case Iop_SubD64: vex_printf("SubD64"); return; 1109 case Iop_MulD64: vex_printf("MulD64"); return; 1110 case Iop_DivD64: vex_printf("DivD64"); return; 1111 case Iop_ShlD64: vex_printf("ShlD64"); return; 1112 case Iop_ShrD64: vex_printf("ShrD64"); return; 1113 case Iop_D64toI32S: vex_printf("D64toI32S"); return; 1114 case Iop_D64toI32U: vex_printf("D64toI32U"); return; 1115 case Iop_D64toI64S: vex_printf("D64toI64S"); return; 1116 case Iop_D64toI64U: vex_printf("D64toI64U"); return; 1117 case Iop_I32StoD64: vex_printf("I32StoD64"); return; 1118 case Iop_I32UtoD64: vex_printf("I32UtoD64"); return; 1119 case Iop_I64StoD64: vex_printf("I64StoD64"); return; 1120 case Iop_I64UtoD64: vex_printf("I64UtoD64"); return; 1121 case Iop_I32StoD128: vex_printf("I32StoD128"); return; 1122 case Iop_I32UtoD128: vex_printf("I32UtoD128"); return; 1123 case Iop_I64StoD128: vex_printf("I64StoD128"); return; 1124 case Iop_I64UtoD128: vex_printf("I64UtoD128"); return; 1125 case Iop_D64toD128: vex_printf("D64toD128"); return; 1126 case Iop_D128toD64: vex_printf("D128toD64"); return; 1127 case Iop_D128toI32S: vex_printf("D128toI32S"); return; 1128 case Iop_D128toI32U: vex_printf("D128toI32U"); return; 1129 case Iop_D128toI64S: vex_printf("D128toI64S"); return; 1130 case Iop_D128toI64U: vex_printf("D128toI64U"); return; 1131 case Iop_F32toD32: vex_printf("F32toD32"); return; 1132 case Iop_F32toD64: vex_printf("F32toD64"); return; 1133 case Iop_F32toD128: vex_printf("F32toD128"); return; 1134 case Iop_F64toD32: vex_printf("F64toD32"); return; 1135 case Iop_F64toD64: vex_printf("F64toD64"); return; 1136 case Iop_F64toD128: vex_printf("F64toD128"); return; 1137 case Iop_F128toD32: vex_printf("F128toD32"); return; 1138 case Iop_F128toD64: vex_printf("F128toD64"); return; 1139 case Iop_F128toD128: vex_printf("F128toD128"); return; 1140 case Iop_D32toF32: vex_printf("D32toF32"); return; 1141 case Iop_D32toF64: vex_printf("D32toF64"); return; 1142 case Iop_D32toF128: vex_printf("D32toF128"); return; 1143 case Iop_D64toF32: vex_printf("D64toF32"); return; 1144 case Iop_D64toF64: vex_printf("D64toF64"); return; 1145 case Iop_D64toF128: vex_printf("D64toF128"); return; 1146 case Iop_D128toF32: vex_printf("D128toF32"); return; 1147 case Iop_D128toF64: vex_printf("D128toF64"); return; 1148 case Iop_D128toF128: vex_printf("D128toF128"); return; 1149 case Iop_AddD128: vex_printf("AddD128"); return; 1150 case Iop_SubD128: vex_printf("SubD128"); return; 1151 case Iop_MulD128: vex_printf("MulD128"); return; 1152 case Iop_DivD128: vex_printf("DivD128"); return; 1153 case Iop_ShlD128: vex_printf("ShlD128"); return; 1154 case Iop_ShrD128: vex_printf("ShrD128"); return; 1155 case Iop_RoundD64toInt: vex_printf("RoundD64toInt"); return; 1156 case Iop_RoundD128toInt: vex_printf("RoundD128toInt"); return; 1157 case Iop_QuantizeD64: vex_printf("QuantizeD64"); return; 1158 case Iop_QuantizeD128: vex_printf("QuantizeD128"); return; 1159 case Iop_ExtractExpD64: vex_printf("ExtractExpD64"); return; 1160 case Iop_ExtractExpD128: vex_printf("ExtractExpD128"); return; 1161 case Iop_ExtractSigD64: vex_printf("ExtractSigD64"); return; 1162 case Iop_ExtractSigD128: vex_printf("ExtractSigD128"); return; 1163 case Iop_InsertExpD64: vex_printf("InsertExpD64"); return; 1164 case Iop_InsertExpD128: vex_printf("InsertExpD128"); return; 1165 case Iop_CmpD64: vex_printf("CmpD64"); return; 1166 case Iop_CmpD128: vex_printf("CmpD128"); return; 1167 case Iop_CmpExpD64: vex_printf("CmpExpD64"); return; 1168 case Iop_CmpExpD128: vex_printf("CmpExpD128"); return; 1169 case Iop_D64HLtoD128: vex_printf("D64HLtoD128"); return; 1170 case Iop_D128HItoD64: vex_printf("D128HItoD64"); return; 1171 case Iop_D128LOtoD64: vex_printf("D128LOtoD64"); return; 1172 case Iop_SignificanceRoundD64: vex_printf("SignificanceRoundD64"); 1173 return; 1174 case Iop_SignificanceRoundD128: vex_printf("SignificanceRoundD128"); 1175 return; 1176 case Iop_ReinterpI64asD64: vex_printf("ReinterpI64asD64"); return; 1177 case Iop_ReinterpD64asI64: vex_printf("ReinterpD64asI64"); return; 1178 case Iop_V256to64_0: vex_printf("V256to64_0"); return; 1179 case Iop_V256to64_1: vex_printf("V256to64_1"); return; 1180 case Iop_V256to64_2: vex_printf("V256to64_2"); return; 1181 case Iop_V256to64_3: vex_printf("V256to64_3"); return; 1182 case Iop_64x4toV256: vex_printf("64x4toV256"); return; 1183 case Iop_V256toV128_0: vex_printf("V256toV128_0"); return; 1184 case Iop_V256toV128_1: vex_printf("V256toV128_1"); return; 1185 case Iop_V128HLtoV256: vex_printf("V128HLtoV256"); return; 1186 case Iop_DPBtoBCD: vex_printf("DPBtoBCD"); return; 1187 case Iop_BCDtoDPB: vex_printf("BCDtoDPB"); return; 1188 case Iop_Add64Fx4: vex_printf("Add64Fx4"); return; 1189 case Iop_Sub64Fx4: vex_printf("Sub64Fx4"); return; 1190 case Iop_Mul64Fx4: vex_printf("Mul64Fx4"); return; 1191 case Iop_Div64Fx4: vex_printf("Div64Fx4"); return; 1192 case Iop_Add32Fx8: vex_printf("Add32Fx8"); return; 1193 case Iop_Sub32Fx8: vex_printf("Sub32Fx8"); return; 1194 case Iop_Mul32Fx8: vex_printf("Mul32Fx8"); return; 1195 case Iop_Div32Fx8: vex_printf("Div32Fx8"); return; 1196 case Iop_AndV256: vex_printf("AndV256"); return; 1197 case Iop_OrV256: vex_printf("OrV256"); return; 1198 case Iop_XorV256: vex_printf("XorV256"); return; 1199 case Iop_NotV256: vex_printf("NotV256"); return; 1200 case Iop_CmpNEZ64x4: vex_printf("CmpNEZ64x4"); return; 1201 case Iop_CmpNEZ32x8: vex_printf("CmpNEZ32x8"); return; 1202 case Iop_CmpNEZ16x16: vex_printf("CmpNEZ16x16"); return; 1203 case Iop_CmpNEZ8x32: vex_printf("CmpNEZ8x32"); return; 1204 1205 case Iop_Add8x32: vex_printf("Add8x32"); return; 1206 case Iop_Add16x16: vex_printf("Add16x16"); return; 1207 case Iop_Add32x8: vex_printf("Add32x8"); return; 1208 case Iop_Add64x4: vex_printf("Add64x4"); return; 1209 case Iop_Sub8x32: vex_printf("Sub8x32"); return; 1210 case Iop_Sub16x16: vex_printf("Sub16x16"); return; 1211 case Iop_Sub32x8: vex_printf("Sub32x8"); return; 1212 case Iop_Sub64x4: vex_printf("Sub64x4"); return; 1213 case Iop_QAdd8Ux32: vex_printf("QAdd8Ux32"); return; 1214 case Iop_QAdd16Ux16: vex_printf("QAdd16Ux16"); return; 1215 case Iop_QAdd8Sx32: vex_printf("QAdd8Sx32"); return; 1216 case Iop_QAdd16Sx16: vex_printf("QAdd16Sx16"); return; 1217 case Iop_QSub8Ux32: vex_printf("QSub8Ux32"); return; 1218 case Iop_QSub16Ux16: vex_printf("QSub16Ux16"); return; 1219 case Iop_QSub8Sx32: vex_printf("QSub8Sx32"); return; 1220 case Iop_QSub16Sx16: vex_printf("QSub16Sx16"); return; 1221 1222 case Iop_Mul16x16: vex_printf("Mul16x16"); return; 1223 case Iop_Mul32x8: vex_printf("Mul32x8"); return; 1224 case Iop_MulHi16Ux16: vex_printf("MulHi16Ux16"); return; 1225 case Iop_MulHi16Sx16: vex_printf("MulHi16Sx16"); return; 1226 1227 case Iop_Avg8Ux32: vex_printf("Avg8Ux32"); return; 1228 case Iop_Avg16Ux16: vex_printf("Avg16Ux16"); return; 1229 1230 case Iop_Max8Sx32: vex_printf("Max8Sx32"); return; 1231 case Iop_Max16Sx16: vex_printf("Max16Sx16"); return; 1232 case Iop_Max32Sx8: vex_printf("Max32Sx8"); return; 1233 case Iop_Max8Ux32: vex_printf("Max8Ux32"); return; 1234 case Iop_Max16Ux16: vex_printf("Max16Ux16"); return; 1235 case Iop_Max32Ux8: vex_printf("Max32Ux8"); return; 1236 1237 case Iop_Min8Sx32: vex_printf("Min8Sx32"); return; 1238 case Iop_Min16Sx16: vex_printf("Min16Sx16"); return; 1239 case Iop_Min32Sx8: vex_printf("Min32Sx8"); return; 1240 case Iop_Min8Ux32: vex_printf("Min8Ux32"); return; 1241 case Iop_Min16Ux16: vex_printf("Min16Ux16"); return; 1242 case Iop_Min32Ux8: vex_printf("Min32Ux8"); return; 1243 1244 case Iop_CmpEQ8x32: vex_printf("CmpEQ8x32"); return; 1245 case Iop_CmpEQ16x16: vex_printf("CmpEQ16x16"); return; 1246 case Iop_CmpEQ32x8: vex_printf("CmpEQ32x8"); return; 1247 case Iop_CmpEQ64x4: vex_printf("CmpEQ64x4"); return; 1248 case Iop_CmpGT8Sx32: vex_printf("CmpGT8Sx32"); return; 1249 case Iop_CmpGT16Sx16: vex_printf("CmpGT16Sx16"); return; 1250 case Iop_CmpGT32Sx8: vex_printf("CmpGT32Sx8"); return; 1251 case Iop_CmpGT64Sx4: vex_printf("CmpGT64Sx4"); return; 1252 1253 case Iop_ShlN16x16: vex_printf("ShlN16x16"); return; 1254 case Iop_ShlN32x8: vex_printf("ShlN32x8"); return; 1255 case Iop_ShlN64x4: vex_printf("ShlN64x4"); return; 1256 case Iop_ShrN16x16: vex_printf("ShrN16x16"); return; 1257 case Iop_ShrN32x8: vex_printf("ShrN32x8"); return; 1258 case Iop_ShrN64x4: vex_printf("ShrN64x4"); return; 1259 case Iop_SarN16x16: vex_printf("SarN16x16"); return; 1260 case Iop_SarN32x8: vex_printf("SarN32x8"); return; 1261 1262 case Iop_Perm32x8: vex_printf("Perm32x8"); return; 1263 1264 case Iop_CipherV128: vex_printf("CipherV128"); return; 1265 case Iop_CipherLV128: vex_printf("CipherLV128"); return; 1266 case Iop_NCipherV128: vex_printf("NCipherV128"); return; 1267 case Iop_NCipherLV128: vex_printf("NCipherLV128"); return; 1268 case Iop_CipherSV128: vex_printf("CipherSV128"); return; 1269 1270 case Iop_SHA256: vex_printf("SHA256"); return; 1271 case Iop_SHA512: vex_printf("SHA512"); return; 1272 case Iop_BCDAdd: vex_printf("BCDAdd"); return; 1273 case Iop_BCDSub: vex_printf("BCDSub"); return; 1274 case Iop_I128StoBCD128: vex_printf("bcdcfsq."); return; 1275 case Iop_BCD128toI128S: vex_printf("bcdctsq."); return; 1276 1277 case Iop_PwBitMtxXpose64x2: vex_printf("BitMatrixTranspose64x2"); return; 1278 1279 default: vpanic("ppIROp(1)"); 1280 } 1281 1282 vassert(str); 1283 switch (op - base) { 1284 case 0: vex_printf("%s",str); vex_printf("8"); break; 1285 case 1: vex_printf("%s",str); vex_printf("16"); break; 1286 case 2: vex_printf("%s",str); vex_printf("32"); break; 1287 case 3: vex_printf("%s",str); vex_printf("64"); break; 1288 default: vpanic("ppIROp(2)"); 1289 } 1290 } 1291 1292 void ppIRExpr ( const IRExpr* e ) 1293 { 1294 Int i; 1295 switch (e->tag) { 1296 case Iex_Binder: 1297 vex_printf("BIND-%d", e->Iex.Binder.binder); 1298 break; 1299 case Iex_Get: 1300 vex_printf( "GET:" ); 1301 ppIRType(e->Iex.Get.ty); 1302 vex_printf("(%d)", e->Iex.Get.offset); 1303 break; 1304 case Iex_GetI: 1305 vex_printf( "GETI" ); 1306 ppIRRegArray(e->Iex.GetI.descr); 1307 vex_printf("["); 1308 ppIRExpr(e->Iex.GetI.ix); 1309 vex_printf(",%d]", e->Iex.GetI.bias); 1310 break; 1311 case Iex_RdTmp: 1312 ppIRTemp(e->Iex.RdTmp.tmp); 1313 break; 1314 case Iex_Qop: { 1315 const IRQop *qop = e->Iex.Qop.details; 1316 ppIROp(qop->op); 1317 vex_printf( "(" ); 1318 ppIRExpr(qop->arg1); 1319 vex_printf( "," ); 1320 ppIRExpr(qop->arg2); 1321 vex_printf( "," ); 1322 ppIRExpr(qop->arg3); 1323 vex_printf( "," ); 1324 ppIRExpr(qop->arg4); 1325 vex_printf( ")" ); 1326 break; 1327 } 1328 case Iex_Triop: { 1329 const IRTriop *triop = e->Iex.Triop.details; 1330 ppIROp(triop->op); 1331 vex_printf( "(" ); 1332 ppIRExpr(triop->arg1); 1333 vex_printf( "," ); 1334 ppIRExpr(triop->arg2); 1335 vex_printf( "," ); 1336 ppIRExpr(triop->arg3); 1337 vex_printf( ")" ); 1338 break; 1339 } 1340 case Iex_Binop: 1341 ppIROp(e->Iex.Binop.op); 1342 vex_printf( "(" ); 1343 ppIRExpr(e->Iex.Binop.arg1); 1344 vex_printf( "," ); 1345 ppIRExpr(e->Iex.Binop.arg2); 1346 vex_printf( ")" ); 1347 break; 1348 case Iex_Unop: 1349 ppIROp(e->Iex.Unop.op); 1350 vex_printf( "(" ); 1351 ppIRExpr(e->Iex.Unop.arg); 1352 vex_printf( ")" ); 1353 break; 1354 case Iex_Load: 1355 vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" ); 1356 ppIRType(e->Iex.Load.ty); 1357 vex_printf( "(" ); 1358 ppIRExpr(e->Iex.Load.addr); 1359 vex_printf( ")" ); 1360 break; 1361 case Iex_Const: 1362 ppIRConst(e->Iex.Const.con); 1363 break; 1364 case Iex_CCall: 1365 ppIRCallee(e->Iex.CCall.cee); 1366 vex_printf("("); 1367 for (i = 0; e->Iex.CCall.args[i] != NULL; i++) { 1368 IRExpr* arg = e->Iex.CCall.args[i]; 1369 ppIRExpr(arg); 1370 1371 if (e->Iex.CCall.args[i+1] != NULL) { 1372 vex_printf(","); 1373 } 1374 } 1375 vex_printf("):"); 1376 ppIRType(e->Iex.CCall.retty); 1377 break; 1378 case Iex_ITE: 1379 vex_printf("ITE("); 1380 ppIRExpr(e->Iex.ITE.cond); 1381 vex_printf(","); 1382 ppIRExpr(e->Iex.ITE.iftrue); 1383 vex_printf(","); 1384 ppIRExpr(e->Iex.ITE.iffalse); 1385 vex_printf(")"); 1386 break; 1387 case Iex_VECRET: 1388 vex_printf("VECRET"); 1389 break; 1390 case Iex_GSPTR: 1391 vex_printf("GSPTR"); 1392 break; 1393 default: 1394 vpanic("ppIRExpr"); 1395 } 1396 } 1397 1398 void ppIREffect ( IREffect fx ) 1399 { 1400 switch (fx) { 1401 case Ifx_None: vex_printf("noFX"); return; 1402 case Ifx_Read: vex_printf("RdFX"); return; 1403 case Ifx_Write: vex_printf("WrFX"); return; 1404 case Ifx_Modify: vex_printf("MoFX"); return; 1405 default: vpanic("ppIREffect"); 1406 } 1407 } 1408 1409 void ppIRDirty ( const IRDirty* d ) 1410 { 1411 Int i; 1412 if (d->tmp != IRTemp_INVALID) { 1413 ppIRTemp(d->tmp); 1414 vex_printf(" = "); 1415 } 1416 vex_printf("DIRTY "); 1417 ppIRExpr(d->guard); 1418 if (d->mFx != Ifx_None) { 1419 vex_printf(" "); 1420 ppIREffect(d->mFx); 1421 vex_printf("-mem("); 1422 ppIRExpr(d->mAddr); 1423 vex_printf(",%d)", d->mSize); 1424 } 1425 for (i = 0; i < d->nFxState; i++) { 1426 vex_printf(" "); 1427 ppIREffect(d->fxState[i].fx); 1428 vex_printf("-gst(%u,%u", (UInt)d->fxState[i].offset, 1429 (UInt)d->fxState[i].size); 1430 if (d->fxState[i].nRepeats > 0) { 1431 vex_printf(",reps%u,step%u", (UInt)d->fxState[i].nRepeats, 1432 (UInt)d->fxState[i].repeatLen); 1433 } 1434 vex_printf(")"); 1435 } 1436 vex_printf(" ::: "); 1437 ppIRCallee(d->cee); 1438 vex_printf("("); 1439 for (i = 0; d->args[i] != NULL; i++) { 1440 IRExpr* arg = d->args[i]; 1441 ppIRExpr(arg); 1442 1443 if (d->args[i+1] != NULL) { 1444 vex_printf(","); 1445 } 1446 } 1447 vex_printf(")"); 1448 } 1449 1450 void ppIRCAS ( const IRCAS* cas ) 1451 { 1452 /* Print even structurally invalid constructions, as an aid to 1453 debugging. */ 1454 if (cas->oldHi != IRTemp_INVALID) { 1455 ppIRTemp(cas->oldHi); 1456 vex_printf(","); 1457 } 1458 ppIRTemp(cas->oldLo); 1459 vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" ); 1460 ppIRExpr(cas->addr); 1461 vex_printf("::"); 1462 if (cas->expdHi) { 1463 ppIRExpr(cas->expdHi); 1464 vex_printf(","); 1465 } 1466 ppIRExpr(cas->expdLo); 1467 vex_printf("->"); 1468 if (cas->dataHi) { 1469 ppIRExpr(cas->dataHi); 1470 vex_printf(","); 1471 } 1472 ppIRExpr(cas->dataLo); 1473 vex_printf(")"); 1474 } 1475 1476 void ppIRPutI ( const IRPutI* puti ) 1477 { 1478 vex_printf( "PUTI" ); 1479 ppIRRegArray(puti->descr); 1480 vex_printf("["); 1481 ppIRExpr(puti->ix); 1482 vex_printf(",%d] = ", puti->bias); 1483 ppIRExpr(puti->data); 1484 } 1485 1486 void ppIRStoreG ( const IRStoreG* sg ) 1487 { 1488 vex_printf("if ("); 1489 ppIRExpr(sg->guard); 1490 vex_printf(") { ST%s(", sg->end==Iend_LE ? "le" : "be"); 1491 ppIRExpr(sg->addr); 1492 vex_printf(") = "); 1493 ppIRExpr(sg->data); 1494 vex_printf(" }"); 1495 } 1496 1497 void ppIRLoadGOp ( IRLoadGOp cvt ) 1498 { 1499 switch (cvt) { 1500 case ILGop_INVALID: vex_printf("ILGop_INVALID"); break; 1501 case ILGop_IdentV128: vex_printf("IdentV128"); break; 1502 case ILGop_Ident64: vex_printf("Ident64"); break; 1503 case ILGop_Ident32: vex_printf("Ident32"); break; 1504 case ILGop_16Uto32: vex_printf("16Uto32"); break; 1505 case ILGop_16Sto32: vex_printf("16Sto32"); break; 1506 case ILGop_8Uto32: vex_printf("8Uto32"); break; 1507 case ILGop_8Sto32: vex_printf("8Sto32"); break; 1508 default: vpanic("ppIRLoadGOp"); 1509 } 1510 } 1511 1512 void ppIRLoadG ( const IRLoadG* lg ) 1513 { 1514 ppIRTemp(lg->dst); 1515 vex_printf(" = if-strict ("); 1516 ppIRExpr(lg->guard); 1517 vex_printf(") "); 1518 ppIRLoadGOp(lg->cvt); 1519 vex_printf("(LD%s(", lg->end==Iend_LE ? "le" : "be"); 1520 ppIRExpr(lg->addr); 1521 vex_printf(")) else "); 1522 ppIRExpr(lg->alt); 1523 } 1524 1525 void ppIRJumpKind ( IRJumpKind kind ) 1526 { 1527 switch (kind) { 1528 case Ijk_Boring: vex_printf("Boring"); break; 1529 case Ijk_Call: vex_printf("Call"); break; 1530 case Ijk_Ret: vex_printf("Return"); break; 1531 case Ijk_ClientReq: vex_printf("ClientReq"); break; 1532 case Ijk_Yield: vex_printf("Yield"); break; 1533 case Ijk_EmWarn: vex_printf("EmWarn"); break; 1534 case Ijk_EmFail: vex_printf("EmFail"); break; 1535 case Ijk_NoDecode: vex_printf("NoDecode"); break; 1536 case Ijk_MapFail: vex_printf("MapFail"); break; 1537 case Ijk_InvalICache: vex_printf("InvalICache"); break; 1538 case Ijk_FlushDCache: vex_printf("FlushDCache"); break; 1539 case Ijk_NoRedir: vex_printf("NoRedir"); break; 1540 case Ijk_SigILL: vex_printf("SigILL"); break; 1541 case Ijk_SigTRAP: vex_printf("SigTRAP"); break; 1542 case Ijk_SigSEGV: vex_printf("SigSEGV"); break; 1543 case Ijk_SigBUS: vex_printf("SigBUS"); break; 1544 case Ijk_SigFPE_IntDiv: vex_printf("SigFPE_IntDiv"); break; 1545 case Ijk_SigFPE_IntOvf: vex_printf("SigFPE_IntOvf"); break; 1546 case Ijk_Sys_syscall: vex_printf("Sys_syscall"); break; 1547 case Ijk_Sys_int32: vex_printf("Sys_int32"); break; 1548 case Ijk_Sys_int128: vex_printf("Sys_int128"); break; 1549 case Ijk_Sys_int129: vex_printf("Sys_int129"); break; 1550 case Ijk_Sys_int130: vex_printf("Sys_int130"); break; 1551 case Ijk_Sys_int145: vex_printf("Sys_int145"); break; 1552 case Ijk_Sys_int210: vex_printf("Sys_int210"); break; 1553 case Ijk_Sys_sysenter: vex_printf("Sys_sysenter"); break; 1554 default: vpanic("ppIRJumpKind"); 1555 } 1556 } 1557 1558 void ppIRMBusEvent ( IRMBusEvent event ) 1559 { 1560 switch (event) { 1561 case Imbe_Fence: 1562 vex_printf("Fence"); break; 1563 case Imbe_CancelReservation: 1564 vex_printf("CancelReservation"); break; 1565 default: 1566 vpanic("ppIRMBusEvent"); 1567 } 1568 } 1569 1570 void ppIRStmt ( const IRStmt* s ) 1571 { 1572 if (!s) { 1573 vex_printf("!!! IRStmt* which is NULL !!!"); 1574 return; 1575 } 1576 switch (s->tag) { 1577 case Ist_NoOp: 1578 vex_printf("IR-NoOp"); 1579 break; 1580 case Ist_IMark: 1581 vex_printf( "------ IMark(0x%lx, %u, %u) ------", 1582 s->Ist.IMark.addr, s->Ist.IMark.len, 1583 (UInt)s->Ist.IMark.delta); 1584 break; 1585 case Ist_AbiHint: 1586 vex_printf("====== AbiHint("); 1587 ppIRExpr(s->Ist.AbiHint.base); 1588 vex_printf(", %d, ", s->Ist.AbiHint.len); 1589 ppIRExpr(s->Ist.AbiHint.nia); 1590 vex_printf(") ======"); 1591 break; 1592 case Ist_Put: 1593 vex_printf( "PUT(%d) = ", s->Ist.Put.offset); 1594 ppIRExpr(s->Ist.Put.data); 1595 break; 1596 case Ist_PutI: 1597 ppIRPutI(s->Ist.PutI.details); 1598 break; 1599 case Ist_WrTmp: 1600 ppIRTemp(s->Ist.WrTmp.tmp); 1601 vex_printf( " = " ); 1602 ppIRExpr(s->Ist.WrTmp.data); 1603 break; 1604 case Ist_Store: 1605 vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" ); 1606 ppIRExpr(s->Ist.Store.addr); 1607 vex_printf( ") = "); 1608 ppIRExpr(s->Ist.Store.data); 1609 break; 1610 case Ist_StoreG: 1611 ppIRStoreG(s->Ist.StoreG.details); 1612 break; 1613 case Ist_LoadG: 1614 ppIRLoadG(s->Ist.LoadG.details); 1615 break; 1616 case Ist_CAS: 1617 ppIRCAS(s->Ist.CAS.details); 1618 break; 1619 case Ist_LLSC: 1620 if (s->Ist.LLSC.storedata == NULL) { 1621 ppIRTemp(s->Ist.LLSC.result); 1622 vex_printf(" = LD%s-Linked(", 1623 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); 1624 ppIRExpr(s->Ist.LLSC.addr); 1625 vex_printf(")"); 1626 } else { 1627 ppIRTemp(s->Ist.LLSC.result); 1628 vex_printf(" = ( ST%s-Cond(", 1629 s->Ist.LLSC.end==Iend_LE ? "le" : "be"); 1630 ppIRExpr(s->Ist.LLSC.addr); 1631 vex_printf(") = "); 1632 ppIRExpr(s->Ist.LLSC.storedata); 1633 vex_printf(" )"); 1634 } 1635 break; 1636 case Ist_Dirty: 1637 ppIRDirty(s->Ist.Dirty.details); 1638 break; 1639 case Ist_MBE: 1640 vex_printf("IR-"); 1641 ppIRMBusEvent(s->Ist.MBE.event); 1642 break; 1643 case Ist_Exit: 1644 vex_printf( "if (" ); 1645 ppIRExpr(s->Ist.Exit.guard); 1646 vex_printf( ") { PUT(%d) = ", s->Ist.Exit.offsIP); 1647 ppIRConst(s->Ist.Exit.dst); 1648 vex_printf("; exit-"); 1649 ppIRJumpKind(s->Ist.Exit.jk); 1650 vex_printf(" } "); 1651 break; 1652 default: 1653 vpanic("ppIRStmt"); 1654 } 1655 } 1656 1657 void ppIRTypeEnv ( const IRTypeEnv* env ) 1658 { 1659 UInt i; 1660 for (i = 0; i < env->types_used; i++) { 1661 if (i % 8 == 0) 1662 vex_printf( " "); 1663 ppIRTemp(i); 1664 vex_printf( ":"); 1665 ppIRType(env->types[i]); 1666 if (i % 8 == 7) 1667 vex_printf( "\n"); 1668 else 1669 vex_printf( " "); 1670 } 1671 if (env->types_used > 0 && env->types_used % 8 != 7) 1672 vex_printf( "\n"); 1673 } 1674 1675 void ppIRSB ( const IRSB* bb ) 1676 { 1677 Int i; 1678 vex_printf("IRSB {\n"); 1679 ppIRTypeEnv(bb->tyenv); 1680 vex_printf("\n"); 1681 for (i = 0; i < bb->stmts_used; i++) { 1682 vex_printf( " "); 1683 ppIRStmt(bb->stmts[i]); 1684 vex_printf( "\n"); 1685 } 1686 vex_printf( " PUT(%d) = ", bb->offsIP ); 1687 ppIRExpr( bb->next ); 1688 vex_printf( "; exit-"); 1689 ppIRJumpKind(bb->jumpkind); 1690 vex_printf( "\n}\n"); 1691 } 1692 1693 1694 /*---------------------------------------------------------------*/ 1695 /*--- Constructors ---*/ 1696 /*---------------------------------------------------------------*/ 1697 1698 1699 /* Constructors -- IRConst */ 1700 1701 IRConst* IRConst_U1 ( Bool bit ) 1702 { 1703 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1704 c->tag = Ico_U1; 1705 c->Ico.U1 = bit; 1706 /* call me paranoid; I don't care :-) */ 1707 vassert(bit == False || bit == True); 1708 return c; 1709 } 1710 IRConst* IRConst_U8 ( UChar u8 ) 1711 { 1712 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1713 c->tag = Ico_U8; 1714 c->Ico.U8 = u8; 1715 return c; 1716 } 1717 IRConst* IRConst_U16 ( UShort u16 ) 1718 { 1719 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1720 c->tag = Ico_U16; 1721 c->Ico.U16 = u16; 1722 return c; 1723 } 1724 IRConst* IRConst_U32 ( UInt u32 ) 1725 { 1726 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1727 c->tag = Ico_U32; 1728 c->Ico.U32 = u32; 1729 return c; 1730 } 1731 IRConst* IRConst_U64 ( ULong u64 ) 1732 { 1733 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1734 c->tag = Ico_U64; 1735 c->Ico.U64 = u64; 1736 return c; 1737 } 1738 IRConst* IRConst_F32 ( Float f32 ) 1739 { 1740 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1741 c->tag = Ico_F32; 1742 c->Ico.F32 = f32; 1743 return c; 1744 } 1745 IRConst* IRConst_F32i ( UInt f32i ) 1746 { 1747 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1748 c->tag = Ico_F32i; 1749 c->Ico.F32i = f32i; 1750 return c; 1751 } 1752 IRConst* IRConst_F64 ( Double f64 ) 1753 { 1754 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1755 c->tag = Ico_F64; 1756 c->Ico.F64 = f64; 1757 return c; 1758 } 1759 IRConst* IRConst_F64i ( ULong f64i ) 1760 { 1761 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1762 c->tag = Ico_F64i; 1763 c->Ico.F64i = f64i; 1764 return c; 1765 } 1766 IRConst* IRConst_V128 ( UShort con ) 1767 { 1768 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1769 c->tag = Ico_V128; 1770 c->Ico.V128 = con; 1771 return c; 1772 } 1773 IRConst* IRConst_V256 ( UInt con ) 1774 { 1775 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst)); 1776 c->tag = Ico_V256; 1777 c->Ico.V256 = con; 1778 return c; 1779 } 1780 1781 /* Constructors -- IRCallee */ 1782 1783 IRCallee* mkIRCallee ( Int regparms, const HChar* name, void* addr ) 1784 { 1785 IRCallee* ce = LibVEX_Alloc_inline(sizeof(IRCallee)); 1786 ce->regparms = regparms; 1787 ce->name = name; 1788 ce->addr = addr; 1789 ce->mcx_mask = 0; 1790 vassert(regparms >= 0 && regparms <= 3); 1791 vassert(name != NULL); 1792 vassert(addr != 0); 1793 return ce; 1794 } 1795 1796 1797 /* Constructors -- IRRegArray */ 1798 1799 IRRegArray* mkIRRegArray ( Int base, IRType elemTy, Int nElems ) 1800 { 1801 IRRegArray* arr = LibVEX_Alloc_inline(sizeof(IRRegArray)); 1802 arr->base = base; 1803 arr->elemTy = elemTy; 1804 arr->nElems = nElems; 1805 vassert(!(arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */)); 1806 vassert(!(arr->elemTy == Ity_I1)); 1807 vassert(!(arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */)); 1808 return arr; 1809 } 1810 1811 1812 /* Constructors -- IRExpr */ 1813 1814 IRExpr* IRExpr_Binder ( Int binder ) { 1815 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1816 e->tag = Iex_Binder; 1817 e->Iex.Binder.binder = binder; 1818 return e; 1819 } 1820 IRExpr* IRExpr_Get ( Int off, IRType ty ) { 1821 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1822 e->tag = Iex_Get; 1823 e->Iex.Get.offset = off; 1824 e->Iex.Get.ty = ty; 1825 return e; 1826 } 1827 IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias ) { 1828 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1829 e->tag = Iex_GetI; 1830 e->Iex.GetI.descr = descr; 1831 e->Iex.GetI.ix = ix; 1832 e->Iex.GetI.bias = bias; 1833 return e; 1834 } 1835 IRExpr* IRExpr_RdTmp ( IRTemp tmp ) { 1836 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1837 e->tag = Iex_RdTmp; 1838 e->Iex.RdTmp.tmp = tmp; 1839 return e; 1840 } 1841 IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2, 1842 IRExpr* arg3, IRExpr* arg4 ) { 1843 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1844 IRQop* qop = LibVEX_Alloc_inline(sizeof(IRQop)); 1845 qop->op = op; 1846 qop->arg1 = arg1; 1847 qop->arg2 = arg2; 1848 qop->arg3 = arg3; 1849 qop->arg4 = arg4; 1850 e->tag = Iex_Qop; 1851 e->Iex.Qop.details = qop; 1852 return e; 1853 } 1854 IRExpr* IRExpr_Triop ( IROp op, IRExpr* arg1, 1855 IRExpr* arg2, IRExpr* arg3 ) { 1856 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1857 IRTriop* triop = LibVEX_Alloc_inline(sizeof(IRTriop)); 1858 triop->op = op; 1859 triop->arg1 = arg1; 1860 triop->arg2 = arg2; 1861 triop->arg3 = arg3; 1862 e->tag = Iex_Triop; 1863 e->Iex.Triop.details = triop; 1864 return e; 1865 } 1866 IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 ) { 1867 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1868 e->tag = Iex_Binop; 1869 e->Iex.Binop.op = op; 1870 e->Iex.Binop.arg1 = arg1; 1871 e->Iex.Binop.arg2 = arg2; 1872 return e; 1873 } 1874 IRExpr* IRExpr_Unop ( IROp op, IRExpr* arg ) { 1875 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1876 e->tag = Iex_Unop; 1877 e->Iex.Unop.op = op; 1878 e->Iex.Unop.arg = arg; 1879 return e; 1880 } 1881 IRExpr* IRExpr_Load ( IREndness end, IRType ty, IRExpr* addr ) { 1882 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1883 e->tag = Iex_Load; 1884 e->Iex.Load.end = end; 1885 e->Iex.Load.ty = ty; 1886 e->Iex.Load.addr = addr; 1887 vassert(end == Iend_LE || end == Iend_BE); 1888 return e; 1889 } 1890 IRExpr* IRExpr_Const ( IRConst* con ) { 1891 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1892 e->tag = Iex_Const; 1893 e->Iex.Const.con = con; 1894 return e; 1895 } 1896 IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args ) { 1897 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1898 e->tag = Iex_CCall; 1899 e->Iex.CCall.cee = cee; 1900 e->Iex.CCall.retty = retty; 1901 e->Iex.CCall.args = args; 1902 return e; 1903 } 1904 IRExpr* IRExpr_ITE ( IRExpr* cond, IRExpr* iftrue, IRExpr* iffalse ) { 1905 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1906 e->tag = Iex_ITE; 1907 e->Iex.ITE.cond = cond; 1908 e->Iex.ITE.iftrue = iftrue; 1909 e->Iex.ITE.iffalse = iffalse; 1910 return e; 1911 } 1912 IRExpr* IRExpr_VECRET ( void ) { 1913 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1914 e->tag = Iex_VECRET; 1915 return e; 1916 } 1917 IRExpr* IRExpr_GSPTR ( void ) { 1918 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr)); 1919 e->tag = Iex_GSPTR; 1920 return e; 1921 } 1922 1923 1924 /* Constructors for NULL-terminated IRExpr expression vectors, 1925 suitable for use as arg lists in clean/dirty helper calls. */ 1926 1927 IRExpr** mkIRExprVec_0 ( void ) { 1928 IRExpr** vec = LibVEX_Alloc_inline(1 * sizeof(IRExpr*)); 1929 vec[0] = NULL; 1930 return vec; 1931 } 1932 IRExpr** mkIRExprVec_1 ( IRExpr* arg1 ) { 1933 IRExpr** vec = LibVEX_Alloc_inline(2 * sizeof(IRExpr*)); 1934 vec[0] = arg1; 1935 vec[1] = NULL; 1936 return vec; 1937 } 1938 IRExpr** mkIRExprVec_2 ( IRExpr* arg1, IRExpr* arg2 ) { 1939 IRExpr** vec = LibVEX_Alloc_inline(3 * sizeof(IRExpr*)); 1940 vec[0] = arg1; 1941 vec[1] = arg2; 1942 vec[2] = NULL; 1943 return vec; 1944 } 1945 IRExpr** mkIRExprVec_3 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3 ) { 1946 IRExpr** vec = LibVEX_Alloc_inline(4 * sizeof(IRExpr*)); 1947 vec[0] = arg1; 1948 vec[1] = arg2; 1949 vec[2] = arg3; 1950 vec[3] = NULL; 1951 return vec; 1952 } 1953 IRExpr** mkIRExprVec_4 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1954 IRExpr* arg4 ) { 1955 IRExpr** vec = LibVEX_Alloc_inline(5 * sizeof(IRExpr*)); 1956 vec[0] = arg1; 1957 vec[1] = arg2; 1958 vec[2] = arg3; 1959 vec[3] = arg4; 1960 vec[4] = NULL; 1961 return vec; 1962 } 1963 IRExpr** mkIRExprVec_5 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1964 IRExpr* arg4, IRExpr* arg5 ) { 1965 IRExpr** vec = LibVEX_Alloc_inline(6 * sizeof(IRExpr*)); 1966 vec[0] = arg1; 1967 vec[1] = arg2; 1968 vec[2] = arg3; 1969 vec[3] = arg4; 1970 vec[4] = arg5; 1971 vec[5] = NULL; 1972 return vec; 1973 } 1974 IRExpr** mkIRExprVec_6 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1975 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6 ) { 1976 IRExpr** vec = LibVEX_Alloc_inline(7 * sizeof(IRExpr*)); 1977 vec[0] = arg1; 1978 vec[1] = arg2; 1979 vec[2] = arg3; 1980 vec[3] = arg4; 1981 vec[4] = arg5; 1982 vec[5] = arg6; 1983 vec[6] = NULL; 1984 return vec; 1985 } 1986 IRExpr** mkIRExprVec_7 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 1987 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6, 1988 IRExpr* arg7 ) { 1989 IRExpr** vec = LibVEX_Alloc_inline(8 * sizeof(IRExpr*)); 1990 vec[0] = arg1; 1991 vec[1] = arg2; 1992 vec[2] = arg3; 1993 vec[3] = arg4; 1994 vec[4] = arg5; 1995 vec[5] = arg6; 1996 vec[6] = arg7; 1997 vec[7] = NULL; 1998 return vec; 1999 } 2000 IRExpr** mkIRExprVec_8 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 2001 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6, 2002 IRExpr* arg7, IRExpr* arg8 ) { 2003 IRExpr** vec = LibVEX_Alloc_inline(9 * sizeof(IRExpr*)); 2004 vec[0] = arg1; 2005 vec[1] = arg2; 2006 vec[2] = arg3; 2007 vec[3] = arg4; 2008 vec[4] = arg5; 2009 vec[5] = arg6; 2010 vec[6] = arg7; 2011 vec[7] = arg8; 2012 vec[8] = NULL; 2013 return vec; 2014 } 2015 IRExpr** mkIRExprVec_9 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 2016 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6, 2017 IRExpr* arg7, IRExpr* arg8, IRExpr* arg9 ) { 2018 IRExpr** vec = LibVEX_Alloc_inline(10 * sizeof(IRExpr*)); 2019 vec[0] = arg1; 2020 vec[1] = arg2; 2021 vec[2] = arg3; 2022 vec[3] = arg4; 2023 vec[4] = arg5; 2024 vec[5] = arg6; 2025 vec[6] = arg7; 2026 vec[7] = arg8; 2027 vec[8] = arg9; 2028 vec[9] = NULL; 2029 return vec; 2030 } 2031 IRExpr** mkIRExprVec_13 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3, 2032 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6, 2033 IRExpr* arg7, IRExpr* arg8, IRExpr* arg9, 2034 IRExpr* arg10, IRExpr* arg11, IRExpr* arg12, 2035 IRExpr* arg13 2036 ) { 2037 IRExpr** vec = LibVEX_Alloc_inline(14 * sizeof(IRExpr*)); 2038 vec[0] = arg1; 2039 vec[1] = arg2; 2040 vec[2] = arg3; 2041 vec[3] = arg4; 2042 vec[4] = arg5; 2043 vec[5] = arg6; 2044 vec[6] = arg7; 2045 vec[7] = arg8; 2046 vec[8] = arg9; 2047 vec[9] = arg10; 2048 vec[10] = arg11; 2049 vec[11] = arg12; 2050 vec[12] = arg13; 2051 vec[13] = NULL; 2052 return vec; 2053 } 2054 2055 2056 /* Constructors -- IRDirty */ 2057 2058 IRDirty* emptyIRDirty ( void ) { 2059 IRDirty* d = LibVEX_Alloc_inline(sizeof(IRDirty)); 2060 d->cee = NULL; 2061 d->guard = NULL; 2062 d->args = NULL; 2063 d->tmp = IRTemp_INVALID; 2064 d->mFx = Ifx_None; 2065 d->mAddr = NULL; 2066 d->mSize = 0; 2067 d->nFxState = 0; 2068 return d; 2069 } 2070 2071 2072 /* Constructors -- IRCAS */ 2073 2074 IRCAS* mkIRCAS ( IRTemp oldHi, IRTemp oldLo, 2075 IREndness end, IRExpr* addr, 2076 IRExpr* expdHi, IRExpr* expdLo, 2077 IRExpr* dataHi, IRExpr* dataLo ) { 2078 IRCAS* cas = LibVEX_Alloc_inline(sizeof(IRCAS)); 2079 cas->oldHi = oldHi; 2080 cas->oldLo = oldLo; 2081 cas->end = end; 2082 cas->addr = addr; 2083 cas->expdHi = expdHi; 2084 cas->expdLo = expdLo; 2085 cas->dataHi = dataHi; 2086 cas->dataLo = dataLo; 2087 return cas; 2088 } 2089 2090 2091 /* Constructors -- IRPutI */ 2092 2093 IRPutI* mkIRPutI ( IRRegArray* descr, IRExpr* ix, 2094 Int bias, IRExpr* data ) 2095 { 2096 IRPutI* puti = LibVEX_Alloc_inline(sizeof(IRPutI)); 2097 puti->descr = descr; 2098 puti->ix = ix; 2099 puti->bias = bias; 2100 puti->data = data; 2101 return puti; 2102 } 2103 2104 2105 /* Constructors -- IRStoreG and IRLoadG */ 2106 2107 IRStoreG* mkIRStoreG ( IREndness end, 2108 IRExpr* addr, IRExpr* data, IRExpr* guard ) 2109 { 2110 IRStoreG* sg = LibVEX_Alloc_inline(sizeof(IRStoreG)); 2111 sg->end = end; 2112 sg->addr = addr; 2113 sg->data = data; 2114 sg->guard = guard; 2115 return sg; 2116 } 2117 2118 IRLoadG* mkIRLoadG ( IREndness end, IRLoadGOp cvt, 2119 IRTemp dst, IRExpr* addr, IRExpr* alt, IRExpr* guard ) 2120 { 2121 IRLoadG* lg = LibVEX_Alloc_inline(sizeof(IRLoadG)); 2122 lg->end = end; 2123 lg->cvt = cvt; 2124 lg->dst = dst; 2125 lg->addr = addr; 2126 lg->alt = alt; 2127 lg->guard = guard; 2128 return lg; 2129 } 2130 2131 2132 /* Constructors -- IRStmt */ 2133 2134 IRStmt* IRStmt_NoOp ( void ) 2135 { 2136 /* Just use a single static closure. */ 2137 static IRStmt static_closure; 2138 static_closure.tag = Ist_NoOp; 2139 return &static_closure; 2140 } 2141 IRStmt* IRStmt_IMark ( Addr addr, UInt len, UChar delta ) { 2142 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2143 s->tag = Ist_IMark; 2144 s->Ist.IMark.addr = addr; 2145 s->Ist.IMark.len = len; 2146 s->Ist.IMark.delta = delta; 2147 return s; 2148 } 2149 IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ) { 2150 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2151 s->tag = Ist_AbiHint; 2152 s->Ist.AbiHint.base = base; 2153 s->Ist.AbiHint.len = len; 2154 s->Ist.AbiHint.nia = nia; 2155 return s; 2156 } 2157 IRStmt* IRStmt_Put ( Int off, IRExpr* data ) { 2158 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2159 s->tag = Ist_Put; 2160 s->Ist.Put.offset = off; 2161 s->Ist.Put.data = data; 2162 return s; 2163 } 2164 IRStmt* IRStmt_PutI ( IRPutI* details ) { 2165 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2166 s->tag = Ist_PutI; 2167 s->Ist.PutI.details = details; 2168 return s; 2169 } 2170 IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data ) { 2171 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2172 s->tag = Ist_WrTmp; 2173 s->Ist.WrTmp.tmp = tmp; 2174 s->Ist.WrTmp.data = data; 2175 return s; 2176 } 2177 IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data ) { 2178 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2179 s->tag = Ist_Store; 2180 s->Ist.Store.end = end; 2181 s->Ist.Store.addr = addr; 2182 s->Ist.Store.data = data; 2183 vassert(end == Iend_LE || end == Iend_BE); 2184 return s; 2185 } 2186 IRStmt* IRStmt_StoreG ( IREndness end, IRExpr* addr, IRExpr* data, 2187 IRExpr* guard ) { 2188 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2189 s->tag = Ist_StoreG; 2190 s->Ist.StoreG.details = mkIRStoreG(end, addr, data, guard); 2191 vassert(end == Iend_LE || end == Iend_BE); 2192 return s; 2193 } 2194 IRStmt* IRStmt_LoadG ( IREndness end, IRLoadGOp cvt, IRTemp dst, 2195 IRExpr* addr, IRExpr* alt, IRExpr* guard ) { 2196 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2197 s->tag = Ist_LoadG; 2198 s->Ist.LoadG.details = mkIRLoadG(end, cvt, dst, addr, alt, guard); 2199 return s; 2200 } 2201 IRStmt* IRStmt_CAS ( IRCAS* cas ) { 2202 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2203 s->tag = Ist_CAS; 2204 s->Ist.CAS.details = cas; 2205 return s; 2206 } 2207 IRStmt* IRStmt_LLSC ( IREndness end, 2208 IRTemp result, IRExpr* addr, IRExpr* storedata ) { 2209 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2210 s->tag = Ist_LLSC; 2211 s->Ist.LLSC.end = end; 2212 s->Ist.LLSC.result = result; 2213 s->Ist.LLSC.addr = addr; 2214 s->Ist.LLSC.storedata = storedata; 2215 return s; 2216 } 2217 IRStmt* IRStmt_Dirty ( IRDirty* d ) 2218 { 2219 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2220 s->tag = Ist_Dirty; 2221 s->Ist.Dirty.details = d; 2222 return s; 2223 } 2224 IRStmt* IRStmt_MBE ( IRMBusEvent event ) 2225 { 2226 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2227 s->tag = Ist_MBE; 2228 s->Ist.MBE.event = event; 2229 return s; 2230 } 2231 IRStmt* IRStmt_Exit ( IRExpr* guard, IRJumpKind jk, IRConst* dst, 2232 Int offsIP ) { 2233 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt)); 2234 s->tag = Ist_Exit; 2235 s->Ist.Exit.guard = guard; 2236 s->Ist.Exit.jk = jk; 2237 s->Ist.Exit.dst = dst; 2238 s->Ist.Exit.offsIP = offsIP; 2239 return s; 2240 } 2241 2242 2243 /* Constructors -- IRTypeEnv */ 2244 2245 IRTypeEnv* emptyIRTypeEnv ( void ) 2246 { 2247 IRTypeEnv* env = LibVEX_Alloc_inline(sizeof(IRTypeEnv)); 2248 env->types = LibVEX_Alloc_inline(8 * sizeof(IRType)); 2249 env->types_size = 8; 2250 env->types_used = 0; 2251 return env; 2252 } 2253 2254 2255 /* Constructors -- IRSB */ 2256 2257 IRSB* emptyIRSB ( void ) 2258 { 2259 IRSB* bb = LibVEX_Alloc_inline(sizeof(IRSB)); 2260 bb->tyenv = emptyIRTypeEnv(); 2261 bb->stmts_used = 0; 2262 bb->stmts_size = 8; 2263 bb->stmts = LibVEX_Alloc_inline(bb->stmts_size * sizeof(IRStmt*)); 2264 bb->next = NULL; 2265 bb->jumpkind = Ijk_Boring; 2266 bb->offsIP = 0; 2267 return bb; 2268 } 2269 2270 2271 /*---------------------------------------------------------------*/ 2272 /*--- (Deep) copy constructors. These make complete copies ---*/ 2273 /*--- the original, which can be modified without affecting ---*/ 2274 /*--- the original. ---*/ 2275 /*---------------------------------------------------------------*/ 2276 2277 /* Copying IR Expr vectors (for call args). */ 2278 2279 /* Shallow copy of an IRExpr vector */ 2280 2281 IRExpr** shallowCopyIRExprVec ( IRExpr** vec ) 2282 { 2283 Int i; 2284 IRExpr** newvec; 2285 for (i = 0; vec[i]; i++) 2286 ; 2287 newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*)); 2288 for (i = 0; vec[i]; i++) 2289 newvec[i] = vec[i]; 2290 newvec[i] = NULL; 2291 return newvec; 2292 } 2293 2294 /* Deep copy of an IRExpr vector */ 2295 2296 IRExpr** deepCopyIRExprVec ( IRExpr *const * vec ) 2297 { 2298 Int i; 2299 IRExpr** newvec; 2300 for (i = 0; vec[i]; i++) 2301 ; 2302 newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*)); 2303 for (i = 0; vec[i]; i++) 2304 newvec[i] = deepCopyIRExpr(vec[i]); 2305 newvec[i] = NULL; 2306 return newvec; 2307 } 2308 2309 /* Deep copy constructors for all heap-allocated IR types follow. */ 2310 2311 IRConst* deepCopyIRConst ( const IRConst* c ) 2312 { 2313 switch (c->tag) { 2314 case Ico_U1: return IRConst_U1(c->Ico.U1); 2315 case Ico_U8: return IRConst_U8(c->Ico.U8); 2316 case Ico_U16: return IRConst_U16(c->Ico.U16); 2317 case Ico_U32: return IRConst_U32(c->Ico.U32); 2318 case Ico_U64: return IRConst_U64(c->Ico.U64); 2319 case Ico_F32: return IRConst_F32(c->Ico.F32); 2320 case Ico_F32i: return IRConst_F32i(c->Ico.F32i); 2321 case Ico_F64: return IRConst_F64(c->Ico.F64); 2322 case Ico_F64i: return IRConst_F64i(c->Ico.F64i); 2323 case Ico_V128: return IRConst_V128(c->Ico.V128); 2324 case Ico_V256: return IRConst_V256(c->Ico.V256); 2325 default: vpanic("deepCopyIRConst"); 2326 } 2327 } 2328 2329 IRCallee* deepCopyIRCallee ( const IRCallee* ce ) 2330 { 2331 IRCallee* ce2 = mkIRCallee(ce->regparms, ce->name, ce->addr); 2332 ce2->mcx_mask = ce->mcx_mask; 2333 return ce2; 2334 } 2335 2336 IRRegArray* deepCopyIRRegArray ( const IRRegArray* d ) 2337 { 2338 return mkIRRegArray(d->base, d->elemTy, d->nElems); 2339 } 2340 2341 IRExpr* deepCopyIRExpr ( const IRExpr* e ) 2342 { 2343 switch (e->tag) { 2344 case Iex_Get: 2345 return IRExpr_Get(e->Iex.Get.offset, e->Iex.Get.ty); 2346 case Iex_GetI: 2347 return IRExpr_GetI(deepCopyIRRegArray(e->Iex.GetI.descr), 2348 deepCopyIRExpr(e->Iex.GetI.ix), 2349 e->Iex.GetI.bias); 2350 case Iex_RdTmp: 2351 return IRExpr_RdTmp(e->Iex.RdTmp.tmp); 2352 case Iex_Qop: { 2353 const IRQop* qop = e->Iex.Qop.details; 2354 2355 return IRExpr_Qop(qop->op, 2356 deepCopyIRExpr(qop->arg1), 2357 deepCopyIRExpr(qop->arg2), 2358 deepCopyIRExpr(qop->arg3), 2359 deepCopyIRExpr(qop->arg4)); 2360 } 2361 case Iex_Triop: { 2362 const IRTriop *triop = e->Iex.Triop.details; 2363 2364 return IRExpr_Triop(triop->op, 2365 deepCopyIRExpr(triop->arg1), 2366 deepCopyIRExpr(triop->arg2), 2367 deepCopyIRExpr(triop->arg3)); 2368 } 2369 case Iex_Binop: 2370 return IRExpr_Binop(e->Iex.Binop.op, 2371 deepCopyIRExpr(e->Iex.Binop.arg1), 2372 deepCopyIRExpr(e->Iex.Binop.arg2)); 2373 case Iex_Unop: 2374 return IRExpr_Unop(e->Iex.Unop.op, 2375 deepCopyIRExpr(e->Iex.Unop.arg)); 2376 case Iex_Load: 2377 return IRExpr_Load(e->Iex.Load.end, 2378 e->Iex.Load.ty, 2379 deepCopyIRExpr(e->Iex.Load.addr)); 2380 case Iex_Const: 2381 return IRExpr_Const(deepCopyIRConst(e->Iex.Const.con)); 2382 case Iex_CCall: 2383 return IRExpr_CCall(deepCopyIRCallee(e->Iex.CCall.cee), 2384 e->Iex.CCall.retty, 2385 deepCopyIRExprVec(e->Iex.CCall.args)); 2386 2387 case Iex_ITE: 2388 return IRExpr_ITE(deepCopyIRExpr(e->Iex.ITE.cond), 2389 deepCopyIRExpr(e->Iex.ITE.iftrue), 2390 deepCopyIRExpr(e->Iex.ITE.iffalse)); 2391 case Iex_VECRET: 2392 return IRExpr_VECRET(); 2393 2394 case Iex_GSPTR: 2395 return IRExpr_GSPTR(); 2396 2397 case Iex_Binder: 2398 return IRExpr_Binder(e->Iex.Binder.binder); 2399 2400 default: 2401 vpanic("deepCopyIRExpr"); 2402 } 2403 } 2404 2405 IRDirty* deepCopyIRDirty ( const IRDirty* d ) 2406 { 2407 Int i; 2408 IRDirty* d2 = emptyIRDirty(); 2409 d2->cee = deepCopyIRCallee(d->cee); 2410 d2->guard = deepCopyIRExpr(d->guard); 2411 d2->args = deepCopyIRExprVec(d->args); 2412 d2->tmp = d->tmp; 2413 d2->mFx = d->mFx; 2414 d2->mAddr = d->mAddr==NULL ? NULL : deepCopyIRExpr(d->mAddr); 2415 d2->mSize = d->mSize; 2416 d2->nFxState = d->nFxState; 2417 for (i = 0; i < d2->nFxState; i++) 2418 d2->fxState[i] = d->fxState[i]; 2419 return d2; 2420 } 2421 2422 IRCAS* deepCopyIRCAS ( const IRCAS* cas ) 2423 { 2424 return mkIRCAS( cas->oldHi, cas->oldLo, cas->end, 2425 deepCopyIRExpr(cas->addr), 2426 cas->expdHi==NULL ? NULL : deepCopyIRExpr(cas->expdHi), 2427 deepCopyIRExpr(cas->expdLo), 2428 cas->dataHi==NULL ? NULL : deepCopyIRExpr(cas->dataHi), 2429 deepCopyIRExpr(cas->dataLo) ); 2430 } 2431 2432 IRPutI* deepCopyIRPutI ( const IRPutI * puti ) 2433 { 2434 return mkIRPutI( deepCopyIRRegArray(puti->descr), 2435 deepCopyIRExpr(puti->ix), 2436 puti->bias, 2437 deepCopyIRExpr(puti->data)); 2438 } 2439 2440 IRStmt* deepCopyIRStmt ( const IRStmt* s ) 2441 { 2442 switch (s->tag) { 2443 case Ist_NoOp: 2444 return IRStmt_NoOp(); 2445 case Ist_AbiHint: 2446 return IRStmt_AbiHint(deepCopyIRExpr(s->Ist.AbiHint.base), 2447 s->Ist.AbiHint.len, 2448 deepCopyIRExpr(s->Ist.AbiHint.nia)); 2449 case Ist_IMark: 2450 return IRStmt_IMark(s->Ist.IMark.addr, 2451 s->Ist.IMark.len, 2452 s->Ist.IMark.delta); 2453 case Ist_Put: 2454 return IRStmt_Put(s->Ist.Put.offset, 2455 deepCopyIRExpr(s->Ist.Put.data)); 2456 case Ist_PutI: 2457 return IRStmt_PutI(deepCopyIRPutI(s->Ist.PutI.details)); 2458 case Ist_WrTmp: 2459 return IRStmt_WrTmp(s->Ist.WrTmp.tmp, 2460 deepCopyIRExpr(s->Ist.WrTmp.data)); 2461 case Ist_Store: 2462 return IRStmt_Store(s->Ist.Store.end, 2463 deepCopyIRExpr(s->Ist.Store.addr), 2464 deepCopyIRExpr(s->Ist.Store.data)); 2465 case Ist_StoreG: { 2466 const IRStoreG* sg = s->Ist.StoreG.details; 2467 return IRStmt_StoreG(sg->end, 2468 deepCopyIRExpr(sg->addr), 2469 deepCopyIRExpr(sg->data), 2470 deepCopyIRExpr(sg->guard)); 2471 } 2472 case Ist_LoadG: { 2473 const IRLoadG* lg = s->Ist.LoadG.details; 2474 return IRStmt_LoadG(lg->end, lg->cvt, lg->dst, 2475 deepCopyIRExpr(lg->addr), 2476 deepCopyIRExpr(lg->alt), 2477 deepCopyIRExpr(lg->guard)); 2478 } 2479 case Ist_CAS: 2480 return IRStmt_CAS(deepCopyIRCAS(s->Ist.CAS.details)); 2481 case Ist_LLSC: 2482 return IRStmt_LLSC(s->Ist.LLSC.end, 2483 s->Ist.LLSC.result, 2484 deepCopyIRExpr(s->Ist.LLSC.addr), 2485 s->Ist.LLSC.storedata 2486 ? deepCopyIRExpr(s->Ist.LLSC.storedata) 2487 : NULL); 2488 case Ist_Dirty: 2489 return IRStmt_Dirty(deepCopyIRDirty(s->Ist.Dirty.details)); 2490 case Ist_MBE: 2491 return IRStmt_MBE(s->Ist.MBE.event); 2492 case Ist_Exit: 2493 return IRStmt_Exit(deepCopyIRExpr(s->Ist.Exit.guard), 2494 s->Ist.Exit.jk, 2495 deepCopyIRConst(s->Ist.Exit.dst), 2496 s->Ist.Exit.offsIP); 2497 default: 2498 vpanic("deepCopyIRStmt"); 2499 } 2500 } 2501 2502 IRTypeEnv* deepCopyIRTypeEnv ( const IRTypeEnv* src ) 2503 { 2504 Int i; 2505 IRTypeEnv* dst = LibVEX_Alloc_inline(sizeof(IRTypeEnv)); 2506 dst->types_size = src->types_size; 2507 dst->types_used = src->types_used; 2508 dst->types = LibVEX_Alloc_inline(dst->types_size * sizeof(IRType)); 2509 for (i = 0; i < src->types_used; i++) 2510 dst->types[i] = src->types[i]; 2511 return dst; 2512 } 2513 2514 IRSB* deepCopyIRSB ( const IRSB* bb ) 2515 { 2516 Int i; 2517 IRStmt** sts2; 2518 IRSB* bb2 = deepCopyIRSBExceptStmts(bb); 2519 bb2->stmts_used = bb2->stmts_size = bb->stmts_used; 2520 sts2 = LibVEX_Alloc_inline(bb2->stmts_used * sizeof(IRStmt*)); 2521 for (i = 0; i < bb2->stmts_used; i++) 2522 sts2[i] = deepCopyIRStmt(bb->stmts[i]); 2523 bb2->stmts = sts2; 2524 return bb2; 2525 } 2526 2527 IRSB* deepCopyIRSBExceptStmts ( const IRSB* bb ) 2528 { 2529 IRSB* bb2 = emptyIRSB(); 2530 bb2->tyenv = deepCopyIRTypeEnv(bb->tyenv); 2531 bb2->next = deepCopyIRExpr(bb->next); 2532 bb2->jumpkind = bb->jumpkind; 2533 bb2->offsIP = bb->offsIP; 2534 return bb2; 2535 } 2536 2537 2538 /*---------------------------------------------------------------*/ 2539 /*--- Primop types ---*/ 2540 /*---------------------------------------------------------------*/ 2541 2542 void typeOfPrimop ( IROp op, 2543 /*OUTs*/ 2544 IRType* t_dst, 2545 IRType* t_arg1, IRType* t_arg2, 2546 IRType* t_arg3, IRType* t_arg4 ) 2547 { 2548 # define UNARY(_ta1,_td) \ 2549 *t_dst = (_td); *t_arg1 = (_ta1); break 2550 # define BINARY(_ta1,_ta2,_td) \ 2551 *t_dst = (_td); *t_arg1 = (_ta1); *t_arg2 = (_ta2); break 2552 # define TERNARY(_ta1,_ta2,_ta3,_td) \ 2553 *t_dst = (_td); *t_arg1 = (_ta1); \ 2554 *t_arg2 = (_ta2); *t_arg3 = (_ta3); break 2555 # define QUATERNARY(_ta1,_ta2,_ta3,_ta4,_td) \ 2556 *t_dst = (_td); *t_arg1 = (_ta1); \ 2557 *t_arg2 = (_ta2); *t_arg3 = (_ta3); \ 2558 *t_arg4 = (_ta4); break 2559 # define COMPARISON(_ta) \ 2560 *t_dst = Ity_I1; *t_arg1 = *t_arg2 = (_ta); break; 2561 # define UNARY_COMPARISON(_ta) \ 2562 *t_dst = Ity_I1; *t_arg1 = (_ta); break; 2563 2564 /* Rounding mode values are always Ity_I32, encoded as per 2565 IRRoundingMode */ 2566 const IRType ity_RMode = Ity_I32; 2567 2568 *t_dst = Ity_INVALID; 2569 *t_arg1 = Ity_INVALID; 2570 *t_arg2 = Ity_INVALID; 2571 *t_arg3 = Ity_INVALID; 2572 *t_arg4 = Ity_INVALID; 2573 switch (op) { 2574 case Iop_Add8: case Iop_Sub8: case Iop_Mul8: 2575 case Iop_Or8: case Iop_And8: case Iop_Xor8: 2576 BINARY(Ity_I8,Ity_I8, Ity_I8); 2577 2578 case Iop_Add16: case Iop_Sub16: case Iop_Mul16: 2579 case Iop_Or16: case Iop_And16: case Iop_Xor16: 2580 BINARY(Ity_I16,Ity_I16, Ity_I16); 2581 2582 case Iop_CmpORD32U: 2583 case Iop_CmpORD32S: 2584 case Iop_Add32: case Iop_Sub32: case Iop_Mul32: 2585 case Iop_Or32: case Iop_And32: case Iop_Xor32: 2586 case Iop_Max32U: 2587 case Iop_QAdd32S: case Iop_QSub32S: 2588 case Iop_Add16x2: case Iop_Sub16x2: 2589 case Iop_QAdd16Sx2: case Iop_QAdd16Ux2: 2590 case Iop_QSub16Sx2: case Iop_QSub16Ux2: 2591 case Iop_HAdd16Ux2: case Iop_HAdd16Sx2: 2592 case Iop_HSub16Ux2: case Iop_HSub16Sx2: 2593 case Iop_Add8x4: case Iop_Sub8x4: 2594 case Iop_QAdd8Sx4: case Iop_QAdd8Ux4: 2595 case Iop_QSub8Sx4: case Iop_QSub8Ux4: 2596 case Iop_HAdd8Ux4: case Iop_HAdd8Sx4: 2597 case Iop_HSub8Ux4: case Iop_HSub8Sx4: 2598 case Iop_Sad8Ux4: 2599 BINARY(Ity_I32,Ity_I32, Ity_I32); 2600 2601 case Iop_Add64: case Iop_Sub64: case Iop_Mul64: 2602 case Iop_Or64: case Iop_And64: case Iop_Xor64: 2603 case Iop_CmpORD64U: 2604 case Iop_CmpORD64S: 2605 case Iop_Avg8Ux8: case Iop_Avg16Ux4: 2606 case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2: 2607 case Iop_Add32Fx2: case Iop_Sub32Fx2: 2608 case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2: 2609 case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2: 2610 case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2: 2611 case Iop_CmpGT32Fx2: case Iop_CmpEQ32Fx2: case Iop_CmpGE32Fx2: 2612 case Iop_InterleaveHI8x8: case Iop_InterleaveLO8x8: 2613 case Iop_InterleaveHI16x4: case Iop_InterleaveLO16x4: 2614 case Iop_InterleaveHI32x2: case Iop_InterleaveLO32x2: 2615 case Iop_CatOddLanes8x8: case Iop_CatEvenLanes8x8: 2616 case Iop_CatOddLanes16x4: case Iop_CatEvenLanes16x4: 2617 case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8: 2618 case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4: 2619 case Iop_Perm8x8: 2620 case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2: 2621 case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2: 2622 case Iop_Max32Fx2: case Iop_Min32Fx2: 2623 case Iop_PwMax32Fx2: case Iop_PwMin32Fx2: 2624 case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2: 2625 case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2: 2626 case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2: 2627 case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2: 2628 case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2: 2629 case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2: 2630 case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2: 2631 case Iop_Mul32Fx2: 2632 case Iop_PolynomialMul8x8: 2633 case Iop_MulHi16Sx4: case Iop_MulHi16Ux4: 2634 case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2: 2635 case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2: 2636 case Iop_QAdd8Sx8: case Iop_QAdd16Sx4: 2637 case Iop_QAdd32Sx2: case Iop_QAdd64Sx1: 2638 case Iop_QAdd8Ux8: case Iop_QAdd16Ux4: 2639 case Iop_QAdd32Ux2: case Iop_QAdd64Ux1: 2640 case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2: 2641 case Iop_PwAdd32Fx2: 2642 case Iop_QNarrowBin32Sto16Sx4: 2643 case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin16Sto8Ux8: 2644 case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4: 2645 case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2: 2646 case Iop_QSub8Sx8: case Iop_QSub16Sx4: 2647 case Iop_QSub32Sx2: case Iop_QSub64Sx1: 2648 case Iop_QSub8Ux8: case Iop_QSub16Ux4: 2649 case Iop_QSub32Ux2: case Iop_QSub64Ux1: 2650 case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2: 2651 case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2: 2652 case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2: 2653 case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1: 2654 case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1: 2655 case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1: 2656 case Iop_RecipStep32Fx2: 2657 case Iop_RSqrtStep32Fx2: 2658 BINARY(Ity_I64,Ity_I64, Ity_I64); 2659 2660 case Iop_ShlN32x2: case Iop_ShlN16x4: case Iop_ShlN8x8: 2661 case Iop_ShrN32x2: case Iop_ShrN16x4: case Iop_ShrN8x8: 2662 case Iop_SarN32x2: case Iop_SarN16x4: case Iop_SarN8x8: 2663 case Iop_QShlNsatUU8x8: case Iop_QShlNsatUU16x4: 2664 case Iop_QShlNsatUU32x2: case Iop_QShlNsatUU64x1: 2665 case Iop_QShlNsatSU8x8: case Iop_QShlNsatSU16x4: 2666 case Iop_QShlNsatSU32x2: case Iop_QShlNsatSU64x1: 2667 case Iop_QShlNsatSS8x8: case Iop_QShlNsatSS16x4: 2668 case Iop_QShlNsatSS32x2: case Iop_QShlNsatSS64x1: 2669 BINARY(Ity_I64,Ity_I8, Ity_I64); 2670 2671 case Iop_Shl8: case Iop_Shr8: case Iop_Sar8: 2672 BINARY(Ity_I8,Ity_I8, Ity_I8); 2673 case Iop_Shl16: case Iop_Shr16: case Iop_Sar16: 2674 BINARY(Ity_I16,Ity_I8, Ity_I16); 2675 case Iop_Shl32: case Iop_Shr32: case Iop_Sar32: 2676 BINARY(Ity_I32,Ity_I8, Ity_I32); 2677 case Iop_Shl64: case Iop_Shr64: case Iop_Sar64: 2678 BINARY(Ity_I64,Ity_I8, Ity_I64); 2679 2680 case Iop_Not8: 2681 UNARY(Ity_I8, Ity_I8); 2682 case Iop_Not16: 2683 UNARY(Ity_I16, Ity_I16); 2684 case Iop_Not32: 2685 case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4: 2686 UNARY(Ity_I32, Ity_I32); 2687 2688 case Iop_Not64: 2689 case Iop_CmpNEZ32x2: case Iop_CmpNEZ16x4: case Iop_CmpNEZ8x8: 2690 case Iop_Cnt8x8: 2691 case Iop_Clz8x8: case Iop_Clz16x4: case Iop_Clz32x2: 2692 case Iop_Cls8x8: case Iop_Cls16x4: case Iop_Cls32x2: 2693 case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2: 2694 case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2: 2695 case Iop_Reverse8sIn64_x1: case Iop_Reverse16sIn64_x1: 2696 case Iop_Reverse32sIn64_x1: 2697 case Iop_Reverse8sIn32_x2: case Iop_Reverse16sIn32_x2: 2698 case Iop_Reverse8sIn16_x4: 2699 case Iop_FtoI32Sx2_RZ: case Iop_FtoI32Ux2_RZ: 2700 case Iop_I32StoFx2: case Iop_I32UtoFx2: 2701 case Iop_RecipEst32Ux2: case Iop_RecipEst32Fx2: 2702 case Iop_Abs32Fx2: 2703 case Iop_RSqrtEst32Fx2: 2704 case Iop_RSqrtEst32Ux2: 2705 case Iop_Neg32Fx2: 2706 case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2: 2707 UNARY(Ity_I64, Ity_I64); 2708 2709 case Iop_CmpEQ8: case Iop_CmpNE8: 2710 case Iop_CasCmpEQ8: case Iop_CasCmpNE8: case Iop_ExpCmpNE8: 2711 COMPARISON(Ity_I8); 2712 case Iop_CmpEQ16: case Iop_CmpNE16: 2713 case Iop_CasCmpEQ16: case Iop_CasCmpNE16: case Iop_ExpCmpNE16: 2714 COMPARISON(Ity_I16); 2715 case Iop_CmpEQ32: case Iop_CmpNE32: 2716 case Iop_CasCmpEQ32: case Iop_CasCmpNE32: case Iop_ExpCmpNE32: 2717 case Iop_CmpLT32S: case Iop_CmpLE32S: 2718 case Iop_CmpLT32U: case Iop_CmpLE32U: 2719 COMPARISON(Ity_I32); 2720 case Iop_CmpEQ64: case Iop_CmpNE64: 2721 case Iop_CasCmpEQ64: case Iop_CasCmpNE64: case Iop_ExpCmpNE64: 2722 case Iop_CmpLT64S: case Iop_CmpLE64S: 2723 case Iop_CmpLT64U: case Iop_CmpLE64U: 2724 COMPARISON(Ity_I64); 2725 2726 case Iop_CmpNEZ8: UNARY_COMPARISON(Ity_I8); 2727 case Iop_CmpNEZ16: UNARY_COMPARISON(Ity_I16); 2728 case Iop_CmpNEZ32: UNARY_COMPARISON(Ity_I32); 2729 case Iop_CmpNEZ64: UNARY_COMPARISON(Ity_I64); 2730 2731 case Iop_Left8: UNARY(Ity_I8, Ity_I8); 2732 case Iop_Left16: UNARY(Ity_I16,Ity_I16); 2733 case Iop_CmpwNEZ32: case Iop_Left32: UNARY(Ity_I32,Ity_I32); 2734 case Iop_CmpwNEZ64: case Iop_Left64: UNARY(Ity_I64,Ity_I64); 2735 2736 case Iop_GetMSBs8x8: UNARY(Ity_I64, Ity_I8); 2737 case Iop_GetMSBs8x16: UNARY(Ity_V128, Ity_I16); 2738 2739 case Iop_MullU8: case Iop_MullS8: 2740 BINARY(Ity_I8,Ity_I8, Ity_I16); 2741 case Iop_MullU16: case Iop_MullS16: 2742 BINARY(Ity_I16,Ity_I16, Ity_I32); 2743 case Iop_MullU32: case Iop_MullS32: 2744 BINARY(Ity_I32,Ity_I32, Ity_I64); 2745 case Iop_MullU64: case Iop_MullS64: 2746 BINARY(Ity_I64,Ity_I64, Ity_I128); 2747 2748 case Iop_Clz32: case Iop_Ctz32: 2749 UNARY(Ity_I32, Ity_I32); 2750 2751 case Iop_Clz64: case Iop_Ctz64: 2752 UNARY(Ity_I64, Ity_I64); 2753 2754 case Iop_DivU32: case Iop_DivS32: case Iop_DivU32E: case Iop_DivS32E: 2755 BINARY(Ity_I32,Ity_I32, Ity_I32); 2756 2757 case Iop_DivU64: case Iop_DivS64: case Iop_DivS64E: case Iop_DivU64E: 2758 BINARY(Ity_I64,Ity_I64, Ity_I64); 2759 2760 case Iop_DivModU64to32: case Iop_DivModS64to32: 2761 BINARY(Ity_I64,Ity_I32, Ity_I64); 2762 2763 case Iop_DivModU128to64: case Iop_DivModS128to64: 2764 BINARY(Ity_I128,Ity_I64, Ity_I128); 2765 2766 case Iop_DivModS64to64: 2767 BINARY(Ity_I64,Ity_I64, Ity_I128); 2768 2769 case Iop_16HIto8: case Iop_16to8: 2770 UNARY(Ity_I16, Ity_I8); 2771 case Iop_8HLto16: 2772 BINARY(Ity_I8,Ity_I8, Ity_I16); 2773 2774 case Iop_32HIto16: case Iop_32to16: 2775 UNARY(Ity_I32, Ity_I16); 2776 case Iop_16HLto32: 2777 BINARY(Ity_I16,Ity_I16, Ity_I32); 2778 2779 case Iop_64HIto32: case Iop_64to32: 2780 UNARY(Ity_I64, Ity_I32); 2781 case Iop_32HLto64: 2782 BINARY(Ity_I32,Ity_I32, Ity_I64); 2783 2784 case Iop_128HIto64: case Iop_128to64: 2785 UNARY(Ity_I128, Ity_I64); 2786 case Iop_64HLto128: 2787 BINARY(Ity_I64,Ity_I64, Ity_I128); 2788 2789 case Iop_Not1: UNARY(Ity_I1, Ity_I1); 2790 case Iop_1Uto8: UNARY(Ity_I1, Ity_I8); 2791 case Iop_1Sto8: UNARY(Ity_I1, Ity_I8); 2792 case Iop_1Sto16: UNARY(Ity_I1, Ity_I16); 2793 case Iop_1Uto32: case Iop_1Sto32: UNARY(Ity_I1, Ity_I32); 2794 case Iop_1Sto64: case Iop_1Uto64: UNARY(Ity_I1, Ity_I64); 2795 case Iop_32to1: UNARY(Ity_I32, Ity_I1); 2796 case Iop_64to1: UNARY(Ity_I64, Ity_I1); 2797 2798 case Iop_8Uto32: case Iop_8Sto32: 2799 UNARY(Ity_I8, Ity_I32); 2800 2801 case Iop_8Uto16: case Iop_8Sto16: 2802 UNARY(Ity_I8, Ity_I16); 2803 2804 case Iop_16Uto32: case Iop_16Sto32: 2805 UNARY(Ity_I16, Ity_I32); 2806 2807 case Iop_32Sto64: case Iop_32Uto64: 2808 UNARY(Ity_I32, Ity_I64); 2809 2810 case Iop_8Uto64: case Iop_8Sto64: 2811 UNARY(Ity_I8, Ity_I64); 2812 2813 case Iop_16Uto64: case Iop_16Sto64: 2814 UNARY(Ity_I16, Ity_I64); 2815 case Iop_64to16: 2816 UNARY(Ity_I64, Ity_I16); 2817 2818 case Iop_32to8: UNARY(Ity_I32, Ity_I8); 2819 case Iop_64to8: UNARY(Ity_I64, Ity_I8); 2820 2821 case Iop_AddF64: case Iop_SubF64: 2822 case Iop_MulF64: case Iop_DivF64: 2823 case Iop_AddF64r32: case Iop_SubF64r32: 2824 case Iop_MulF64r32: case Iop_DivF64r32: 2825 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64); 2826 2827 case Iop_AddF32: case Iop_SubF32: 2828 case Iop_MulF32: case Iop_DivF32: 2829 TERNARY(ity_RMode,Ity_F32,Ity_F32, Ity_F32); 2830 2831 case Iop_NegF64: case Iop_AbsF64: 2832 UNARY(Ity_F64, Ity_F64); 2833 2834 case Iop_NegF32: case Iop_AbsF32: 2835 UNARY(Ity_F32, Ity_F32); 2836 2837 case Iop_SqrtF64: 2838 case Iop_RecpExpF64: 2839 BINARY(ity_RMode,Ity_F64, Ity_F64); 2840 2841 case Iop_SqrtF32: 2842 case Iop_RoundF32toInt: 2843 case Iop_RecpExpF32: 2844 BINARY(ity_RMode,Ity_F32, Ity_F32); 2845 2846 case Iop_MaxNumF64: case Iop_MinNumF64: 2847 BINARY(Ity_F64,Ity_F64, Ity_F64); 2848 2849 case Iop_MaxNumF32: case Iop_MinNumF32: 2850 BINARY(Ity_F32,Ity_F32, Ity_F32); 2851 2852 case Iop_CmpF32: 2853 BINARY(Ity_F32,Ity_F32, Ity_I32); 2854 2855 case Iop_CmpF64: 2856 BINARY(Ity_F64,Ity_F64, Ity_I32); 2857 2858 case Iop_CmpF128: 2859 BINARY(Ity_F128,Ity_F128, Ity_I32); 2860 2861 case Iop_F64toI16S: BINARY(ity_RMode,Ity_F64, Ity_I16); 2862 case Iop_F64toI32S: BINARY(ity_RMode,Ity_F64, Ity_I32); 2863 case Iop_F64toI64S: case Iop_F64toI64U: 2864 BINARY(ity_RMode,Ity_F64, Ity_I64); 2865 2866 case Iop_F64toI32U: BINARY(ity_RMode,Ity_F64, Ity_I32); 2867 2868 case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64); 2869 case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); 2870 case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64); 2871 case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32); 2872 2873 case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64); 2874 2875 case Iop_F32toI32S: BINARY(ity_RMode,Ity_F32, Ity_I32); 2876 case Iop_F32toI64S: BINARY(ity_RMode,Ity_F32, Ity_I64); 2877 case Iop_F32toI32U: BINARY(ity_RMode,Ity_F32, Ity_I32); 2878 case Iop_F32toI64U: BINARY(ity_RMode,Ity_F32, Ity_I64); 2879 2880 case Iop_I32UtoF32: BINARY(ity_RMode,Ity_I32, Ity_F32); 2881 case Iop_I32StoF32: BINARY(ity_RMode,Ity_I32, Ity_F32); 2882 case Iop_I64StoF32: BINARY(ity_RMode,Ity_I64, Ity_F32); 2883 2884 case Iop_F32toF64: UNARY(Ity_F32, Ity_F64); 2885 case Iop_F16toF64: UNARY(Ity_F16, Ity_F64); 2886 case Iop_F16toF32: UNARY(Ity_F16, Ity_F32); 2887 2888 case Iop_F64toF32: BINARY(ity_RMode,Ity_F64, Ity_F32); 2889 case Iop_F64toF16: BINARY(ity_RMode,Ity_F64, Ity_F16); 2890 case Iop_F32toF16: BINARY(ity_RMode,Ity_F32, Ity_F16); 2891 2892 case Iop_ReinterpI64asF64: UNARY(Ity_I64, Ity_F64); 2893 case Iop_ReinterpF64asI64: UNARY(Ity_F64, Ity_I64); 2894 case Iop_ReinterpI32asF32: UNARY(Ity_I32, Ity_F32); 2895 case Iop_ReinterpF32asI32: UNARY(Ity_F32, Ity_I32); 2896 2897 case Iop_AtanF64: case Iop_Yl2xF64: case Iop_Yl2xp1F64: 2898 case Iop_ScaleF64: case Iop_PRemF64: case Iop_PRem1F64: 2899 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64); 2900 2901 case Iop_PRemC3210F64: case Iop_PRem1C3210F64: 2902 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_I32); 2903 2904 case Iop_SinF64: case Iop_CosF64: case Iop_TanF64: 2905 case Iop_2xm1F64: 2906 case Iop_RoundF64toInt: BINARY(ity_RMode,Ity_F64, Ity_F64); 2907 2908 case Iop_MAddF64: case Iop_MSubF64: 2909 case Iop_MAddF64r32: case Iop_MSubF64r32: 2910 QUATERNARY(ity_RMode,Ity_F64,Ity_F64,Ity_F64, Ity_F64); 2911 2912 case Iop_RSqrtEst5GoodF64: 2913 case Iop_RoundF64toF64_NEAREST: case Iop_RoundF64toF64_NegINF: 2914 case Iop_RoundF64toF64_PosINF: case Iop_RoundF64toF64_ZERO: 2915 UNARY(Ity_F64, Ity_F64); 2916 case Iop_RoundF64toF32: 2917 BINARY(ity_RMode,Ity_F64, Ity_F64); 2918 case Iop_TruncF64asF32: 2919 UNARY(Ity_F64, Ity_F32); 2920 2921 case Iop_I32UtoFx4: 2922 case Iop_I32StoFx4: 2923 case Iop_QFtoI32Ux4_RZ: 2924 case Iop_QFtoI32Sx4_RZ: 2925 case Iop_FtoI32Ux4_RZ: 2926 case Iop_FtoI32Sx4_RZ: 2927 case Iop_RoundF32x4_RM: 2928 case Iop_RoundF32x4_RP: 2929 case Iop_RoundF32x4_RN: 2930 case Iop_RoundF32x4_RZ: 2931 case Iop_Abs64Fx2: case Iop_Abs32Fx4: 2932 case Iop_RSqrtEst32Fx4: 2933 case Iop_RSqrtEst32Ux4: 2934 UNARY(Ity_V128, Ity_V128); 2935 2936 case Iop_Sqrt64Fx2: 2937 case Iop_Sqrt32Fx4: 2938 BINARY(ity_RMode,Ity_V128, Ity_V128); 2939 2940 case Iop_64HLtoV128: 2941 BINARY(Ity_I64,Ity_I64, Ity_V128); 2942 2943 case Iop_V128to64: case Iop_V128HIto64: 2944 case Iop_NarrowUn16to8x8: 2945 case Iop_NarrowUn32to16x4: 2946 case Iop_NarrowUn64to32x2: 2947 case Iop_QNarrowUn16Uto8Ux8: 2948 case Iop_QNarrowUn32Uto16Ux4: 2949 case Iop_QNarrowUn64Uto32Ux2: 2950 case Iop_QNarrowUn16Sto8Sx8: 2951 case Iop_QNarrowUn32Sto16Sx4: 2952 case Iop_QNarrowUn64Sto32Sx2: 2953 case Iop_QNarrowUn16Sto8Ux8: 2954 case Iop_QNarrowUn32Sto16Ux4: 2955 case Iop_QNarrowUn64Sto32Ux2: 2956 case Iop_F32toF16x4: 2957 UNARY(Ity_V128, Ity_I64); 2958 2959 case Iop_Widen8Uto16x8: 2960 case Iop_Widen16Uto32x4: 2961 case Iop_Widen32Uto64x2: 2962 case Iop_Widen8Sto16x8: 2963 case Iop_Widen16Sto32x4: 2964 case Iop_Widen32Sto64x2: 2965 case Iop_F16toF32x4: 2966 UNARY(Ity_I64, Ity_V128); 2967 2968 case Iop_V128to32: UNARY(Ity_V128, Ity_I32); 2969 case Iop_32UtoV128: UNARY(Ity_I32, Ity_V128); 2970 case Iop_64UtoV128: UNARY(Ity_I64, Ity_V128); 2971 case Iop_SetV128lo32: BINARY(Ity_V128,Ity_I32, Ity_V128); 2972 case Iop_SetV128lo64: BINARY(Ity_V128,Ity_I64, Ity_V128); 2973 2974 case Iop_Dup8x16: UNARY(Ity_I8, Ity_V128); 2975 case Iop_Dup16x8: UNARY(Ity_I16, Ity_V128); 2976 case Iop_Dup32x4: UNARY(Ity_I32, Ity_V128); 2977 case Iop_Dup8x8: UNARY(Ity_I8, Ity_I64); 2978 case Iop_Dup16x4: UNARY(Ity_I16, Ity_I64); 2979 case Iop_Dup32x2: UNARY(Ity_I32, Ity_I64); 2980 2981 case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4: 2982 case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2: 2983 case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4: 2984 case Iop_CmpLE64Fx2: case Iop_CmpUN64Fx2: 2985 case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4: 2986 case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4: 2987 case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2: 2988 case Iop_CmpLE32F0x4: case Iop_CmpUN32F0x4: 2989 case Iop_CmpLE64F0x2: case Iop_CmpUN64F0x2: 2990 case Iop_Add32F0x4: 2991 case Iop_Add64F0x2: 2992 case Iop_Div32F0x4: 2993 case Iop_Div64F0x2: 2994 case Iop_Max32Fx4: case Iop_Max32F0x4: 2995 case Iop_PwMax32Fx4: case Iop_PwMin32Fx4: 2996 case Iop_Max64Fx2: case Iop_Max64F0x2: 2997 case Iop_Min32Fx4: case Iop_Min32F0x4: 2998 case Iop_Min64Fx2: case Iop_Min64F0x2: 2999 case Iop_Mul32F0x4: 3000 case Iop_Mul64F0x2: 3001 case Iop_Sub32F0x4: 3002 case Iop_Sub64F0x2: 3003 case Iop_AndV128: case Iop_OrV128: case Iop_XorV128: 3004 case Iop_Add8x16: case Iop_Add16x8: 3005 case Iop_Add32x4: case Iop_Add64x2: 3006 case Iop_QAdd8Ux16: case Iop_QAdd16Ux8: 3007 case Iop_QAdd32Ux4: case Iop_QAdd64Ux2: 3008 case Iop_QAdd8Sx16: case Iop_QAdd16Sx8: 3009 case Iop_QAdd32Sx4: case Iop_QAdd64Sx2: 3010 case Iop_QAddExtUSsatSS8x16: case Iop_QAddExtUSsatSS16x8: 3011 case Iop_QAddExtUSsatSS32x4: case Iop_QAddExtUSsatSS64x2: 3012 case Iop_QAddExtSUsatUU8x16: case Iop_QAddExtSUsatUU16x8: 3013 case Iop_QAddExtSUsatUU32x4: case Iop_QAddExtSUsatUU64x2: 3014 case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4: 3015 case Iop_Sub8x16: case Iop_Sub16x8: 3016 case Iop_Sub32x4: case Iop_Sub64x2: 3017 case Iop_QSub8Ux16: case Iop_QSub16Ux8: 3018 case Iop_QSub32Ux4: case Iop_QSub64Ux2: 3019 case Iop_QSub8Sx16: case Iop_QSub16Sx8: 3020 case Iop_QSub32Sx4: case Iop_QSub64Sx2: 3021 case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4: 3022 case Iop_PolynomialMul8x16: 3023 case Iop_PolynomialMulAdd8x16: case Iop_PolynomialMulAdd16x8: 3024 case Iop_PolynomialMulAdd32x4: case Iop_PolynomialMulAdd64x2: 3025 case Iop_MulHi16Ux8: case Iop_MulHi32Ux4: 3026 case Iop_MulHi16Sx8: case Iop_MulHi32Sx4: 3027 case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4: 3028 case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4: 3029 case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: case Iop_MullEven32Ux4: 3030 case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: case Iop_MullEven32Sx4: 3031 case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: 3032 case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: 3033 case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4: 3034 case Iop_Max64Sx2: 3035 case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4: 3036 case Iop_Max64Ux2: 3037 case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4: 3038 case Iop_Min64Sx2: 3039 case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4: 3040 case Iop_Min64Ux2: 3041 case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4: 3042 case Iop_CmpEQ64x2: 3043 case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4: 3044 case Iop_CmpGT64Sx2: 3045 case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4: 3046 case Iop_CmpGT64Ux2: 3047 case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2: 3048 case Iop_QShl8x16: case Iop_QShl16x8: 3049 case Iop_QShl32x4: case Iop_QShl64x2: 3050 case Iop_QSal8x16: case Iop_QSal16x8: 3051 case Iop_QSal32x4: case Iop_QSal64x2: 3052 case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2: 3053 case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2: 3054 case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2: 3055 case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4:case Iop_Rol64x2: 3056 case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8: 3057 case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8: 3058 case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8: 3059 case Iop_QNarrowBin64Sto32Sx4: case Iop_QNarrowBin64Uto32Ux4: 3060 case Iop_NarrowBin16to8x16: case Iop_NarrowBin32to16x8: 3061 case Iop_NarrowBin64to32x4: 3062 case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8: 3063 case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2: 3064 case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8: 3065 case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2: 3066 case Iop_CatOddLanes8x16: case Iop_CatEvenLanes8x16: 3067 case Iop_CatOddLanes16x8: case Iop_CatEvenLanes16x8: 3068 case Iop_CatOddLanes32x4: case Iop_CatEvenLanes32x4: 3069 case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16: 3070 case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8: 3071 case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4: 3072 case Iop_Perm8x16: case Iop_Perm32x4: 3073 case Iop_RecipStep32Fx4: case Iop_RecipStep64Fx2: 3074 case Iop_RSqrtStep32Fx4: case Iop_RSqrtStep64Fx2: 3075 case Iop_CipherV128: 3076 case Iop_CipherLV128: 3077 case Iop_NCipherV128: 3078 case Iop_NCipherLV128: 3079 case Iop_Sh8Sx16: case Iop_Sh16Sx8: 3080 case Iop_Sh32Sx4: case Iop_Sh64Sx2: 3081 case Iop_Sh8Ux16: case Iop_Sh16Ux8: 3082 case Iop_Sh32Ux4: case Iop_Sh64Ux2: 3083 case Iop_Rsh8Sx16: case Iop_Rsh16Sx8: 3084 case Iop_Rsh32Sx4: case Iop_Rsh64Sx2: 3085 case Iop_Rsh8Ux16: case Iop_Rsh16Ux8: 3086 case Iop_Rsh32Ux4: case Iop_Rsh64Ux2: 3087 case Iop_MulI128by10E: 3088 case Iop_MulI128by10ECarry: 3089 BINARY(Ity_V128,Ity_V128, Ity_V128); 3090 3091 case Iop_PolynomialMull8x8: 3092 case Iop_Mull8Ux8: case Iop_Mull8Sx8: 3093 case Iop_Mull16Ux4: case Iop_Mull16Sx4: 3094 case Iop_Mull32Ux2: case Iop_Mull32Sx2: 3095 BINARY(Ity_I64, Ity_I64, Ity_V128); 3096 3097 case Iop_NotV128: 3098 case Iop_RecipEst32Fx4: case Iop_RecipEst32F0x4: 3099 case Iop_RecipEst64Fx2: case Iop_RSqrtEst64Fx2: 3100 case Iop_RecipEst32Ux4: 3101 case Iop_RSqrtEst32F0x4: 3102 case Iop_Sqrt32F0x4: 3103 case Iop_Sqrt64F0x2: 3104 case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8: 3105 case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2: 3106 case Iop_Cnt8x16: 3107 case Iop_Clz8x16: case Iop_Clz16x8: case Iop_Clz32x4: case Iop_Clz64x2: 3108 case Iop_Cls8x16: case Iop_Cls16x8: case Iop_Cls32x4: 3109 case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8: case Iop_PwAddL32Ux4: 3110 case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4: 3111 case Iop_Reverse8sIn64_x2: case Iop_Reverse16sIn64_x2: 3112 case Iop_Reverse32sIn64_x2: 3113 case Iop_Reverse8sIn32_x4: case Iop_Reverse16sIn32_x4: 3114 case Iop_Reverse8sIn16_x8: 3115 case Iop_Reverse1sIn8_x16: 3116 case Iop_Neg64Fx2: case Iop_Neg32Fx4: 3117 case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4: case Iop_Abs64x2: 3118 case Iop_CipherSV128: 3119 case Iop_PwBitMtxXpose64x2: 3120 case Iop_ZeroHI64ofV128: case Iop_ZeroHI96ofV128: 3121 case Iop_ZeroHI112ofV128: case Iop_ZeroHI120ofV128: 3122 case Iop_F16toF64x2: 3123 case Iop_F64toF16x2: 3124 case Iop_MulI128by10: 3125 case Iop_MulI128by10Carry: 3126 case Iop_Ctz8x16: case Iop_Ctz16x8: 3127 case Iop_Ctz32x4: case Iop_Ctz64x2: 3128 case Iop_BCD128toI128S: 3129 UNARY(Ity_V128, Ity_V128); 3130 3131 case Iop_ShlV128: case Iop_ShrV128: 3132 case Iop_ShlN8x16: case Iop_ShlN16x8: 3133 case Iop_ShlN32x4: case Iop_ShlN64x2: 3134 case Iop_ShrN8x16: case Iop_ShrN16x8: 3135 case Iop_ShrN32x4: case Iop_ShrN64x2: 3136 case Iop_SarN8x16: case Iop_SarN16x8: 3137 case Iop_SarN32x4: case Iop_SarN64x2: 3138 case Iop_QShlNsatUU8x16: case Iop_QShlNsatUU16x8: 3139 case Iop_QShlNsatUU32x4: case Iop_QShlNsatUU64x2: 3140 case Iop_QShlNsatSU8x16: case Iop_QShlNsatSU16x8: 3141 case Iop_QShlNsatSU32x4: case Iop_QShlNsatSU64x2: 3142 case Iop_QShlNsatSS8x16: case Iop_QShlNsatSS16x8: 3143 case Iop_QShlNsatSS32x4: case Iop_QShlNsatSS64x2: 3144 case Iop_SHA256: case Iop_SHA512: 3145 case Iop_QandQShrNnarrow16Uto8Ux8: 3146 case Iop_QandQShrNnarrow32Uto16Ux4: 3147 case Iop_QandQShrNnarrow64Uto32Ux2: 3148 case Iop_QandQSarNnarrow16Sto8Sx8: 3149 case Iop_QandQSarNnarrow32Sto16Sx4: 3150 case Iop_QandQSarNnarrow64Sto32Sx2: 3151 case Iop_QandQSarNnarrow16Sto8Ux8: 3152 case Iop_QandQSarNnarrow32Sto16Ux4: 3153 case Iop_QandQSarNnarrow64Sto32Ux2: 3154 case Iop_QandQRShrNnarrow16Uto8Ux8: 3155 case Iop_QandQRShrNnarrow32Uto16Ux4: 3156 case Iop_QandQRShrNnarrow64Uto32Ux2: 3157 case Iop_QandQRSarNnarrow16Sto8Sx8: 3158 case Iop_QandQRSarNnarrow32Sto16Sx4: 3159 case Iop_QandQRSarNnarrow64Sto32Sx2: 3160 case Iop_QandQRSarNnarrow16Sto8Ux8: 3161 case Iop_QandQRSarNnarrow32Sto16Ux4: 3162 case Iop_QandQRSarNnarrow64Sto32Ux2: 3163 case Iop_I128StoBCD128: 3164 BINARY(Ity_V128, Ity_I8, Ity_V128); 3165 3166 case Iop_F32ToFixed32Ux4_RZ: 3167 case Iop_F32ToFixed32Sx4_RZ: 3168 case Iop_Fixed32UToF32x4_RN: 3169 case Iop_Fixed32SToF32x4_RN: 3170 BINARY(Ity_V128, Ity_I8, Ity_V128); 3171 3172 case Iop_F32ToFixed32Ux2_RZ: 3173 case Iop_F32ToFixed32Sx2_RZ: 3174 case Iop_Fixed32UToF32x2_RN: 3175 case Iop_Fixed32SToF32x2_RN: 3176 BINARY(Ity_I64, Ity_I8, Ity_I64); 3177 3178 case Iop_GetElem8x16: 3179 BINARY(Ity_V128, Ity_I8, Ity_I8); 3180 case Iop_GetElem16x8: 3181 BINARY(Ity_V128, Ity_I8, Ity_I16); 3182 case Iop_GetElem32x4: 3183 BINARY(Ity_V128, Ity_I8, Ity_I32); 3184 case Iop_GetElem64x2: 3185 BINARY(Ity_V128, Ity_I8, Ity_I64); 3186 case Iop_GetElem8x8: 3187 BINARY(Ity_I64, Ity_I8, Ity_I8); 3188 case Iop_GetElem16x4: 3189 BINARY(Ity_I64, Ity_I8, Ity_I16); 3190 case Iop_GetElem32x2: 3191 BINARY(Ity_I64, Ity_I8, Ity_I32); 3192 case Iop_SetElem8x8: 3193 TERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I64); 3194 case Iop_SetElem16x4: 3195 TERNARY(Ity_I64, Ity_I8, Ity_I16, Ity_I64); 3196 case Iop_SetElem32x2: 3197 TERNARY(Ity_I64, Ity_I8, Ity_I32, Ity_I64); 3198 3199 case Iop_Slice64: 3200 TERNARY(Ity_I64, Ity_I64, Ity_I8, Ity_I64); 3201 case Iop_SliceV128: 3202 TERNARY(Ity_V128, Ity_V128, Ity_I8, Ity_V128); 3203 3204 case Iop_BCDAdd: 3205 case Iop_BCDSub: 3206 BINARY(Ity_V128, Ity_V128, Ity_V128); 3207 3208 case Iop_QDMull16Sx4: case Iop_QDMull32Sx2: 3209 BINARY(Ity_I64, Ity_I64, Ity_V128); 3210 3211 /* s390 specific */ 3212 case Iop_MAddF32: 3213 case Iop_MSubF32: 3214 QUATERNARY(ity_RMode,Ity_F32,Ity_F32,Ity_F32, Ity_F32); 3215 3216 case Iop_F64HLtoF128: 3217 BINARY(Ity_F64,Ity_F64, Ity_F128); 3218 3219 case Iop_F128HItoF64: 3220 case Iop_F128LOtoF64: 3221 UNARY(Ity_F128, Ity_F64); 3222 3223 case Iop_AddF128: 3224 case Iop_SubF128: 3225 case Iop_MulF128: 3226 case Iop_DivF128: 3227 TERNARY(ity_RMode,Ity_F128,Ity_F128, Ity_F128); 3228 3229 case Iop_MAddF128: 3230 case Iop_MSubF128: 3231 case Iop_NegMAddF128: 3232 case Iop_NegMSubF128: 3233 QUATERNARY(ity_RMode,Ity_F128,Ity_F128,Ity_F128, Ity_F128); 3234 3235 case Iop_Add64Fx2: case Iop_Sub64Fx2: 3236 case Iop_Mul64Fx2: case Iop_Div64Fx2: 3237 case Iop_Add32Fx4: case Iop_Sub32Fx4: 3238 case Iop_Mul32Fx4: case Iop_Div32Fx4: 3239 TERNARY(ity_RMode,Ity_V128,Ity_V128, Ity_V128); 3240 3241 case Iop_Add64Fx4: case Iop_Sub64Fx4: 3242 case Iop_Mul64Fx4: case Iop_Div64Fx4: 3243 case Iop_Add32Fx8: case Iop_Sub32Fx8: 3244 case Iop_Mul32Fx8: case Iop_Div32Fx8: 3245 TERNARY(ity_RMode,Ity_V256,Ity_V256, Ity_V256); 3246 3247 case Iop_NegF128: 3248 case Iop_AbsF128: 3249 UNARY(Ity_F128, Ity_F128); 3250 3251 case Iop_SqrtF128: 3252 case Iop_RoundF128toInt: 3253 BINARY(ity_RMode,Ity_F128, Ity_F128); 3254 3255 case Iop_I32StoF128: UNARY(Ity_I32, Ity_F128); 3256 case Iop_I64StoF128: UNARY(Ity_I64, Ity_F128); 3257 3258 case Iop_I32UtoF128: UNARY(Ity_I32, Ity_F128); 3259 case Iop_I64UtoF128: UNARY(Ity_I64, Ity_F128); 3260 3261 case Iop_F128toI32S: BINARY(ity_RMode,Ity_F128, Ity_I32); 3262 case Iop_F128toI64S: BINARY(ity_RMode,Ity_F128, Ity_I64); 3263 3264 case Iop_F128toI32U: BINARY(ity_RMode,Ity_F128, Ity_I32); 3265 case Iop_F128toI64U: BINARY(ity_RMode,Ity_F128, Ity_I64); 3266 3267 case Iop_F32toF128: UNARY(Ity_F32, Ity_F128); 3268 case Iop_F64toF128: UNARY(Ity_F64, Ity_F128); 3269 3270 case Iop_F128toF32: BINARY(ity_RMode,Ity_F128, Ity_F32); 3271 case Iop_F128toF64: BINARY(ity_RMode,Ity_F128, Ity_F64); 3272 3273 case Iop_TruncF128toI32S: 3274 case Iop_TruncF128toI64S: 3275 case Iop_TruncF128toI32U: 3276 case Iop_TruncF128toI64U: 3277 UNARY(Ity_F128, Ity_F128); 3278 3279 case Iop_F128toI128S: 3280 case Iop_RndF128: 3281 BINARY(ity_RMode,Ity_F128, Ity_F128); 3282 3283 case Iop_D32toD64: 3284 UNARY(Ity_D32, Ity_D64); 3285 3286 case Iop_ExtractExpD64: 3287 UNARY(Ity_D64, Ity_I64); 3288 3289 case Iop_ExtractSigD64: 3290 UNARY(Ity_D64, Ity_I64); 3291 3292 case Iop_InsertExpD64: 3293 BINARY(Ity_I64,Ity_D64, Ity_D64); 3294 3295 case Iop_ExtractExpD128: 3296 UNARY(Ity_D128, Ity_I64); 3297 3298 case Iop_ExtractSigD128: 3299 UNARY(Ity_D128, Ity_I64); 3300 3301 case Iop_InsertExpD128: 3302 BINARY(Ity_I64,Ity_D128, Ity_D128); 3303 3304 case Iop_D64toD128: 3305 UNARY(Ity_D64, Ity_D128); 3306 3307 case Iop_ReinterpD64asI64: 3308 UNARY(Ity_D64, Ity_I64); 3309 3310 case Iop_ReinterpI64asD64: 3311 UNARY(Ity_I64, Ity_D64); 3312 3313 case Iop_RoundD64toInt: 3314 BINARY(ity_RMode,Ity_D64, Ity_D64); 3315 3316 case Iop_RoundD128toInt: 3317 BINARY(ity_RMode,Ity_D128, Ity_D128); 3318 3319 case Iop_I32StoD128: 3320 case Iop_I32UtoD128: 3321 UNARY(Ity_I32, Ity_D128); 3322 3323 case Iop_I64StoD128: 3324 UNARY(Ity_I64, Ity_D128); 3325 3326 case Iop_I64UtoD128: 3327 UNARY(Ity_I64, Ity_D128); 3328 3329 case Iop_DPBtoBCD: 3330 case Iop_BCDtoDPB: 3331 UNARY(Ity_I64, Ity_I64); 3332 3333 case Iop_D128HItoD64: 3334 case Iop_D128LOtoD64: 3335 UNARY(Ity_D128, Ity_D64); 3336 3337 case Iop_D128toI64S: 3338 BINARY(ity_RMode, Ity_D128, Ity_I64); 3339 3340 case Iop_D128toI64U: 3341 BINARY(ity_RMode, Ity_D128, Ity_I64); 3342 3343 case Iop_D128toI32S: 3344 case Iop_D128toI32U: 3345 BINARY(ity_RMode, Ity_D128, Ity_I32); 3346 3347 case Iop_D64HLtoD128: 3348 BINARY(Ity_D64, Ity_D64, Ity_D128); 3349 3350 case Iop_ShlD64: 3351 case Iop_ShrD64: 3352 BINARY(Ity_D64, Ity_I8, Ity_D64 ); 3353 3354 case Iop_D64toD32: 3355 BINARY(ity_RMode, Ity_D64, Ity_D32); 3356 3357 case Iop_D64toI32S: 3358 case Iop_D64toI32U: 3359 BINARY(ity_RMode, Ity_D64, Ity_I32); 3360 3361 case Iop_D64toI64S: 3362 BINARY(ity_RMode, Ity_D64, Ity_I64); 3363 3364 case Iop_D64toI64U: 3365 BINARY(ity_RMode, Ity_D64, Ity_I64); 3366 3367 case Iop_I32StoD64: 3368 case Iop_I32UtoD64: 3369 UNARY(Ity_I32, Ity_D64); 3370 3371 case Iop_I64StoD64: 3372 BINARY(ity_RMode, Ity_I64, Ity_D64); 3373 3374 case Iop_I64UtoD64: 3375 BINARY(ity_RMode, Ity_I64, Ity_D64); 3376 3377 case Iop_F32toD32: 3378 BINARY(ity_RMode, Ity_F32, Ity_D32); 3379 3380 case Iop_F32toD64: 3381 BINARY(ity_RMode, Ity_F32, Ity_D64); 3382 3383 case Iop_F32toD128: 3384 BINARY(ity_RMode, Ity_F32, Ity_D128); 3385 3386 case Iop_F64toD32: 3387 BINARY(ity_RMode, Ity_F64, Ity_D32); 3388 3389 case Iop_F64toD64: 3390 BINARY(ity_RMode, Ity_F64, Ity_D64); 3391 3392 case Iop_F64toD128: 3393 BINARY(ity_RMode, Ity_F64, Ity_D128); 3394 3395 case Iop_F128toD32: 3396 BINARY(ity_RMode, Ity_F128, Ity_D32); 3397 3398 case Iop_F128toD64: 3399 BINARY(ity_RMode, Ity_F128, Ity_D64); 3400 3401 case Iop_F128toD128: 3402 BINARY(ity_RMode, Ity_F128, Ity_D128); 3403 3404 case Iop_D32toF32: 3405 BINARY(ity_RMode, Ity_D32, Ity_F32); 3406 3407 case Iop_D32toF64: 3408 BINARY(ity_RMode, Ity_D32, Ity_F64); 3409 3410 case Iop_D32toF128: 3411 BINARY(ity_RMode, Ity_D32, Ity_F128); 3412 3413 case Iop_D64toF32: 3414 BINARY(ity_RMode, Ity_D64, Ity_F32); 3415 3416 case Iop_D64toF64: 3417 BINARY(ity_RMode, Ity_D64, Ity_F64); 3418 3419 case Iop_D64toF128: 3420 BINARY(ity_RMode, Ity_D64, Ity_F128); 3421 3422 case Iop_D128toF32: 3423 BINARY(ity_RMode, Ity_D128, Ity_F32); 3424 3425 case Iop_D128toF64: 3426 BINARY(ity_RMode, Ity_D128, Ity_F64); 3427 3428 case Iop_D128toF128: 3429 BINARY(ity_RMode, Ity_D128, Ity_F128); 3430 3431 case Iop_CmpD64: 3432 case Iop_CmpExpD64: 3433 BINARY(Ity_D64,Ity_D64, Ity_I32); 3434 3435 case Iop_CmpD128: 3436 case Iop_CmpExpD128: 3437 BINARY(Ity_D128,Ity_D128, Ity_I32); 3438 3439 case Iop_QuantizeD64: 3440 TERNARY(ity_RMode,Ity_D64,Ity_D64, Ity_D64); 3441 3442 case Iop_SignificanceRoundD64: 3443 TERNARY(ity_RMode, Ity_I8,Ity_D64, Ity_D64); 3444 3445 case Iop_QuantizeD128: 3446 TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128); 3447 3448 case Iop_SignificanceRoundD128: 3449 TERNARY(ity_RMode, Ity_I8,Ity_D128, Ity_D128); 3450 3451 case Iop_ShlD128: 3452 case Iop_ShrD128: 3453 BINARY(Ity_D128, Ity_I8, Ity_D128 ); 3454 3455 case Iop_AddD64: 3456 case Iop_SubD64: 3457 case Iop_MulD64: 3458 case Iop_DivD64: 3459 TERNARY( ity_RMode, Ity_D64, Ity_D64, Ity_D64 ); 3460 3461 case Iop_D128toD64: 3462 BINARY( ity_RMode, Ity_D128, Ity_D64 ); 3463 3464 case Iop_AddD128: 3465 case Iop_SubD128: 3466 case Iop_MulD128: 3467 case Iop_DivD128: 3468 TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128); 3469 3470 case Iop_V256to64_0: case Iop_V256to64_1: 3471 case Iop_V256to64_2: case Iop_V256to64_3: 3472 UNARY(Ity_V256, Ity_I64); 3473 3474 case Iop_64x4toV256: 3475 QUATERNARY(Ity_I64, Ity_I64, Ity_I64, Ity_I64, Ity_V256); 3476 3477 case Iop_AndV256: case Iop_OrV256: 3478 case Iop_XorV256: 3479 case Iop_Max32Fx8: case Iop_Min32Fx8: 3480 case Iop_Max64Fx4: case Iop_Min64Fx4: 3481 case Iop_Add8x32: case Iop_Add16x16: 3482 case Iop_Add32x8: case Iop_Add64x4: 3483 case Iop_Sub8x32: case Iop_Sub16x16: 3484 case Iop_Sub32x8: case Iop_Sub64x4: 3485 case Iop_Mul16x16: case Iop_Mul32x8: 3486 case Iop_MulHi16Ux16: case Iop_MulHi16Sx16: 3487 case Iop_Avg8Ux32: case Iop_Avg16Ux16: 3488 case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8: 3489 case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8: 3490 case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8: 3491 case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8: 3492 case Iop_CmpEQ8x32: case Iop_CmpEQ16x16: 3493 case Iop_CmpEQ32x8: case Iop_CmpEQ64x4: 3494 case Iop_CmpGT8Sx32: case Iop_CmpGT16Sx16: 3495 case Iop_CmpGT32Sx8: case Iop_CmpGT64Sx4: 3496 case Iop_QAdd8Ux32: case Iop_QAdd16Ux16: 3497 case Iop_QAdd8Sx32: case Iop_QAdd16Sx16: 3498 case Iop_QSub8Ux32: case Iop_QSub16Ux16: 3499 case Iop_QSub8Sx32: case Iop_QSub16Sx16: 3500 case Iop_Perm32x8: 3501 BINARY(Ity_V256,Ity_V256, Ity_V256); 3502 3503 case Iop_V256toV128_1: case Iop_V256toV128_0: 3504 UNARY(Ity_V256, Ity_V128); 3505 3506 case Iop_QandUQsh8x16: case Iop_QandUQsh16x8: 3507 case Iop_QandUQsh32x4: case Iop_QandUQsh64x2: 3508 case Iop_QandSQsh8x16: case Iop_QandSQsh16x8: 3509 case Iop_QandSQsh32x4: case Iop_QandSQsh64x2: 3510 case Iop_QandUQRsh8x16: case Iop_QandUQRsh16x8: 3511 case Iop_QandUQRsh32x4: case Iop_QandUQRsh64x2: 3512 case Iop_QandSQRsh8x16: case Iop_QandSQRsh16x8: 3513 case Iop_QandSQRsh32x4: case Iop_QandSQRsh64x2: 3514 case Iop_V128HLtoV256: 3515 BINARY(Ity_V128,Ity_V128, Ity_V256); 3516 3517 case Iop_NotV256: 3518 case Iop_RSqrtEst32Fx8: 3519 case Iop_Sqrt32Fx8: 3520 case Iop_Sqrt64Fx4: 3521 case Iop_RecipEst32Fx8: 3522 case Iop_CmpNEZ8x32: case Iop_CmpNEZ16x16: 3523 case Iop_CmpNEZ64x4: case Iop_CmpNEZ32x8: 3524 UNARY(Ity_V256, Ity_V256); 3525 3526 case Iop_ShlN16x16: case Iop_ShlN32x8: 3527 case Iop_ShlN64x4: 3528 case Iop_ShrN16x16: case Iop_ShrN32x8: 3529 case Iop_ShrN64x4: 3530 case Iop_SarN16x16: case Iop_SarN32x8: 3531 BINARY(Ity_V256,Ity_I8, Ity_V256); 3532 3533 default: 3534 ppIROp(op); 3535 vpanic("typeOfPrimop"); 3536 } 3537 # undef UNARY 3538 # undef BINARY 3539 # undef TERNARY 3540 # undef COMPARISON 3541 # undef UNARY_COMPARISON 3542 } 3543 3544 3545 /*---------------------------------------------------------------*/ 3546 /*--- Helper functions for the IR -- IR Basic Blocks ---*/ 3547 /*---------------------------------------------------------------*/ 3548 3549 void addStmtToIRSB ( IRSB* bb, IRStmt* st ) 3550 { 3551 Int i; 3552 if (bb->stmts_used == bb->stmts_size) { 3553 IRStmt** stmts2 = LibVEX_Alloc_inline(2 * bb->stmts_size * sizeof(IRStmt*)); 3554 for (i = 0; i < bb->stmts_size; i++) 3555 stmts2[i] = bb->stmts[i]; 3556 bb->stmts = stmts2; 3557 bb->stmts_size *= 2; 3558 } 3559 vassert(bb->stmts_used < bb->stmts_size); 3560 bb->stmts[bb->stmts_used] = st; 3561 bb->stmts_used++; 3562 } 3563 3564 3565 /*---------------------------------------------------------------*/ 3566 /*--- Helper functions for the IR -- IR Type Environments ---*/ 3567 /*---------------------------------------------------------------*/ 3568 3569 /* Allocate a new IRTemp, given its type. */ 3570 3571 IRTemp newIRTemp ( IRTypeEnv* env, IRType ty ) 3572 { 3573 vassert(env); 3574 vassert(env->types_used >= 0); 3575 vassert(env->types_size >= 0); 3576 vassert(env->types_used <= env->types_size); 3577 if (env->types_used < env->types_size) { 3578 env->types[env->types_used] = ty; 3579 return env->types_used++; 3580 } else { 3581 Int i; 3582 Int new_size = env->types_size==0 ? 8 : 2*env->types_size; 3583 IRType* new_types 3584 = LibVEX_Alloc_inline(new_size * sizeof(IRType)); 3585 for (i = 0; i < env->types_used; i++) 3586 new_types[i] = env->types[i]; 3587 env->types = new_types; 3588 env->types_size = new_size; 3589 return newIRTemp(env, ty); 3590 } 3591 } 3592 3593 3594 /*---------------------------------------------------------------*/ 3595 /*--- Helper functions for the IR -- finding types of exprs ---*/ 3596 /*---------------------------------------------------------------*/ 3597 3598 inline 3599 IRType typeOfIRTemp ( const IRTypeEnv* env, IRTemp tmp ) 3600 { 3601 vassert(tmp >= 0); 3602 vassert(tmp < env->types_used); 3603 return env->types[tmp]; 3604 } 3605 3606 IRType typeOfIRConst ( const IRConst* con ) 3607 { 3608 switch (con->tag) { 3609 case Ico_U1: return Ity_I1; 3610 case Ico_U8: return Ity_I8; 3611 case Ico_U16: return Ity_I16; 3612 case Ico_U32: return Ity_I32; 3613 case Ico_U64: return Ity_I64; 3614 case Ico_F32: return Ity_F32; 3615 case Ico_F32i: return Ity_F32; 3616 case Ico_F64: return Ity_F64; 3617 case Ico_F64i: return Ity_F64; 3618 case Ico_V128: return Ity_V128; 3619 case Ico_V256: return Ity_V256; 3620 default: vpanic("typeOfIRConst"); 3621 } 3622 } 3623 3624 void typeOfIRLoadGOp ( IRLoadGOp cvt, 3625 /*OUT*/IRType* t_res, /*OUT*/IRType* t_arg ) 3626 { 3627 switch (cvt) { 3628 case ILGop_IdentV128: 3629 *t_res = Ity_V128; *t_arg = Ity_V128; break; 3630 case ILGop_Ident64: 3631 *t_res = Ity_I64; *t_arg = Ity_I64; break; 3632 case ILGop_Ident32: 3633 *t_res = Ity_I32; *t_arg = Ity_I32; break; 3634 case ILGop_16Uto32: case ILGop_16Sto32: 3635 *t_res = Ity_I32; *t_arg = Ity_I16; break; 3636 case ILGop_8Uto32: case ILGop_8Sto32: 3637 *t_res = Ity_I32; *t_arg = Ity_I8; break; 3638 default: 3639 vpanic("typeOfIRLoadGOp"); 3640 } 3641 } 3642 3643 IRType typeOfIRExpr ( const IRTypeEnv* tyenv, const IRExpr* e ) 3644 { 3645 IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4; 3646 start: 3647 switch (e->tag) { 3648 case Iex_Load: 3649 return e->Iex.Load.ty; 3650 case Iex_Get: 3651 return e->Iex.Get.ty; 3652 case Iex_GetI: 3653 return e->Iex.GetI.descr->elemTy; 3654 case Iex_RdTmp: 3655 return typeOfIRTemp(tyenv, e->Iex.RdTmp.tmp); 3656 case Iex_Const: 3657 return typeOfIRConst(e->Iex.Const.con); 3658 case Iex_Qop: 3659 typeOfPrimop(e->Iex.Qop.details->op, 3660 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3661 return t_dst; 3662 case Iex_Triop: 3663 typeOfPrimop(e->Iex.Triop.details->op, 3664 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3665 return t_dst; 3666 case Iex_Binop: 3667 typeOfPrimop(e->Iex.Binop.op, 3668 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3669 return t_dst; 3670 case Iex_Unop: 3671 typeOfPrimop(e->Iex.Unop.op, 3672 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 3673 return t_dst; 3674 case Iex_CCall: 3675 return e->Iex.CCall.retty; 3676 case Iex_ITE: 3677 e = e->Iex.ITE.iffalse; 3678 goto start; 3679 /* return typeOfIRExpr(tyenv, e->Iex.ITE.iffalse); */ 3680 case Iex_Binder: 3681 vpanic("typeOfIRExpr: Binder is not a valid expression"); 3682 case Iex_VECRET: 3683 vpanic("typeOfIRExpr: VECRET is not a valid expression"); 3684 case Iex_GSPTR: 3685 vpanic("typeOfIRExpr: GSPTR is not a valid expression"); 3686 default: 3687 ppIRExpr(e); 3688 vpanic("typeOfIRExpr"); 3689 } 3690 } 3691 3692 /* Is this any value actually in the enumeration 'IRType' ? */ 3693 Bool isPlausibleIRType ( IRType ty ) 3694 { 3695 switch (ty) { 3696 case Ity_INVALID: case Ity_I1: 3697 case Ity_I8: case Ity_I16: case Ity_I32: 3698 case Ity_I64: case Ity_I128: 3699 case Ity_F16: case Ity_F32: case Ity_F64: case Ity_F128: 3700 case Ity_D32: case Ity_D64: case Ity_D128: 3701 case Ity_V128: case Ity_V256: 3702 return True; 3703 default: 3704 return False; 3705 } 3706 } 3707 3708 3709 /*---------------------------------------------------------------*/ 3710 /*--- Sanity checking -- FLATNESS ---*/ 3711 /*---------------------------------------------------------------*/ 3712 3713 /* Check that the canonical flatness constraints hold on an 3714 IRStmt. The only place where any expression is allowed to be 3715 non-atomic is the RHS of IRStmt_Tmp. */ 3716 3717 /* Relies on: 3718 inline static Bool isAtom ( IRExpr* e ) { 3719 return e->tag == Iex_RdTmp || e->tag == Iex_Const; 3720 } 3721 */ 3722 3723 static inline Bool isIRAtom_or_VECRET_or_GSPTR ( const IRExpr* e ) 3724 { 3725 if (isIRAtom(e)) { 3726 return True; 3727 } 3728 3729 return UNLIKELY(is_IRExpr_VECRET_or_GSPTR(e)); 3730 } 3731 3732 Bool isFlatIRStmt ( const IRStmt* st ) 3733 { 3734 Int i; 3735 const IRExpr* e; 3736 const IRQop* qop; 3737 const IRTriop* triop; 3738 3739 switch (st->tag) { 3740 case Ist_AbiHint: 3741 return isIRAtom(st->Ist.AbiHint.base) 3742 && isIRAtom(st->Ist.AbiHint.nia); 3743 case Ist_Put: 3744 return isIRAtom(st->Ist.Put.data); 3745 case Ist_PutI: { 3746 const IRPutI *puti = st->Ist.PutI.details; 3747 return toBool( isIRAtom(puti->ix) 3748 && isIRAtom(puti->data) ); 3749 } 3750 case Ist_WrTmp: 3751 /* This is the only interesting case. The RHS can be any 3752 expression, *but* all its subexpressions *must* be 3753 atoms. */ 3754 e = st->Ist.WrTmp.data; 3755 switch (e->tag) { 3756 case Iex_Binder: return True; 3757 case Iex_Get: return True; 3758 case Iex_GetI: return isIRAtom(e->Iex.GetI.ix); 3759 case Iex_RdTmp: return True; 3760 case Iex_Qop: qop = e->Iex.Qop.details; 3761 return toBool( 3762 isIRAtom(qop->arg1) 3763 && isIRAtom(qop->arg2) 3764 && isIRAtom(qop->arg3) 3765 && isIRAtom(qop->arg4)); 3766 case Iex_Triop: triop = e->Iex.Triop.details; 3767 return toBool( 3768 isIRAtom(triop->arg1) 3769 && isIRAtom(triop->arg2) 3770 && isIRAtom(triop->arg3)); 3771 case Iex_Binop: return toBool( 3772 isIRAtom(e->Iex.Binop.arg1) 3773 && isIRAtom(e->Iex.Binop.arg2)); 3774 case Iex_Unop: return isIRAtom(e->Iex.Unop.arg); 3775 case Iex_Load: return isIRAtom(e->Iex.Load.addr); 3776 case Iex_Const: return True; 3777 case Iex_CCall: for (i = 0; e->Iex.CCall.args[i]; i++) 3778 if (!isIRAtom(e->Iex.CCall.args[i])) 3779 return False; 3780 return True; 3781 case Iex_ITE: return toBool ( 3782 isIRAtom(e->Iex.ITE.cond) 3783 && isIRAtom(e->Iex.ITE.iftrue) 3784 && isIRAtom(e->Iex.ITE.iffalse)); 3785 default: vpanic("isFlatIRStmt(e)"); 3786 } 3787 /*notreached*/ 3788 vassert(0); 3789 case Ist_Store: 3790 return toBool( isIRAtom(st->Ist.Store.addr) 3791 && isIRAtom(st->Ist.Store.data) ); 3792 case Ist_StoreG: { 3793 const IRStoreG* sg = st->Ist.StoreG.details; 3794 return toBool( isIRAtom(sg->addr) 3795 && isIRAtom(sg->data) && isIRAtom(sg->guard) ); 3796 } 3797 case Ist_LoadG: { 3798 const IRLoadG* lg = st->Ist.LoadG.details; 3799 return toBool( isIRAtom(lg->addr) 3800 && isIRAtom(lg->alt) && isIRAtom(lg->guard) ); 3801 } 3802 case Ist_CAS: { 3803 const IRCAS* cas = st->Ist.CAS.details; 3804 return toBool( isIRAtom(cas->addr) 3805 && (cas->expdHi ? isIRAtom(cas->expdHi) : True) 3806 && isIRAtom(cas->expdLo) 3807 && (cas->dataHi ? isIRAtom(cas->dataHi) : True) 3808 && isIRAtom(cas->dataLo) ); 3809 } 3810 case Ist_LLSC: 3811 return toBool( isIRAtom(st->Ist.LLSC.addr) 3812 && (st->Ist.LLSC.storedata 3813 ? isIRAtom(st->Ist.LLSC.storedata) : True) ); 3814 case Ist_Dirty: { 3815 const IRDirty* di = st->Ist.Dirty.details; 3816 if (!isIRAtom(di->guard)) 3817 return False; 3818 for (i = 0; di->args[i]; i++) 3819 if (!isIRAtom_or_VECRET_or_GSPTR(di->args[i])) 3820 return False; 3821 if (di->mAddr && !isIRAtom(di->mAddr)) 3822 return False; 3823 return True; 3824 } 3825 case Ist_NoOp: 3826 case Ist_IMark: 3827 case Ist_MBE: 3828 return True; 3829 case Ist_Exit: 3830 return isIRAtom(st->Ist.Exit.guard); 3831 default: 3832 vpanic("isFlatIRStmt(st)"); 3833 } 3834 } 3835 3836 3837 /*---------------------------------------------------------------*/ 3838 /*--- Sanity checking ---*/ 3839 /*---------------------------------------------------------------*/ 3840 3841 /* Checks: 3842 3843 Everything is type-consistent. No ill-typed anything. 3844 The target address at the end of the BB is a 32- or 64- 3845 bit expression, depending on the guest's word size. 3846 3847 Each temp is assigned only once, before its uses. 3848 */ 3849 3850 static inline Int countArgs ( IRExpr** args ) 3851 { 3852 Int i; 3853 for (i = 0; args[i]; i++) 3854 ; 3855 return i; 3856 } 3857 3858 static 3859 __attribute((noreturn)) 3860 void sanityCheckFail ( const IRSB* bb, const IRStmt* stmt, const HChar* what ) 3861 { 3862 vex_printf("\nIR SANITY CHECK FAILURE\n\n"); 3863 ppIRSB(bb); 3864 if (stmt) { 3865 vex_printf("\nIN STATEMENT:\n\n"); 3866 ppIRStmt(stmt); 3867 } 3868 vex_printf("\n\nERROR = %s\n\n", what ); 3869 vpanic("sanityCheckFail: exiting due to bad IR"); 3870 } 3871 3872 static Bool saneIRRegArray ( const IRRegArray* arr ) 3873 { 3874 if (arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */) 3875 return False; 3876 if (arr->elemTy == Ity_I1) 3877 return False; 3878 if (arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */) 3879 return False; 3880 return True; 3881 } 3882 3883 static Bool saneIRCallee ( const IRCallee* cee ) 3884 { 3885 if (cee->name == NULL) 3886 return False; 3887 if (cee->addr == 0) 3888 return False; 3889 if (cee->regparms < 0 || cee->regparms > 3) 3890 return False; 3891 return True; 3892 } 3893 3894 static Bool saneIRConst ( const IRConst* con ) 3895 { 3896 switch (con->tag) { 3897 case Ico_U1: 3898 return toBool( con->Ico.U1 == True || con->Ico.U1 == False ); 3899 default: 3900 /* Is there anything we can meaningfully check? I don't 3901 think so. */ 3902 return True; 3903 } 3904 } 3905 3906 /* Traverse a Stmt/Expr, inspecting IRTemp uses. Report any out of 3907 range ones. Report any which are read and for which the current 3908 def_count is zero. */ 3909 3910 static 3911 void useBeforeDef_Temp ( const IRSB* bb, const IRStmt* stmt, IRTemp tmp, 3912 Int* def_counts ) 3913 { 3914 if (tmp < 0 || tmp >= bb->tyenv->types_used) 3915 sanityCheckFail(bb,stmt, "out of range Temp in IRExpr"); 3916 if (def_counts[tmp] < 1) 3917 sanityCheckFail(bb,stmt, "IRTemp use before def in IRExpr"); 3918 } 3919 3920 static 3921 void assignedOnce_Temp(const IRSB *bb, const IRStmt *stmt, IRTemp tmp, 3922 Int *def_counts, UInt n_def_counts, 3923 const HChar *err_msg_out_of_range, 3924 const HChar *err_msg_assigned_more_than_once) 3925 { 3926 if (tmp < 0 || tmp >= n_def_counts) { 3927 sanityCheckFail(bb, stmt, err_msg_out_of_range); 3928 } 3929 3930 def_counts[tmp]++; 3931 if (def_counts[tmp] > 1) { 3932 sanityCheckFail(bb, stmt, err_msg_assigned_more_than_once); 3933 } 3934 } 3935 3936 static 3937 void useBeforeDef_Expr ( const IRSB* bb, const IRStmt* stmt, 3938 const IRExpr* expr, Int* def_counts ) 3939 { 3940 Int i; 3941 switch (expr->tag) { 3942 case Iex_Get: 3943 break; 3944 case Iex_GetI: 3945 useBeforeDef_Expr(bb,stmt,expr->Iex.GetI.ix,def_counts); 3946 break; 3947 case Iex_RdTmp: 3948 useBeforeDef_Temp(bb,stmt,expr->Iex.RdTmp.tmp,def_counts); 3949 break; 3950 case Iex_Qop: { 3951 const IRQop* qop = expr->Iex.Qop.details; 3952 useBeforeDef_Expr(bb,stmt,qop->arg1,def_counts); 3953 useBeforeDef_Expr(bb,stmt,qop->arg2,def_counts); 3954 useBeforeDef_Expr(bb,stmt,qop->arg3,def_counts); 3955 useBeforeDef_Expr(bb,stmt,qop->arg4,def_counts); 3956 break; 3957 } 3958 case Iex_Triop: { 3959 const IRTriop* triop = expr->Iex.Triop.details; 3960 useBeforeDef_Expr(bb,stmt,triop->arg1,def_counts); 3961 useBeforeDef_Expr(bb,stmt,triop->arg2,def_counts); 3962 useBeforeDef_Expr(bb,stmt,triop->arg3,def_counts); 3963 break; 3964 } 3965 case Iex_Binop: 3966 useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg1,def_counts); 3967 useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg2,def_counts); 3968 break; 3969 case Iex_Unop: 3970 useBeforeDef_Expr(bb,stmt,expr->Iex.Unop.arg,def_counts); 3971 break; 3972 case Iex_Load: 3973 useBeforeDef_Expr(bb,stmt,expr->Iex.Load.addr,def_counts); 3974 break; 3975 case Iex_Const: 3976 break; 3977 case Iex_CCall: 3978 for (i = 0; expr->Iex.CCall.args[i]; i++) { 3979 const IRExpr* arg = expr->Iex.CCall.args[i]; 3980 if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg))) { 3981 /* These aren't allowed in CCall lists. Let's detect 3982 and throw them out here, though, rather than 3983 segfaulting a bit later on. */ 3984 sanityCheckFail(bb,stmt, "IRExprP__* value in CCall arg list"); 3985 } else { 3986 useBeforeDef_Expr(bb,stmt,arg,def_counts); 3987 } 3988 } 3989 break; 3990 case Iex_ITE: 3991 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.cond,def_counts); 3992 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iftrue,def_counts); 3993 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iffalse,def_counts); 3994 break; 3995 default: 3996 vpanic("useBeforeDef_Expr"); 3997 } 3998 } 3999 4000 static 4001 void useBeforeDef_Stmt ( const IRSB* bb, const IRStmt* stmt, Int* def_counts ) 4002 { 4003 Int i; 4004 const IRDirty* d; 4005 const IRCAS* cas; 4006 const IRPutI* puti; 4007 const IRLoadG* lg; 4008 const IRStoreG* sg; 4009 switch (stmt->tag) { 4010 case Ist_IMark: 4011 break; 4012 case Ist_AbiHint: 4013 useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.base,def_counts); 4014 useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.nia,def_counts); 4015 break; 4016 case Ist_Put: 4017 useBeforeDef_Expr(bb,stmt,stmt->Ist.Put.data,def_counts); 4018 break; 4019 case Ist_PutI: 4020 puti = stmt->Ist.PutI.details; 4021 useBeforeDef_Expr(bb,stmt,puti->ix,def_counts); 4022 useBeforeDef_Expr(bb,stmt,puti->data,def_counts); 4023 break; 4024 case Ist_WrTmp: 4025 useBeforeDef_Expr(bb,stmt,stmt->Ist.WrTmp.data,def_counts); 4026 break; 4027 case Ist_Store: 4028 useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.addr,def_counts); 4029 useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.data,def_counts); 4030 break; 4031 case Ist_StoreG: 4032 sg = stmt->Ist.StoreG.details; 4033 useBeforeDef_Expr(bb,stmt,sg->addr,def_counts); 4034 useBeforeDef_Expr(bb,stmt,sg->data,def_counts); 4035 useBeforeDef_Expr(bb,stmt,sg->guard,def_counts); 4036 break; 4037 case Ist_LoadG: 4038 lg = stmt->Ist.LoadG.details; 4039 useBeforeDef_Expr(bb,stmt,lg->addr,def_counts); 4040 useBeforeDef_Expr(bb,stmt,lg->alt,def_counts); 4041 useBeforeDef_Expr(bb,stmt,lg->guard,def_counts); 4042 break; 4043 case Ist_CAS: 4044 cas = stmt->Ist.CAS.details; 4045 useBeforeDef_Expr(bb,stmt,cas->addr,def_counts); 4046 if (cas->expdHi) 4047 useBeforeDef_Expr(bb,stmt,cas->expdHi,def_counts); 4048 useBeforeDef_Expr(bb,stmt,cas->expdLo,def_counts); 4049 if (cas->dataHi) 4050 useBeforeDef_Expr(bb,stmt,cas->dataHi,def_counts); 4051 useBeforeDef_Expr(bb,stmt,cas->dataLo,def_counts); 4052 break; 4053 case Ist_LLSC: 4054 useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.addr,def_counts); 4055 if (stmt->Ist.LLSC.storedata != NULL) 4056 useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.storedata,def_counts); 4057 break; 4058 case Ist_Dirty: 4059 d = stmt->Ist.Dirty.details; 4060 for (i = 0; d->args[i] != NULL; i++) { 4061 IRExpr* arg = d->args[i]; 4062 if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg))) { 4063 /* This is ensured by isFlatIRStmt */ 4064 ; 4065 } else { 4066 useBeforeDef_Expr(bb,stmt,arg,def_counts); 4067 } 4068 } 4069 if (d->mFx != Ifx_None) 4070 useBeforeDef_Expr(bb,stmt,d->mAddr,def_counts); 4071 break; 4072 case Ist_NoOp: 4073 case Ist_MBE: 4074 break; 4075 case Ist_Exit: 4076 useBeforeDef_Expr(bb,stmt,stmt->Ist.Exit.guard,def_counts); 4077 break; 4078 default: 4079 vpanic("useBeforeDef_Stmt"); 4080 } 4081 } 4082 4083 static 4084 void assignedOnce_Stmt(const IRSB *bb, const IRStmt *stmt, 4085 Int *def_counts, UInt n_def_counts) 4086 { 4087 switch (stmt->tag) { 4088 case Ist_WrTmp: 4089 assignedOnce_Temp( 4090 bb, stmt, stmt->Ist.WrTmp.tmp, def_counts, n_def_counts, 4091 "IRStmt.Tmp: destination tmp is out of range", 4092 "IRStmt.Tmp: destination tmp is assigned more than once"); 4093 break; 4094 case Ist_LoadG: 4095 assignedOnce_Temp( 4096 bb, stmt, stmt->Ist.LoadG.details->dst, def_counts, n_def_counts, 4097 "IRStmt.LoadG: destination tmp is out of range", 4098 "IRStmt.LoadG: destination tmp is assigned more than once"); 4099 break; 4100 case Ist_Dirty: 4101 if (stmt->Ist.Dirty.details->tmp != IRTemp_INVALID) { 4102 assignedOnce_Temp( 4103 bb, stmt, stmt->Ist.Dirty.details->tmp, def_counts, n_def_counts, 4104 "IRStmt.Dirty: destination tmp is out of range", 4105 "IRStmt.Dirty: destination tmp is assigned more than once"); 4106 } 4107 break; 4108 case Ist_CAS: 4109 if (stmt->Ist.CAS.details->oldHi != IRTemp_INVALID) { 4110 assignedOnce_Temp( 4111 bb, stmt, stmt->Ist.CAS.details->oldHi, def_counts, n_def_counts, 4112 "IRStmt.CAS: destination tmpHi is out of range", 4113 "IRStmt.CAS: destination tmpHi is assigned more than once"); 4114 } 4115 assignedOnce_Temp( 4116 bb, stmt, stmt->Ist.CAS.details->oldLo, def_counts, n_def_counts, 4117 "IRStmt.CAS: destination tmpLo is out of range", 4118 "IRStmt.CAS: destination tmpLo is assigned more than once"); 4119 break; 4120 case Ist_LLSC: 4121 assignedOnce_Temp( 4122 bb, stmt, stmt->Ist.LLSC.result, def_counts, n_def_counts, 4123 "IRStmt.LLSC: destination tmp is out of range", 4124 "IRStmt.LLSC: destination tmp is assigned more than once"); 4125 break; 4126 // Ignore all other cases 4127 case Ist_NoOp: case Ist_IMark: case Ist_AbiHint: case Ist_Put: case Ist_PutI: 4128 case Ist_Store: case Ist_StoreG: case Ist_MBE: case Ist_Exit: 4129 break; 4130 default: 4131 vassert(0); 4132 } 4133 } 4134 4135 static 4136 void tcExpr ( const IRSB* bb, const IRStmt* stmt, const IRExpr* expr, 4137 IRType gWordTy ) 4138 { 4139 Int i; 4140 IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4; 4141 const IRTypeEnv* tyenv = bb->tyenv; 4142 switch (expr->tag) { 4143 case Iex_Get: 4144 case Iex_RdTmp: 4145 break; 4146 case Iex_GetI: 4147 tcExpr(bb,stmt, expr->Iex.GetI.ix, gWordTy ); 4148 if (typeOfIRExpr(tyenv,expr->Iex.GetI.ix) != Ity_I32) 4149 sanityCheckFail(bb,stmt,"IRExpr.GetI.ix: not :: Ity_I32"); 4150 if (!saneIRRegArray(expr->Iex.GetI.descr)) 4151 sanityCheckFail(bb,stmt,"IRExpr.GetI.descr: invalid descr"); 4152 break; 4153 case Iex_Qop: { 4154 IRType ttarg1, ttarg2, ttarg3, ttarg4; 4155 const IRQop* qop = expr->Iex.Qop.details; 4156 tcExpr(bb,stmt, qop->arg1, gWordTy ); 4157 tcExpr(bb,stmt, qop->arg2, gWordTy ); 4158 tcExpr(bb,stmt, qop->arg3, gWordTy ); 4159 tcExpr(bb,stmt, qop->arg4, gWordTy ); 4160 typeOfPrimop(qop->op, 4161 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 4162 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 4163 || t_arg3 == Ity_INVALID || t_arg4 == Ity_INVALID) { 4164 vex_printf(" op name: " ); 4165 ppIROp(qop->op); 4166 vex_printf("\n"); 4167 sanityCheckFail(bb,stmt, 4168 "Iex.Qop: wrong arity op\n" 4169 "... name of op precedes BB printout\n"); 4170 } 4171 ttarg1 = typeOfIRExpr(tyenv, qop->arg1); 4172 ttarg2 = typeOfIRExpr(tyenv, qop->arg2); 4173 ttarg3 = typeOfIRExpr(tyenv, qop->arg3); 4174 ttarg4 = typeOfIRExpr(tyenv, qop->arg4); 4175 if (t_arg1 != ttarg1 || t_arg2 != ttarg2 4176 || t_arg3 != ttarg3 || t_arg4 != ttarg4) { 4177 vex_printf(" op name: "); 4178 ppIROp(qop->op); 4179 vex_printf("\n"); 4180 vex_printf(" op type is ("); 4181 ppIRType(t_arg1); 4182 vex_printf(","); 4183 ppIRType(t_arg2); 4184 vex_printf(","); 4185 ppIRType(t_arg3); 4186 vex_printf(","); 4187 ppIRType(t_arg4); 4188 vex_printf(") -> "); 4189 ppIRType (t_dst); 4190 vex_printf("\narg tys are ("); 4191 ppIRType(ttarg1); 4192 vex_printf(","); 4193 ppIRType(ttarg2); 4194 vex_printf(","); 4195 ppIRType(ttarg3); 4196 vex_printf(","); 4197 ppIRType(ttarg4); 4198 vex_printf(")\n"); 4199 sanityCheckFail(bb,stmt, 4200 "Iex.Qop: arg tys don't match op tys\n" 4201 "... additional details precede BB printout\n"); 4202 } 4203 break; 4204 } 4205 case Iex_Triop: { 4206 IRType ttarg1, ttarg2, ttarg3; 4207 const IRTriop *triop = expr->Iex.Triop.details; 4208 tcExpr(bb,stmt, triop->arg1, gWordTy ); 4209 tcExpr(bb,stmt, triop->arg2, gWordTy ); 4210 tcExpr(bb,stmt, triop->arg3, gWordTy ); 4211 typeOfPrimop(triop->op, 4212 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 4213 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 4214 || t_arg3 == Ity_INVALID || t_arg4 != Ity_INVALID) { 4215 vex_printf(" op name: " ); 4216 ppIROp(triop->op); 4217 vex_printf("\n"); 4218 sanityCheckFail(bb,stmt, 4219 "Iex.Triop: wrong arity op\n" 4220 "... name of op precedes BB printout\n"); 4221 } 4222 ttarg1 = typeOfIRExpr(tyenv, triop->arg1); 4223 ttarg2 = typeOfIRExpr(tyenv, triop->arg2); 4224 ttarg3 = typeOfIRExpr(tyenv, triop->arg3); 4225 if (t_arg1 != ttarg1 || t_arg2 != ttarg2 || t_arg3 != ttarg3) { 4226 vex_printf(" op name: "); 4227 ppIROp(triop->op); 4228 vex_printf("\n"); 4229 vex_printf(" op type is ("); 4230 ppIRType(t_arg1); 4231 vex_printf(","); 4232 ppIRType(t_arg2); 4233 vex_printf(","); 4234 ppIRType(t_arg3); 4235 vex_printf(") -> "); 4236 ppIRType (t_dst); 4237 vex_printf("\narg tys are ("); 4238 ppIRType(ttarg1); 4239 vex_printf(","); 4240 ppIRType(ttarg2); 4241 vex_printf(","); 4242 ppIRType(ttarg3); 4243 vex_printf(")\n"); 4244 sanityCheckFail(bb,stmt, 4245 "Iex.Triop: arg tys don't match op tys\n" 4246 "... additional details precede BB printout\n"); 4247 } 4248 break; 4249 } 4250 case Iex_Binop: { 4251 IRType ttarg1, ttarg2; 4252 tcExpr(bb,stmt, expr->Iex.Binop.arg1, gWordTy ); 4253 tcExpr(bb,stmt, expr->Iex.Binop.arg2, gWordTy ); 4254 typeOfPrimop(expr->Iex.Binop.op, 4255 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 4256 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID 4257 || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) { 4258 vex_printf(" op name: " ); 4259 ppIROp(expr->Iex.Binop.op); 4260 vex_printf("\n"); 4261 sanityCheckFail(bb,stmt, 4262 "Iex.Binop: wrong arity op\n" 4263 "... name of op precedes BB printout\n"); 4264 } 4265 ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg1); 4266 ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg2); 4267 if (t_arg1 != ttarg1 || t_arg2 != ttarg2) { 4268 vex_printf(" op name: "); 4269 ppIROp(expr->Iex.Binop.op); 4270 vex_printf("\n"); 4271 vex_printf(" op type is ("); 4272 ppIRType(t_arg1); 4273 vex_printf(","); 4274 ppIRType(t_arg2); 4275 vex_printf(") -> "); 4276 ppIRType (t_dst); 4277 vex_printf("\narg tys are ("); 4278 ppIRType(ttarg1); 4279 vex_printf(","); 4280 ppIRType(ttarg2); 4281 vex_printf(")\n"); 4282 sanityCheckFail(bb,stmt, 4283 "Iex.Binop: arg tys don't match op tys\n" 4284 "... additional details precede BB printout\n"); 4285 } 4286 break; 4287 } 4288 case Iex_Unop: 4289 tcExpr(bb,stmt, expr->Iex.Unop.arg, gWordTy ); 4290 typeOfPrimop(expr->Iex.Unop.op, 4291 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4); 4292 if (t_arg1 == Ity_INVALID || t_arg2 != Ity_INVALID 4293 || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) 4294 sanityCheckFail(bb,stmt,"Iex.Unop: wrong arity op"); 4295 if (t_arg1 != typeOfIRExpr(tyenv, expr->Iex.Unop.arg)) 4296 sanityCheckFail(bb,stmt,"Iex.Unop: arg ty doesn't match op ty"); 4297 break; 4298 case Iex_Load: 4299 tcExpr(bb,stmt, expr->Iex.Load.addr, gWordTy); 4300 if (typeOfIRExpr(tyenv, expr->Iex.Load.addr) != gWordTy) 4301 sanityCheckFail(bb,stmt,"Iex.Load.addr: not :: guest word type"); 4302 if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE) 4303 sanityCheckFail(bb,stmt,"Iex.Load.end: bogus endianness"); 4304 break; 4305 case Iex_CCall: 4306 if (!saneIRCallee(expr->Iex.CCall.cee)) 4307 sanityCheckFail(bb,stmt,"Iex.CCall.cee: bad IRCallee"); 4308 if (expr->Iex.CCall.cee->regparms > countArgs(expr->Iex.CCall.args)) 4309 sanityCheckFail(bb,stmt,"Iex.CCall.cee: #regparms > #args"); 4310 for (i = 0; expr->Iex.CCall.args[i]; i++) { 4311 if (i >= 32) 4312 sanityCheckFail(bb,stmt,"Iex.CCall: > 32 args"); 4313 IRExpr* arg = expr->Iex.CCall.args[i]; 4314 if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg))) 4315 sanityCheckFail(bb,stmt,"Iex.CCall.args: is VECRET/GSPTR"); 4316 tcExpr(bb,stmt, arg, gWordTy); 4317 } 4318 if (expr->Iex.CCall.retty == Ity_I1) 4319 sanityCheckFail(bb,stmt,"Iex.CCall.retty: cannot return :: Ity_I1"); 4320 for (i = 0; expr->Iex.CCall.args[i]; i++) 4321 if (typeOfIRExpr(tyenv, expr->Iex.CCall.args[i]) == Ity_I1) 4322 sanityCheckFail(bb,stmt,"Iex.CCall.arg: arg :: Ity_I1"); 4323 break; 4324 case Iex_Const: 4325 if (!saneIRConst(expr->Iex.Const.con)) 4326 sanityCheckFail(bb,stmt,"Iex.Const.con: invalid const"); 4327 break; 4328 case Iex_ITE: 4329 tcExpr(bb,stmt, expr->Iex.ITE.cond, gWordTy); 4330 tcExpr(bb,stmt, expr->Iex.ITE.iftrue, gWordTy); 4331 tcExpr(bb,stmt, expr->Iex.ITE.iffalse, gWordTy); 4332 if (typeOfIRExpr(tyenv, expr->Iex.ITE.cond) != Ity_I1) 4333 sanityCheckFail(bb,stmt,"Iex.ITE.cond: cond :: Ity_I1"); 4334 if (typeOfIRExpr(tyenv, expr->Iex.ITE.iftrue) 4335 != typeOfIRExpr(tyenv, expr->Iex.ITE.iffalse)) 4336 sanityCheckFail(bb,stmt,"Iex.ITE: iftrue/iffalse mismatch"); 4337 break; 4338 default: 4339 vpanic("tcExpr"); 4340 } 4341 } 4342 4343 4344 static 4345 void tcStmt ( const IRSB* bb, const IRStmt* stmt, IRType gWordTy ) 4346 { 4347 Int i; 4348 IRType tyExpd, tyData; 4349 const IRTypeEnv* tyenv = bb->tyenv; 4350 switch (stmt->tag) { 4351 case Ist_IMark: 4352 /* Somewhat heuristic, but rule out totally implausible 4353 instruction sizes and deltas. */ 4354 if (stmt->Ist.IMark.len > 24) 4355 sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible"); 4356 if (stmt->Ist.IMark.delta > 1) 4357 sanityCheckFail(bb,stmt,"IRStmt.IMark.delta: implausible"); 4358 break; 4359 case Ist_AbiHint: 4360 if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.base) != gWordTy) 4361 sanityCheckFail(bb,stmt,"IRStmt.AbiHint.base: " 4362 "not :: guest word type"); 4363 if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.nia) != gWordTy) 4364 sanityCheckFail(bb,stmt,"IRStmt.AbiHint.nia: " 4365 "not :: guest word type"); 4366 break; 4367 case Ist_Put: 4368 tcExpr( bb, stmt, stmt->Ist.Put.data, gWordTy ); 4369 if (typeOfIRExpr(tyenv,stmt->Ist.Put.data) == Ity_I1) 4370 sanityCheckFail(bb,stmt,"IRStmt.Put.data: cannot Put :: Ity_I1"); 4371 break; 4372 case Ist_PutI:{ 4373 const IRPutI* puti = stmt->Ist.PutI.details; 4374 tcExpr( bb, stmt, puti->data, gWordTy ); 4375 tcExpr( bb, stmt, puti->ix, gWordTy ); 4376 if (typeOfIRExpr(tyenv,puti->data) == Ity_I1) 4377 sanityCheckFail(bb,stmt,"IRStmt.PutI.data: cannot PutI :: Ity_I1"); 4378 if (typeOfIRExpr(tyenv,puti->data) 4379 != puti->descr->elemTy) 4380 sanityCheckFail(bb,stmt,"IRStmt.PutI.data: data ty != elem ty"); 4381 if (typeOfIRExpr(tyenv,puti->ix) != Ity_I32) 4382 sanityCheckFail(bb,stmt,"IRStmt.PutI.ix: not :: Ity_I32"); 4383 if (!saneIRRegArray(puti->descr)) 4384 sanityCheckFail(bb,stmt,"IRStmt.PutI.descr: invalid descr"); 4385 break; 4386 } 4387 case Ist_WrTmp: 4388 tcExpr( bb, stmt, stmt->Ist.WrTmp.data, gWordTy ); 4389 if (typeOfIRTemp(tyenv, stmt->Ist.WrTmp.tmp) 4390 != typeOfIRExpr(tyenv, stmt->Ist.WrTmp.data)) 4391 sanityCheckFail(bb,stmt, 4392 "IRStmt.Put.Tmp: tmp and expr do not match"); 4393 break; 4394 case Ist_Store: 4395 tcExpr( bb, stmt, stmt->Ist.Store.addr, gWordTy ); 4396 tcExpr( bb, stmt, stmt->Ist.Store.data, gWordTy ); 4397 if (typeOfIRExpr(tyenv, stmt->Ist.Store.addr) != gWordTy) 4398 sanityCheckFail(bb,stmt, 4399 "IRStmt.Store.addr: not :: guest word type"); 4400 if (typeOfIRExpr(tyenv, stmt->Ist.Store.data) == Ity_I1) 4401 sanityCheckFail(bb,stmt, 4402 "IRStmt.Store.data: cannot Store :: Ity_I1"); 4403 if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE) 4404 sanityCheckFail(bb,stmt,"Ist.Store.end: bogus endianness"); 4405 break; 4406 case Ist_StoreG: { 4407 const IRStoreG* sg = stmt->Ist.StoreG.details; 4408 tcExpr( bb, stmt, sg->addr, gWordTy ); 4409 tcExpr( bb, stmt, sg->data, gWordTy ); 4410 tcExpr( bb, stmt, sg->guard, gWordTy ); 4411 if (typeOfIRExpr(tyenv, sg->addr) != gWordTy) 4412 sanityCheckFail(bb,stmt,"IRStmtG...addr: not :: guest word type"); 4413 if (typeOfIRExpr(tyenv, sg->data) == Ity_I1) 4414 sanityCheckFail(bb,stmt,"IRStmtG...data: cannot Store :: Ity_I1"); 4415 if (typeOfIRExpr(tyenv, sg->guard) != Ity_I1) 4416 sanityCheckFail(bb,stmt,"IRStmtG...guard: not :: Ity_I1"); 4417 if (sg->end != Iend_LE && sg->end != Iend_BE) 4418 sanityCheckFail(bb,stmt,"IRStmtG...end: bogus endianness"); 4419 break; 4420 } 4421 case Ist_LoadG: { 4422 const IRLoadG* lg = stmt->Ist.LoadG.details; 4423 tcExpr( bb, stmt, lg->addr, gWordTy ); 4424 tcExpr( bb, stmt, lg->alt, gWordTy ); 4425 tcExpr( bb, stmt, lg->guard, gWordTy ); 4426 if (typeOfIRExpr(tyenv, lg->guard) != Ity_I1) 4427 sanityCheckFail(bb,stmt,"IRStmt.LoadG.guard: not :: Ity_I1"); 4428 if (typeOfIRExpr(tyenv, lg->addr) != gWordTy) 4429 sanityCheckFail(bb,stmt,"IRStmt.LoadG.addr: not " 4430 ":: guest word type"); 4431 if (typeOfIRExpr(tyenv, lg->alt) != typeOfIRTemp(tyenv, lg->dst)) 4432 sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/alt type mismatch"); 4433 IRType cvtRes = Ity_INVALID, cvtArg = Ity_INVALID; 4434 typeOfIRLoadGOp(lg->cvt, &cvtRes, &cvtArg); 4435 if (cvtRes != typeOfIRTemp(tyenv, lg->dst)) 4436 sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/loaded type mismatch"); 4437 break; 4438 } 4439 case Ist_CAS: { 4440 const IRCAS* cas = stmt->Ist.CAS.details; 4441 /* make sure it's definitely either a CAS or a DCAS */ 4442 if (cas->oldHi == IRTemp_INVALID 4443 && cas->expdHi == NULL && cas->dataHi == NULL) { 4444 /* fine; it's a single cas */ 4445 } 4446 else 4447 if (cas->oldHi != IRTemp_INVALID 4448 && cas->expdHi != NULL && cas->dataHi != NULL) { 4449 /* fine; it's a double cas */ 4450 } 4451 else { 4452 /* it's some el-mutanto hybrid */ 4453 goto bad_cas; 4454 } 4455 /* check the address type */ 4456 tcExpr( bb, stmt, cas->addr, gWordTy ); 4457 if (typeOfIRExpr(tyenv, cas->addr) != gWordTy) goto bad_cas; 4458 /* check types on the {old,expd,data}Lo components agree */ 4459 tyExpd = typeOfIRExpr(tyenv, cas->expdLo); 4460 tyData = typeOfIRExpr(tyenv, cas->dataLo); 4461 if (tyExpd != tyData) goto bad_cas; 4462 if (tyExpd != typeOfIRTemp(tyenv, cas->oldLo)) 4463 goto bad_cas; 4464 /* check the base element type is sane */ 4465 if (tyExpd == Ity_I8 || tyExpd == Ity_I16 || tyExpd == Ity_I32 4466 || (gWordTy == Ity_I64 && tyExpd == Ity_I64)) { 4467 /* fine */ 4468 } else { 4469 goto bad_cas; 4470 } 4471 /* If it's a DCAS, check types on the {old,expd,data}Hi 4472 components too */ 4473 if (cas->oldHi != IRTemp_INVALID) { 4474 tyExpd = typeOfIRExpr(tyenv, cas->expdHi); 4475 tyData = typeOfIRExpr(tyenv, cas->dataHi); 4476 if (tyExpd != tyData) goto bad_cas; 4477 if (tyExpd != typeOfIRTemp(tyenv, cas->oldHi)) 4478 goto bad_cas; 4479 /* and finally check that oldLo and oldHi have the same 4480 type. This forces equivalence amongst all 6 types. */ 4481 if (typeOfIRTemp(tyenv, cas->oldHi) 4482 != typeOfIRTemp(tyenv, cas->oldLo)) 4483 goto bad_cas; 4484 } 4485 break; 4486 bad_cas: 4487 sanityCheckFail(bb,stmt,"IRStmt.CAS: ill-formed"); 4488 break; 4489 } 4490 case Ist_LLSC: { 4491 IRType tyRes; 4492 if (typeOfIRExpr(tyenv, stmt->Ist.LLSC.addr) != gWordTy) 4493 sanityCheckFail(bb,stmt,"IRStmt.LLSC.addr: not :: guest word type"); 4494 if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE) 4495 sanityCheckFail(bb,stmt,"Ist.LLSC.end: bogus endianness"); 4496 tyRes = typeOfIRTemp(tyenv, stmt->Ist.LLSC.result); 4497 if (stmt->Ist.LLSC.storedata == NULL) { 4498 /* it's a LL */ 4499 if (tyRes != Ity_I64 && tyRes != Ity_I32 4500 && tyRes != Ity_I16 && tyRes != Ity_I8) 4501 sanityCheckFail(bb,stmt,"Ist.LLSC(LL).result :: bogus"); 4502 } else { 4503 /* it's a SC */ 4504 if (tyRes != Ity_I1) 4505 sanityCheckFail(bb,stmt,"Ist.LLSC(SC).result: not :: Ity_I1"); 4506 tyData = typeOfIRExpr(tyenv, stmt->Ist.LLSC.storedata); 4507 if (tyData != Ity_I64 && tyData != Ity_I32 4508 && tyData != Ity_I16 && tyData != Ity_I8) 4509 sanityCheckFail(bb,stmt, 4510 "Ist.LLSC(SC).result :: storedata bogus"); 4511 } 4512 break; 4513 } 4514 case Ist_Dirty: { 4515 /* Mostly check for various kinds of ill-formed dirty calls. */ 4516 const IRDirty* d = stmt->Ist.Dirty.details; 4517 if (d->cee == NULL) goto bad_dirty; 4518 if (!saneIRCallee(d->cee)) goto bad_dirty; 4519 if (d->cee->regparms > countArgs(d->args)) goto bad_dirty; 4520 if (d->mFx == Ifx_None) { 4521 if (d->mAddr != NULL || d->mSize != 0) 4522 goto bad_dirty; 4523 } else { 4524 if (d->mAddr == NULL || d->mSize == 0) 4525 goto bad_dirty; 4526 } 4527 if (d->nFxState < 0 || d->nFxState > VEX_N_FXSTATE) 4528 goto bad_dirty; 4529 for (i = 0; i < d->nFxState; i++) { 4530 if (d->fxState[i].fx == Ifx_None) goto bad_dirty; 4531 if (d->fxState[i].size <= 0) goto bad_dirty; 4532 if (d->fxState[i].nRepeats == 0) { 4533 if (d->fxState[i].repeatLen != 0) goto bad_dirty; 4534 } else { 4535 if (d->fxState[i].repeatLen <= d->fxState[i].size) 4536 goto bad_dirty; 4537 /* the % is safe because of the .size check above */ 4538 if ((d->fxState[i].repeatLen % d->fxState[i].size) != 0) 4539 goto bad_dirty; 4540 } 4541 } 4542 /* check guard */ 4543 if (d->guard == NULL) goto bad_dirty; 4544 tcExpr( bb, stmt, d->guard, gWordTy ); 4545 if (typeOfIRExpr(tyenv, d->guard) != Ity_I1) 4546 sanityCheckFail(bb,stmt,"IRStmt.Dirty.guard not :: Ity_I1"); 4547 /* check types, minimally */ 4548 IRType retTy = Ity_INVALID; 4549 if (d->tmp != IRTemp_INVALID) { 4550 retTy = typeOfIRTemp(tyenv, d->tmp); 4551 if (retTy == Ity_I1) 4552 sanityCheckFail(bb,stmt,"IRStmt.Dirty.dst :: Ity_I1"); 4553 } 4554 UInt nVECRETs = 0, nGSPTRs = 0; 4555 for (i = 0; d->args[i] != NULL; i++) { 4556 if (i >= 32) 4557 sanityCheckFail(bb,stmt,"IRStmt.Dirty: > 32 args"); 4558 const IRExpr* arg = d->args[i]; 4559 if (UNLIKELY(arg->tag == Iex_VECRET)) { 4560 nVECRETs++; 4561 } else if (UNLIKELY(arg->tag == Iex_GSPTR)) { 4562 nGSPTRs++; 4563 } else { 4564 if (typeOfIRExpr(tyenv, arg) == Ity_I1) 4565 sanityCheckFail(bb,stmt,"IRStmt.Dirty.arg[i] :: Ity_I1"); 4566 } 4567 if (nGSPTRs > 1) { 4568 sanityCheckFail(bb,stmt,"IRStmt.Dirty.args: > 1 GSPTR arg"); 4569 } 4570 if (nVECRETs == 1) { 4571 /* Fn must return V128 or V256. */ 4572 if (retTy != Ity_V128 && retTy != Ity_V256) 4573 sanityCheckFail(bb,stmt, 4574 "IRStmt.Dirty.args: VECRET present, " 4575 "but fn does not return V128 or V256"); 4576 } else if (nVECRETs == 0) { 4577 /* Fn must not return V128 or V256 */ 4578 if (retTy == Ity_V128 || retTy == Ity_V256) 4579 sanityCheckFail(bb,stmt, 4580 "IRStmt.Dirty.args: VECRET not present, " 4581 "but fn returns V128 or V256"); 4582 } else { 4583 sanityCheckFail(bb,stmt, 4584 "IRStmt.Dirty.args: > 1 VECRET present"); 4585 } 4586 } 4587 if (nGSPTRs > 1) { 4588 sanityCheckFail(bb,stmt, 4589 "IRStmt.Dirty.args: > 1 GSPTR present"); 4590 } 4591 /* If you ask for the baseblock pointer, you have to make 4592 some declaration about access to the guest state too. */ 4593 if (d->nFxState == 0 && nGSPTRs != 0) { 4594 sanityCheckFail(bb,stmt, 4595 "IRStmt.Dirty.args: GSPTR requested, " 4596 "but no fxState declared"); 4597 } 4598 break; 4599 bad_dirty: 4600 sanityCheckFail(bb,stmt,"IRStmt.Dirty: ill-formed"); 4601 break; 4602 } 4603 case Ist_NoOp: 4604 break; 4605 case Ist_MBE: 4606 switch (stmt->Ist.MBE.event) { 4607 case Imbe_Fence: case Imbe_CancelReservation: 4608 break; 4609 default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown"); 4610 break; 4611 } 4612 break; 4613 case Ist_Exit: 4614 tcExpr( bb, stmt, stmt->Ist.Exit.guard, gWordTy ); 4615 if (typeOfIRExpr(tyenv,stmt->Ist.Exit.guard) != Ity_I1) 4616 sanityCheckFail(bb,stmt,"IRStmt.Exit.guard: not :: Ity_I1"); 4617 if (!saneIRConst(stmt->Ist.Exit.dst)) 4618 sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: bad dst"); 4619 if (typeOfIRConst(stmt->Ist.Exit.dst) != gWordTy) 4620 sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: not :: guest word type"); 4621 /* because it would intersect with host_EvC_* */ 4622 if (stmt->Ist.Exit.offsIP < 16) 4623 sanityCheckFail(bb,stmt,"IRStmt.Exit.offsIP: too low"); 4624 break; 4625 default: 4626 vpanic("tcStmt"); 4627 } 4628 } 4629 4630 void sanityCheckIRSB ( const IRSB* bb, const HChar* caller, 4631 Bool require_flat, IRType guest_word_size ) 4632 { 4633 Int i; 4634 Int n_temps = bb->tyenv->types_used; 4635 Int* def_counts = LibVEX_Alloc_inline(n_temps * sizeof(Int)); 4636 4637 if (0) 4638 vex_printf("sanityCheck: %s\n", caller); 4639 4640 vassert(guest_word_size == Ity_I32 4641 || guest_word_size == Ity_I64); 4642 4643 if (bb->stmts_used < 0 || bb->stmts_size < 8 4644 || bb->stmts_used > bb->stmts_size) 4645 /* this BB is so strange we can't even print it */ 4646 vpanic("sanityCheckIRSB: stmts array limits wierd"); 4647 4648 /* Ensure each temp has a plausible type. */ 4649 for (i = 0; i < n_temps; i++) { 4650 IRType ty = typeOfIRTemp(bb->tyenv,(IRTemp)i); 4651 if (!isPlausibleIRType(ty)) { 4652 vex_printf("Temp t%d declared with implausible type 0x%x\n", 4653 i, (UInt)ty); 4654 sanityCheckFail(bb,NULL,"Temp declared with implausible type"); 4655 } 4656 } 4657 4658 const IRStmt* stmt; 4659 4660 /* Check for flatness, if required. */ 4661 if (require_flat) { 4662 for (i = 0; i < bb->stmts_used; i++) { 4663 stmt = bb->stmts[i]; 4664 if (!stmt) 4665 sanityCheckFail(bb, stmt, "IRStmt: is NULL"); 4666 if (!isFlatIRStmt(stmt)) 4667 sanityCheckFail(bb, stmt, "IRStmt: is not flat"); 4668 } 4669 if (!isIRAtom(bb->next)) 4670 sanityCheckFail(bb, NULL, "bb->next is not an atom"); 4671 } 4672 4673 /* Count the defs of each temp. Only one def is allowed. 4674 Also, check that each used temp has already been defd. */ 4675 4676 for (i = 0; i < n_temps; i++) 4677 def_counts[i] = 0; 4678 4679 for (i = 0; i < bb->stmts_used; i++) { 4680 stmt = bb->stmts[i]; 4681 /* Check any temps used by this statement. */ 4682 useBeforeDef_Stmt(bb,stmt,def_counts); 4683 4684 /* Now make note of any temps defd by this statement. */ 4685 assignedOnce_Stmt(bb, stmt, def_counts, n_temps); 4686 } 4687 4688 /* Typecheck everything. */ 4689 for (i = 0; i < bb->stmts_used; i++) 4690 tcStmt(bb, bb->stmts[i], guest_word_size); 4691 if (typeOfIRExpr(bb->tyenv,bb->next) != guest_word_size) 4692 sanityCheckFail(bb, NULL, "bb->next field has wrong type"); 4693 /* because it would intersect with host_EvC_* */ 4694 if (bb->offsIP < 16) 4695 sanityCheckFail(bb, NULL, "bb->offsIP: too low"); 4696 } 4697 4698 /*---------------------------------------------------------------*/ 4699 /*--- Misc helper functions ---*/ 4700 /*---------------------------------------------------------------*/ 4701 4702 Bool eqIRConst ( const IRConst* c1, const IRConst* c2 ) 4703 { 4704 if (c1->tag != c2->tag) 4705 return False; 4706 4707 switch (c1->tag) { 4708 case Ico_U1: return toBool( (1 & c1->Ico.U1) == (1 & c2->Ico.U1) ); 4709 case Ico_U8: return toBool( c1->Ico.U8 == c2->Ico.U8 ); 4710 case Ico_U16: return toBool( c1->Ico.U16 == c2->Ico.U16 ); 4711 case Ico_U32: return toBool( c1->Ico.U32 == c2->Ico.U32 ); 4712 case Ico_U64: return toBool( c1->Ico.U64 == c2->Ico.U64 ); 4713 case Ico_F32: return toBool( c1->Ico.F32 == c2->Ico.F32 ); 4714 case Ico_F32i: return toBool( c1->Ico.F32i == c2->Ico.F32i ); 4715 case Ico_F64: return toBool( c1->Ico.F64 == c2->Ico.F64 ); 4716 case Ico_F64i: return toBool( c1->Ico.F64i == c2->Ico.F64i ); 4717 case Ico_V128: return toBool( c1->Ico.V128 == c2->Ico.V128 ); 4718 case Ico_V256: return toBool( c1->Ico.V256 == c2->Ico.V256 ); 4719 default: vpanic("eqIRConst"); 4720 } 4721 } 4722 4723 Bool eqIRRegArray ( const IRRegArray* descr1, const IRRegArray* descr2 ) 4724 { 4725 return toBool( descr1->base == descr2->base 4726 && descr1->elemTy == descr2->elemTy 4727 && descr1->nElems == descr2->nElems ); 4728 } 4729 4730 Int sizeofIRType ( IRType ty ) 4731 { 4732 switch (ty) { 4733 case Ity_I8: return 1; 4734 case Ity_I16: return 2; 4735 case Ity_I32: return 4; 4736 case Ity_I64: return 8; 4737 case Ity_I128: return 16; 4738 case Ity_F16: return 2; 4739 case Ity_F32: return 4; 4740 case Ity_F64: return 8; 4741 case Ity_F128: return 16; 4742 case Ity_D32: return 4; 4743 case Ity_D64: return 8; 4744 case Ity_D128: return 16; 4745 case Ity_V128: return 16; 4746 case Ity_V256: return 32; 4747 default: vex_printf("\n"); ppIRType(ty); vex_printf("\n"); 4748 vpanic("sizeofIRType"); 4749 } 4750 } 4751 4752 IRType integerIRTypeOfSize ( Int szB ) 4753 { 4754 switch (szB) { 4755 case 8: return Ity_I64; 4756 case 4: return Ity_I32; 4757 case 2: return Ity_I16; 4758 case 1: return Ity_I8; 4759 default: vpanic("integerIRTypeOfSize"); 4760 } 4761 } 4762 4763 IRExpr* mkIRExpr_HWord ( HWord hw ) 4764 { 4765 vassert(sizeof(void*) == sizeof(HWord)); 4766 if (sizeof(HWord) == 4) 4767 return IRExpr_Const(IRConst_U32((UInt)hw)); 4768 if (sizeof(HWord) == 8) 4769 return IRExpr_Const(IRConst_U64((ULong)hw)); 4770 vpanic("mkIRExpr_HWord"); 4771 } 4772 4773 IRDirty* unsafeIRDirty_0_N ( Int regparms, const HChar* name, void* addr, 4774 IRExpr** args ) 4775 { 4776 IRDirty* d = emptyIRDirty(); 4777 d->cee = mkIRCallee ( regparms, name, addr ); 4778 d->guard = IRExpr_Const(IRConst_U1(True)); 4779 d->args = args; 4780 return d; 4781 } 4782 4783 IRDirty* unsafeIRDirty_1_N ( IRTemp dst, 4784 Int regparms, const HChar* name, void* addr, 4785 IRExpr** args ) 4786 { 4787 IRDirty* d = emptyIRDirty(); 4788 d->cee = mkIRCallee ( regparms, name, addr ); 4789 d->guard = IRExpr_Const(IRConst_U1(True)); 4790 d->args = args; 4791 d->tmp = dst; 4792 return d; 4793 } 4794 4795 IRExpr* mkIRExprCCall ( IRType retty, 4796 Int regparms, const HChar* name, void* addr, 4797 IRExpr** args ) 4798 { 4799 return IRExpr_CCall ( mkIRCallee ( regparms, name, addr ), 4800 retty, args ); 4801 } 4802 4803 Bool eqIRAtom ( const IRExpr* a1, const IRExpr* a2 ) 4804 { 4805 vassert(isIRAtom(a1)); 4806 vassert(isIRAtom(a2)); 4807 if (a1->tag == Iex_RdTmp && a2->tag == Iex_RdTmp) 4808 return toBool(a1->Iex.RdTmp.tmp == a2->Iex.RdTmp.tmp); 4809 if (a1->tag == Iex_Const && a2->tag == Iex_Const) 4810 return eqIRConst(a1->Iex.Const.con, a2->Iex.Const.con); 4811 return False; 4812 } 4813 4814 /*---------------------------------------------------------------*/ 4815 /*--- end ir_defs.c ---*/ 4816 /*---------------------------------------------------------------*/ 4817
