1 // WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*- 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// \brief This file declares WebAssembly-specific per-machine-function 12 /// information. 13 /// 14 //===----------------------------------------------------------------------===// 15 16 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H 17 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H 18 19 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 20 #include "llvm/CodeGen/MachineRegisterInfo.h" 21 22 namespace llvm { 23 24 /// This class is derived from MachineFunctionInfo and contains private 25 /// WebAssembly-specific information for each MachineFunction. 26 class WebAssemblyFunctionInfo final : public MachineFunctionInfo { 27 MachineFunction &MF; 28 29 std::vector<MVT> Params; 30 31 /// A mapping from CodeGen vreg index to WebAssembly register number. 32 std::vector<unsigned> WARegs; 33 34 /// A mapping from CodeGen vreg index to a boolean value indicating whether 35 /// the given register is considered to be "stackified", meaning it has been 36 /// determined or made to meet the stack requirements: 37 /// - single use (per path) 38 /// - single def (per path) 39 /// - defined and used in LIFO order with other stack registers 40 BitVector VRegStackified; 41 42 // A virtual register holding the pointer to the vararg buffer for vararg 43 // functions. It is created and set in TLI::LowerFormalArguments and read by 44 // TLI::LowerVASTART 45 unsigned VarargVreg = -1U; 46 47 public: 48 explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {} 49 ~WebAssemblyFunctionInfo() override; 50 51 void addParam(MVT VT) { Params.push_back(VT); } 52 const std::vector<MVT> &getParams() const { return Params; } 53 54 unsigned getVarargBufferVreg() const { 55 assert(VarargVreg != -1U && "Vararg vreg hasn't been set"); 56 return VarargVreg; 57 } 58 void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; } 59 60 static const unsigned UnusedReg = -1u; 61 62 void stackifyVReg(unsigned VReg) { 63 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size()) 64 VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1); 65 VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg)); 66 } 67 bool isVRegStackified(unsigned VReg) const { 68 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size()) 69 return false; 70 return VRegStackified.test(TargetRegisterInfo::virtReg2Index(VReg)); 71 } 72 73 void initWARegs(); 74 void setWAReg(unsigned VReg, unsigned WAReg) { 75 assert(WAReg != UnusedReg); 76 assert(TargetRegisterInfo::virtReg2Index(VReg) < WARegs.size()); 77 WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg; 78 } 79 unsigned getWAReg(unsigned Reg) const { 80 assert(TargetRegisterInfo::virtReg2Index(Reg) < WARegs.size()); 81 return WARegs[TargetRegisterInfo::virtReg2Index(Reg)]; 82 } 83 84 // For a given stackified WAReg, return the id number to print with push/pop. 85 static unsigned getWARegStackId(unsigned Reg) { 86 assert(Reg & INT32_MIN); 87 return Reg & INT32_MAX; 88 } 89 }; 90 91 } // end namespace llvm 92 93 #endif 94
