1 /************************************************************************** 2 * 3 * Copyright 2011-2012 Advanced Micro Devices, Inc. 4 * Copyright 2010 VMware, Inc. 5 * Copyright 2009 VMware, Inc. 6 * Copyright 2007-2008 VMware, Inc. 7 * All Rights Reserved. 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the 11 * "Software"), to deal in the Software without restriction, including 12 * without limitation the rights to use, copy, modify, merge, publish, 13 * distribute, sub license, and/or sell copies of the Software, and to 14 * permit persons to whom the Software is furnished to do so, subject to 15 * the following conditions: 16 * 17 * The above copyright notice and this permission notice (including the 18 * next paragraph) shall be included in all copies or substantial portions 19 * of the Software. 20 * 21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 22 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 24 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 25 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 26 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 27 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 28 * 29 **************************************************************************/ 30 31 #include "gallivm/lp_bld_tgsi.h" 32 33 #include "gallivm/lp_bld_arit.h" 34 #include "gallivm/lp_bld_gather.h" 35 #include "gallivm/lp_bld_init.h" 36 #include "gallivm/lp_bld_intr.h" 37 #include "tgsi/tgsi_info.h" 38 #include "tgsi/tgsi_parse.h" 39 #include "tgsi/tgsi_util.h" 40 #include "util/u_memory.h" 41 42 /* The user is responsible for freeing list->instructions */ 43 unsigned lp_bld_tgsi_list_init(struct lp_build_tgsi_context * bld_base) 44 { 45 bld_base->instructions = (struct tgsi_full_instruction *) 46 MALLOC( LP_MAX_INSTRUCTIONS * sizeof(struct tgsi_full_instruction) ); 47 if (!bld_base->instructions) { 48 return 0; 49 } 50 bld_base->max_instructions = LP_MAX_INSTRUCTIONS; 51 return 1; 52 } 53 54 55 unsigned lp_bld_tgsi_add_instruction( 56 struct lp_build_tgsi_context * bld_base, 57 const struct tgsi_full_instruction *inst_to_add) 58 { 59 60 if (bld_base->num_instructions == bld_base->max_instructions) { 61 struct tgsi_full_instruction *instructions; 62 instructions = REALLOC(bld_base->instructions, bld_base->max_instructions 63 * sizeof(struct tgsi_full_instruction), 64 (bld_base->max_instructions + LP_MAX_INSTRUCTIONS) 65 * sizeof(struct tgsi_full_instruction)); 66 if (!instructions) { 67 return 0; 68 } 69 bld_base->instructions = instructions; 70 bld_base->max_instructions += LP_MAX_INSTRUCTIONS; 71 } 72 memcpy(bld_base->instructions + bld_base->num_instructions, inst_to_add, 73 sizeof(bld_base->instructions[0])); 74 75 bld_base->num_instructions++; 76 77 return 1; 78 } 79 80 81 /** 82 * This function assumes that all the args in emit_data have been set. 83 */ 84 static void 85 lp_build_action_set_dst_type( 86 struct lp_build_emit_data * emit_data, 87 struct lp_build_tgsi_context *bld_base, 88 unsigned tgsi_opcode) 89 { 90 if (emit_data->arg_count == 0) { 91 emit_data->dst_type = LLVMVoidTypeInContext(bld_base->base.gallivm->context); 92 } else { 93 /* XXX: Not all opcodes have the same src and dst types. */ 94 emit_data->dst_type = LLVMTypeOf(emit_data->args[0]); 95 } 96 } 97 98 void 99 lp_build_tgsi_intrinsic( 100 const struct lp_build_tgsi_action * action, 101 struct lp_build_tgsi_context * bld_base, 102 struct lp_build_emit_data * emit_data) 103 { 104 struct lp_build_context * base = &bld_base->base; 105 emit_data->output[emit_data->chan] = lp_build_intrinsic( 106 base->gallivm->builder, action->intr_name, 107 emit_data->dst_type, emit_data->args, emit_data->arg_count, 0); 108 } 109 110 LLVMValueRef 111 lp_build_emit_llvm( 112 struct lp_build_tgsi_context *bld_base, 113 unsigned tgsi_opcode, 114 struct lp_build_emit_data * emit_data) 115 { 116 struct lp_build_tgsi_action * action = &bld_base->op_actions[tgsi_opcode]; 117 /* XXX: Assert that this is a componentwise or replicate instruction */ 118 119 lp_build_action_set_dst_type(emit_data, bld_base, tgsi_opcode); 120 emit_data->chan = 0; 121 assert(action->emit); 122 action->emit(action, bld_base, emit_data); 123 return emit_data->output[0]; 124 } 125 126 LLVMValueRef 127 lp_build_emit_llvm_unary( 128 struct lp_build_tgsi_context *bld_base, 129 unsigned tgsi_opcode, 130 LLVMValueRef arg0) 131 { 132 struct lp_build_emit_data emit_data = {{0}}; 133 emit_data.info = tgsi_get_opcode_info(tgsi_opcode); 134 emit_data.arg_count = 1; 135 emit_data.args[0] = arg0; 136 return lp_build_emit_llvm(bld_base, tgsi_opcode, &emit_data); 137 } 138 139 LLVMValueRef 140 lp_build_emit_llvm_binary( 141 struct lp_build_tgsi_context *bld_base, 142 unsigned tgsi_opcode, 143 LLVMValueRef arg0, 144 LLVMValueRef arg1) 145 { 146 struct lp_build_emit_data emit_data = {{0}}; 147 emit_data.info = tgsi_get_opcode_info(tgsi_opcode); 148 emit_data.arg_count = 2; 149 emit_data.args[0] = arg0; 150 emit_data.args[1] = arg1; 151 return lp_build_emit_llvm(bld_base, tgsi_opcode, &emit_data); 152 } 153 154 LLVMValueRef 155 lp_build_emit_llvm_ternary( 156 struct lp_build_tgsi_context *bld_base, 157 unsigned tgsi_opcode, 158 LLVMValueRef arg0, 159 LLVMValueRef arg1, 160 LLVMValueRef arg2) 161 { 162 struct lp_build_emit_data emit_data = {{0}}; 163 emit_data.info = tgsi_get_opcode_info(tgsi_opcode); 164 emit_data.arg_count = 3; 165 emit_data.args[0] = arg0; 166 emit_data.args[1] = arg1; 167 emit_data.args[2] = arg2; 168 return lp_build_emit_llvm(bld_base, tgsi_opcode, &emit_data); 169 } 170 171 /** 172 * The default fetch implementation. 173 */ 174 void lp_build_fetch_args( 175 struct lp_build_tgsi_context * bld_base, 176 struct lp_build_emit_data * emit_data) 177 { 178 unsigned src; 179 for (src = 0; src < emit_data->info->num_src; src++) { 180 emit_data->args[src] = lp_build_emit_fetch(bld_base, emit_data->inst, src, 181 emit_data->src_chan); 182 } 183 emit_data->arg_count = emit_data->info->num_src; 184 lp_build_action_set_dst_type(emit_data, bld_base, 185 emit_data->inst->Instruction.Opcode); 186 } 187 188 /** 189 * with 64-bit src and dst channels aren't 1:1. 190 * check the src/dst types for the opcode, 191 * 1. if neither is 64-bit then src == dst; 192 * 2. if dest is 64-bit 193 * - don't store to y or w 194 * - if src is 64-bit then src == dst. 195 * - else for f2d, d.xy = s.x 196 * - else for f2d, d.zw = s.y 197 * 3. if dst is single, src is 64-bit 198 * - map dst x,z to src xy; 199 * - map dst y,w to src zw; 200 */ 201 static int get_src_chan_idx(unsigned opcode, 202 int dst_chan_index) 203 { 204 enum tgsi_opcode_type dtype = tgsi_opcode_infer_dst_type(opcode); 205 enum tgsi_opcode_type stype = tgsi_opcode_infer_src_type(opcode); 206 207 if (!tgsi_type_is_64bit(dtype) && !tgsi_type_is_64bit(stype)) 208 return dst_chan_index; 209 if (tgsi_type_is_64bit(dtype)) { 210 if (dst_chan_index == 1 || dst_chan_index == 3) 211 return -1; 212 if (tgsi_type_is_64bit(stype)) 213 return dst_chan_index; 214 if (dst_chan_index == 0) 215 return 0; 216 if (dst_chan_index == 2) 217 return 1; 218 } else { 219 if (dst_chan_index == 0 || dst_chan_index == 2) 220 return 0; 221 if (dst_chan_index == 1 || dst_chan_index == 3) 222 return 2; 223 } 224 return -1; 225 } 226 227 /* XXX: COMMENT 228 * It should be assumed that this function ignores writemasks 229 */ 230 boolean 231 lp_build_tgsi_inst_llvm( 232 struct lp_build_tgsi_context * bld_base, 233 const struct tgsi_full_instruction * inst) 234 { 235 unsigned tgsi_opcode = inst->Instruction.Opcode; 236 const struct tgsi_opcode_info * info = tgsi_get_opcode_info(tgsi_opcode); 237 const struct lp_build_tgsi_action * action = 238 &bld_base->op_actions[tgsi_opcode]; 239 struct lp_build_emit_data emit_data; 240 unsigned chan_index; 241 LLVMValueRef val; 242 bld_base->pc++; 243 244 if (bld_base->emit_debug) { 245 bld_base->emit_debug(bld_base, inst, info); 246 } 247 248 /* Ignore deprecated instructions */ 249 switch (inst->Instruction.Opcode) { 250 251 case TGSI_OPCODE_UP2US: 252 case TGSI_OPCODE_UP4B: 253 case TGSI_OPCODE_UP4UB: 254 case TGSI_OPCODE_PUSHA: 255 case TGSI_OPCODE_POPA: 256 case TGSI_OPCODE_SAD: 257 /* deprecated? */ 258 assert(0); 259 return FALSE; 260 break; 261 } 262 263 /* Check if the opcode has been implemented */ 264 if (!action->emit) { 265 return FALSE; 266 } 267 268 memset(&emit_data, 0, sizeof(emit_data)); 269 270 assert(info->num_dst <= 1); 271 if (info->num_dst) { 272 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( inst, chan_index ) { 273 emit_data.output[chan_index] = bld_base->base.undef; 274 } 275 } 276 277 emit_data.inst = inst; 278 emit_data.info = info; 279 280 /* Emit the instructions */ 281 if (info->output_mode == TGSI_OUTPUT_COMPONENTWISE && bld_base->soa) { 282 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) { 283 int src_index = get_src_chan_idx(inst->Instruction.Opcode, chan_index); 284 /* ignore channels 1/3 in double dst */ 285 if (src_index == -1) 286 continue; 287 emit_data.chan = chan_index; 288 emit_data.src_chan = src_index; 289 if (!action->fetch_args) { 290 lp_build_fetch_args(bld_base, &emit_data); 291 } else { 292 action->fetch_args(bld_base, &emit_data); 293 } 294 action->emit(action, bld_base, &emit_data); 295 } 296 } else { 297 emit_data.chan = LP_CHAN_ALL; 298 if (action->fetch_args) { 299 action->fetch_args(bld_base, &emit_data); 300 } 301 /* Make sure the output value is stored in emit_data.output[0], unless 302 * the opcode is channel dependent */ 303 if (info->output_mode != TGSI_OUTPUT_CHAN_DEPENDENT) { 304 emit_data.chan = 0; 305 } 306 action->emit(action, bld_base, &emit_data); 307 308 /* Replicate the output values */ 309 if (info->output_mode == TGSI_OUTPUT_REPLICATE && bld_base->soa) { 310 val = emit_data.output[0]; 311 memset(emit_data.output, 0, sizeof(emit_data.output)); 312 TGSI_FOR_EACH_DST0_ENABLED_CHANNEL(inst, chan_index) { 313 emit_data.output[chan_index] = val; 314 } 315 } 316 } 317 318 if (info->num_dst > 0 && info->opcode != TGSI_OPCODE_STORE) { 319 bld_base->emit_store(bld_base, inst, info, emit_data.output); 320 } 321 return TRUE; 322 } 323 324 325 LLVMValueRef 326 lp_build_emit_fetch( 327 struct lp_build_tgsi_context *bld_base, 328 const struct tgsi_full_instruction *inst, 329 unsigned src_op, 330 const unsigned chan_index) 331 { 332 const struct tgsi_full_src_register *reg = &inst->Src[src_op]; 333 unsigned swizzle; 334 LLVMValueRef res; 335 enum tgsi_opcode_type stype = tgsi_opcode_infer_src_type(inst->Instruction.Opcode); 336 337 if (chan_index == LP_CHAN_ALL) { 338 swizzle = ~0u; 339 } else { 340 swizzle = tgsi_util_get_full_src_register_swizzle(reg, chan_index); 341 if (swizzle > 3) { 342 assert(0 && "invalid swizzle in emit_fetch()"); 343 return bld_base->base.undef; 344 } 345 } 346 347 assert(reg->Register.Index <= bld_base->info->file_max[reg->Register.File]); 348 349 if (bld_base->emit_fetch_funcs[reg->Register.File]) { 350 res = bld_base->emit_fetch_funcs[reg->Register.File](bld_base, reg, stype, 351 swizzle); 352 } else { 353 assert(0 && "invalid src register in emit_fetch()"); 354 return bld_base->base.undef; 355 } 356 357 if (reg->Register.Absolute) { 358 switch (stype) { 359 case TGSI_TYPE_FLOAT: 360 case TGSI_TYPE_DOUBLE: 361 case TGSI_TYPE_UNTYPED: 362 /* modifiers on movs assume data is float */ 363 res = lp_build_abs(&bld_base->base, res); 364 break; 365 case TGSI_TYPE_UNSIGNED: 366 case TGSI_TYPE_SIGNED: 367 case TGSI_TYPE_UNSIGNED64: 368 case TGSI_TYPE_SIGNED64: 369 case TGSI_TYPE_VOID: 370 default: 371 /* abs modifier is only legal on floating point types */ 372 assert(0); 373 break; 374 } 375 } 376 377 if (reg->Register.Negate) { 378 switch (stype) { 379 case TGSI_TYPE_FLOAT: 380 case TGSI_TYPE_UNTYPED: 381 /* modifiers on movs assume data is float */ 382 res = lp_build_negate( &bld_base->base, res ); 383 break; 384 case TGSI_TYPE_DOUBLE: 385 /* no double build context */ 386 assert(0); 387 break; 388 case TGSI_TYPE_SIGNED: 389 case TGSI_TYPE_UNSIGNED: 390 res = lp_build_negate( &bld_base->int_bld, res ); 391 break; 392 case TGSI_TYPE_SIGNED64: 393 case TGSI_TYPE_UNSIGNED64: 394 res = lp_build_negate( &bld_base->int64_bld, res ); 395 break; 396 case TGSI_TYPE_VOID: 397 default: 398 assert(0); 399 break; 400 } 401 } 402 403 /* 404 * Swizzle the argument 405 */ 406 407 if (swizzle == ~0u) { 408 res = bld_base->emit_swizzle(bld_base, res, 409 reg->Register.SwizzleX, 410 reg->Register.SwizzleY, 411 reg->Register.SwizzleZ, 412 reg->Register.SwizzleW); 413 } 414 415 return res; 416 417 } 418 419 420 LLVMValueRef 421 lp_build_emit_fetch_texoffset( 422 struct lp_build_tgsi_context *bld_base, 423 const struct tgsi_full_instruction *inst, 424 unsigned tex_off_op, 425 const unsigned chan_index) 426 { 427 const struct tgsi_texture_offset *off = &inst->TexOffsets[tex_off_op]; 428 struct tgsi_full_src_register reg; 429 unsigned swizzle; 430 LLVMValueRef res; 431 enum tgsi_opcode_type stype = TGSI_TYPE_SIGNED; 432 433 /* convert offset "register" to ordinary register so can use normal emit funcs */ 434 memset(®, 0, sizeof(reg)); 435 reg.Register.File = off->File; 436 reg.Register.Index = off->Index; 437 reg.Register.SwizzleX = off->SwizzleX; 438 reg.Register.SwizzleY = off->SwizzleY; 439 reg.Register.SwizzleZ = off->SwizzleZ; 440 441 if (chan_index == LP_CHAN_ALL) { 442 swizzle = ~0; 443 } else { 444 assert(chan_index < TGSI_SWIZZLE_W); 445 swizzle = tgsi_util_get_src_register_swizzle(®.Register, chan_index); 446 } 447 448 assert(off->Index <= bld_base->info->file_max[off->File]); 449 450 if (bld_base->emit_fetch_funcs[off->File]) { 451 res = bld_base->emit_fetch_funcs[off->File](bld_base, ®, stype, 452 swizzle); 453 } else { 454 assert(0 && "invalid src register in emit_fetch_texoffset()"); 455 return bld_base->base.undef; 456 } 457 458 /* 459 * Swizzle the argument 460 */ 461 462 if (swizzle == ~0u) { 463 res = bld_base->emit_swizzle(bld_base, res, 464 off->SwizzleX, 465 off->SwizzleY, 466 off->SwizzleZ, 467 /* there's no 4th channel */ 468 off->SwizzleX); 469 } 470 471 return res; 472 473 } 474 475 476 boolean 477 lp_build_tgsi_llvm( 478 struct lp_build_tgsi_context * bld_base, 479 const struct tgsi_token *tokens) 480 { 481 struct tgsi_parse_context parse; 482 483 if (bld_base->emit_prologue) { 484 bld_base->emit_prologue(bld_base); 485 } 486 487 if (!lp_bld_tgsi_list_init(bld_base)) { 488 return FALSE; 489 } 490 491 tgsi_parse_init( &parse, tokens ); 492 493 while( !tgsi_parse_end_of_tokens( &parse ) ) { 494 tgsi_parse_token( &parse ); 495 496 switch( parse.FullToken.Token.Type ) { 497 case TGSI_TOKEN_TYPE_DECLARATION: 498 /* Inputs already interpolated */ 499 bld_base->emit_declaration(bld_base, &parse.FullToken.FullDeclaration); 500 break; 501 502 case TGSI_TOKEN_TYPE_INSTRUCTION: 503 lp_bld_tgsi_add_instruction(bld_base, &parse.FullToken.FullInstruction); 504 break; 505 506 case TGSI_TOKEN_TYPE_IMMEDIATE: 507 bld_base->emit_immediate(bld_base, &parse.FullToken.FullImmediate); 508 break; 509 510 case TGSI_TOKEN_TYPE_PROPERTY: 511 break; 512 513 default: 514 assert( 0 ); 515 } 516 } 517 518 while (bld_base->pc != -1) { 519 const struct tgsi_full_instruction *instr = 520 bld_base->instructions + bld_base->pc; 521 const struct tgsi_opcode_info *opcode_info = 522 tgsi_get_opcode_info(instr->Instruction.Opcode); 523 if (!lp_build_tgsi_inst_llvm(bld_base, instr)) { 524 _debug_printf("warning: failed to translate tgsi opcode %s to LLVM\n", 525 opcode_info->mnemonic); 526 return FALSE; 527 } 528 } 529 530 tgsi_parse_free(&parse); 531 532 FREE(bld_base->instructions); 533 534 if (bld_base->emit_epilogue) { 535 bld_base->emit_epilogue(bld_base); 536 } 537 538 return TRUE; 539 } 540
