1 /* 2 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch_helpers.h> 8 #include <assert.h> 9 #include <bl_common.h> 10 #include <context_mgmt.h> 11 #include <string.h> 12 #include <utils.h> 13 #include "opteed_private.h" 14 15 /******************************************************************************* 16 * Given a OPTEE entrypoint info pointer, entry point PC, register width, 17 * cpu id & pointer to a context data structure, this function will 18 * initialize OPTEE context and entry point info for OPTEE. 19 ******************************************************************************/ 20 void opteed_init_optee_ep_state(struct entry_point_info *optee_entry_point, 21 uint32_t rw, uint64_t pc, 22 uint64_t pageable_part, uint64_t mem_limit, 23 uint64_t dt_addr, optee_context_t *optee_ctx) 24 { 25 uint32_t ep_attr; 26 27 /* Passing a NULL context is a critical programming error */ 28 assert(optee_ctx); 29 assert(optee_entry_point); 30 assert(pc); 31 32 /* Associate this context with the cpu specified */ 33 optee_ctx->mpidr = read_mpidr_el1(); 34 optee_ctx->state = 0; 35 set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_OFF); 36 37 cm_set_context(&optee_ctx->cpu_ctx, SECURE); 38 39 /* initialise an entrypoint to set up the CPU context */ 40 ep_attr = SECURE | EP_ST_ENABLE; 41 if (read_sctlr_el3() & SCTLR_EE_BIT) 42 ep_attr |= EP_EE_BIG; 43 SET_PARAM_HEAD(optee_entry_point, PARAM_EP, VERSION_1, ep_attr); 44 optee_entry_point->pc = pc; 45 if (rw == OPTEE_AARCH64) 46 optee_entry_point->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 47 DISABLE_ALL_EXCEPTIONS); 48 else 49 optee_entry_point->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, 50 SPSR_E_LITTLE, 51 DAIF_FIQ_BIT | 52 DAIF_IRQ_BIT | 53 DAIF_ABT_BIT); 54 zeromem(&optee_entry_point->args, sizeof(optee_entry_point->args)); 55 optee_entry_point->args.arg0 = pageable_part; 56 optee_entry_point->args.arg1 = mem_limit; 57 optee_entry_point->args.arg2 = dt_addr; 58 } 59 60 /******************************************************************************* 61 * This function takes an OPTEE context pointer and: 62 * 1. Applies the S-EL1 system register context from optee_ctx->cpu_ctx. 63 * 2. Saves the current C runtime state (callee saved registers) on the stack 64 * frame and saves a reference to this state. 65 * 3. Calls el3_exit() so that the EL3 system and general purpose registers 66 * from the optee_ctx->cpu_ctx are used to enter the OPTEE image. 67 ******************************************************************************/ 68 uint64_t opteed_synchronous_sp_entry(optee_context_t *optee_ctx) 69 { 70 uint64_t rc; 71 72 assert(optee_ctx != NULL); 73 assert(optee_ctx->c_rt_ctx == 0); 74 75 /* Apply the Secure EL1 system register context and switch to it */ 76 assert(cm_get_context(SECURE) == &optee_ctx->cpu_ctx); 77 cm_el1_sysregs_context_restore(SECURE); 78 cm_set_next_eret_context(SECURE); 79 80 rc = opteed_enter_sp(&optee_ctx->c_rt_ctx); 81 #if DEBUG 82 optee_ctx->c_rt_ctx = 0; 83 #endif 84 85 return rc; 86 } 87 88 89 /******************************************************************************* 90 * This function takes an OPTEE context pointer and: 91 * 1. Saves the S-EL1 system register context tp optee_ctx->cpu_ctx. 92 * 2. Restores the current C runtime state (callee saved registers) from the 93 * stack frame using the reference to this state saved in opteed_enter_sp(). 94 * 3. It does not need to save any general purpose or EL3 system register state 95 * as the generic smc entry routine should have saved those. 96 ******************************************************************************/ 97 void opteed_synchronous_sp_exit(optee_context_t *optee_ctx, uint64_t ret) 98 { 99 assert(optee_ctx != NULL); 100 /* Save the Secure EL1 system register context */ 101 assert(cm_get_context(SECURE) == &optee_ctx->cpu_ctx); 102 cm_el1_sysregs_context_save(SECURE); 103 104 assert(optee_ctx->c_rt_ctx != 0); 105 opteed_exit_sp(optee_ctx->c_rt_ctx, ret); 106 107 /* Should never reach here */ 108 assert(0); 109 } 110
