1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH 2 Copyright (C) 1993-2016 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to 18 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 19 Boston, MA 02110-1301, USA. */ 20 21 /* Written By Steve Chamberlain <sac (at) cygnus.com> */ 22 23 #include "as.h" 24 #include "subsegs.h" 25 #define DEFINE_TABLE 26 #include "opcodes/sh-opc.h" 27 #include "safe-ctype.h" 28 #include "struc-symbol.h" 29 30 #ifdef OBJ_ELF 31 #include "elf/sh.h" 32 #endif 33 34 #include "dwarf2dbg.h" 35 #include "dw2gencfi.h" 36 37 typedef struct 38 { 39 sh_arg_type type; 40 int reg; 41 expressionS immediate; 42 } 43 sh_operand_info; 44 45 const char comment_chars[] = "!"; 46 const char line_separator_chars[] = ";"; 47 const char line_comment_chars[] = "!#"; 48 49 static void s_uses (int); 50 static void s_uacons (int); 51 52 #ifdef OBJ_ELF 53 static void sh_elf_cons (int); 54 55 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ 56 #endif 57 58 static void 59 big (int ignore ATTRIBUTE_UNUSED) 60 { 61 if (! target_big_endian) 62 as_bad (_("directive .big encountered when option -big required")); 63 64 /* Stop further messages. */ 65 target_big_endian = 1; 66 } 67 68 static void 69 little (int ignore ATTRIBUTE_UNUSED) 70 { 71 if (target_big_endian) 72 as_bad (_("directive .little encountered when option -little required")); 73 74 /* Stop further messages. */ 75 target_big_endian = 0; 76 } 77 78 /* This table describes all the machine specific pseudo-ops the assembler 79 has to support. The fields are: 80 pseudo-op name without dot 81 function to call to execute this pseudo-op 82 Integer arg to pass to the function. */ 83 84 const pseudo_typeS md_pseudo_table[] = 85 { 86 #ifdef OBJ_ELF 87 {"long", sh_elf_cons, 4}, 88 {"int", sh_elf_cons, 4}, 89 {"word", sh_elf_cons, 2}, 90 {"short", sh_elf_cons, 2}, 91 #else 92 {"int", cons, 4}, 93 {"word", cons, 2}, 94 #endif /* OBJ_ELF */ 95 {"big", big, 0}, 96 {"form", listing_psize, 0}, 97 {"little", little, 0}, 98 {"heading", listing_title, 0}, 99 {"import", s_ignore, 0}, 100 {"page", listing_eject, 0}, 101 {"program", s_ignore, 0}, 102 {"uses", s_uses, 0}, 103 {"uaword", s_uacons, 2}, 104 {"ualong", s_uacons, 4}, 105 {"uaquad", s_uacons, 8}, 106 {"2byte", s_uacons, 2}, 107 {"4byte", s_uacons, 4}, 108 {"8byte", s_uacons, 8}, 109 #ifdef HAVE_SH64 110 {"mode", s_sh64_mode, 0 }, 111 112 /* Have the old name too. */ 113 {"isa", s_sh64_mode, 0 }, 114 115 /* Assert that the right ABI is used. */ 116 {"abi", s_sh64_abi, 0 }, 117 118 { "vtable_inherit", sh64_vtable_inherit, 0 }, 119 { "vtable_entry", sh64_vtable_entry, 0 }, 120 #endif /* HAVE_SH64 */ 121 {0, 0, 0} 122 }; 123 124 int sh_relax; /* set if -relax seen */ 125 126 /* Whether -small was seen. */ 127 128 int sh_small; 129 130 /* Flag to generate relocations against symbol values for local symbols. */ 131 132 static int dont_adjust_reloc_32; 133 134 /* Flag to indicate that '$' is allowed as a register prefix. */ 135 136 static int allow_dollar_register_prefix; 137 138 /* Preset architecture set, if given; zero otherwise. */ 139 140 static unsigned int preset_target_arch; 141 142 /* The bit mask of architectures that could 143 accommodate the insns seen so far. */ 144 static unsigned int valid_arch; 145 146 #ifdef OBJ_ELF 147 /* Whether --fdpic was given. */ 148 static int sh_fdpic; 149 #endif 150 151 const char EXP_CHARS[] = "eE"; 152 153 /* Chars that mean this number is a floating point constant. */ 154 /* As in 0f12.456 */ 155 /* or 0d1.2345e12 */ 156 const char FLT_CHARS[] = "rRsSfFdDxXpP"; 157 158 #define C(a,b) ENCODE_RELAX(a,b) 159 160 #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) 161 #define GET_WHAT(x) ((x>>4)) 162 163 /* These are the three types of relaxable instruction. */ 164 /* These are the types of relaxable instructions; except for END which is 165 a marker. */ 166 #define COND_JUMP 1 167 #define COND_JUMP_DELAY 2 168 #define UNCOND_JUMP 3 169 170 #ifdef HAVE_SH64 171 172 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ 173 #define SH64PCREL16_32 4 174 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ 175 #define SH64PCREL16_64 5 176 177 /* Variants of the above for adjusting the insn to PTA or PTB according to 178 the label. */ 179 #define SH64PCREL16PT_32 6 180 #define SH64PCREL16PT_64 7 181 182 /* A MOVI expansion, expanding to at most 32 or 64 bits. */ 183 #define MOVI_IMM_32 8 184 #define MOVI_IMM_32_PCREL 9 185 #define MOVI_IMM_64 10 186 #define MOVI_IMM_64_PCREL 11 187 #define END 12 188 189 #else /* HAVE_SH64 */ 190 191 #define END 4 192 193 #endif /* HAVE_SH64 */ 194 195 #define UNDEF_DISP 0 196 #define COND8 1 197 #define COND12 2 198 #define COND32 3 199 #define UNDEF_WORD_DISP 4 200 201 #define UNCOND12 1 202 #define UNCOND32 2 203 204 #ifdef HAVE_SH64 205 #define UNDEF_SH64PCREL 0 206 #define SH64PCREL16 1 207 #define SH64PCREL32 2 208 #define SH64PCREL48 3 209 #define SH64PCREL64 4 210 #define SH64PCRELPLT 5 211 212 #define UNDEF_MOVI 0 213 #define MOVI_16 1 214 #define MOVI_32 2 215 #define MOVI_48 3 216 #define MOVI_64 4 217 #define MOVI_PLT 5 218 #define MOVI_GOTOFF 6 219 #define MOVI_GOTPC 7 220 #endif /* HAVE_SH64 */ 221 222 /* Branch displacements are from the address of the branch plus 223 four, thus all minimum and maximum values have 4 added to them. */ 224 #define COND8_F 258 225 #define COND8_M -252 226 #define COND8_LENGTH 2 227 228 /* There is one extra instruction before the branch, so we must add 229 two more bytes to account for it. */ 230 #define COND12_F 4100 231 #define COND12_M -4090 232 #define COND12_LENGTH 6 233 234 #define COND12_DELAY_LENGTH 4 235 236 /* ??? The minimum and maximum values are wrong, but this does not matter 237 since this relocation type is not supported yet. */ 238 #define COND32_F (1<<30) 239 #define COND32_M -(1<<30) 240 #define COND32_LENGTH 14 241 242 #define UNCOND12_F 4098 243 #define UNCOND12_M -4092 244 #define UNCOND12_LENGTH 2 245 246 /* ??? The minimum and maximum values are wrong, but this does not matter 247 since this relocation type is not supported yet. */ 248 #define UNCOND32_F (1<<30) 249 #define UNCOND32_M -(1<<30) 250 #define UNCOND32_LENGTH 14 251 252 #ifdef HAVE_SH64 253 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, 254 TRd" as is the current insn, so no extra length. Note that the "reach" 255 is calculated from the address *after* that insn, but the offset in the 256 insn is calculated from the beginning of the insn. We also need to 257 take into account the implicit 1 coded as the "A" in PTA when counting 258 forward. If PTB reaches an odd address, we trap that as an error 259 elsewhere, so we don't have to have different relaxation entries. We 260 don't add a one to the negative range, since PTB would then have the 261 farthest backward-reaching value skipped, not generated at relaxation. */ 262 #define SH64PCREL16_F (32767 * 4 - 4 + 1) 263 #define SH64PCREL16_M (-32768 * 4 - 4) 264 #define SH64PCREL16_LENGTH 0 265 266 /* The next step is to change that PT insn into 267 MOVI ((label - datalabel Ln) >> 16) & 65535, R25 268 SHORI (label - datalabel Ln) & 65535, R25 269 Ln: 270 PTREL R25,TRd 271 which means two extra insns, 8 extra bytes. This is the limit for the 272 32-bit ABI. 273 274 The expressions look a bit bad since we have to adjust this to avoid overflow on a 275 32-bit host. */ 276 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) 277 #define SH64PCREL32_LENGTH (2 * 4) 278 279 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit 280 expansion. */ 281 #if BFD_HOST_64BIT_LONG 282 /* The "reach" type is long, so we can only do this for a 64-bit-long 283 host. */ 284 #define SH64PCREL32_M ((-((long) 1 << 30)) * 2 - 4) 285 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) 286 #define SH64PCREL48_M ((-((long) 1 << 47)) - 4) 287 #define SH64PCREL48_LENGTH (3 * 4) 288 #else 289 /* If the host does not have 64-bit longs, just make this state identical 290 in reach to the 32-bit state. Note that we have a slightly incorrect 291 reach, but the correct one above will overflow a 32-bit number. */ 292 #define SH64PCREL32_M ((-((long) 1 << 30)) * 2) 293 #define SH64PCREL48_F SH64PCREL32_F 294 #define SH64PCREL48_M SH64PCREL32_M 295 #define SH64PCREL48_LENGTH (3 * 4) 296 #endif /* BFD_HOST_64BIT_LONG */ 297 298 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI 299 + PTREL sequence. */ 300 #define SH64PCREL64_LENGTH (4 * 4) 301 302 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the 303 SH64PCREL expansions. The PCREL one is similar, but the other has no 304 pc-relative reach; it must be fully expanded in 305 shmedia_md_estimate_size_before_relax. */ 306 #define MOVI_16_LENGTH 0 307 #define MOVI_16_F (32767 - 4) 308 #define MOVI_16_M (-32768 - 4) 309 #define MOVI_32_LENGTH 4 310 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) 311 #define MOVI_48_LENGTH 8 312 313 #if BFD_HOST_64BIT_LONG 314 /* The "reach" type is long, so we can only do this for a 64-bit-long 315 host. */ 316 #define MOVI_32_M ((-((long) 1 << 30)) * 2 - 4) 317 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4) 318 #define MOVI_48_M ((-((long) 1 << 47)) - 4) 319 #else 320 /* If the host does not have 64-bit longs, just make this state identical 321 in reach to the 32-bit state. Note that we have a slightly incorrect 322 reach, but the correct one above will overflow a 32-bit number. */ 323 #define MOVI_32_M ((-((long) 1 << 30)) * 2) 324 #define MOVI_48_F MOVI_32_F 325 #define MOVI_48_M MOVI_32_M 326 #endif /* BFD_HOST_64BIT_LONG */ 327 328 #define MOVI_64_LENGTH 12 329 #endif /* HAVE_SH64 */ 330 331 #define EMPTY { 0, 0, 0, 0 } 332 333 const relax_typeS md_relax_table[C (END, 0)] = { 334 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 335 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 336 337 EMPTY, 338 /* C (COND_JUMP, COND8) */ 339 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, 340 /* C (COND_JUMP, COND12) */ 341 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, 342 /* C (COND_JUMP, COND32) */ 343 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 344 /* C (COND_JUMP, UNDEF_WORD_DISP) */ 345 { 0, 0, COND32_LENGTH, 0, }, 346 EMPTY, EMPTY, EMPTY, 347 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 348 349 EMPTY, 350 /* C (COND_JUMP_DELAY, COND8) */ 351 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, 352 /* C (COND_JUMP_DELAY, COND12) */ 353 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, 354 /* C (COND_JUMP_DELAY, COND32) */ 355 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 356 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ 357 { 0, 0, COND32_LENGTH, 0, }, 358 EMPTY, EMPTY, EMPTY, 359 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 360 361 EMPTY, 362 /* C (UNCOND_JUMP, UNCOND12) */ 363 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, 364 /* C (UNCOND_JUMP, UNCOND32) */ 365 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, 366 EMPTY, 367 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ 368 { 0, 0, UNCOND32_LENGTH, 0, }, 369 EMPTY, EMPTY, EMPTY, 370 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 371 372 #ifdef HAVE_SH64 373 /* C (SH64PCREL16_32, SH64PCREL16) */ 374 EMPTY, 375 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, 376 /* C (SH64PCREL16_32, SH64PCREL32) */ 377 { 0, 0, SH64PCREL32_LENGTH, 0 }, 378 EMPTY, EMPTY, 379 /* C (SH64PCREL16_32, SH64PCRELPLT) */ 380 { 0, 0, SH64PCREL32_LENGTH, 0 }, 381 EMPTY, EMPTY, 382 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 383 384 /* C (SH64PCREL16_64, SH64PCREL16) */ 385 EMPTY, 386 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, 387 /* C (SH64PCREL16_64, SH64PCREL32) */ 388 { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, 389 /* C (SH64PCREL16_64, SH64PCREL48) */ 390 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, 391 /* C (SH64PCREL16_64, SH64PCREL64) */ 392 { 0, 0, SH64PCREL64_LENGTH, 0 }, 393 /* C (SH64PCREL16_64, SH64PCRELPLT) */ 394 { 0, 0, SH64PCREL64_LENGTH, 0 }, 395 EMPTY, EMPTY, 396 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 397 398 /* C (SH64PCREL16PT_32, SH64PCREL16) */ 399 EMPTY, 400 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, 401 /* C (SH64PCREL16PT_32, SH64PCREL32) */ 402 { 0, 0, SH64PCREL32_LENGTH, 0 }, 403 EMPTY, EMPTY, 404 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ 405 { 0, 0, SH64PCREL32_LENGTH, 0 }, 406 EMPTY, EMPTY, 407 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 408 409 /* C (SH64PCREL16PT_64, SH64PCREL16) */ 410 EMPTY, 411 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, 412 /* C (SH64PCREL16PT_64, SH64PCREL32) */ 413 { SH64PCREL32_F, 414 SH64PCREL32_M, 415 SH64PCREL32_LENGTH, 416 C (SH64PCREL16PT_64, SH64PCREL48) }, 417 /* C (SH64PCREL16PT_64, SH64PCREL48) */ 418 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, 419 /* C (SH64PCREL16PT_64, SH64PCREL64) */ 420 { 0, 0, SH64PCREL64_LENGTH, 0 }, 421 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ 422 { 0, 0, SH64PCREL64_LENGTH, 0}, 423 EMPTY, EMPTY, 424 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 425 426 /* C (MOVI_IMM_32, UNDEF_MOVI) */ 427 { 0, 0, MOVI_32_LENGTH, 0 }, 428 /* C (MOVI_IMM_32, MOVI_16) */ 429 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, 430 /* C (MOVI_IMM_32, MOVI_32) */ 431 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, 432 EMPTY, EMPTY, EMPTY, 433 /* C (MOVI_IMM_32, MOVI_GOTOFF) */ 434 { 0, 0, MOVI_32_LENGTH, 0 }, 435 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 436 437 /* C (MOVI_IMM_32_PCREL, MOVI_16) */ 438 EMPTY, 439 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, 440 /* C (MOVI_IMM_32_PCREL, MOVI_32) */ 441 { 0, 0, MOVI_32_LENGTH, 0 }, 442 EMPTY, EMPTY, 443 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ 444 { 0, 0, MOVI_32_LENGTH, 0 }, 445 EMPTY, 446 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ 447 { 0, 0, MOVI_32_LENGTH, 0 }, 448 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 449 450 /* C (MOVI_IMM_64, UNDEF_MOVI) */ 451 { 0, 0, MOVI_64_LENGTH, 0 }, 452 /* C (MOVI_IMM_64, MOVI_16) */ 453 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, 454 /* C (MOVI_IMM_64, MOVI_32) */ 455 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, 456 /* C (MOVI_IMM_64, MOVI_48) */ 457 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, 458 /* C (MOVI_IMM_64, MOVI_64) */ 459 { 0, 0, MOVI_64_LENGTH, 0 }, 460 EMPTY, 461 /* C (MOVI_IMM_64, MOVI_GOTOFF) */ 462 { 0, 0, MOVI_64_LENGTH, 0 }, 463 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 464 465 /* C (MOVI_IMM_64_PCREL, MOVI_16) */ 466 EMPTY, 467 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, 468 /* C (MOVI_IMM_64_PCREL, MOVI_32) */ 469 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, 470 /* C (MOVI_IMM_64_PCREL, MOVI_48) */ 471 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, 472 /* C (MOVI_IMM_64_PCREL, MOVI_64) */ 473 { 0, 0, MOVI_64_LENGTH, 0 }, 474 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ 475 { 0, 0, MOVI_64_LENGTH, 0 }, 476 EMPTY, 477 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ 478 { 0, 0, MOVI_64_LENGTH, 0 }, 479 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 480 481 #endif /* HAVE_SH64 */ 482 483 }; 484 485 #undef EMPTY 486 487 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ 488 489 490 #ifdef OBJ_ELF 492 /* Determinet whether the symbol needs any kind of PIC relocation. */ 493 494 inline static int 495 sh_PIC_related_p (symbolS *sym) 496 { 497 expressionS *exp; 498 499 if (! sym) 500 return 0; 501 502 if (sym == GOT_symbol) 503 return 1; 504 505 #ifdef HAVE_SH64 506 if (sh_PIC_related_p (*symbol_get_tc (sym))) 507 return 1; 508 #endif 509 510 exp = symbol_get_value_expression (sym); 511 512 return (exp->X_op == O_PIC_reloc 513 || sh_PIC_related_p (exp->X_add_symbol) 514 || sh_PIC_related_p (exp->X_op_symbol)); 515 } 516 517 /* Determine the relocation type to be used to represent the 518 expression, that may be rearranged. */ 519 520 static int 521 sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) 522 { 523 expressionS *exp = main_exp; 524 525 /* This is here for backward-compatibility only. GCC used to generated: 526 527 f@PLT + . - (.LPCS# + 2) 528 529 but we'd rather be able to handle this as a PIC-related reference 530 plus/minus a symbol. However, gas' parser gives us: 531 532 O_subtract (O_add (f@PLT, .), .LPCS#+2) 533 534 so we attempt to transform this into: 535 536 O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) 537 538 which we can handle simply below. */ 539 if (exp->X_op == O_subtract) 540 { 541 if (sh_PIC_related_p (exp->X_op_symbol)) 542 return 1; 543 544 exp = symbol_get_value_expression (exp->X_add_symbol); 545 546 if (exp && sh_PIC_related_p (exp->X_op_symbol)) 547 return 1; 548 549 if (exp && exp->X_op == O_add 550 && sh_PIC_related_p (exp->X_add_symbol)) 551 { 552 symbolS *sym = exp->X_add_symbol; 553 554 exp->X_op = O_subtract; 555 exp->X_add_symbol = main_exp->X_op_symbol; 556 557 main_exp->X_op_symbol = main_exp->X_add_symbol; 558 main_exp->X_add_symbol = sym; 559 560 main_exp->X_add_number += exp->X_add_number; 561 exp->X_add_number = 0; 562 } 563 564 exp = main_exp; 565 } 566 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) 567 return 1; 568 569 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) 570 { 571 #ifdef HAVE_SH64 572 if (exp->X_add_symbol 573 && (exp->X_add_symbol == GOT_symbol 574 || (GOT_symbol 575 && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) 576 { 577 switch (*r_type_p) 578 { 579 case BFD_RELOC_SH_IMM_LOW16: 580 *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; 581 break; 582 583 case BFD_RELOC_SH_IMM_MEDLOW16: 584 *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; 585 break; 586 587 case BFD_RELOC_SH_IMM_MEDHI16: 588 *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; 589 break; 590 591 case BFD_RELOC_SH_IMM_HI16: 592 *r_type_p = BFD_RELOC_SH_GOTPC_HI16; 593 break; 594 595 case BFD_RELOC_NONE: 596 case BFD_RELOC_UNUSED: 597 *r_type_p = BFD_RELOC_SH_GOTPC; 598 break; 599 600 default: 601 abort (); 602 } 603 return 0; 604 } 605 #else 606 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 607 { 608 *r_type_p = BFD_RELOC_SH_GOTPC; 609 return 0; 610 } 611 #endif 612 exp = symbol_get_value_expression (exp->X_add_symbol); 613 if (! exp) 614 return 0; 615 } 616 617 if (exp->X_op == O_PIC_reloc) 618 { 619 switch (*r_type_p) 620 { 621 case BFD_RELOC_NONE: 622 case BFD_RELOC_UNUSED: 623 *r_type_p = exp->X_md; 624 break; 625 626 case BFD_RELOC_SH_DISP20: 627 switch (exp->X_md) 628 { 629 case BFD_RELOC_32_GOT_PCREL: 630 *r_type_p = BFD_RELOC_SH_GOT20; 631 break; 632 633 case BFD_RELOC_32_GOTOFF: 634 *r_type_p = BFD_RELOC_SH_GOTOFF20; 635 break; 636 637 case BFD_RELOC_SH_GOTFUNCDESC: 638 *r_type_p = BFD_RELOC_SH_GOTFUNCDESC20; 639 break; 640 641 case BFD_RELOC_SH_GOTOFFFUNCDESC: 642 *r_type_p = BFD_RELOC_SH_GOTOFFFUNCDESC20; 643 break; 644 645 default: 646 abort (); 647 } 648 break; 649 650 #ifdef HAVE_SH64 651 case BFD_RELOC_SH_IMM_LOW16: 652 switch (exp->X_md) 653 { 654 case BFD_RELOC_32_GOTOFF: 655 *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; 656 break; 657 658 case BFD_RELOC_SH_GOTPLT32: 659 *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; 660 break; 661 662 case BFD_RELOC_32_GOT_PCREL: 663 *r_type_p = BFD_RELOC_SH_GOT_LOW16; 664 break; 665 666 case BFD_RELOC_32_PLT_PCREL: 667 *r_type_p = BFD_RELOC_SH_PLT_LOW16; 668 break; 669 670 default: 671 abort (); 672 } 673 break; 674 675 case BFD_RELOC_SH_IMM_MEDLOW16: 676 switch (exp->X_md) 677 { 678 case BFD_RELOC_32_GOTOFF: 679 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; 680 break; 681 682 case BFD_RELOC_SH_GOTPLT32: 683 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; 684 break; 685 686 case BFD_RELOC_32_GOT_PCREL: 687 *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; 688 break; 689 690 case BFD_RELOC_32_PLT_PCREL: 691 *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; 692 break; 693 694 default: 695 abort (); 696 } 697 break; 698 699 case BFD_RELOC_SH_IMM_MEDHI16: 700 switch (exp->X_md) 701 { 702 case BFD_RELOC_32_GOTOFF: 703 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; 704 break; 705 706 case BFD_RELOC_SH_GOTPLT32: 707 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; 708 break; 709 710 case BFD_RELOC_32_GOT_PCREL: 711 *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; 712 break; 713 714 case BFD_RELOC_32_PLT_PCREL: 715 *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; 716 break; 717 718 default: 719 abort (); 720 } 721 break; 722 723 case BFD_RELOC_SH_IMM_HI16: 724 switch (exp->X_md) 725 { 726 case BFD_RELOC_32_GOTOFF: 727 *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; 728 break; 729 730 case BFD_RELOC_SH_GOTPLT32: 731 *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; 732 break; 733 734 case BFD_RELOC_32_GOT_PCREL: 735 *r_type_p = BFD_RELOC_SH_GOT_HI16; 736 break; 737 738 case BFD_RELOC_32_PLT_PCREL: 739 *r_type_p = BFD_RELOC_SH_PLT_HI16; 740 break; 741 742 default: 743 abort (); 744 } 745 break; 746 #endif 747 748 default: 749 abort (); 750 } 751 if (exp == main_exp) 752 exp->X_op = O_symbol; 753 else 754 { 755 main_exp->X_add_symbol = exp->X_add_symbol; 756 main_exp->X_add_number += exp->X_add_number; 757 } 758 } 759 else 760 return (sh_PIC_related_p (exp->X_add_symbol) 761 || sh_PIC_related_p (exp->X_op_symbol)); 762 763 return 0; 764 } 765 766 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ 767 768 void 769 sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp, 770 bfd_reloc_code_real_type r_type) 771 { 772 r_type = BFD_RELOC_UNUSED; 773 774 if (sh_check_fixup (exp, &r_type)) 775 as_bad (_("Invalid PIC expression.")); 776 777 if (r_type == BFD_RELOC_UNUSED) 778 switch (size) 779 { 780 case 1: 781 r_type = BFD_RELOC_8; 782 break; 783 784 case 2: 785 r_type = BFD_RELOC_16; 786 break; 787 788 case 4: 789 r_type = BFD_RELOC_32; 790 break; 791 792 case 8: 793 r_type = BFD_RELOC_64; 794 break; 795 796 default: 797 goto error; 798 } 799 else if (size != 4) 800 { 801 error: 802 as_bad (_("unsupported BFD relocation size %u"), size); 803 r_type = BFD_RELOC_UNUSED; 804 } 805 806 fix_new_exp (frag, off, size, exp, 0, r_type); 807 } 808 809 /* The regular cons() function, that reads constants, doesn't support 810 suffixes such as @GOT, @GOTOFF and @PLT, that generate 811 machine-specific relocation types. So we must define it here. */ 812 /* Clobbers input_line_pointer, checks end-of-line. */ 813 /* NBYTES 1=.byte, 2=.word, 4=.long */ 814 static void 815 sh_elf_cons (int nbytes) 816 { 817 expressionS exp; 818 819 #ifdef HAVE_SH64 820 821 /* Update existing range to include a previous insn, if there was one. */ 822 sh64_update_contents_mark (TRUE); 823 824 /* We need to make sure the contents type is set to data. */ 825 sh64_flag_output (); 826 827 #endif /* HAVE_SH64 */ 828 829 if (is_it_end_of_statement ()) 830 { 831 demand_empty_rest_of_line (); 832 return; 833 } 834 835 #ifdef md_cons_align 836 md_cons_align (nbytes); 837 #endif 838 839 do 840 { 841 expression (&exp); 842 emit_expr (&exp, (unsigned int) nbytes); 843 } 844 while (*input_line_pointer++ == ','); 845 846 input_line_pointer--; /* Put terminator back into stream. */ 847 if (*input_line_pointer == '#' || *input_line_pointer == '!') 848 { 849 while (! is_end_of_line[(unsigned char) *input_line_pointer++]); 850 } 851 else 852 demand_empty_rest_of_line (); 853 } 854 855 /* The regular frag_offset_fixed_p doesn't work for rs_align_test 856 frags. */ 857 858 static bfd_boolean 859 align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2, 860 bfd_vma *offset) 861 { 862 const fragS *frag; 863 bfd_vma off; 864 865 /* Start with offset initialised to difference between the two frags. 866 Prior to assigning frag addresses this will be zero. */ 867 off = frag1->fr_address - frag2->fr_address; 868 if (frag1 == frag2) 869 { 870 *offset = off; 871 return TRUE; 872 } 873 874 /* Maybe frag2 is after frag1. */ 875 frag = frag1; 876 while (frag->fr_type == rs_fill 877 || frag->fr_type == rs_align_test) 878 { 879 if (frag->fr_type == rs_fill) 880 off += frag->fr_fix + frag->fr_offset * frag->fr_var; 881 else 882 off += frag->fr_fix; 883 frag = frag->fr_next; 884 if (frag == NULL) 885 break; 886 if (frag == frag2) 887 { 888 *offset = off; 889 return TRUE; 890 } 891 } 892 893 /* Maybe frag1 is after frag2. */ 894 off = frag1->fr_address - frag2->fr_address; 895 frag = frag2; 896 while (frag->fr_type == rs_fill 897 || frag->fr_type == rs_align_test) 898 { 899 if (frag->fr_type == rs_fill) 900 off -= frag->fr_fix + frag->fr_offset * frag->fr_var; 901 else 902 off -= frag->fr_fix; 903 frag = frag->fr_next; 904 if (frag == NULL) 905 break; 906 if (frag == frag1) 907 { 908 *offset = off; 909 return TRUE; 910 } 911 } 912 913 return FALSE; 914 } 915 916 /* Optimize a difference of symbols which have rs_align_test frag if 917 possible. */ 918 919 int 920 sh_optimize_expr (expressionS *l, operatorT op, expressionS *r) 921 { 922 bfd_vma frag_off; 923 924 if (op == O_subtract 925 && l->X_op == O_symbol 926 && r->X_op == O_symbol 927 && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol) 928 && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol)) 929 || r->X_add_symbol == l->X_add_symbol) 930 && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol), 931 symbol_get_frag (r->X_add_symbol), 932 &frag_off)) 933 { 934 offsetT symval_diff = S_GET_VALUE (l->X_add_symbol) 935 - S_GET_VALUE (r->X_add_symbol); 936 subtract_from_result (l, r->X_add_number, r->X_extrabit); 937 subtract_from_result (l, frag_off / OCTETS_PER_BYTE, 0); 938 add_to_result (l, symval_diff, symval_diff < 0); 939 l->X_op = O_constant; 940 l->X_add_symbol = 0; 941 return 1; 942 } 943 return 0; 944 } 945 #endif /* OBJ_ELF */ 946 947 /* This function is called once, at assembler startup time. This should 949 set up all the tables, etc that the MD part of the assembler needs. */ 950 951 void 952 md_begin (void) 953 { 954 const sh_opcode_info *opcode; 955 const char *prev_name = ""; 956 unsigned int target_arch; 957 958 target_arch 959 = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; 960 valid_arch = target_arch; 961 962 #ifdef HAVE_SH64 963 shmedia_md_begin (); 964 #endif 965 966 opcode_hash_control = hash_new (); 967 968 /* Insert unique names into hash table. */ 969 for (opcode = sh_table; opcode->name; opcode++) 970 { 971 if (strcmp (prev_name, opcode->name) != 0) 972 { 973 if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) 974 continue; 975 prev_name = opcode->name; 976 hash_insert (opcode_hash_control, opcode->name, (char *) opcode); 977 } 978 } 979 } 980 981 static int reg_m; 982 static int reg_n; 983 static int reg_x, reg_y; 984 static int reg_efg; 985 static int reg_b; 986 987 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') 988 989 /* Try to parse a reg name. Return the number of chars consumed. */ 990 991 static unsigned int 992 parse_reg_without_prefix (char *src, sh_arg_type *mode, int *reg) 993 { 994 char l0 = TOLOWER (src[0]); 995 char l1 = l0 ? TOLOWER (src[1]) : 0; 996 997 /* We use ! IDENT_CHAR for the next character after the register name, to 998 make sure that we won't accidentally recognize a symbol name such as 999 'sram' or sr_ram as being a reference to the register 'sr'. */ 1000 1001 if (l0 == 'r') 1002 { 1003 if (l1 == '1') 1004 { 1005 if (src[2] >= '0' && src[2] <= '5' 1006 && ! IDENT_CHAR ((unsigned char) src[3])) 1007 { 1008 *mode = A_REG_N; 1009 *reg = 10 + src[2] - '0'; 1010 return 3; 1011 } 1012 } 1013 if (l1 >= '0' && l1 <= '9' 1014 && ! IDENT_CHAR ((unsigned char) src[2])) 1015 { 1016 *mode = A_REG_N; 1017 *reg = (l1 - '0'); 1018 return 2; 1019 } 1020 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 1021 && ! IDENT_CHAR ((unsigned char) src[7])) 1022 { 1023 *mode = A_REG_B; 1024 *reg = (l1 - '0'); 1025 return 7; 1026 } 1027 1028 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) 1029 { 1030 *mode = A_RE; 1031 return 2; 1032 } 1033 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) 1034 { 1035 *mode = A_RS; 1036 return 2; 1037 } 1038 } 1039 1040 if (l0 == 'a') 1041 { 1042 if (l1 == '0') 1043 { 1044 if (! IDENT_CHAR ((unsigned char) src[2])) 1045 { 1046 *mode = DSP_REG_N; 1047 *reg = A_A0_NUM; 1048 return 2; 1049 } 1050 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 1051 { 1052 *mode = DSP_REG_N; 1053 *reg = A_A0G_NUM; 1054 return 3; 1055 } 1056 } 1057 if (l1 == '1') 1058 { 1059 if (! IDENT_CHAR ((unsigned char) src[2])) 1060 { 1061 *mode = DSP_REG_N; 1062 *reg = A_A1_NUM; 1063 return 2; 1064 } 1065 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 1066 { 1067 *mode = DSP_REG_N; 1068 *reg = A_A1G_NUM; 1069 return 3; 1070 } 1071 } 1072 1073 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' 1074 && ! IDENT_CHAR ((unsigned char) src[3])) 1075 { 1076 *mode = A_REG_N; 1077 *reg = 4 + (l1 - '0'); 1078 return 3; 1079 } 1080 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' 1081 && ! IDENT_CHAR ((unsigned char) src[3])) 1082 { 1083 *mode = A_REG_N; 1084 *reg = 6 + (l1 - '0'); 1085 return 3; 1086 } 1087 if (l1 == 's' && src[2] >= '0' && src[2] <= '3' 1088 && ! IDENT_CHAR ((unsigned char) src[3])) 1089 { 1090 int n = l1 - '0'; 1091 1092 *mode = A_REG_N; 1093 *reg = n | ((~n & 2) << 1); 1094 return 3; 1095 } 1096 } 1097 1098 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) 1099 { 1100 if (l1 == 's') 1101 { 1102 *mode = A_REG_N; 1103 *reg = 8; 1104 return 2; 1105 } 1106 if (l1 == 'x') 1107 { 1108 *mode = A_REG_N; 1109 *reg = 8; 1110 return 2; 1111 } 1112 if (l1 == 'y') 1113 { 1114 *mode = A_REG_N; 1115 *reg = 9; 1116 return 2; 1117 } 1118 } 1119 1120 if (l0 == 'x' && l1 >= '0' && l1 <= '1' 1121 && ! IDENT_CHAR ((unsigned char) src[2])) 1122 { 1123 *mode = DSP_REG_N; 1124 *reg = A_X0_NUM + l1 - '0'; 1125 return 2; 1126 } 1127 1128 if (l0 == 'y' && l1 >= '0' && l1 <= '1' 1129 && ! IDENT_CHAR ((unsigned char) src[2])) 1130 { 1131 *mode = DSP_REG_N; 1132 *reg = A_Y0_NUM + l1 - '0'; 1133 return 2; 1134 } 1135 1136 if (l0 == 'm' && l1 >= '0' && l1 <= '1' 1137 && ! IDENT_CHAR ((unsigned char) src[2])) 1138 { 1139 *mode = DSP_REG_N; 1140 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; 1141 return 2; 1142 } 1143 1144 if (l0 == 's' 1145 && l1 == 's' 1146 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) 1147 { 1148 *mode = A_SSR; 1149 return 3; 1150 } 1151 1152 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' 1153 && ! IDENT_CHAR ((unsigned char) src[3])) 1154 { 1155 *mode = A_SPC; 1156 return 3; 1157 } 1158 1159 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' 1160 && ! IDENT_CHAR ((unsigned char) src[3])) 1161 { 1162 *mode = A_SGR; 1163 return 3; 1164 } 1165 1166 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' 1167 && ! IDENT_CHAR ((unsigned char) src[3])) 1168 { 1169 *mode = A_DSR; 1170 return 3; 1171 } 1172 1173 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1174 && ! IDENT_CHAR ((unsigned char) src[3])) 1175 { 1176 *mode = A_DBR; 1177 return 3; 1178 } 1179 1180 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 1181 { 1182 *mode = A_SR; 1183 return 2; 1184 } 1185 1186 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) 1187 { 1188 *mode = A_REG_N; 1189 *reg = 15; 1190 return 2; 1191 } 1192 1193 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 1194 { 1195 *mode = A_PR; 1196 return 2; 1197 } 1198 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) 1199 { 1200 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' 1201 and use an uninitialized immediate. */ 1202 *mode = A_PC; 1203 return 2; 1204 } 1205 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1206 && ! IDENT_CHAR ((unsigned char) src[3])) 1207 { 1208 *mode = A_GBR; 1209 return 3; 1210 } 1211 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1212 && ! IDENT_CHAR ((unsigned char) src[3])) 1213 { 1214 *mode = A_VBR; 1215 return 3; 1216 } 1217 1218 if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1219 && ! IDENT_CHAR ((unsigned char) src[3])) 1220 { 1221 *mode = A_TBR; 1222 return 3; 1223 } 1224 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' 1225 && ! IDENT_CHAR ((unsigned char) src[4])) 1226 { 1227 if (TOLOWER (src[3]) == 'l') 1228 { 1229 *mode = A_MACL; 1230 return 4; 1231 } 1232 if (TOLOWER (src[3]) == 'h') 1233 { 1234 *mode = A_MACH; 1235 return 4; 1236 } 1237 } 1238 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' 1239 && ! IDENT_CHAR ((unsigned char) src[3])) 1240 { 1241 *mode = A_MOD; 1242 return 3; 1243 } 1244 if (l0 == 'f' && l1 == 'r') 1245 { 1246 if (src[2] == '1') 1247 { 1248 if (src[3] >= '0' && src[3] <= '5' 1249 && ! IDENT_CHAR ((unsigned char) src[4])) 1250 { 1251 *mode = F_REG_N; 1252 *reg = 10 + src[3] - '0'; 1253 return 4; 1254 } 1255 } 1256 if (src[2] >= '0' && src[2] <= '9' 1257 && ! IDENT_CHAR ((unsigned char) src[3])) 1258 { 1259 *mode = F_REG_N; 1260 *reg = (src[2] - '0'); 1261 return 3; 1262 } 1263 } 1264 if (l0 == 'd' && l1 == 'r') 1265 { 1266 if (src[2] == '1') 1267 { 1268 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 1269 && ! IDENT_CHAR ((unsigned char) src[4])) 1270 { 1271 *mode = D_REG_N; 1272 *reg = 10 + src[3] - '0'; 1273 return 4; 1274 } 1275 } 1276 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 1277 && ! IDENT_CHAR ((unsigned char) src[3])) 1278 { 1279 *mode = D_REG_N; 1280 *reg = (src[2] - '0'); 1281 return 3; 1282 } 1283 } 1284 if (l0 == 'x' && l1 == 'd') 1285 { 1286 if (src[2] == '1') 1287 { 1288 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 1289 && ! IDENT_CHAR ((unsigned char) src[4])) 1290 { 1291 *mode = X_REG_N; 1292 *reg = 11 + src[3] - '0'; 1293 return 4; 1294 } 1295 } 1296 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 1297 && ! IDENT_CHAR ((unsigned char) src[3])) 1298 { 1299 *mode = X_REG_N; 1300 *reg = (src[2] - '0') + 1; 1301 return 3; 1302 } 1303 } 1304 if (l0 == 'f' && l1 == 'v') 1305 { 1306 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) 1307 { 1308 *mode = V_REG_N; 1309 *reg = 12; 1310 return 4; 1311 } 1312 if ((src[2] == '0' || src[2] == '4' || src[2] == '8') 1313 && ! IDENT_CHAR ((unsigned char) src[3])) 1314 { 1315 *mode = V_REG_N; 1316 *reg = (src[2] - '0'); 1317 return 3; 1318 } 1319 } 1320 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' 1321 && TOLOWER (src[3]) == 'l' 1322 && ! IDENT_CHAR ((unsigned char) src[4])) 1323 { 1324 *mode = FPUL_N; 1325 return 4; 1326 } 1327 1328 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' 1329 && TOLOWER (src[3]) == 'c' 1330 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) 1331 { 1332 *mode = FPSCR_N; 1333 return 5; 1334 } 1335 1336 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' 1337 && TOLOWER (src[3]) == 'r' 1338 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) 1339 { 1340 *mode = XMTRX_M4; 1341 return 5; 1342 } 1343 1344 return 0; 1345 } 1346 1347 /* Like parse_reg_without_prefix, but this version supports 1348 $-prefixed register names if enabled by the user. */ 1349 1350 static unsigned int 1351 parse_reg (char *src, sh_arg_type *mode, int *reg) 1352 { 1353 unsigned int prefix; 1354 unsigned int consumed; 1355 1356 if (src[0] == '$') 1357 { 1358 if (allow_dollar_register_prefix) 1359 { 1360 src ++; 1361 prefix = 1; 1362 } 1363 else 1364 return 0; 1365 } 1366 else 1367 prefix = 0; 1368 1369 consumed = parse_reg_without_prefix (src, mode, reg); 1370 1371 if (consumed == 0) 1372 return 0; 1373 1374 return consumed + prefix; 1375 } 1376 1377 static char * 1378 parse_exp (char *s, sh_operand_info *op) 1379 { 1380 char *save; 1381 char *new_pointer; 1382 1383 save = input_line_pointer; 1384 input_line_pointer = s; 1385 expression (&op->immediate); 1386 if (op->immediate.X_op == O_absent) 1387 as_bad (_("missing operand")); 1388 new_pointer = input_line_pointer; 1389 input_line_pointer = save; 1390 return new_pointer; 1391 } 1392 1393 /* The many forms of operand: 1394 1395 Rn Register direct 1396 @Rn Register indirect 1397 @Rn+ Autoincrement 1398 @-Rn Autodecrement 1399 @(disp:4,Rn) 1400 @(disp:8,GBR) 1401 @(disp:8,PC) 1402 1403 @(R0,Rn) 1404 @(R0,GBR) 1405 1406 disp:8 1407 disp:12 1408 #imm8 1409 pr, gbr, vbr, macl, mach 1410 */ 1411 1412 static char * 1413 parse_at (char *src, sh_operand_info *op) 1414 { 1415 int len; 1416 sh_arg_type mode; 1417 src++; 1418 if (src[0] == '@') 1419 { 1420 src = parse_at (src, op); 1421 if (op->type == A_DISP_TBR) 1422 op->type = A_DISP2_TBR; 1423 else 1424 as_bad (_("illegal double indirection")); 1425 } 1426 else if (src[0] == '-') 1427 { 1428 /* Must be predecrement. */ 1429 src++; 1430 1431 len = parse_reg (src, &mode, &(op->reg)); 1432 if (mode != A_REG_N) 1433 as_bad (_("illegal register after @-")); 1434 1435 op->type = A_DEC_N; 1436 src += len; 1437 } 1438 else if (src[0] == '(') 1439 { 1440 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or 1441 @(r0, rn). */ 1442 src++; 1443 len = parse_reg (src, &mode, &(op->reg)); 1444 if (len && mode == A_REG_N) 1445 { 1446 src += len; 1447 if (op->reg != 0) 1448 { 1449 as_bad (_("must be @(r0,...)")); 1450 } 1451 if (src[0] == ',') 1452 { 1453 src++; 1454 /* Now can be rn or gbr. */ 1455 len = parse_reg (src, &mode, &(op->reg)); 1456 } 1457 else 1458 { 1459 len = 0; 1460 } 1461 if (len) 1462 { 1463 if (mode == A_GBR) 1464 { 1465 op->type = A_R0_GBR; 1466 } 1467 else if (mode == A_REG_N) 1468 { 1469 op->type = A_IND_R0_REG_N; 1470 } 1471 else 1472 { 1473 as_bad (_("syntax error in @(r0,...)")); 1474 } 1475 } 1476 else 1477 { 1478 as_bad (_("syntax error in @(r0...)")); 1479 } 1480 } 1481 else 1482 { 1483 /* Must be an @(disp,.. thing). */ 1484 src = parse_exp (src, op); 1485 if (src[0] == ',') 1486 src++; 1487 /* Now can be rn, gbr or pc. */ 1488 len = parse_reg (src, &mode, &op->reg); 1489 if (len) 1490 { 1491 if (mode == A_REG_N) 1492 { 1493 op->type = A_DISP_REG_N; 1494 } 1495 else if (mode == A_GBR) 1496 { 1497 op->type = A_DISP_GBR; 1498 } 1499 else if (mode == A_TBR) 1500 { 1501 op->type = A_DISP_TBR; 1502 } 1503 else if (mode == A_PC) 1504 { 1505 /* We want @(expr, pc) to uniformly address . + expr, 1506 no matter if expr is a constant, or a more complex 1507 expression, e.g. sym-. or sym1-sym2. 1508 However, we also used to accept @(sym,pc) 1509 as addressing sym, i.e. meaning the same as plain sym. 1510 Some existing code does use the @(sym,pc) syntax, so 1511 we give it the old semantics for now, but warn about 1512 its use, so that users have some time to fix their code. 1513 1514 Note that due to this backward compatibility hack, 1515 we'll get unexpected results when @(offset, pc) is used, 1516 and offset is a symbol that is set later to an an address 1517 difference, or an external symbol that is set to an 1518 address difference in another source file, so we want to 1519 eventually remove it. */ 1520 if (op->immediate.X_op == O_symbol) 1521 { 1522 op->type = A_DISP_PC; 1523 as_warn (_("Deprecated syntax.")); 1524 } 1525 else 1526 { 1527 op->type = A_DISP_PC_ABS; 1528 /* Such operands don't get corrected for PC==.+4, so 1529 make the correction here. */ 1530 op->immediate.X_add_number -= 4; 1531 } 1532 } 1533 else 1534 { 1535 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1536 } 1537 } 1538 else 1539 { 1540 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1541 } 1542 } 1543 src += len; 1544 if (src[0] != ')') 1545 as_bad (_("expecting )")); 1546 else 1547 src++; 1548 } 1549 else 1550 { 1551 src += parse_reg (src, &mode, &(op->reg)); 1552 if (mode != A_REG_N) 1553 as_bad (_("illegal register after @")); 1554 1555 if (src[0] == '+') 1556 { 1557 char l0, l1; 1558 1559 src++; 1560 l0 = TOLOWER (src[0]); 1561 l1 = TOLOWER (src[1]); 1562 1563 if ((l0 == 'r' && l1 == '8') 1564 || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) 1565 { 1566 src += 2; 1567 op->type = AX_PMOD_N; 1568 } 1569 else if ( (l0 == 'r' && l1 == '9') 1570 || (l0 == 'i' && l1 == 'y')) 1571 { 1572 src += 2; 1573 op->type = AY_PMOD_N; 1574 } 1575 else 1576 op->type = A_INC_N; 1577 } 1578 else 1579 op->type = A_IND_N; 1580 } 1581 return src; 1582 } 1583 1584 static void 1585 get_operand (char **ptr, sh_operand_info *op) 1586 { 1587 char *src = *ptr; 1588 sh_arg_type mode = (sh_arg_type) -1; 1589 unsigned int len; 1590 1591 if (src[0] == '#') 1592 { 1593 src++; 1594 *ptr = parse_exp (src, op); 1595 op->type = A_IMM; 1596 return; 1597 } 1598 1599 else if (src[0] == '@') 1600 { 1601 *ptr = parse_at (src, op); 1602 return; 1603 } 1604 len = parse_reg (src, &mode, &(op->reg)); 1605 if (len) 1606 { 1607 *ptr = src + len; 1608 op->type = mode; 1609 return; 1610 } 1611 else 1612 { 1613 /* Not a reg, the only thing left is a displacement. */ 1614 *ptr = parse_exp (src, op); 1615 op->type = A_DISP_PC; 1616 return; 1617 } 1618 } 1619 1620 static char * 1621 get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) 1622 { 1623 char *ptr = args; 1624 if (info->arg[0]) 1625 { 1626 /* The pre-processor will eliminate whitespace in front of '@' 1627 after the first argument; we may be called multiple times 1628 from assemble_ppi, so don't insist on finding whitespace here. */ 1629 if (*ptr == ' ') 1630 ptr++; 1631 1632 get_operand (&ptr, operand + 0); 1633 if (info->arg[1]) 1634 { 1635 if (*ptr == ',') 1636 { 1637 ptr++; 1638 } 1639 get_operand (&ptr, operand + 1); 1640 /* ??? Hack: psha/pshl have a varying operand number depending on 1641 the type of the first operand. We handle this by having the 1642 three-operand version first and reducing the number of operands 1643 parsed to two if we see that the first operand is an immediate. 1644 This works because no insn with three operands has an immediate 1645 as first operand. */ 1646 if (info->arg[2] && operand[0].type != A_IMM) 1647 { 1648 if (*ptr == ',') 1649 { 1650 ptr++; 1651 } 1652 get_operand (&ptr, operand + 2); 1653 } 1654 else 1655 { 1656 operand[2].type = 0; 1657 } 1658 } 1659 else 1660 { 1661 operand[1].type = 0; 1662 operand[2].type = 0; 1663 } 1664 } 1665 else 1666 { 1667 operand[0].type = 0; 1668 operand[1].type = 0; 1669 operand[2].type = 0; 1670 } 1671 return ptr; 1672 } 1673 1674 /* Passed a pointer to a list of opcodes which use different 1675 addressing modes, return the opcode which matches the opcodes 1676 provided. */ 1677 1678 static sh_opcode_info * 1679 get_specific (sh_opcode_info *opcode, sh_operand_info *operands) 1680 { 1681 sh_opcode_info *this_try = opcode; 1682 const char *name = opcode->name; 1683 int n = 0; 1684 1685 while (opcode->name) 1686 { 1687 this_try = opcode++; 1688 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) 1689 { 1690 /* We've looked so far down the table that we've run out of 1691 opcodes with the same name. */ 1692 return 0; 1693 } 1694 1695 /* Look at both operands needed by the opcodes and provided by 1696 the user - since an arg test will often fail on the same arg 1697 again and again, we'll try and test the last failing arg the 1698 first on each opcode try. */ 1699 for (n = 0; this_try->arg[n]; n++) 1700 { 1701 sh_operand_info *user = operands + n; 1702 sh_arg_type arg = this_try->arg[n]; 1703 1704 switch (arg) 1705 { 1706 case A_DISP_PC: 1707 if (user->type == A_DISP_PC_ABS) 1708 break; 1709 /* Fall through. */ 1710 case A_IMM: 1711 case A_BDISP12: 1712 case A_BDISP8: 1713 case A_DISP_GBR: 1714 case A_DISP2_TBR: 1715 case A_MACH: 1716 case A_PR: 1717 case A_MACL: 1718 if (user->type != arg) 1719 goto fail; 1720 break; 1721 case A_R0: 1722 /* opcode needs r0 */ 1723 if (user->type != A_REG_N || user->reg != 0) 1724 goto fail; 1725 break; 1726 case A_R0_GBR: 1727 if (user->type != A_R0_GBR || user->reg != 0) 1728 goto fail; 1729 break; 1730 case F_FR0: 1731 if (user->type != F_REG_N || user->reg != 0) 1732 goto fail; 1733 break; 1734 1735 case A_REG_N: 1736 case A_INC_N: 1737 case A_DEC_N: 1738 case A_IND_N: 1739 case A_IND_R0_REG_N: 1740 case A_DISP_REG_N: 1741 case F_REG_N: 1742 case D_REG_N: 1743 case X_REG_N: 1744 case V_REG_N: 1745 case FPUL_N: 1746 case FPSCR_N: 1747 case DSP_REG_N: 1748 /* Opcode needs rn */ 1749 if (user->type != arg) 1750 goto fail; 1751 reg_n = user->reg; 1752 break; 1753 case DX_REG_N: 1754 if (user->type != D_REG_N && user->type != X_REG_N) 1755 goto fail; 1756 reg_n = user->reg; 1757 break; 1758 case A_GBR: 1759 case A_TBR: 1760 case A_SR: 1761 case A_VBR: 1762 case A_DSR: 1763 case A_MOD: 1764 case A_RE: 1765 case A_RS: 1766 case A_SSR: 1767 case A_SPC: 1768 case A_SGR: 1769 case A_DBR: 1770 if (user->type != arg) 1771 goto fail; 1772 break; 1773 1774 case A_REG_B: 1775 if (user->type != arg) 1776 goto fail; 1777 reg_b = user->reg; 1778 break; 1779 1780 case A_INC_R15: 1781 if (user->type != A_INC_N) 1782 goto fail; 1783 if (user->reg != 15) 1784 goto fail; 1785 reg_n = user->reg; 1786 break; 1787 1788 case A_DEC_R15: 1789 if (user->type != A_DEC_N) 1790 goto fail; 1791 if (user->reg != 15) 1792 goto fail; 1793 reg_n = user->reg; 1794 break; 1795 1796 case A_REG_M: 1797 case A_INC_M: 1798 case A_DEC_M: 1799 case A_IND_M: 1800 case A_IND_R0_REG_M: 1801 case A_DISP_REG_M: 1802 case DSP_REG_M: 1803 /* Opcode needs rn */ 1804 if (user->type != arg - A_REG_M + A_REG_N) 1805 goto fail; 1806 reg_m = user->reg; 1807 break; 1808 1809 case AS_DEC_N: 1810 if (user->type != A_DEC_N) 1811 goto fail; 1812 if (user->reg < 2 || user->reg > 5) 1813 goto fail; 1814 reg_n = user->reg; 1815 break; 1816 1817 case AS_INC_N: 1818 if (user->type != A_INC_N) 1819 goto fail; 1820 if (user->reg < 2 || user->reg > 5) 1821 goto fail; 1822 reg_n = user->reg; 1823 break; 1824 1825 case AS_IND_N: 1826 if (user->type != A_IND_N) 1827 goto fail; 1828 if (user->reg < 2 || user->reg > 5) 1829 goto fail; 1830 reg_n = user->reg; 1831 break; 1832 1833 case AS_PMOD_N: 1834 if (user->type != AX_PMOD_N) 1835 goto fail; 1836 if (user->reg < 2 || user->reg > 5) 1837 goto fail; 1838 reg_n = user->reg; 1839 break; 1840 1841 case AX_INC_N: 1842 if (user->type != A_INC_N) 1843 goto fail; 1844 if (user->reg < 4 || user->reg > 5) 1845 goto fail; 1846 reg_n = user->reg; 1847 break; 1848 1849 case AX_IND_N: 1850 if (user->type != A_IND_N) 1851 goto fail; 1852 if (user->reg < 4 || user->reg > 5) 1853 goto fail; 1854 reg_n = user->reg; 1855 break; 1856 1857 case AX_PMOD_N: 1858 if (user->type != AX_PMOD_N) 1859 goto fail; 1860 if (user->reg < 4 || user->reg > 5) 1861 goto fail; 1862 reg_n = user->reg; 1863 break; 1864 1865 case AXY_INC_N: 1866 if (user->type != A_INC_N) 1867 goto fail; 1868 if ((user->reg < 4 || user->reg > 5) 1869 && (user->reg < 0 || user->reg > 1)) 1870 goto fail; 1871 reg_n = user->reg; 1872 break; 1873 1874 case AXY_IND_N: 1875 if (user->type != A_IND_N) 1876 goto fail; 1877 if ((user->reg < 4 || user->reg > 5) 1878 && (user->reg < 0 || user->reg > 1)) 1879 goto fail; 1880 reg_n = user->reg; 1881 break; 1882 1883 case AXY_PMOD_N: 1884 if (user->type != AX_PMOD_N) 1885 goto fail; 1886 if ((user->reg < 4 || user->reg > 5) 1887 && (user->reg < 0 || user->reg > 1)) 1888 goto fail; 1889 reg_n = user->reg; 1890 break; 1891 1892 case AY_INC_N: 1893 if (user->type != A_INC_N) 1894 goto fail; 1895 if (user->reg < 6 || user->reg > 7) 1896 goto fail; 1897 reg_n = user->reg; 1898 break; 1899 1900 case AY_IND_N: 1901 if (user->type != A_IND_N) 1902 goto fail; 1903 if (user->reg < 6 || user->reg > 7) 1904 goto fail; 1905 reg_n = user->reg; 1906 break; 1907 1908 case AY_PMOD_N: 1909 if (user->type != AY_PMOD_N) 1910 goto fail; 1911 if (user->reg < 6 || user->reg > 7) 1912 goto fail; 1913 reg_n = user->reg; 1914 break; 1915 1916 case AYX_INC_N: 1917 if (user->type != A_INC_N) 1918 goto fail; 1919 if ((user->reg < 6 || user->reg > 7) 1920 && (user->reg < 2 || user->reg > 3)) 1921 goto fail; 1922 reg_n = user->reg; 1923 break; 1924 1925 case AYX_IND_N: 1926 if (user->type != A_IND_N) 1927 goto fail; 1928 if ((user->reg < 6 || user->reg > 7) 1929 && (user->reg < 2 || user->reg > 3)) 1930 goto fail; 1931 reg_n = user->reg; 1932 break; 1933 1934 case AYX_PMOD_N: 1935 if (user->type != AY_PMOD_N) 1936 goto fail; 1937 if ((user->reg < 6 || user->reg > 7) 1938 && (user->reg < 2 || user->reg > 3)) 1939 goto fail; 1940 reg_n = user->reg; 1941 break; 1942 1943 case DSP_REG_A_M: 1944 if (user->type != DSP_REG_N) 1945 goto fail; 1946 if (user->reg != A_A0_NUM 1947 && user->reg != A_A1_NUM) 1948 goto fail; 1949 reg_m = user->reg; 1950 break; 1951 1952 case DSP_REG_AX: 1953 if (user->type != DSP_REG_N) 1954 goto fail; 1955 switch (user->reg) 1956 { 1957 case A_A0_NUM: 1958 reg_x = 0; 1959 break; 1960 case A_A1_NUM: 1961 reg_x = 2; 1962 break; 1963 case A_X0_NUM: 1964 reg_x = 1; 1965 break; 1966 case A_X1_NUM: 1967 reg_x = 3; 1968 break; 1969 default: 1970 goto fail; 1971 } 1972 break; 1973 1974 case DSP_REG_XY: 1975 if (user->type != DSP_REG_N) 1976 goto fail; 1977 switch (user->reg) 1978 { 1979 case A_X0_NUM: 1980 reg_x = 0; 1981 break; 1982 case A_X1_NUM: 1983 reg_x = 2; 1984 break; 1985 case A_Y0_NUM: 1986 reg_x = 1; 1987 break; 1988 case A_Y1_NUM: 1989 reg_x = 3; 1990 break; 1991 default: 1992 goto fail; 1993 } 1994 break; 1995 1996 case DSP_REG_AY: 1997 if (user->type != DSP_REG_N) 1998 goto fail; 1999 switch (user->reg) 2000 { 2001 case A_A0_NUM: 2002 reg_y = 0; 2003 break; 2004 case A_A1_NUM: 2005 reg_y = 1; 2006 break; 2007 case A_Y0_NUM: 2008 reg_y = 2; 2009 break; 2010 case A_Y1_NUM: 2011 reg_y = 3; 2012 break; 2013 default: 2014 goto fail; 2015 } 2016 break; 2017 2018 case DSP_REG_YX: 2019 if (user->type != DSP_REG_N) 2020 goto fail; 2021 switch (user->reg) 2022 { 2023 case A_Y0_NUM: 2024 reg_y = 0; 2025 break; 2026 case A_Y1_NUM: 2027 reg_y = 1; 2028 break; 2029 case A_X0_NUM: 2030 reg_y = 2; 2031 break; 2032 case A_X1_NUM: 2033 reg_y = 3; 2034 break; 2035 default: 2036 goto fail; 2037 } 2038 break; 2039 2040 case DSP_REG_X: 2041 if (user->type != DSP_REG_N) 2042 goto fail; 2043 switch (user->reg) 2044 { 2045 case A_X0_NUM: 2046 reg_x = 0; 2047 break; 2048 case A_X1_NUM: 2049 reg_x = 1; 2050 break; 2051 case A_A0_NUM: 2052 reg_x = 2; 2053 break; 2054 case A_A1_NUM: 2055 reg_x = 3; 2056 break; 2057 default: 2058 goto fail; 2059 } 2060 break; 2061 2062 case DSP_REG_Y: 2063 if (user->type != DSP_REG_N) 2064 goto fail; 2065 switch (user->reg) 2066 { 2067 case A_Y0_NUM: 2068 reg_y = 0; 2069 break; 2070 case A_Y1_NUM: 2071 reg_y = 1; 2072 break; 2073 case A_M0_NUM: 2074 reg_y = 2; 2075 break; 2076 case A_M1_NUM: 2077 reg_y = 3; 2078 break; 2079 default: 2080 goto fail; 2081 } 2082 break; 2083 2084 case DSP_REG_E: 2085 if (user->type != DSP_REG_N) 2086 goto fail; 2087 switch (user->reg) 2088 { 2089 case A_X0_NUM: 2090 reg_efg = 0 << 10; 2091 break; 2092 case A_X1_NUM: 2093 reg_efg = 1 << 10; 2094 break; 2095 case A_Y0_NUM: 2096 reg_efg = 2 << 10; 2097 break; 2098 case A_A1_NUM: 2099 reg_efg = 3 << 10; 2100 break; 2101 default: 2102 goto fail; 2103 } 2104 break; 2105 2106 case DSP_REG_F: 2107 if (user->type != DSP_REG_N) 2108 goto fail; 2109 switch (user->reg) 2110 { 2111 case A_Y0_NUM: 2112 reg_efg |= 0 << 8; 2113 break; 2114 case A_Y1_NUM: 2115 reg_efg |= 1 << 8; 2116 break; 2117 case A_X0_NUM: 2118 reg_efg |= 2 << 8; 2119 break; 2120 case A_A1_NUM: 2121 reg_efg |= 3 << 8; 2122 break; 2123 default: 2124 goto fail; 2125 } 2126 break; 2127 2128 case DSP_REG_G: 2129 if (user->type != DSP_REG_N) 2130 goto fail; 2131 switch (user->reg) 2132 { 2133 case A_M0_NUM: 2134 reg_efg |= 0 << 2; 2135 break; 2136 case A_M1_NUM: 2137 reg_efg |= 1 << 2; 2138 break; 2139 case A_A0_NUM: 2140 reg_efg |= 2 << 2; 2141 break; 2142 case A_A1_NUM: 2143 reg_efg |= 3 << 2; 2144 break; 2145 default: 2146 goto fail; 2147 } 2148 break; 2149 2150 case A_A0: 2151 if (user->type != DSP_REG_N || user->reg != A_A0_NUM) 2152 goto fail; 2153 break; 2154 case A_X0: 2155 if (user->type != DSP_REG_N || user->reg != A_X0_NUM) 2156 goto fail; 2157 break; 2158 case A_X1: 2159 if (user->type != DSP_REG_N || user->reg != A_X1_NUM) 2160 goto fail; 2161 break; 2162 case A_Y0: 2163 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) 2164 goto fail; 2165 break; 2166 case A_Y1: 2167 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) 2168 goto fail; 2169 break; 2170 2171 case F_REG_M: 2172 case D_REG_M: 2173 case X_REG_M: 2174 case V_REG_M: 2175 case FPUL_M: 2176 case FPSCR_M: 2177 /* Opcode needs rn */ 2178 if (user->type != arg - F_REG_M + F_REG_N) 2179 goto fail; 2180 reg_m = user->reg; 2181 break; 2182 case DX_REG_M: 2183 if (user->type != D_REG_N && user->type != X_REG_N) 2184 goto fail; 2185 reg_m = user->reg; 2186 break; 2187 case XMTRX_M4: 2188 if (user->type != XMTRX_M4) 2189 goto fail; 2190 reg_m = 4; 2191 break; 2192 2193 default: 2194 printf (_("unhandled %d\n"), arg); 2195 goto fail; 2196 } 2197 if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) 2198 && ( arg == A_DISP_REG_M 2199 || arg == A_DISP_REG_N)) 2200 { 2201 /* Check a few key IMM* fields for overflow. */ 2202 int opf; 2203 long val = user->immediate.X_add_number; 2204 2205 for (opf = 0; opf < 4; opf ++) 2206 switch (this_try->nibbles[opf]) 2207 { 2208 case IMM0_4: 2209 case IMM1_4: 2210 if (val < 0 || val > 15) 2211 goto fail; 2212 break; 2213 case IMM0_4BY2: 2214 case IMM1_4BY2: 2215 if (val < 0 || val > 15 * 2) 2216 goto fail; 2217 break; 2218 case IMM0_4BY4: 2219 case IMM1_4BY4: 2220 if (val < 0 || val > 15 * 4) 2221 goto fail; 2222 break; 2223 default: 2224 break; 2225 } 2226 } 2227 } 2228 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) 2229 goto fail; 2230 valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); 2231 return this_try; 2232 fail: 2233 ; 2234 } 2235 2236 return 0; 2237 } 2238 2239 static void 2240 insert (char *where, bfd_reloc_code_real_type how, int pcrel, 2241 sh_operand_info *op) 2242 { 2243 fix_new_exp (frag_now, 2244 where - frag_now->fr_literal, 2245 2, 2246 &op->immediate, 2247 pcrel, 2248 how); 2249 } 2250 2251 static void 2252 insert4 (char * where, bfd_reloc_code_real_type how, int pcrel, 2253 sh_operand_info * op) 2254 { 2255 fix_new_exp (frag_now, 2256 where - frag_now->fr_literal, 2257 4, 2258 & op->immediate, 2259 pcrel, 2260 how); 2261 } 2262 static void 2263 build_relax (sh_opcode_info *opcode, sh_operand_info *op) 2264 { 2265 int high_byte = target_big_endian ? 0 : 1; 2266 char *p; 2267 2268 if (opcode->arg[0] == A_BDISP8) 2269 { 2270 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; 2271 p = frag_var (rs_machine_dependent, 2272 md_relax_table[C (what, COND32)].rlx_length, 2273 md_relax_table[C (what, COND8)].rlx_length, 2274 C (what, 0), 2275 op->immediate.X_add_symbol, 2276 op->immediate.X_add_number, 2277 0); 2278 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); 2279 } 2280 else if (opcode->arg[0] == A_BDISP12) 2281 { 2282 p = frag_var (rs_machine_dependent, 2283 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, 2284 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, 2285 C (UNCOND_JUMP, 0), 2286 op->immediate.X_add_symbol, 2287 op->immediate.X_add_number, 2288 0); 2289 p[high_byte] = (opcode->nibbles[0] << 4); 2290 } 2291 2292 } 2293 2294 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ 2295 2296 static char * 2297 insert_loop_bounds (char *output, sh_operand_info *operand) 2298 { 2299 symbolS *end_sym; 2300 2301 /* Since the low byte of the opcode will be overwritten by the reloc, we 2302 can just stash the high byte into both bytes and ignore endianness. */ 2303 output[0] = 0x8c; 2304 output[1] = 0x8c; 2305 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 2306 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 2307 2308 if (sh_relax) 2309 { 2310 static int count = 0; 2311 char name[11]; 2312 2313 /* If the last loop insn is a two-byte-insn, it is in danger of being 2314 swapped with the insn after it. To prevent this, create a new 2315 symbol - complete with SH_LABEL reloc - after the last loop insn. 2316 If the last loop insn is four bytes long, the symbol will be 2317 right in the middle, but four byte insns are not swapped anyways. */ 2318 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. 2319 Hence a 9 digit number should be enough to count all REPEATs. */ 2320 sprintf (name, "_R%x", count++ & 0x3fffffff); 2321 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); 2322 /* Make this a local symbol. */ 2323 #ifdef OBJ_COFF 2324 SF_SET_LOCAL (end_sym); 2325 #endif /* OBJ_COFF */ 2326 symbol_table_insert (end_sym); 2327 end_sym->sy_value = operand[1].immediate; 2328 end_sym->sy_value.X_add_number += 2; 2329 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); 2330 } 2331 2332 output = frag_more (2); 2333 output[0] = 0x8e; 2334 output[1] = 0x8e; 2335 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 2336 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 2337 2338 return frag_more (2); 2339 } 2340 2341 /* Now we know what sort of opcodes it is, let's build the bytes. */ 2342 2343 static unsigned int 2344 build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) 2345 { 2346 int indx; 2347 char nbuf[8]; 2348 char *output; 2349 unsigned int size = 2; 2350 int low_byte = target_big_endian ? 1 : 0; 2351 int max_index = 4; 2352 bfd_reloc_code_real_type r_type; 2353 #ifdef OBJ_ELF 2354 int unhandled_pic = 0; 2355 #endif 2356 2357 nbuf[0] = 0; 2358 nbuf[1] = 0; 2359 nbuf[2] = 0; 2360 nbuf[3] = 0; 2361 nbuf[4] = 0; 2362 nbuf[5] = 0; 2363 nbuf[6] = 0; 2364 nbuf[7] = 0; 2365 2366 #ifdef OBJ_ELF 2367 for (indx = 0; indx < 3; indx++) 2368 if (opcode->arg[indx] == A_IMM 2369 && operand[indx].type == A_IMM 2370 && (operand[indx].immediate.X_op == O_PIC_reloc 2371 || sh_PIC_related_p (operand[indx].immediate.X_add_symbol) 2372 || sh_PIC_related_p (operand[indx].immediate.X_op_symbol))) 2373 unhandled_pic = 1; 2374 #endif 2375 2376 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2377 { 2378 output = frag_more (4); 2379 size = 4; 2380 max_index = 8; 2381 } 2382 else 2383 output = frag_more (2); 2384 2385 for (indx = 0; indx < max_index; indx++) 2386 { 2387 sh_nibble_type i = opcode->nibbles[indx]; 2388 if (i < 16) 2389 { 2390 nbuf[indx] = i; 2391 } 2392 else 2393 { 2394 switch (i) 2395 { 2396 case REG_N: 2397 case REG_N_D: 2398 nbuf[indx] = reg_n; 2399 break; 2400 case REG_M: 2401 nbuf[indx] = reg_m; 2402 break; 2403 case SDT_REG_N: 2404 if (reg_n < 2 || reg_n > 5) 2405 as_bad (_("Invalid register: 'r%d'"), reg_n); 2406 nbuf[indx] = (reg_n & 3) | 4; 2407 break; 2408 case REG_NM: 2409 nbuf[indx] = reg_n | (reg_m >> 2); 2410 break; 2411 case REG_B: 2412 nbuf[indx] = reg_b | 0x08; 2413 break; 2414 case REG_N_B01: 2415 nbuf[indx] = reg_n | 0x01; 2416 break; 2417 case IMM0_3s: 2418 nbuf[indx] |= 0x08; 2419 case IMM0_3c: 2420 insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); 2421 break; 2422 case IMM0_3Us: 2423 nbuf[indx] |= 0x80; 2424 case IMM0_3Uc: 2425 insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); 2426 break; 2427 case DISP0_12: 2428 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); 2429 break; 2430 case DISP0_12BY2: 2431 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); 2432 break; 2433 case DISP0_12BY4: 2434 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); 2435 break; 2436 case DISP0_12BY8: 2437 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); 2438 break; 2439 case DISP1_12: 2440 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); 2441 break; 2442 case DISP1_12BY2: 2443 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); 2444 break; 2445 case DISP1_12BY4: 2446 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); 2447 break; 2448 case DISP1_12BY8: 2449 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); 2450 break; 2451 case IMM0_20_4: 2452 break; 2453 case IMM0_20: 2454 r_type = BFD_RELOC_SH_DISP20; 2455 #ifdef OBJ_ELF 2456 if (sh_check_fixup (&operand->immediate, &r_type)) 2457 as_bad (_("Invalid PIC expression.")); 2458 unhandled_pic = 0; 2459 #endif 2460 insert4 (output, r_type, 0, operand); 2461 break; 2462 case IMM0_20BY8: 2463 insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); 2464 break; 2465 case IMM0_4BY4: 2466 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); 2467 break; 2468 case IMM0_4BY2: 2469 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); 2470 break; 2471 case IMM0_4: 2472 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); 2473 break; 2474 case IMM1_4BY4: 2475 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); 2476 break; 2477 case IMM1_4BY2: 2478 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); 2479 break; 2480 case IMM1_4: 2481 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); 2482 break; 2483 case IMM0_8BY4: 2484 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); 2485 break; 2486 case IMM0_8BY2: 2487 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); 2488 break; 2489 case IMM0_8: 2490 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); 2491 break; 2492 case IMM1_8BY4: 2493 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); 2494 break; 2495 case IMM1_8BY2: 2496 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); 2497 break; 2498 case IMM1_8: 2499 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); 2500 break; 2501 case PCRELIMM_8BY4: 2502 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 2503 operand->type != A_DISP_PC_ABS, operand); 2504 break; 2505 case PCRELIMM_8BY2: 2506 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 2507 operand->type != A_DISP_PC_ABS, operand); 2508 break; 2509 case REPEAT: 2510 output = insert_loop_bounds (output, operand); 2511 nbuf[indx] = opcode->nibbles[3]; 2512 operand += 2; 2513 break; 2514 default: 2515 printf (_("failed for %d\n"), i); 2516 } 2517 } 2518 } 2519 #ifdef OBJ_ELF 2520 if (unhandled_pic) 2521 as_bad (_("misplaced PIC operand")); 2522 #endif 2523 if (!target_big_endian) 2524 { 2525 output[1] = (nbuf[0] << 4) | (nbuf[1]); 2526 output[0] = (nbuf[2] << 4) | (nbuf[3]); 2527 } 2528 else 2529 { 2530 output[0] = (nbuf[0] << 4) | (nbuf[1]); 2531 output[1] = (nbuf[2] << 4) | (nbuf[3]); 2532 } 2533 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2534 { 2535 if (!target_big_endian) 2536 { 2537 output[3] = (nbuf[4] << 4) | (nbuf[5]); 2538 output[2] = (nbuf[6] << 4) | (nbuf[7]); 2539 } 2540 else 2541 { 2542 output[2] = (nbuf[4] << 4) | (nbuf[5]); 2543 output[3] = (nbuf[6] << 4) | (nbuf[7]); 2544 } 2545 } 2546 return size; 2547 } 2548 2549 /* Find an opcode at the start of *STR_P in the hash table, and set 2550 *STR_P to the first character after the last one read. */ 2551 2552 static sh_opcode_info * 2553 find_cooked_opcode (char **str_p) 2554 { 2555 char *str = *str_p; 2556 unsigned char *op_start; 2557 unsigned char *op_end; 2558 char name[20]; 2559 unsigned int nlen = 0; 2560 2561 /* Drop leading whitespace. */ 2562 while (*str == ' ') 2563 str++; 2564 2565 /* Find the op code end. 2566 The pre-processor will eliminate whitespace in front of 2567 any '@' after the first argument; we may be called from 2568 assemble_ppi, so the opcode might be terminated by an '@'. */ 2569 for (op_start = op_end = (unsigned char *) str; 2570 *op_end 2571 && nlen < sizeof (name) - 1 2572 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; 2573 op_end++) 2574 { 2575 unsigned char c = op_start[nlen]; 2576 2577 /* The machine independent code will convert CMP/EQ into cmp/EQ 2578 because it thinks the '/' is the end of the symbol. Moreover, 2579 all but the first sub-insn is a parallel processing insn won't 2580 be capitalized. Instead of hacking up the machine independent 2581 code, we just deal with it here. */ 2582 c = TOLOWER (c); 2583 name[nlen] = c; 2584 nlen++; 2585 } 2586 2587 name[nlen] = 0; 2588 *str_p = (char *) op_end; 2589 2590 if (nlen == 0) 2591 as_bad (_("can't find opcode ")); 2592 2593 return (sh_opcode_info *) hash_find (opcode_hash_control, name); 2594 } 2595 2596 /* Assemble a parallel processing insn. */ 2597 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ 2598 2599 static unsigned int 2600 assemble_ppi (char *op_end, sh_opcode_info *opcode) 2601 { 2602 int movx = 0; 2603 int movy = 0; 2604 int cond = 0; 2605 int field_b = 0; 2606 char *output; 2607 int move_code; 2608 unsigned int size; 2609 2610 for (;;) 2611 { 2612 sh_operand_info operand[3]; 2613 2614 /* Some insn ignore one or more register fields, e.g. psts machl,a0. 2615 Make sure we encode a defined insn pattern. */ 2616 reg_x = 0; 2617 reg_y = 0; 2618 reg_n = 0; 2619 2620 if (opcode->arg[0] != A_END) 2621 op_end = get_operands (opcode, op_end, operand); 2622 try_another_opcode: 2623 opcode = get_specific (opcode, operand); 2624 if (opcode == 0) 2625 { 2626 /* Couldn't find an opcode which matched the operands. */ 2627 char *where = frag_more (2); 2628 size = 2; 2629 2630 where[0] = 0x0; 2631 where[1] = 0x0; 2632 as_bad (_("invalid operands for opcode")); 2633 return size; 2634 } 2635 2636 if (opcode->nibbles[0] != PPI) 2637 as_bad (_("insn can't be combined with parallel processing insn")); 2638 2639 switch (opcode->nibbles[1]) 2640 { 2641 2642 case NOPX: 2643 if (movx) 2644 as_bad (_("multiple movx specifications")); 2645 movx = DDT_BASE; 2646 break; 2647 case NOPY: 2648 if (movy) 2649 as_bad (_("multiple movy specifications")); 2650 movy = DDT_BASE; 2651 break; 2652 2653 case MOVX_NOPY: 2654 if (movx) 2655 as_bad (_("multiple movx specifications")); 2656 if ((reg_n < 4 || reg_n > 5) 2657 && (reg_n < 0 || reg_n > 1)) 2658 as_bad (_("invalid movx address register")); 2659 if (movy && movy != DDT_BASE) 2660 as_bad (_("insn cannot be combined with non-nopy")); 2661 movx = ((((reg_n & 1) != 0) << 9) 2662 + (((reg_n & 4) == 0) << 8) 2663 + (reg_x << 6) 2664 + (opcode->nibbles[2] << 4) 2665 + opcode->nibbles[3] 2666 + DDT_BASE); 2667 break; 2668 2669 case MOVY_NOPX: 2670 if (movy) 2671 as_bad (_("multiple movy specifications")); 2672 if ((reg_n < 6 || reg_n > 7) 2673 && (reg_n < 2 || reg_n > 3)) 2674 as_bad (_("invalid movy address register")); 2675 if (movx && movx != DDT_BASE) 2676 as_bad (_("insn cannot be combined with non-nopx")); 2677 movy = ((((reg_n & 1) != 0) << 8) 2678 + (((reg_n & 4) == 0) << 9) 2679 + (reg_y << 6) 2680 + (opcode->nibbles[2] << 4) 2681 + opcode->nibbles[3] 2682 + DDT_BASE); 2683 break; 2684 2685 case MOVX: 2686 if (movx) 2687 as_bad (_("multiple movx specifications")); 2688 if (movy & 0x2ac) 2689 as_bad (_("previous movy requires nopx")); 2690 if (reg_n < 4 || reg_n > 5) 2691 as_bad (_("invalid movx address register")); 2692 if (opcode->nibbles[2] & 8) 2693 { 2694 if (reg_m == A_A1_NUM) 2695 movx = 1 << 7; 2696 else if (reg_m != A_A0_NUM) 2697 as_bad (_("invalid movx dsp register")); 2698 } 2699 else 2700 { 2701 if (reg_x > 1) 2702 as_bad (_("invalid movx dsp register")); 2703 movx = reg_x << 7; 2704 } 2705 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; 2706 break; 2707 2708 case MOVY: 2709 if (movy) 2710 as_bad (_("multiple movy specifications")); 2711 if (movx & 0x153) 2712 as_bad (_("previous movx requires nopy")); 2713 if (opcode->nibbles[2] & 8) 2714 { 2715 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, 2716 so add 8 more. */ 2717 movy = 8; 2718 if (reg_m == A_A1_NUM) 2719 movy += 1 << 6; 2720 else if (reg_m != A_A0_NUM) 2721 as_bad (_("invalid movy dsp register")); 2722 } 2723 else 2724 { 2725 if (reg_y > 1) 2726 as_bad (_("invalid movy dsp register")); 2727 movy = reg_y << 6; 2728 } 2729 if (reg_n < 6 || reg_n > 7) 2730 as_bad (_("invalid movy address register")); 2731 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; 2732 break; 2733 2734 case PSH: 2735 if (operand[0].immediate.X_op != O_constant) 2736 as_bad (_("dsp immediate shift value not constant")); 2737 field_b = ((opcode->nibbles[2] << 12) 2738 | (operand[0].immediate.X_add_number & 127) << 4 2739 | reg_n); 2740 break; 2741 case PPI3NC: 2742 if (cond) 2743 { 2744 opcode++; 2745 goto try_another_opcode; 2746 } 2747 /* Fall through. */ 2748 case PPI3: 2749 if (field_b) 2750 as_bad (_("multiple parallel processing specifications")); 2751 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2752 + (reg_x << 6) + (reg_y << 4) + reg_n); 2753 switch (opcode->nibbles[4]) 2754 { 2755 case HEX_0: 2756 case HEX_XX00: 2757 case HEX_00YY: 2758 break; 2759 case HEX_1: 2760 case HEX_4: 2761 field_b += opcode->nibbles[4] << 4; 2762 break; 2763 default: 2764 abort (); 2765 } 2766 break; 2767 case PDC: 2768 if (cond) 2769 as_bad (_("multiple condition specifications")); 2770 cond = opcode->nibbles[2] << 8; 2771 if (*op_end) 2772 goto skip_cond_check; 2773 break; 2774 case PPIC: 2775 if (field_b) 2776 as_bad (_("multiple parallel processing specifications")); 2777 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2778 + cond + (reg_x << 6) + (reg_y << 4) + reg_n); 2779 cond = 0; 2780 switch (opcode->nibbles[4]) 2781 { 2782 case HEX_0: 2783 case HEX_XX00: 2784 case HEX_00YY: 2785 break; 2786 case HEX_1: 2787 case HEX_4: 2788 field_b += opcode->nibbles[4] << 4; 2789 break; 2790 default: 2791 abort (); 2792 } 2793 break; 2794 case PMUL: 2795 if (field_b) 2796 { 2797 if ((field_b & 0xef00) == 0xa100) 2798 field_b -= 0x8100; 2799 /* pclr Dz pmuls Se,Sf,Dg */ 2800 else if ((field_b & 0xff00) == 0x8d00 2801 && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) 2802 { 2803 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); 2804 field_b -= 0x8cf0; 2805 } 2806 else 2807 as_bad (_("insn cannot be combined with pmuls")); 2808 switch (field_b & 0xf) 2809 { 2810 case A_X0_NUM: 2811 field_b += 0 - A_X0_NUM; 2812 break; 2813 case A_Y0_NUM: 2814 field_b += 1 - A_Y0_NUM; 2815 break; 2816 case A_A0_NUM: 2817 field_b += 2 - A_A0_NUM; 2818 break; 2819 case A_A1_NUM: 2820 field_b += 3 - A_A1_NUM; 2821 break; 2822 default: 2823 as_bad (_("bad combined pmuls output operand")); 2824 } 2825 /* Generate warning if the destination register for padd / psub 2826 and pmuls is the same ( only for A0 or A1 ). 2827 If the last nibble is 1010 then A0 is used in both 2828 padd / psub and pmuls. If it is 1111 then A1 is used 2829 as destination register in both padd / psub and pmuls. */ 2830 2831 if ((((field_b | reg_efg) & 0x000F) == 0x000A) 2832 || (((field_b | reg_efg) & 0x000F) == 0x000F)) 2833 as_warn (_("destination register is same for parallel insns")); 2834 } 2835 field_b += 0x4000 + reg_efg; 2836 break; 2837 default: 2838 abort (); 2839 } 2840 if (cond) 2841 { 2842 as_bad (_("condition not followed by conditionalizable insn")); 2843 cond = 0; 2844 } 2845 if (! *op_end) 2846 break; 2847 skip_cond_check: 2848 opcode = find_cooked_opcode (&op_end); 2849 if (opcode == NULL) 2850 { 2851 (as_bad 2852 (_("unrecognized characters at end of parallel processing insn"))); 2853 break; 2854 } 2855 } 2856 2857 move_code = movx | movy; 2858 if (field_b) 2859 { 2860 /* Parallel processing insn. */ 2861 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; 2862 2863 output = frag_more (4); 2864 size = 4; 2865 if (! target_big_endian) 2866 { 2867 output[3] = ppi_code >> 8; 2868 output[2] = ppi_code; 2869 } 2870 else 2871 { 2872 output[2] = ppi_code >> 8; 2873 output[3] = ppi_code; 2874 } 2875 move_code |= 0xf800; 2876 } 2877 else 2878 { 2879 /* Just a double data transfer. */ 2880 output = frag_more (2); 2881 size = 2; 2882 } 2883 if (! target_big_endian) 2884 { 2885 output[1] = move_code >> 8; 2886 output[0] = move_code; 2887 } 2888 else 2889 { 2890 output[0] = move_code >> 8; 2891 output[1] = move_code; 2892 } 2893 return size; 2894 } 2895 2896 /* This is the guts of the machine-dependent assembler. STR points to a 2897 machine dependent instruction. This function is supposed to emit 2898 the frags/bytes it assembles to. */ 2899 2900 void 2901 md_assemble (char *str) 2902 { 2903 char *op_end; 2904 sh_operand_info operand[3]; 2905 sh_opcode_info *opcode; 2906 unsigned int size = 0; 2907 char *initial_str = str; 2908 2909 #ifdef HAVE_SH64 2910 if (sh64_isa_mode == sh64_isa_shmedia) 2911 { 2912 shmedia_md_assemble (str); 2913 return; 2914 } 2915 else 2916 { 2917 /* If we've seen pseudo-directives, make sure any emitted data or 2918 frags are marked as data. */ 2919 if (!seen_insn) 2920 { 2921 sh64_update_contents_mark (TRUE); 2922 sh64_set_contents_type (CRT_SH5_ISA16); 2923 } 2924 2925 seen_insn = TRUE; 2926 } 2927 #endif /* HAVE_SH64 */ 2928 2929 opcode = find_cooked_opcode (&str); 2930 op_end = str; 2931 2932 if (opcode == NULL) 2933 { 2934 /* The opcode is not in the hash table. 2935 This means we definitely have an assembly failure, 2936 but the instruction may be valid in another CPU variant. 2937 In this case emit something better than 'unknown opcode'. 2938 Search the full table in sh-opc.h to check. */ 2939 2940 char *name = initial_str; 2941 int name_length = 0; 2942 const sh_opcode_info *op; 2943 int found = 0; 2944 2945 /* identify opcode in string */ 2946 while (ISSPACE (*name)) 2947 { 2948 name++; 2949 } 2950 while (!ISSPACE (name[name_length])) 2951 { 2952 name_length++; 2953 } 2954 2955 /* search for opcode in full list */ 2956 for (op = sh_table; op->name; op++) 2957 { 2958 if (strncasecmp (op->name, name, name_length) == 0 2959 && op->name[name_length] == '\0') 2960 { 2961 found = 1; 2962 break; 2963 } 2964 } 2965 2966 if ( found ) 2967 { 2968 as_bad (_("opcode not valid for this cpu variant")); 2969 } 2970 else 2971 { 2972 as_bad (_("unknown opcode")); 2973 } 2974 return; 2975 } 2976 2977 if (sh_relax 2978 && ! seg_info (now_seg)->tc_segment_info_data.in_code) 2979 { 2980 /* Output a CODE reloc to tell the linker that the following 2981 bytes are instructions, not data. */ 2982 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2983 BFD_RELOC_SH_CODE); 2984 seg_info (now_seg)->tc_segment_info_data.in_code = 1; 2985 } 2986 2987 if (opcode->nibbles[0] == PPI) 2988 { 2989 size = assemble_ppi (op_end, opcode); 2990 } 2991 else 2992 { 2993 if (opcode->arg[0] == A_BDISP12 2994 || opcode->arg[0] == A_BDISP8) 2995 { 2996 /* Since we skip get_specific here, we have to check & update 2997 valid_arch now. */ 2998 if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) 2999 valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); 3000 else 3001 as_bad (_("Delayed branches not available on SH1")); 3002 parse_exp (op_end + 1, &operand[0]); 3003 build_relax (opcode, &operand[0]); 3004 3005 /* All branches are currently 16 bit. */ 3006 size = 2; 3007 } 3008 else 3009 { 3010 if (opcode->arg[0] == A_END) 3011 { 3012 /* Ignore trailing whitespace. If there is any, it has already 3013 been compressed to a single space. */ 3014 if (*op_end == ' ') 3015 op_end++; 3016 } 3017 else 3018 { 3019 op_end = get_operands (opcode, op_end, operand); 3020 } 3021 opcode = get_specific (opcode, operand); 3022 3023 if (opcode == 0) 3024 { 3025 /* Couldn't find an opcode which matched the operands. */ 3026 char *where = frag_more (2); 3027 size = 2; 3028 3029 where[0] = 0x0; 3030 where[1] = 0x0; 3031 as_bad (_("invalid operands for opcode")); 3032 } 3033 else 3034 { 3035 if (*op_end) 3036 as_bad (_("excess operands: '%s'"), op_end); 3037 3038 size = build_Mytes (opcode, operand); 3039 } 3040 } 3041 } 3042 3043 dwarf2_emit_insn (size); 3044 } 3045 3046 /* This routine is called each time a label definition is seen. It 3047 emits a BFD_RELOC_SH_LABEL reloc if necessary. */ 3048 3049 void 3050 sh_frob_label (symbolS *sym) 3051 { 3052 static fragS *last_label_frag; 3053 static int last_label_offset; 3054 3055 if (sh_relax 3056 && seg_info (now_seg)->tc_segment_info_data.in_code) 3057 { 3058 int offset; 3059 3060 offset = frag_now_fix (); 3061 if (frag_now != last_label_frag 3062 || offset != last_label_offset) 3063 { 3064 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); 3065 last_label_frag = frag_now; 3066 last_label_offset = offset; 3067 } 3068 } 3069 3070 dwarf2_emit_label (sym); 3071 } 3072 3073 /* This routine is called when the assembler is about to output some 3074 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ 3075 3076 void 3077 sh_flush_pending_output (void) 3078 { 3079 if (sh_relax 3080 && seg_info (now_seg)->tc_segment_info_data.in_code) 3081 { 3082 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 3083 BFD_RELOC_SH_DATA); 3084 seg_info (now_seg)->tc_segment_info_data.in_code = 0; 3085 } 3086 } 3087 3088 symbolS * 3089 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 3090 { 3091 return 0; 3092 } 3093 3094 /* Various routines to kill one day. */ 3095 3096 const char * 3097 md_atof (int type, char *litP, int *sizeP) 3098 { 3099 return ieee_md_atof (type, litP, sizeP, target_big_endian); 3100 } 3101 3102 /* Handle the .uses pseudo-op. This pseudo-op is used just before a 3103 call instruction. It refers to a label of the instruction which 3104 loads the register which the call uses. We use it to generate a 3105 special reloc for the linker. */ 3106 3107 static void 3108 s_uses (int ignore ATTRIBUTE_UNUSED) 3109 { 3110 expressionS ex; 3111 3112 if (! sh_relax) 3113 as_warn (_(".uses pseudo-op seen when not relaxing")); 3114 3115 expression (&ex); 3116 3117 if (ex.X_op != O_symbol || ex.X_add_number != 0) 3118 { 3119 as_bad (_("bad .uses format")); 3120 ignore_rest_of_line (); 3121 return; 3122 } 3123 3124 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); 3125 3126 demand_empty_rest_of_line (); 3127 } 3128 3129 enum options 3131 { 3132 OPTION_RELAX = OPTION_MD_BASE, 3133 OPTION_BIG, 3134 OPTION_LITTLE, 3135 OPTION_SMALL, 3136 OPTION_DSP, 3137 OPTION_ISA, 3138 OPTION_RENESAS, 3139 OPTION_ALLOW_REG_PREFIX, 3140 #ifdef HAVE_SH64 3141 OPTION_ABI, 3142 OPTION_NO_MIX, 3143 OPTION_SHCOMPACT_CONST_CRANGE, 3144 OPTION_NO_EXPAND, 3145 OPTION_PT32, 3146 #endif 3147 OPTION_H_TICK_HEX, 3148 #ifdef OBJ_ELF 3149 OPTION_FDPIC, 3150 #endif 3151 OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ 3152 }; 3153 3154 const char *md_shortopts = ""; 3155 struct option md_longopts[] = 3156 { 3157 {"relax", no_argument, NULL, OPTION_RELAX}, 3158 {"big", no_argument, NULL, OPTION_BIG}, 3159 {"little", no_argument, NULL, OPTION_LITTLE}, 3160 /* The next two switches are here because the 3161 generic parts of the linker testsuite uses them. */ 3162 {"EB", no_argument, NULL, OPTION_BIG}, 3163 {"EL", no_argument, NULL, OPTION_LITTLE}, 3164 {"small", no_argument, NULL, OPTION_SMALL}, 3165 {"dsp", no_argument, NULL, OPTION_DSP}, 3166 {"isa", required_argument, NULL, OPTION_ISA}, 3167 {"renesas", no_argument, NULL, OPTION_RENESAS}, 3168 {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, 3169 3170 #ifdef HAVE_SH64 3171 {"abi", required_argument, NULL, OPTION_ABI}, 3172 {"no-mix", no_argument, NULL, OPTION_NO_MIX}, 3173 {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, 3174 {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, 3175 {"expand-pt32", no_argument, NULL, OPTION_PT32}, 3176 #endif /* HAVE_SH64 */ 3177 { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX }, 3178 3179 #ifdef OBJ_ELF 3180 {"fdpic", no_argument, NULL, OPTION_FDPIC}, 3181 #endif 3182 3183 {NULL, no_argument, NULL, 0} 3184 }; 3185 size_t md_longopts_size = sizeof (md_longopts); 3186 3187 int 3188 md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED) 3189 { 3190 switch (c) 3191 { 3192 case OPTION_RELAX: 3193 sh_relax = 1; 3194 break; 3195 3196 case OPTION_BIG: 3197 target_big_endian = 1; 3198 break; 3199 3200 case OPTION_LITTLE: 3201 target_big_endian = 0; 3202 break; 3203 3204 case OPTION_SMALL: 3205 sh_small = 1; 3206 break; 3207 3208 case OPTION_DSP: 3209 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 3210 break; 3211 3212 case OPTION_RENESAS: 3213 dont_adjust_reloc_32 = 1; 3214 break; 3215 3216 case OPTION_ALLOW_REG_PREFIX: 3217 allow_dollar_register_prefix = 1; 3218 break; 3219 3220 case OPTION_ISA: 3221 if (strcasecmp (arg, "dsp") == 0) 3222 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 3223 else if (strcasecmp (arg, "fp") == 0) 3224 preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; 3225 else if (strcasecmp (arg, "any") == 0) 3226 preset_target_arch = arch_sh_up; 3227 #ifdef HAVE_SH64 3228 else if (strcasecmp (arg, "shmedia") == 0) 3229 { 3230 if (sh64_isa_mode == sh64_isa_shcompact) 3231 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); 3232 sh64_isa_mode = sh64_isa_shmedia; 3233 } 3234 else if (strcasecmp (arg, "shcompact") == 0) 3235 { 3236 if (sh64_isa_mode == sh64_isa_shmedia) 3237 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); 3238 if (sh64_abi == sh64_abi_64) 3239 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); 3240 sh64_isa_mode = sh64_isa_shcompact; 3241 } 3242 #endif /* HAVE_SH64 */ 3243 else 3244 { 3245 extern const bfd_arch_info_type bfd_sh_arch; 3246 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 3247 3248 preset_target_arch = 0; 3249 for (; bfd_arch; bfd_arch=bfd_arch->next) 3250 { 3251 int len = strlen(bfd_arch->printable_name); 3252 3253 if (bfd_arch->mach == bfd_mach_sh5) 3254 continue; 3255 3256 if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) 3257 continue; 3258 3259 if (arg[len] == '\0') 3260 preset_target_arch = 3261 sh_get_arch_from_bfd_mach (bfd_arch->mach); 3262 else if (strcasecmp(&arg[len], "-up") == 0) 3263 preset_target_arch = 3264 sh_get_arch_up_from_bfd_mach (bfd_arch->mach); 3265 else 3266 continue; 3267 break; 3268 } 3269 3270 if (!preset_target_arch) 3271 as_bad (_("Invalid argument to --isa option: %s"), arg); 3272 } 3273 break; 3274 3275 #ifdef HAVE_SH64 3276 case OPTION_ABI: 3277 if (strcmp (arg, "32") == 0) 3278 { 3279 if (sh64_abi == sh64_abi_64) 3280 as_bad (_("Invalid combination: --abi=32 with --abi=64")); 3281 sh64_abi = sh64_abi_32; 3282 } 3283 else if (strcmp (arg, "64") == 0) 3284 { 3285 if (sh64_abi == sh64_abi_32) 3286 as_bad (_("Invalid combination: --abi=64 with --abi=32")); 3287 if (sh64_isa_mode == sh64_isa_shcompact) 3288 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); 3289 sh64_abi = sh64_abi_64; 3290 } 3291 else 3292 as_bad (_("Invalid argument to --abi option: %s"), arg); 3293 break; 3294 3295 case OPTION_NO_MIX: 3296 sh64_mix = FALSE; 3297 break; 3298 3299 case OPTION_SHCOMPACT_CONST_CRANGE: 3300 sh64_shcompact_const_crange = TRUE; 3301 break; 3302 3303 case OPTION_NO_EXPAND: 3304 sh64_expand = FALSE; 3305 break; 3306 3307 case OPTION_PT32: 3308 sh64_pt32 = TRUE; 3309 break; 3310 #endif /* HAVE_SH64 */ 3311 3312 case OPTION_H_TICK_HEX: 3313 enable_h_tick_hex = 1; 3314 break; 3315 3316 #ifdef OBJ_ELF 3317 case OPTION_FDPIC: 3318 sh_fdpic = TRUE; 3319 break; 3320 #endif /* OBJ_ELF */ 3321 3322 default: 3323 return 0; 3324 } 3325 3326 return 1; 3327 } 3328 3329 void 3330 md_show_usage (FILE *stream) 3331 { 3332 fprintf (stream, _("\ 3333 SH options:\n\ 3334 --little generate little endian code\n\ 3335 --big generate big endian code\n\ 3336 --relax alter jump instructions for long displacements\n\ 3337 --renesas disable optimization with section symbol for\n\ 3338 compatibility with Renesas assembler.\n\ 3339 --small align sections to 4 byte boundaries, not 16\n\ 3340 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ 3341 --allow-reg-prefix allow '$' as a register name prefix.\n\ 3342 --isa=[any use most appropriate isa\n\ 3343 | dsp same as '-dsp'\n\ 3344 | fp")); 3345 { 3346 extern const bfd_arch_info_type bfd_sh_arch; 3347 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 3348 3349 for (; bfd_arch; bfd_arch=bfd_arch->next) 3350 if (bfd_arch->mach != bfd_mach_sh5) 3351 { 3352 fprintf (stream, "\n | %s", bfd_arch->printable_name); 3353 fprintf (stream, "\n | %s-up", bfd_arch->printable_name); 3354 } 3355 } 3356 fprintf (stream, "]\n"); 3357 #ifdef HAVE_SH64 3358 fprintf (stream, _("\ 3359 --isa=[shmedia set as the default instruction set for SH64\n\ 3360 | SHmedia\n\ 3361 | shcompact\n\ 3362 | SHcompact]\n")); 3363 fprintf (stream, _("\ 3364 --abi=[32|64] set size of expanded SHmedia operands and object\n\ 3365 file type\n\ 3366 --shcompact-const-crange emit code-range descriptors for constants in\n\ 3367 SHcompact code sections\n\ 3368 --no-mix disallow SHmedia code in the same section as\n\ 3369 constants and SHcompact code\n\ 3370 --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ 3371 --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ 3372 to 32 bits only\n")); 3373 #endif /* HAVE_SH64 */ 3374 #ifdef OBJ_ELF 3375 fprintf (stream, _("\ 3376 --fdpic generate an FDPIC object file\n")); 3377 #endif /* OBJ_ELF */ 3378 } 3379 3380 /* This struct is used to pass arguments to sh_count_relocs through 3382 bfd_map_over_sections. */ 3383 3384 struct sh_count_relocs 3385 { 3386 /* Symbol we are looking for. */ 3387 symbolS *sym; 3388 /* Count of relocs found. */ 3389 int count; 3390 }; 3391 3392 /* Count the number of fixups in a section which refer to a particular 3393 symbol. This is called via bfd_map_over_sections. */ 3394 3395 static void 3396 sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) 3397 { 3398 struct sh_count_relocs *info = (struct sh_count_relocs *) data; 3399 segment_info_type *seginfo; 3400 symbolS *sym; 3401 fixS *fix; 3402 3403 seginfo = seg_info (sec); 3404 if (seginfo == NULL) 3405 return; 3406 3407 sym = info->sym; 3408 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3409 { 3410 if (fix->fx_addsy == sym) 3411 { 3412 ++info->count; 3413 fix->fx_tcbit = 1; 3414 } 3415 } 3416 } 3417 3418 /* Handle the count relocs for a particular section. 3419 This is called via bfd_map_over_sections. */ 3420 3421 static void 3422 sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, 3423 void *ignore ATTRIBUTE_UNUSED) 3424 { 3425 segment_info_type *seginfo; 3426 fixS *fix; 3427 3428 seginfo = seg_info (sec); 3429 if (seginfo == NULL) 3430 return; 3431 3432 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3433 { 3434 symbolS *sym; 3435 3436 sym = fix->fx_addsy; 3437 /* Check for a local_symbol. */ 3438 if (sym && sym->bsym == NULL) 3439 { 3440 struct local_symbol *ls = (struct local_symbol *)sym; 3441 /* See if it's been converted. If so, canonicalize. */ 3442 if (local_symbol_converted_p (ls)) 3443 fix->fx_addsy = local_symbol_get_real_symbol (ls); 3444 } 3445 } 3446 3447 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3448 { 3449 symbolS *sym; 3450 bfd_vma val; 3451 fixS *fscan; 3452 struct sh_count_relocs info; 3453 3454 if (fix->fx_r_type != BFD_RELOC_SH_USES) 3455 continue; 3456 3457 /* The BFD_RELOC_SH_USES reloc should refer to a defined local 3458 symbol in the same section. */ 3459 sym = fix->fx_addsy; 3460 if (sym == NULL 3461 || fix->fx_subsy != NULL 3462 || fix->fx_addnumber != 0 3463 || S_GET_SEGMENT (sym) != sec 3464 || S_IS_EXTERNAL (sym)) 3465 { 3466 as_warn_where (fix->fx_file, fix->fx_line, 3467 _(".uses does not refer to a local symbol in the same section")); 3468 continue; 3469 } 3470 3471 /* Look through the fixups again, this time looking for one 3472 at the same location as sym. */ 3473 val = S_GET_VALUE (sym); 3474 for (fscan = seginfo->fix_root; 3475 fscan != NULL; 3476 fscan = fscan->fx_next) 3477 if (val == fscan->fx_frag->fr_address + fscan->fx_where 3478 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN 3479 && fscan->fx_r_type != BFD_RELOC_SH_CODE 3480 && fscan->fx_r_type != BFD_RELOC_SH_DATA 3481 && fscan->fx_r_type != BFD_RELOC_SH_LABEL) 3482 break; 3483 if (fscan == NULL) 3484 { 3485 as_warn_where (fix->fx_file, fix->fx_line, 3486 _("can't find fixup pointed to by .uses")); 3487 continue; 3488 } 3489 3490 if (fscan->fx_tcbit) 3491 { 3492 /* We've already done this one. */ 3493 continue; 3494 } 3495 3496 /* The variable fscan should also be a fixup to a local symbol 3497 in the same section. */ 3498 sym = fscan->fx_addsy; 3499 if (sym == NULL 3500 || fscan->fx_subsy != NULL 3501 || fscan->fx_addnumber != 0 3502 || S_GET_SEGMENT (sym) != sec 3503 || S_IS_EXTERNAL (sym)) 3504 { 3505 as_warn_where (fix->fx_file, fix->fx_line, 3506 _(".uses target does not refer to a local symbol in the same section")); 3507 continue; 3508 } 3509 3510 /* Now we look through all the fixups of all the sections, 3511 counting the number of times we find a reference to sym. */ 3512 info.sym = sym; 3513 info.count = 0; 3514 bfd_map_over_sections (stdoutput, sh_count_relocs, &info); 3515 3516 if (info.count < 1) 3517 abort (); 3518 3519 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. 3520 We have already adjusted the value of sym to include the 3521 fragment address, so we undo that adjustment here. */ 3522 subseg_change (sec, 0); 3523 fix_new (fscan->fx_frag, 3524 S_GET_VALUE (sym) - fscan->fx_frag->fr_address, 3525 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); 3526 } 3527 } 3528 3529 /* This function is called after the symbol table has been completed, 3530 but before the relocs or section contents have been written out. 3531 If we have seen any .uses pseudo-ops, they point to an instruction 3532 which loads a register with the address of a function. We look 3533 through the fixups to find where the function address is being 3534 loaded from. We then generate a COUNT reloc giving the number of 3535 times that function address is referred to. The linker uses this 3536 information when doing relaxing, to decide when it can eliminate 3537 the stored function address entirely. */ 3538 3539 void 3540 sh_frob_file (void) 3541 { 3542 #ifdef HAVE_SH64 3543 shmedia_frob_file_before_adjust (); 3544 #endif 3545 3546 if (! sh_relax) 3547 return; 3548 3549 bfd_map_over_sections (stdoutput, sh_frob_section, NULL); 3550 } 3551 3552 /* Called after relaxing. Set the correct sizes of the fragments, and 3553 create relocs so that md_apply_fix will fill in the correct values. */ 3554 3555 void 3556 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) 3557 { 3558 int donerelax = 0; 3559 3560 switch (fragP->fr_subtype) 3561 { 3562 case C (COND_JUMP, COND8): 3563 case C (COND_JUMP_DELAY, COND8): 3564 subseg_change (seg, 0); 3565 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3566 1, BFD_RELOC_SH_PCDISP8BY2); 3567 fragP->fr_fix += 2; 3568 fragP->fr_var = 0; 3569 break; 3570 3571 case C (UNCOND_JUMP, UNCOND12): 3572 subseg_change (seg, 0); 3573 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3574 1, BFD_RELOC_SH_PCDISP12BY2); 3575 fragP->fr_fix += 2; 3576 fragP->fr_var = 0; 3577 break; 3578 3579 case C (UNCOND_JUMP, UNCOND32): 3580 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3581 if (fragP->fr_symbol == NULL) 3582 as_bad_where (fragP->fr_file, fragP->fr_line, 3583 _("displacement overflows 12-bit field")); 3584 else if (S_IS_DEFINED (fragP->fr_symbol)) 3585 as_bad_where (fragP->fr_file, fragP->fr_line, 3586 _("displacement to defined symbol %s overflows 12-bit field"), 3587 S_GET_NAME (fragP->fr_symbol)); 3588 else 3589 as_bad_where (fragP->fr_file, fragP->fr_line, 3590 _("displacement to undefined symbol %s overflows 12-bit field"), 3591 S_GET_NAME (fragP->fr_symbol)); 3592 /* Stabilize this frag, so we don't trip an assert. */ 3593 fragP->fr_fix += fragP->fr_var; 3594 fragP->fr_var = 0; 3595 break; 3596 3597 case C (COND_JUMP, COND12): 3598 case C (COND_JUMP_DELAY, COND12): 3599 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ 3600 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c 3601 was due to gas incorrectly relaxing an out-of-range conditional 3602 branch with delay slot. It turned: 3603 bf.s L6 (slot mov.l r12,@(44,r0)) 3604 into: 3605 3606 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) 3607 30: 00 09 nop 3608 32: 10 cb mov.l r12,@(44,r0) 3609 Therefore, branches with delay slots have to be handled 3610 differently from ones without delay slots. */ 3611 { 3612 unsigned char *buffer = 3613 (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 3614 int highbyte = target_big_endian ? 0 : 1; 3615 int lowbyte = target_big_endian ? 1 : 0; 3616 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); 3617 3618 /* Toggle the true/false bit of the bcond. */ 3619 buffer[highbyte] ^= 0x2; 3620 3621 /* If this is a delayed branch, we may not put the bra in the 3622 slot. So we change it to a non-delayed branch, like that: 3623 b! cond slot_label; bra disp; slot_label: slot_insn 3624 ??? We should try if swapping the conditional branch and 3625 its delay-slot insn already makes the branch reach. */ 3626 3627 /* Build a relocation to six / four bytes farther on. */ 3628 subseg_change (seg, 0); 3629 fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), 3630 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), 3631 1, BFD_RELOC_SH_PCDISP8BY2); 3632 3633 /* Set up a jump instruction. */ 3634 buffer[highbyte + 2] = 0xa0; 3635 buffer[lowbyte + 2] = 0; 3636 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, 3637 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); 3638 3639 if (delay) 3640 { 3641 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ 3642 fragP->fr_fix += 4; 3643 } 3644 else 3645 { 3646 /* Fill in a NOP instruction. */ 3647 buffer[highbyte + 4] = 0x0; 3648 buffer[lowbyte + 4] = 0x9; 3649 3650 fragP->fr_fix += 6; 3651 } 3652 fragP->fr_var = 0; 3653 donerelax = 1; 3654 } 3655 break; 3656 3657 case C (COND_JUMP, COND32): 3658 case C (COND_JUMP_DELAY, COND32): 3659 case C (COND_JUMP, UNDEF_WORD_DISP): 3660 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3661 if (fragP->fr_symbol == NULL) 3662 as_bad_where (fragP->fr_file, fragP->fr_line, 3663 _("displacement overflows 8-bit field")); 3664 else if (S_IS_DEFINED (fragP->fr_symbol)) 3665 as_bad_where (fragP->fr_file, fragP->fr_line, 3666 _("displacement to defined symbol %s overflows 8-bit field"), 3667 S_GET_NAME (fragP->fr_symbol)); 3668 else 3669 as_bad_where (fragP->fr_file, fragP->fr_line, 3670 _("displacement to undefined symbol %s overflows 8-bit field "), 3671 S_GET_NAME (fragP->fr_symbol)); 3672 /* Stabilize this frag, so we don't trip an assert. */ 3673 fragP->fr_fix += fragP->fr_var; 3674 fragP->fr_var = 0; 3675 break; 3676 3677 default: 3678 #ifdef HAVE_SH64 3679 shmedia_md_convert_frag (headers, seg, fragP, TRUE); 3680 #else 3681 abort (); 3682 #endif 3683 } 3684 3685 if (donerelax && !sh_relax) 3686 as_warn_where (fragP->fr_file, fragP->fr_line, 3687 _("overflow in branch to %s; converted into longer instruction sequence"), 3688 (fragP->fr_symbol != NULL 3689 ? S_GET_NAME (fragP->fr_symbol) 3690 : "")); 3691 } 3692 3693 valueT 3694 md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) 3695 { 3696 #ifdef OBJ_ELF 3697 return size; 3698 #else /* ! OBJ_ELF */ 3699 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) 3700 & -(1 << bfd_get_section_alignment (stdoutput, seg))); 3701 #endif /* ! OBJ_ELF */ 3702 } 3703 3704 /* This static variable is set by s_uacons to tell sh_cons_align that 3705 the expression does not need to be aligned. */ 3706 3707 static int sh_no_align_cons = 0; 3708 3709 /* This handles the unaligned space allocation pseudo-ops, such as 3710 .uaword. .uaword is just like .word, but the value does not need 3711 to be aligned. */ 3712 3713 static void 3714 s_uacons (int bytes) 3715 { 3716 /* Tell sh_cons_align not to align this value. */ 3717 sh_no_align_cons = 1; 3718 cons (bytes); 3719 } 3720 3721 /* If a .word, et. al., pseud-op is seen, warn if the value is not 3722 aligned correctly. Note that this can cause warnings to be issued 3723 when assembling initialized structured which were declared with the 3724 packed attribute. FIXME: Perhaps we should require an option to 3725 enable this warning? */ 3726 3727 void 3728 sh_cons_align (int nbytes) 3729 { 3730 int nalign; 3731 3732 if (sh_no_align_cons) 3733 { 3734 /* This is an unaligned pseudo-op. */ 3735 sh_no_align_cons = 0; 3736 return; 3737 } 3738 3739 nalign = 0; 3740 while ((nbytes & 1) == 0) 3741 { 3742 ++nalign; 3743 nbytes >>= 1; 3744 } 3745 3746 if (nalign == 0) 3747 return; 3748 3749 if (now_seg == absolute_section) 3750 { 3751 if ((abs_section_offset & ((1 << nalign) - 1)) != 0) 3752 as_warn (_("misaligned data")); 3753 return; 3754 } 3755 3756 frag_var (rs_align_test, 1, 1, (relax_substateT) 0, 3757 (symbolS *) NULL, (offsetT) nalign, (char *) NULL); 3758 3759 record_alignment (now_seg, nalign); 3760 } 3761 3762 /* When relaxing, we need to output a reloc for any .align directive 3763 that requests alignment to a four byte boundary or larger. This is 3764 also where we check for misaligned data. */ 3765 3766 void 3767 sh_handle_align (fragS *frag) 3768 { 3769 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; 3770 3771 if (frag->fr_type == rs_align_code) 3772 { 3773 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; 3774 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; 3775 3776 char *p = frag->fr_literal + frag->fr_fix; 3777 3778 if (bytes & 1) 3779 { 3780 *p++ = 0; 3781 bytes--; 3782 frag->fr_fix += 1; 3783 } 3784 3785 if (target_big_endian) 3786 { 3787 memcpy (p, big_nop_pattern, sizeof big_nop_pattern); 3788 frag->fr_var = sizeof big_nop_pattern; 3789 } 3790 else 3791 { 3792 memcpy (p, little_nop_pattern, sizeof little_nop_pattern); 3793 frag->fr_var = sizeof little_nop_pattern; 3794 } 3795 } 3796 else if (frag->fr_type == rs_align_test) 3797 { 3798 if (bytes != 0) 3799 as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data")); 3800 } 3801 3802 if (sh_relax 3803 && (frag->fr_type == rs_align 3804 || frag->fr_type == rs_align_code) 3805 && frag->fr_address + frag->fr_fix > 0 3806 && frag->fr_offset > 1 3807 && now_seg != bss_section) 3808 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, 3809 BFD_RELOC_SH_ALIGN); 3810 } 3811 3812 /* See whether the relocation should be resolved locally. */ 3813 3814 static bfd_boolean 3815 sh_local_pcrel (fixS *fix) 3816 { 3817 return (! sh_relax 3818 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 3819 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 3820 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 3821 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 3822 || fix->fx_r_type == BFD_RELOC_8_PCREL 3823 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 3824 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); 3825 } 3826 3827 /* See whether we need to force a relocation into the output file. 3828 This is used to force out switch and PC relative relocations when 3829 relaxing. */ 3830 3831 int 3832 sh_force_relocation (fixS *fix) 3833 { 3834 /* These relocations can't make it into a DSO, so no use forcing 3835 them for global symbols. */ 3836 if (sh_local_pcrel (fix)) 3837 return 0; 3838 3839 /* Make sure some relocations get emitted. */ 3840 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START 3841 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END 3842 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 3843 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 3844 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 3845 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 3846 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 3847 || generic_force_reloc (fix)) 3848 return 1; 3849 3850 if (! sh_relax) 3851 return 0; 3852 3853 return (fix->fx_pcrel 3854 || SWITCH_TABLE (fix) 3855 || fix->fx_r_type == BFD_RELOC_SH_COUNT 3856 || fix->fx_r_type == BFD_RELOC_SH_ALIGN 3857 || fix->fx_r_type == BFD_RELOC_SH_CODE 3858 || fix->fx_r_type == BFD_RELOC_SH_DATA 3859 #ifdef HAVE_SH64 3860 || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE 3861 #endif 3862 || fix->fx_r_type == BFD_RELOC_SH_LABEL); 3863 } 3864 3865 #ifdef OBJ_ELF 3866 bfd_boolean 3867 sh_fix_adjustable (fixS *fixP) 3868 { 3869 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL 3870 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL 3871 || fixP->fx_r_type == BFD_RELOC_SH_GOT20 3872 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC 3873 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC 3874 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC20 3875 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC 3876 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC20 3877 || fixP->fx_r_type == BFD_RELOC_SH_FUNCDESC 3878 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) 3879 || fixP->fx_r_type == BFD_RELOC_RVA) 3880 return 0; 3881 3882 /* We need the symbol name for the VTABLE entries */ 3883 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3884 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3885 return 0; 3886 3887 return 1; 3888 } 3889 3890 void 3891 sh_elf_final_processing (void) 3892 { 3893 int val; 3894 3895 /* Set file-specific flags to indicate if this code needs 3896 a processor with the sh-dsp / sh2e ISA to execute. */ 3897 #ifdef HAVE_SH64 3898 /* SH5 and above don't know about the valid_arch arch_sh* bits defined 3899 in sh-opc.h, so check SH64 mode before checking valid_arch. */ 3900 if (sh64_isa_mode != sh64_isa_unspecified) 3901 val = EF_SH5; 3902 else 3903 #elif defined TARGET_SYMBIAN 3904 if (1) 3905 { 3906 extern int sh_symbian_find_elf_flags (unsigned int); 3907 3908 val = sh_symbian_find_elf_flags (valid_arch); 3909 } 3910 else 3911 #endif /* HAVE_SH64 */ 3912 val = sh_find_elf_flags (valid_arch); 3913 3914 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; 3915 elf_elfheader (stdoutput)->e_flags |= val; 3916 3917 if (sh_fdpic) 3918 elf_elfheader (stdoutput)->e_flags |= EF_SH_FDPIC; 3919 } 3920 #endif 3921 3922 #ifdef TE_UCLINUX 3923 /* Return the target format for uClinux. */ 3924 3925 const char * 3926 sh_uclinux_target_format (void) 3927 { 3928 if (sh_fdpic) 3929 return (!target_big_endian ? "elf32-sh-fdpic" : "elf32-shbig-fdpic"); 3930 else 3931 return (!target_big_endian ? "elf32-shl" : "elf32-sh"); 3932 } 3933 #endif 3934 3935 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its 3936 assembly-time value. If we're generating a reloc for FIXP, 3937 see whether the addend should be stored in-place or whether 3938 it should be in an ELF r_addend field. */ 3939 3940 static void 3941 apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size) 3942 { 3943 reloc_howto_type *howto; 3944 3945 if (fixP->fx_addsy != NULL || fixP->fx_pcrel) 3946 { 3947 howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 3948 if (howto && !howto->partial_inplace) 3949 { 3950 fixP->fx_addnumber = val; 3951 return; 3952 } 3953 } 3954 md_number_to_chars (buf, val, size); 3955 } 3956 3957 /* Apply a fixup to the object file. */ 3958 3959 void 3960 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 3961 { 3962 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; 3963 int lowbyte = target_big_endian ? 1 : 0; 3964 int highbyte = target_big_endian ? 0 : 1; 3965 long val = (long) *valP; 3966 long max, min; 3967 int shift; 3968 3969 /* A difference between two symbols, the second of which is in the 3970 current section, is transformed in a PC-relative relocation to 3971 the other symbol. We have to adjust the relocation type here. */ 3972 if (fixP->fx_pcrel) 3973 { 3974 #ifndef HAVE_SH64 3975 /* Safeguard; this must not occur for non-sh64 configurations. */ 3976 gas_assert (fixP->fx_r_type != BFD_RELOC_64); 3977 #endif 3978 3979 switch (fixP->fx_r_type) 3980 { 3981 default: 3982 break; 3983 3984 case BFD_RELOC_32: 3985 fixP->fx_r_type = BFD_RELOC_32_PCREL; 3986 break; 3987 3988 /* Currently, we only support 32-bit PCREL relocations. 3989 We'd need a new reloc type to handle 16_PCREL, and 3990 8_PCREL is already taken for R_SH_SWITCH8, which 3991 apparently does something completely different than what 3992 we need. FIXME. */ 3993 case BFD_RELOC_16: 3994 bfd_set_error (bfd_error_bad_value); 3995 return; 3996 3997 case BFD_RELOC_8: 3998 bfd_set_error (bfd_error_bad_value); 3999 return; 4000 } 4001 } 4002 4003 /* The function adjust_reloc_syms won't convert a reloc against a weak 4004 symbol into a reloc against a section, but bfd_install_relocation 4005 will screw up if the symbol is defined, so we have to adjust val here 4006 to avoid the screw up later. 4007 4008 For ordinary relocs, this does not happen for ELF, since for ELF, 4009 bfd_install_relocation uses the "special function" field of the 4010 howto, and does not execute the code that needs to be undone, as long 4011 as the special function does not return bfd_reloc_continue. 4012 It can happen for GOT- and PLT-type relocs the way they are 4013 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it 4014 doesn't matter here since those relocs don't use VAL; see below. */ 4015 if (OUTPUT_FLAVOR != bfd_target_elf_flavour 4016 && fixP->fx_addsy != NULL 4017 && S_IS_WEAK (fixP->fx_addsy)) 4018 val -= S_GET_VALUE (fixP->fx_addsy); 4019 4020 if (SWITCH_TABLE (fixP)) 4021 val -= S_GET_VALUE (fixP->fx_subsy); 4022 4023 max = min = 0; 4024 shift = 0; 4025 switch (fixP->fx_r_type) 4026 { 4027 case BFD_RELOC_SH_IMM3: 4028 max = 0x7; 4029 * buf = (* buf & 0xf8) | (val & 0x7); 4030 break; 4031 case BFD_RELOC_SH_IMM3U: 4032 max = 0x7; 4033 * buf = (* buf & 0x8f) | ((val & 0x7) << 4); 4034 break; 4035 case BFD_RELOC_SH_DISP12: 4036 max = 0xfff; 4037 buf[lowbyte] = val & 0xff; 4038 buf[highbyte] |= (val >> 8) & 0x0f; 4039 break; 4040 case BFD_RELOC_SH_DISP12BY2: 4041 max = 0xfff; 4042 shift = 1; 4043 buf[lowbyte] = (val >> 1) & 0xff; 4044 buf[highbyte] |= (val >> 9) & 0x0f; 4045 break; 4046 case BFD_RELOC_SH_DISP12BY4: 4047 max = 0xfff; 4048 shift = 2; 4049 buf[lowbyte] = (val >> 2) & 0xff; 4050 buf[highbyte] |= (val >> 10) & 0x0f; 4051 break; 4052 case BFD_RELOC_SH_DISP12BY8: 4053 max = 0xfff; 4054 shift = 3; 4055 buf[lowbyte] = (val >> 3) & 0xff; 4056 buf[highbyte] |= (val >> 11) & 0x0f; 4057 break; 4058 case BFD_RELOC_SH_DISP20: 4059 if (! target_big_endian) 4060 abort(); 4061 max = 0x7ffff; 4062 min = -0x80000; 4063 buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); 4064 buf[2] = (val >> 8) & 0xff; 4065 buf[3] = val & 0xff; 4066 break; 4067 case BFD_RELOC_SH_DISP20BY8: 4068 if (!target_big_endian) 4069 abort(); 4070 max = 0x7ffff; 4071 min = -0x80000; 4072 shift = 8; 4073 buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); 4074 buf[2] = (val >> 16) & 0xff; 4075 buf[3] = (val >> 8) & 0xff; 4076 break; 4077 4078 case BFD_RELOC_SH_IMM4: 4079 max = 0xf; 4080 *buf = (*buf & 0xf0) | (val & 0xf); 4081 break; 4082 4083 case BFD_RELOC_SH_IMM4BY2: 4084 max = 0xf; 4085 shift = 1; 4086 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); 4087 break; 4088 4089 case BFD_RELOC_SH_IMM4BY4: 4090 max = 0xf; 4091 shift = 2; 4092 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); 4093 break; 4094 4095 case BFD_RELOC_SH_IMM8BY2: 4096 max = 0xff; 4097 shift = 1; 4098 *buf = val >> 1; 4099 break; 4100 4101 case BFD_RELOC_SH_IMM8BY4: 4102 max = 0xff; 4103 shift = 2; 4104 *buf = val >> 2; 4105 break; 4106 4107 case BFD_RELOC_8: 4108 case BFD_RELOC_SH_IMM8: 4109 /* Sometimes the 8 bit value is sign extended (e.g., add) and 4110 sometimes it is not (e.g., and). We permit any 8 bit value. 4111 Note that adding further restrictions may invalidate 4112 reasonable looking assembly code, such as ``and -0x1,r0''. */ 4113 max = 0xff; 4114 min = -0xff; 4115 *buf++ = val; 4116 break; 4117 4118 case BFD_RELOC_SH_PCRELIMM8BY4: 4119 /* If we are dealing with a known destination ... */ 4120 if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) 4121 && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy))) 4122 { 4123 /* Don't silently move the destination due to misalignment. 4124 The absolute address is the fragment base plus the offset into 4125 the fragment plus the pc relative offset to the label. */ 4126 if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3) 4127 as_bad_where (fixP->fx_file, fixP->fx_line, 4128 _("offset to unaligned destination")); 4129 4130 /* The displacement cannot be zero or backward even if aligned. 4131 Allow -2 because val has already been adjusted somewhere. */ 4132 if (val < -2) 4133 as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset")); 4134 } 4135 4136 /* The lower two bits of the PC are cleared before the 4137 displacement is added in. We can assume that the destination 4138 is on a 4 byte boundary. If this instruction is also on a 4 4139 byte boundary, then we want 4140 (target - here) / 4 4141 and target - here is a multiple of 4. 4142 Otherwise, we are on a 2 byte boundary, and we want 4143 (target - (here - 2)) / 4 4144 and target - here is not a multiple of 4. Computing 4145 (target - (here - 2)) / 4 == (target - here + 2) / 4 4146 works for both cases, since in the first case the addition of 4147 2 will be removed by the division. target - here is in the 4148 variable val. */ 4149 val = (val + 2) / 4; 4150 if (val & ~0xff) 4151 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4152 buf[lowbyte] = val; 4153 break; 4154 4155 case BFD_RELOC_SH_PCRELIMM8BY2: 4156 val /= 2; 4157 if (val & ~0xff) 4158 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4159 buf[lowbyte] = val; 4160 break; 4161 4162 case BFD_RELOC_SH_PCDISP8BY2: 4163 val /= 2; 4164 if (val < -0x80 || val > 0x7f) 4165 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4166 buf[lowbyte] = val; 4167 break; 4168 4169 case BFD_RELOC_SH_PCDISP12BY2: 4170 val /= 2; 4171 if (val < -0x800 || val > 0x7ff) 4172 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4173 buf[lowbyte] = val & 0xff; 4174 buf[highbyte] |= (val >> 8) & 0xf; 4175 break; 4176 4177 #ifndef HAVE_SH64 4178 case BFD_RELOC_64: 4179 apply_full_field_fix (fixP, buf, *valP, 8); 4180 break; 4181 #endif 4182 4183 case BFD_RELOC_32: 4184 case BFD_RELOC_32_PCREL: 4185 apply_full_field_fix (fixP, buf, val, 4); 4186 break; 4187 4188 case BFD_RELOC_16: 4189 apply_full_field_fix (fixP, buf, val, 2); 4190 break; 4191 4192 case BFD_RELOC_SH_USES: 4193 /* Pass the value into sh_reloc(). */ 4194 fixP->fx_addnumber = val; 4195 break; 4196 4197 case BFD_RELOC_SH_COUNT: 4198 case BFD_RELOC_SH_ALIGN: 4199 case BFD_RELOC_SH_CODE: 4200 case BFD_RELOC_SH_DATA: 4201 case BFD_RELOC_SH_LABEL: 4202 /* Nothing to do here. */ 4203 break; 4204 4205 case BFD_RELOC_SH_LOOP_START: 4206 case BFD_RELOC_SH_LOOP_END: 4207 4208 case BFD_RELOC_VTABLE_INHERIT: 4209 case BFD_RELOC_VTABLE_ENTRY: 4210 fixP->fx_done = 0; 4211 return; 4212 4213 #ifdef OBJ_ELF 4214 case BFD_RELOC_32_PLT_PCREL: 4215 /* Make the jump instruction point to the address of the operand. At 4216 runtime we merely add the offset to the actual PLT entry. */ 4217 * valP = 0xfffffffc; 4218 val = fixP->fx_offset; 4219 if (fixP->fx_subsy) 4220 val -= S_GET_VALUE (fixP->fx_subsy); 4221 apply_full_field_fix (fixP, buf, val, 4); 4222 break; 4223 4224 case BFD_RELOC_SH_GOTPC: 4225 /* This is tough to explain. We end up with this one if we have 4226 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". 4227 The goal here is to obtain the absolute address of the GOT, 4228 and it is strongly preferable from a performance point of 4229 view to avoid using a runtime relocation for this. There are 4230 cases where you have something like: 4231 4232 .long _GLOBAL_OFFSET_TABLE_+[.-.L66] 4233 4234 and here no correction would be required. Internally in the 4235 assembler we treat operands of this form as not being pcrel 4236 since the '.' is explicitly mentioned, and I wonder whether 4237 it would simplify matters to do it this way. Who knows. In 4238 earlier versions of the PIC patches, the pcrel_adjust field 4239 was used to store the correction, but since the expression is 4240 not pcrel, I felt it would be confusing to do it this way. */ 4241 * valP -= 1; 4242 apply_full_field_fix (fixP, buf, val, 4); 4243 break; 4244 4245 case BFD_RELOC_SH_TLS_GD_32: 4246 case BFD_RELOC_SH_TLS_LD_32: 4247 case BFD_RELOC_SH_TLS_IE_32: 4248 S_SET_THREAD_LOCAL (fixP->fx_addsy); 4249 /* Fallthrough */ 4250 case BFD_RELOC_32_GOT_PCREL: 4251 case BFD_RELOC_SH_GOT20: 4252 case BFD_RELOC_SH_GOTPLT32: 4253 case BFD_RELOC_SH_GOTFUNCDESC: 4254 case BFD_RELOC_SH_GOTFUNCDESC20: 4255 case BFD_RELOC_SH_GOTOFFFUNCDESC: 4256 case BFD_RELOC_SH_GOTOFFFUNCDESC20: 4257 case BFD_RELOC_SH_FUNCDESC: 4258 * valP = 0; /* Fully resolved at runtime. No addend. */ 4259 apply_full_field_fix (fixP, buf, 0, 4); 4260 break; 4261 4262 case BFD_RELOC_SH_TLS_LDO_32: 4263 case BFD_RELOC_SH_TLS_LE_32: 4264 S_SET_THREAD_LOCAL (fixP->fx_addsy); 4265 /* Fallthrough */ 4266 case BFD_RELOC_32_GOTOFF: 4267 case BFD_RELOC_SH_GOTOFF20: 4268 apply_full_field_fix (fixP, buf, val, 4); 4269 break; 4270 #endif 4271 4272 default: 4273 #ifdef HAVE_SH64 4274 shmedia_md_apply_fix (fixP, valP); 4275 return; 4276 #else 4277 abort (); 4278 #endif 4279 } 4280 4281 if (shift != 0) 4282 { 4283 if ((val & ((1 << shift) - 1)) != 0) 4284 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); 4285 if (val >= 0) 4286 val >>= shift; 4287 else 4288 val = ((val >> shift) 4289 | ((long) -1 & ~ ((long) -1 >> shift))); 4290 } 4291 4292 /* Extend sign for 64-bit host. */ 4293 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; 4294 if (max != 0 && (val < min || val > max)) 4295 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); 4296 else if (max != 0) 4297 /* Stop the generic code from trying to overlow check the value as well. 4298 It may not have the correct value anyway, as we do not store val back 4299 into *valP. */ 4300 fixP->fx_no_overflow = 1; 4301 4302 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) 4303 fixP->fx_done = 1; 4304 } 4305 4306 /* Called just before address relaxation. Return the length 4307 by which a fragment must grow to reach it's destination. */ 4308 4309 int 4310 md_estimate_size_before_relax (fragS *fragP, segT segment_type) 4311 { 4312 int what; 4313 4314 switch (fragP->fr_subtype) 4315 { 4316 default: 4317 #ifdef HAVE_SH64 4318 return shmedia_md_estimate_size_before_relax (fragP, segment_type); 4319 #else 4320 abort (); 4321 #endif 4322 4323 4324 case C (UNCOND_JUMP, UNDEF_DISP): 4325 /* Used to be a branch to somewhere which was unknown. */ 4326 if (!fragP->fr_symbol) 4327 { 4328 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 4329 } 4330 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 4331 { 4332 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 4333 } 4334 else 4335 { 4336 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); 4337 } 4338 break; 4339 4340 case C (COND_JUMP, UNDEF_DISP): 4341 case C (COND_JUMP_DELAY, UNDEF_DISP): 4342 what = GET_WHAT (fragP->fr_subtype); 4343 /* Used to be a branch to somewhere which was unknown. */ 4344 if (fragP->fr_symbol 4345 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 4346 { 4347 /* Got a symbol and it's defined in this segment, become byte 4348 sized - maybe it will fix up. */ 4349 fragP->fr_subtype = C (what, COND8); 4350 } 4351 else if (fragP->fr_symbol) 4352 { 4353 /* Its got a segment, but its not ours, so it will always be long. */ 4354 fragP->fr_subtype = C (what, UNDEF_WORD_DISP); 4355 } 4356 else 4357 { 4358 /* We know the abs value. */ 4359 fragP->fr_subtype = C (what, COND8); 4360 } 4361 break; 4362 4363 case C (UNCOND_JUMP, UNCOND12): 4364 case C (UNCOND_JUMP, UNCOND32): 4365 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 4366 case C (COND_JUMP, COND8): 4367 case C (COND_JUMP, COND12): 4368 case C (COND_JUMP, COND32): 4369 case C (COND_JUMP, UNDEF_WORD_DISP): 4370 case C (COND_JUMP_DELAY, COND8): 4371 case C (COND_JUMP_DELAY, COND12): 4372 case C (COND_JUMP_DELAY, COND32): 4373 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 4374 /* When relaxing a section for the second time, we don't need to 4375 do anything besides return the current size. */ 4376 break; 4377 } 4378 4379 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; 4380 return fragP->fr_var; 4381 } 4382 4383 /* Put number into target byte order. */ 4384 4385 void 4386 md_number_to_chars (char *ptr, valueT use, int nbytes) 4387 { 4388 #ifdef HAVE_SH64 4389 /* We might need to set the contents type to data. */ 4390 sh64_flag_output (); 4391 #endif 4392 4393 if (! target_big_endian) 4394 number_to_chars_littleendian (ptr, use, nbytes); 4395 else 4396 number_to_chars_bigendian (ptr, use, nbytes); 4397 } 4398 4399 /* This version is used in obj-coff.c eg. for the sh-hms target. */ 4400 4401 long 4402 md_pcrel_from (fixS *fixP) 4403 { 4404 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; 4405 } 4406 4407 long 4408 md_pcrel_from_section (fixS *fixP, segT sec) 4409 { 4410 if (! sh_local_pcrel (fixP) 4411 && fixP->fx_addsy != (symbolS *) NULL 4412 && (generic_force_reloc (fixP) 4413 || S_GET_SEGMENT (fixP->fx_addsy) != sec)) 4414 { 4415 /* The symbol is undefined (or is defined but not in this section, 4416 or we're not sure about it being the final definition). Let the 4417 linker figure it out. We need to adjust the subtraction of a 4418 symbol to the position of the relocated data, though. */ 4419 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; 4420 } 4421 4422 return md_pcrel_from (fixP); 4423 } 4424 4425 /* Create a reloc. */ 4426 4427 arelent * 4428 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 4429 { 4430 arelent *rel; 4431 bfd_reloc_code_real_type r_type; 4432 4433 rel = XNEW (arelent); 4434 rel->sym_ptr_ptr = XNEW (asymbol *); 4435 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 4436 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 4437 4438 r_type = fixp->fx_r_type; 4439 4440 if (SWITCH_TABLE (fixp)) 4441 { 4442 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 4443 rel->addend = rel->address - S_GET_VALUE(fixp->fx_subsy); 4444 if (r_type == BFD_RELOC_16) 4445 r_type = BFD_RELOC_SH_SWITCH16; 4446 else if (r_type == BFD_RELOC_8) 4447 r_type = BFD_RELOC_8_PCREL; 4448 else if (r_type == BFD_RELOC_32) 4449 r_type = BFD_RELOC_SH_SWITCH32; 4450 else 4451 abort (); 4452 } 4453 else if (r_type == BFD_RELOC_SH_USES) 4454 rel->addend = fixp->fx_addnumber; 4455 else if (r_type == BFD_RELOC_SH_COUNT) 4456 rel->addend = fixp->fx_offset; 4457 else if (r_type == BFD_RELOC_SH_ALIGN) 4458 rel->addend = fixp->fx_offset; 4459 else if (r_type == BFD_RELOC_VTABLE_INHERIT 4460 || r_type == BFD_RELOC_VTABLE_ENTRY) 4461 rel->addend = fixp->fx_offset; 4462 else if (r_type == BFD_RELOC_SH_LOOP_START 4463 || r_type == BFD_RELOC_SH_LOOP_END) 4464 rel->addend = fixp->fx_offset; 4465 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) 4466 { 4467 rel->addend = 0; 4468 rel->address = rel->addend = fixp->fx_offset; 4469 } 4470 #ifdef HAVE_SH64 4471 else if (shmedia_init_reloc (rel, fixp)) 4472 ; 4473 #endif 4474 else 4475 rel->addend = fixp->fx_addnumber; 4476 4477 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); 4478 4479 if (rel->howto == NULL) 4480 { 4481 as_bad_where (fixp->fx_file, fixp->fx_line, 4482 _("Cannot represent relocation type %s"), 4483 bfd_get_reloc_code_name (r_type)); 4484 /* Set howto to a garbage value so that we can keep going. */ 4485 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 4486 gas_assert (rel->howto != NULL); 4487 } 4488 #ifdef OBJ_ELF 4489 else if (rel->howto->type == R_SH_IND12W) 4490 rel->addend += fixp->fx_offset - 4; 4491 #endif 4492 4493 return rel; 4494 } 4495 4496 #ifdef OBJ_ELF 4497 inline static char * 4498 sh_end_of_match (char *cont, const char *what) 4499 { 4500 int len = strlen (what); 4501 4502 if (strncasecmp (cont, what, strlen (what)) == 0 4503 && ! is_part_of_name (cont[len])) 4504 return cont + len; 4505 4506 return NULL; 4507 } 4508 4509 int 4510 sh_parse_name (char const *name, 4511 expressionS *exprP, 4512 enum expr_mode mode, 4513 char *nextcharP) 4514 { 4515 char *next = input_line_pointer; 4516 char *next_end; 4517 int reloc_type; 4518 segT segment; 4519 4520 exprP->X_op_symbol = NULL; 4521 4522 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 4523 { 4524 if (! GOT_symbol) 4525 GOT_symbol = symbol_find_or_make (name); 4526 4527 exprP->X_add_symbol = GOT_symbol; 4528 no_suffix: 4529 /* If we have an absolute symbol or a reg, then we know its 4530 value now. */ 4531 segment = S_GET_SEGMENT (exprP->X_add_symbol); 4532 if (mode != expr_defer && segment == absolute_section) 4533 { 4534 exprP->X_op = O_constant; 4535 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 4536 exprP->X_add_symbol = NULL; 4537 } 4538 else if (mode != expr_defer && segment == reg_section) 4539 { 4540 exprP->X_op = O_register; 4541 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 4542 exprP->X_add_symbol = NULL; 4543 } 4544 else 4545 { 4546 exprP->X_op = O_symbol; 4547 exprP->X_add_number = 0; 4548 } 4549 4550 return 1; 4551 } 4552 4553 exprP->X_add_symbol = symbol_find_or_make (name); 4554 4555 if (*nextcharP != '@') 4556 goto no_suffix; 4557 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) 4558 reloc_type = BFD_RELOC_32_GOTOFF; 4559 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) 4560 reloc_type = BFD_RELOC_SH_GOTPLT32; 4561 else if ((next_end = sh_end_of_match (next + 1, "GOT"))) 4562 reloc_type = BFD_RELOC_32_GOT_PCREL; 4563 else if ((next_end = sh_end_of_match (next + 1, "PLT"))) 4564 reloc_type = BFD_RELOC_32_PLT_PCREL; 4565 else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) 4566 reloc_type = BFD_RELOC_SH_TLS_GD_32; 4567 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) 4568 reloc_type = BFD_RELOC_SH_TLS_LD_32; 4569 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) 4570 reloc_type = BFD_RELOC_SH_TLS_IE_32; 4571 else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) 4572 reloc_type = BFD_RELOC_SH_TLS_LE_32; 4573 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) 4574 reloc_type = BFD_RELOC_SH_TLS_LDO_32; 4575 else if ((next_end = sh_end_of_match (next + 1, "PCREL"))) 4576 reloc_type = BFD_RELOC_32_PCREL; 4577 else if ((next_end = sh_end_of_match (next + 1, "GOTFUNCDESC"))) 4578 reloc_type = BFD_RELOC_SH_GOTFUNCDESC; 4579 else if ((next_end = sh_end_of_match (next + 1, "GOTOFFFUNCDESC"))) 4580 reloc_type = BFD_RELOC_SH_GOTOFFFUNCDESC; 4581 else if ((next_end = sh_end_of_match (next + 1, "FUNCDESC"))) 4582 reloc_type = BFD_RELOC_SH_FUNCDESC; 4583 else 4584 goto no_suffix; 4585 4586 *input_line_pointer = *nextcharP; 4587 input_line_pointer = next_end; 4588 *nextcharP = *input_line_pointer; 4589 *input_line_pointer = '\0'; 4590 4591 exprP->X_op = O_PIC_reloc; 4592 exprP->X_add_number = 0; 4593 exprP->X_md = reloc_type; 4594 4595 return 1; 4596 } 4597 4598 void 4599 sh_cfi_frame_initial_instructions (void) 4600 { 4601 cfi_add_CFA_def_cfa (15, 0); 4602 } 4603 4604 int 4605 sh_regname_to_dw2regnum (char *regname) 4606 { 4607 unsigned int regnum = -1; 4608 unsigned int i; 4609 const char *p; 4610 char *q; 4611 static struct { const char *name; int dw2regnum; } regnames[] = 4612 { 4613 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, 4614 { "macl", 21 }, { "fpul", 23 } 4615 }; 4616 4617 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 4618 if (strcmp (regnames[i].name, regname) == 0) 4619 return regnames[i].dw2regnum; 4620 4621 if (regname[0] == 'r') 4622 { 4623 p = regname + 1; 4624 regnum = strtoul (p, &q, 10); 4625 if (p == q || *q || regnum >= 16) 4626 return -1; 4627 } 4628 else if (regname[0] == 'f' && regname[1] == 'r') 4629 { 4630 p = regname + 2; 4631 regnum = strtoul (p, &q, 10); 4632 if (p == q || *q || regnum >= 16) 4633 return -1; 4634 regnum += 25; 4635 } 4636 else if (regname[0] == 'x' && regname[1] == 'd') 4637 { 4638 p = regname + 2; 4639 regnum = strtoul (p, &q, 10); 4640 if (p == q || *q || regnum >= 8) 4641 return -1; 4642 regnum += 87; 4643 } 4644 return regnum; 4645 } 4646 #endif /* OBJ_ELF */ 4647
