1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) 2 Copyright (C) 1994-2016 Free Software Foundation, Inc. 3 Written by Ian Lance Taylor, Cygnus Support. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #include "as.h" 23 #include "safe-ctype.h" 24 #include "subsegs.h" 25 #include "dw2gencfi.h" 26 #include "opcode/ppc.h" 27 28 #ifdef OBJ_ELF 29 #include "elf/ppc.h" 30 #include "elf/ppc64.h" 31 #include "dwarf2dbg.h" 32 #endif 33 34 #ifdef TE_PE 35 #include "coff/pe.h" 36 #endif 37 38 #ifdef OBJ_XCOFF 39 #include "coff/xcoff.h" 40 #include "libxcoff.h" 41 #endif 42 43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ 44 45 /* Tell the main code what the endianness is. */ 46 extern int target_big_endian; 47 48 /* Whether or not, we've set target_big_endian. */ 49 static int set_target_endian = 0; 50 51 /* Whether to use user friendly register names. */ 52 #ifndef TARGET_REG_NAMES_P 53 #ifdef TE_PE 54 #define TARGET_REG_NAMES_P TRUE 55 #else 56 #define TARGET_REG_NAMES_P FALSE 57 #endif 58 #endif 59 60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, 61 HIGHESTA. */ 62 63 /* #lo(value) denotes the least significant 16 bits of the indicated. */ 64 #define PPC_LO(v) ((v) & 0xffff) 65 66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */ 67 #define PPC_HI(v) (((v) >> 16) & 0xffff) 68 69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of 70 the indicated value, compensating for #lo() being treated as a 71 signed number. */ 72 #define PPC_HA(v) PPC_HI ((v) + 0x8000) 73 74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */ 75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) 76 77 /* #highera(value) denotes bits 32 through 47 of the indicated value, 78 compensating for #lo() being treated as a signed number. */ 79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) 80 81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */ 82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) 83 84 /* #highesta(value) denotes bits 48 through 63 of the indicated value, 85 compensating for #lo being treated as a signed number. */ 86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) 87 88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000) 89 90 /* For the time being on ppc64, don't report overflow on @h and @ha 91 applied to constants. */ 92 #define REPORT_OVERFLOW_HI 0 93 94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; 95 96 static void ppc_macro (char *, const struct powerpc_macro *); 97 static void ppc_byte (int); 98 99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 100 static void ppc_tc (int); 101 static void ppc_machine (int); 102 #endif 103 104 #ifdef OBJ_XCOFF 105 static void ppc_comm (int); 106 static void ppc_bb (int); 107 static void ppc_bc (int); 108 static void ppc_bf (int); 109 static void ppc_biei (int); 110 static void ppc_bs (int); 111 static void ppc_eb (int); 112 static void ppc_ec (int); 113 static void ppc_ef (int); 114 static void ppc_es (int); 115 static void ppc_csect (int); 116 static void ppc_dwsect (int); 117 static void ppc_change_csect (symbolS *, offsetT); 118 static void ppc_function (int); 119 static void ppc_extern (int); 120 static void ppc_lglobl (int); 121 static void ppc_ref (int); 122 static void ppc_section (int); 123 static void ppc_named_section (int); 124 static void ppc_stabx (int); 125 static void ppc_rename (int); 126 static void ppc_toc (int); 127 static void ppc_xcoff_cons (int); 128 static void ppc_vbyte (int); 129 #endif 130 131 #ifdef OBJ_ELF 132 static void ppc_elf_rdata (int); 133 static void ppc_elf_lcomm (int); 134 static void ppc_elf_localentry (int); 135 static void ppc_elf_abiversion (int); 136 static void ppc_elf_gnu_attribute (int); 137 #endif 138 139 #ifdef TE_PE 140 static void ppc_previous (int); 141 static void ppc_pdata (int); 142 static void ppc_ydata (int); 143 static void ppc_reldata (int); 144 static void ppc_rdata (int); 145 static void ppc_ualong (int); 146 static void ppc_znop (int); 147 static void ppc_pe_comm (int); 148 static void ppc_pe_section (int); 149 static void ppc_pe_function (int); 150 static void ppc_pe_tocd (int); 151 #endif 152 153 /* Generic assembler global variables which must be defined by all 155 targets. */ 156 157 #ifdef OBJ_ELF 158 /* This string holds the chars that always start a comment. If the 159 pre-processor is disabled, these aren't very useful. The macro 160 tc_comment_chars points to this. We use this, rather than the 161 usual comment_chars, so that we can switch for Solaris conventions. */ 162 static const char ppc_solaris_comment_chars[] = "#!"; 163 static const char ppc_eabi_comment_chars[] = "#"; 164 165 #ifdef TARGET_SOLARIS_COMMENT 166 const char *ppc_comment_chars = ppc_solaris_comment_chars; 167 #else 168 const char *ppc_comment_chars = ppc_eabi_comment_chars; 169 #endif 170 #else 171 const char comment_chars[] = "#"; 172 #endif 173 174 /* Characters which start a comment at the beginning of a line. */ 175 const char line_comment_chars[] = "#"; 176 177 /* Characters which may be used to separate multiple commands on a 178 single line. */ 179 const char line_separator_chars[] = ";"; 180 181 /* Characters which are used to indicate an exponent in a floating 182 point number. */ 183 const char EXP_CHARS[] = "eE"; 184 185 /* Characters which mean that a number is a floating point constant, 186 as in 0d1.0. */ 187 const char FLT_CHARS[] = "dD"; 188 189 /* Anything that can start an operand needs to be mentioned here, 190 to stop the input scrubber eating whitespace. */ 191 const char ppc_symbol_chars[] = "%["; 192 193 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ 194 int ppc_cie_data_alignment; 195 196 /* The dwarf2 minimum instruction length. */ 197 int ppc_dwarf2_line_min_insn_length; 198 199 /* More than this number of nops in an alignment op gets a branch 200 instead. */ 201 unsigned long nop_limit = 4; 202 203 /* The type of processor we are assembling for. This is one or more 204 of the PPC_OPCODE flags defined in opcode/ppc.h. */ 205 ppc_cpu_t ppc_cpu = 0; 206 ppc_cpu_t sticky = 0; 207 208 /* Value for ELF e_flags EF_PPC64_ABI. */ 209 unsigned int ppc_abiversion = 0; 210 211 #ifdef OBJ_ELF 212 /* Flags set on encountering toc relocs. */ 213 static enum { 214 has_large_toc_reloc = 1, 215 has_small_toc_reloc = 2 216 } toc_reloc_types; 217 #endif 218 219 /* Warn on emitting data to code sections. */ 220 int warn_476; 221 unsigned long last_insn; 222 segT last_seg; 223 subsegT last_subseg; 224 225 /* The target specific pseudo-ops which we support. */ 227 228 const pseudo_typeS md_pseudo_table[] = 229 { 230 /* Pseudo-ops which must be overridden. */ 231 { "byte", ppc_byte, 0 }, 232 233 #ifdef OBJ_XCOFF 234 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these 235 legitimately belong in the obj-*.c file. However, XCOFF is based 236 on COFF, and is only implemented for the RS/6000. We just use 237 obj-coff.c, and add what we need here. */ 238 { "comm", ppc_comm, 0 }, 239 { "lcomm", ppc_comm, 1 }, 240 { "bb", ppc_bb, 0 }, 241 { "bc", ppc_bc, 0 }, 242 { "bf", ppc_bf, 0 }, 243 { "bi", ppc_biei, 0 }, 244 { "bs", ppc_bs, 0 }, 245 { "csect", ppc_csect, 0 }, 246 { "dwsect", ppc_dwsect, 0 }, 247 { "data", ppc_section, 'd' }, 248 { "eb", ppc_eb, 0 }, 249 { "ec", ppc_ec, 0 }, 250 { "ef", ppc_ef, 0 }, 251 { "ei", ppc_biei, 1 }, 252 { "es", ppc_es, 0 }, 253 { "extern", ppc_extern, 0 }, 254 { "function", ppc_function, 0 }, 255 { "lglobl", ppc_lglobl, 0 }, 256 { "ref", ppc_ref, 0 }, 257 { "rename", ppc_rename, 0 }, 258 { "section", ppc_named_section, 0 }, 259 { "stabx", ppc_stabx, 0 }, 260 { "text", ppc_section, 't' }, 261 { "toc", ppc_toc, 0 }, 262 { "long", ppc_xcoff_cons, 2 }, 263 { "llong", ppc_xcoff_cons, 3 }, 264 { "word", ppc_xcoff_cons, 1 }, 265 { "short", ppc_xcoff_cons, 1 }, 266 { "vbyte", ppc_vbyte, 0 }, 267 #endif 268 269 #ifdef OBJ_ELF 270 { "llong", cons, 8 }, 271 { "rdata", ppc_elf_rdata, 0 }, 272 { "rodata", ppc_elf_rdata, 0 }, 273 { "lcomm", ppc_elf_lcomm, 0 }, 274 { "localentry", ppc_elf_localentry, 0 }, 275 { "abiversion", ppc_elf_abiversion, 0 }, 276 { "gnu_attribute", ppc_elf_gnu_attribute, 0}, 277 #endif 278 279 #ifdef TE_PE 280 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ 281 { "previous", ppc_previous, 0 }, 282 { "pdata", ppc_pdata, 0 }, 283 { "ydata", ppc_ydata, 0 }, 284 { "reldata", ppc_reldata, 0 }, 285 { "rdata", ppc_rdata, 0 }, 286 { "ualong", ppc_ualong, 0 }, 287 { "znop", ppc_znop, 0 }, 288 { "comm", ppc_pe_comm, 0 }, 289 { "lcomm", ppc_pe_comm, 1 }, 290 { "section", ppc_pe_section, 0 }, 291 { "function", ppc_pe_function,0 }, 292 { "tocd", ppc_pe_tocd, 0 }, 293 #endif 294 295 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 296 { "tc", ppc_tc, 0 }, 297 { "machine", ppc_machine, 0 }, 298 #endif 299 300 { NULL, NULL, 0 } 301 }; 302 303 304 /* Predefined register names if -mregnames (or default for Windows NT). 306 In general, there are lots of them, in an attempt to be compatible 307 with a number of other Windows NT assemblers. */ 308 309 /* Structure to hold information about predefined registers. */ 310 struct pd_reg 311 { 312 const char *name; 313 int value; 314 }; 315 316 /* List of registers that are pre-defined: 317 318 Each general register has predefined names of the form: 319 1. r<reg_num> which has the value <reg_num>. 320 2. r.<reg_num> which has the value <reg_num>. 321 322 Each floating point register has predefined names of the form: 323 1. f<reg_num> which has the value <reg_num>. 324 2. f.<reg_num> which has the value <reg_num>. 325 326 Each vector unit register has predefined names of the form: 327 1. v<reg_num> which has the value <reg_num>. 328 2. v.<reg_num> which has the value <reg_num>. 329 330 Each condition register has predefined names of the form: 331 1. cr<reg_num> which has the value <reg_num>. 332 2. cr.<reg_num> which has the value <reg_num>. 333 334 There are individual registers as well: 335 sp or r.sp has the value 1 336 rtoc or r.toc has the value 2 337 fpscr has the value 0 338 xer has the value 1 339 lr has the value 8 340 ctr has the value 9 341 pmr has the value 0 342 dar has the value 19 343 dsisr has the value 18 344 dec has the value 22 345 sdr1 has the value 25 346 srr0 has the value 26 347 srr1 has the value 27 348 349 The table is sorted. Suitable for searching by a binary search. */ 350 351 static const struct pd_reg pre_defined_registers[] = 352 { 353 { "cr.0", 0 }, /* Condition Registers */ 354 { "cr.1", 1 }, 355 { "cr.2", 2 }, 356 { "cr.3", 3 }, 357 { "cr.4", 4 }, 358 { "cr.5", 5 }, 359 { "cr.6", 6 }, 360 { "cr.7", 7 }, 361 362 { "cr0", 0 }, 363 { "cr1", 1 }, 364 { "cr2", 2 }, 365 { "cr3", 3 }, 366 { "cr4", 4 }, 367 { "cr5", 5 }, 368 { "cr6", 6 }, 369 { "cr7", 7 }, 370 371 { "ctr", 9 }, 372 373 { "dar", 19 }, /* Data Access Register */ 374 { "dec", 22 }, /* Decrementer */ 375 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */ 376 377 { "f.0", 0 }, /* Floating point registers */ 378 { "f.1", 1 }, 379 { "f.10", 10 }, 380 { "f.11", 11 }, 381 { "f.12", 12 }, 382 { "f.13", 13 }, 383 { "f.14", 14 }, 384 { "f.15", 15 }, 385 { "f.16", 16 }, 386 { "f.17", 17 }, 387 { "f.18", 18 }, 388 { "f.19", 19 }, 389 { "f.2", 2 }, 390 { "f.20", 20 }, 391 { "f.21", 21 }, 392 { "f.22", 22 }, 393 { "f.23", 23 }, 394 { "f.24", 24 }, 395 { "f.25", 25 }, 396 { "f.26", 26 }, 397 { "f.27", 27 }, 398 { "f.28", 28 }, 399 { "f.29", 29 }, 400 { "f.3", 3 }, 401 { "f.30", 30 }, 402 { "f.31", 31 }, 403 404 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ 405 { "f.33", 33 }, 406 { "f.34", 34 }, 407 { "f.35", 35 }, 408 { "f.36", 36 }, 409 { "f.37", 37 }, 410 { "f.38", 38 }, 411 { "f.39", 39 }, 412 { "f.4", 4 }, 413 { "f.40", 40 }, 414 { "f.41", 41 }, 415 { "f.42", 42 }, 416 { "f.43", 43 }, 417 { "f.44", 44 }, 418 { "f.45", 45 }, 419 { "f.46", 46 }, 420 { "f.47", 47 }, 421 { "f.48", 48 }, 422 { "f.49", 49 }, 423 { "f.5", 5 }, 424 { "f.50", 50 }, 425 { "f.51", 51 }, 426 { "f.52", 52 }, 427 { "f.53", 53 }, 428 { "f.54", 54 }, 429 { "f.55", 55 }, 430 { "f.56", 56 }, 431 { "f.57", 57 }, 432 { "f.58", 58 }, 433 { "f.59", 59 }, 434 { "f.6", 6 }, 435 { "f.60", 60 }, 436 { "f.61", 61 }, 437 { "f.62", 62 }, 438 { "f.63", 63 }, 439 { "f.7", 7 }, 440 { "f.8", 8 }, 441 { "f.9", 9 }, 442 443 { "f0", 0 }, 444 { "f1", 1 }, 445 { "f10", 10 }, 446 { "f11", 11 }, 447 { "f12", 12 }, 448 { "f13", 13 }, 449 { "f14", 14 }, 450 { "f15", 15 }, 451 { "f16", 16 }, 452 { "f17", 17 }, 453 { "f18", 18 }, 454 { "f19", 19 }, 455 { "f2", 2 }, 456 { "f20", 20 }, 457 { "f21", 21 }, 458 { "f22", 22 }, 459 { "f23", 23 }, 460 { "f24", 24 }, 461 { "f25", 25 }, 462 { "f26", 26 }, 463 { "f27", 27 }, 464 { "f28", 28 }, 465 { "f29", 29 }, 466 { "f3", 3 }, 467 { "f30", 30 }, 468 { "f31", 31 }, 469 470 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ 471 { "f33", 33 }, 472 { "f34", 34 }, 473 { "f35", 35 }, 474 { "f36", 36 }, 475 { "f37", 37 }, 476 { "f38", 38 }, 477 { "f39", 39 }, 478 { "f4", 4 }, 479 { "f40", 40 }, 480 { "f41", 41 }, 481 { "f42", 42 }, 482 { "f43", 43 }, 483 { "f44", 44 }, 484 { "f45", 45 }, 485 { "f46", 46 }, 486 { "f47", 47 }, 487 { "f48", 48 }, 488 { "f49", 49 }, 489 { "f5", 5 }, 490 { "f50", 50 }, 491 { "f51", 51 }, 492 { "f52", 52 }, 493 { "f53", 53 }, 494 { "f54", 54 }, 495 { "f55", 55 }, 496 { "f56", 56 }, 497 { "f57", 57 }, 498 { "f58", 58 }, 499 { "f59", 59 }, 500 { "f6", 6 }, 501 { "f60", 60 }, 502 { "f61", 61 }, 503 { "f62", 62 }, 504 { "f63", 63 }, 505 { "f7", 7 }, 506 { "f8", 8 }, 507 { "f9", 9 }, 508 509 { "fpscr", 0 }, 510 511 /* Quantization registers used with pair single instructions. */ 512 { "gqr.0", 0 }, 513 { "gqr.1", 1 }, 514 { "gqr.2", 2 }, 515 { "gqr.3", 3 }, 516 { "gqr.4", 4 }, 517 { "gqr.5", 5 }, 518 { "gqr.6", 6 }, 519 { "gqr.7", 7 }, 520 { "gqr0", 0 }, 521 { "gqr1", 1 }, 522 { "gqr2", 2 }, 523 { "gqr3", 3 }, 524 { "gqr4", 4 }, 525 { "gqr5", 5 }, 526 { "gqr6", 6 }, 527 { "gqr7", 7 }, 528 529 { "lr", 8 }, /* Link Register */ 530 531 { "pmr", 0 }, 532 533 { "r.0", 0 }, /* General Purpose Registers */ 534 { "r.1", 1 }, 535 { "r.10", 10 }, 536 { "r.11", 11 }, 537 { "r.12", 12 }, 538 { "r.13", 13 }, 539 { "r.14", 14 }, 540 { "r.15", 15 }, 541 { "r.16", 16 }, 542 { "r.17", 17 }, 543 { "r.18", 18 }, 544 { "r.19", 19 }, 545 { "r.2", 2 }, 546 { "r.20", 20 }, 547 { "r.21", 21 }, 548 { "r.22", 22 }, 549 { "r.23", 23 }, 550 { "r.24", 24 }, 551 { "r.25", 25 }, 552 { "r.26", 26 }, 553 { "r.27", 27 }, 554 { "r.28", 28 }, 555 { "r.29", 29 }, 556 { "r.3", 3 }, 557 { "r.30", 30 }, 558 { "r.31", 31 }, 559 { "r.4", 4 }, 560 { "r.5", 5 }, 561 { "r.6", 6 }, 562 { "r.7", 7 }, 563 { "r.8", 8 }, 564 { "r.9", 9 }, 565 566 { "r.sp", 1 }, /* Stack Pointer */ 567 568 { "r.toc", 2 }, /* Pointer to the table of contents */ 569 570 { "r0", 0 }, /* More general purpose registers */ 571 { "r1", 1 }, 572 { "r10", 10 }, 573 { "r11", 11 }, 574 { "r12", 12 }, 575 { "r13", 13 }, 576 { "r14", 14 }, 577 { "r15", 15 }, 578 { "r16", 16 }, 579 { "r17", 17 }, 580 { "r18", 18 }, 581 { "r19", 19 }, 582 { "r2", 2 }, 583 { "r20", 20 }, 584 { "r21", 21 }, 585 { "r22", 22 }, 586 { "r23", 23 }, 587 { "r24", 24 }, 588 { "r25", 25 }, 589 { "r26", 26 }, 590 { "r27", 27 }, 591 { "r28", 28 }, 592 { "r29", 29 }, 593 { "r3", 3 }, 594 { "r30", 30 }, 595 { "r31", 31 }, 596 { "r4", 4 }, 597 { "r5", 5 }, 598 { "r6", 6 }, 599 { "r7", 7 }, 600 { "r8", 8 }, 601 { "r9", 9 }, 602 603 { "rtoc", 2 }, /* Table of contents */ 604 605 { "sdr1", 25 }, /* Storage Description Register 1 */ 606 607 { "sp", 1 }, 608 609 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ 610 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ 611 612 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */ 613 { "v.1", 1 }, 614 { "v.10", 10 }, 615 { "v.11", 11 }, 616 { "v.12", 12 }, 617 { "v.13", 13 }, 618 { "v.14", 14 }, 619 { "v.15", 15 }, 620 { "v.16", 16 }, 621 { "v.17", 17 }, 622 { "v.18", 18 }, 623 { "v.19", 19 }, 624 { "v.2", 2 }, 625 { "v.20", 20 }, 626 { "v.21", 21 }, 627 { "v.22", 22 }, 628 { "v.23", 23 }, 629 { "v.24", 24 }, 630 { "v.25", 25 }, 631 { "v.26", 26 }, 632 { "v.27", 27 }, 633 { "v.28", 28 }, 634 { "v.29", 29 }, 635 { "v.3", 3 }, 636 { "v.30", 30 }, 637 { "v.31", 31 }, 638 { "v.4", 4 }, 639 { "v.5", 5 }, 640 { "v.6", 6 }, 641 { "v.7", 7 }, 642 { "v.8", 8 }, 643 { "v.9", 9 }, 644 645 { "v0", 0 }, 646 { "v1", 1 }, 647 { "v10", 10 }, 648 { "v11", 11 }, 649 { "v12", 12 }, 650 { "v13", 13 }, 651 { "v14", 14 }, 652 { "v15", 15 }, 653 { "v16", 16 }, 654 { "v17", 17 }, 655 { "v18", 18 }, 656 { "v19", 19 }, 657 { "v2", 2 }, 658 { "v20", 20 }, 659 { "v21", 21 }, 660 { "v22", 22 }, 661 { "v23", 23 }, 662 { "v24", 24 }, 663 { "v25", 25 }, 664 { "v26", 26 }, 665 { "v27", 27 }, 666 { "v28", 28 }, 667 { "v29", 29 }, 668 { "v3", 3 }, 669 { "v30", 30 }, 670 { "v31", 31 }, 671 { "v4", 4 }, 672 { "v5", 5 }, 673 { "v6", 6 }, 674 { "v7", 7 }, 675 { "v8", 8 }, 676 { "v9", 9 }, 677 678 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */ 679 { "vs.1", 1 }, 680 { "vs.10", 10 }, 681 { "vs.11", 11 }, 682 { "vs.12", 12 }, 683 { "vs.13", 13 }, 684 { "vs.14", 14 }, 685 { "vs.15", 15 }, 686 { "vs.16", 16 }, 687 { "vs.17", 17 }, 688 { "vs.18", 18 }, 689 { "vs.19", 19 }, 690 { "vs.2", 2 }, 691 { "vs.20", 20 }, 692 { "vs.21", 21 }, 693 { "vs.22", 22 }, 694 { "vs.23", 23 }, 695 { "vs.24", 24 }, 696 { "vs.25", 25 }, 697 { "vs.26", 26 }, 698 { "vs.27", 27 }, 699 { "vs.28", 28 }, 700 { "vs.29", 29 }, 701 { "vs.3", 3 }, 702 { "vs.30", 30 }, 703 { "vs.31", 31 }, 704 { "vs.32", 32 }, 705 { "vs.33", 33 }, 706 { "vs.34", 34 }, 707 { "vs.35", 35 }, 708 { "vs.36", 36 }, 709 { "vs.37", 37 }, 710 { "vs.38", 38 }, 711 { "vs.39", 39 }, 712 { "vs.4", 4 }, 713 { "vs.40", 40 }, 714 { "vs.41", 41 }, 715 { "vs.42", 42 }, 716 { "vs.43", 43 }, 717 { "vs.44", 44 }, 718 { "vs.45", 45 }, 719 { "vs.46", 46 }, 720 { "vs.47", 47 }, 721 { "vs.48", 48 }, 722 { "vs.49", 49 }, 723 { "vs.5", 5 }, 724 { "vs.50", 50 }, 725 { "vs.51", 51 }, 726 { "vs.52", 52 }, 727 { "vs.53", 53 }, 728 { "vs.54", 54 }, 729 { "vs.55", 55 }, 730 { "vs.56", 56 }, 731 { "vs.57", 57 }, 732 { "vs.58", 58 }, 733 { "vs.59", 59 }, 734 { "vs.6", 6 }, 735 { "vs.60", 60 }, 736 { "vs.61", 61 }, 737 { "vs.62", 62 }, 738 { "vs.63", 63 }, 739 { "vs.7", 7 }, 740 { "vs.8", 8 }, 741 { "vs.9", 9 }, 742 743 { "vs0", 0 }, 744 { "vs1", 1 }, 745 { "vs10", 10 }, 746 { "vs11", 11 }, 747 { "vs12", 12 }, 748 { "vs13", 13 }, 749 { "vs14", 14 }, 750 { "vs15", 15 }, 751 { "vs16", 16 }, 752 { "vs17", 17 }, 753 { "vs18", 18 }, 754 { "vs19", 19 }, 755 { "vs2", 2 }, 756 { "vs20", 20 }, 757 { "vs21", 21 }, 758 { "vs22", 22 }, 759 { "vs23", 23 }, 760 { "vs24", 24 }, 761 { "vs25", 25 }, 762 { "vs26", 26 }, 763 { "vs27", 27 }, 764 { "vs28", 28 }, 765 { "vs29", 29 }, 766 { "vs3", 3 }, 767 { "vs30", 30 }, 768 { "vs31", 31 }, 769 { "vs32", 32 }, 770 { "vs33", 33 }, 771 { "vs34", 34 }, 772 { "vs35", 35 }, 773 { "vs36", 36 }, 774 { "vs37", 37 }, 775 { "vs38", 38 }, 776 { "vs39", 39 }, 777 { "vs4", 4 }, 778 { "vs40", 40 }, 779 { "vs41", 41 }, 780 { "vs42", 42 }, 781 { "vs43", 43 }, 782 { "vs44", 44 }, 783 { "vs45", 45 }, 784 { "vs46", 46 }, 785 { "vs47", 47 }, 786 { "vs48", 48 }, 787 { "vs49", 49 }, 788 { "vs5", 5 }, 789 { "vs50", 50 }, 790 { "vs51", 51 }, 791 { "vs52", 52 }, 792 { "vs53", 53 }, 793 { "vs54", 54 }, 794 { "vs55", 55 }, 795 { "vs56", 56 }, 796 { "vs57", 57 }, 797 { "vs58", 58 }, 798 { "vs59", 59 }, 799 { "vs6", 6 }, 800 { "vs60", 60 }, 801 { "vs61", 61 }, 802 { "vs62", 62 }, 803 { "vs63", 63 }, 804 { "vs7", 7 }, 805 { "vs8", 8 }, 806 { "vs9", 9 }, 807 808 { "xer", 1 }, 809 810 }; 811 812 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) 813 814 /* Given NAME, find the register number associated with that name, return 815 the integer value associated with the given name or -1 on failure. */ 816 817 static int 818 reg_name_search (const struct pd_reg *regs, int regcount, const char *name) 819 { 820 int middle, low, high; 821 int cmp; 822 823 low = 0; 824 high = regcount - 1; 825 826 do 827 { 828 middle = (low + high) / 2; 829 cmp = strcasecmp (name, regs[middle].name); 830 if (cmp < 0) 831 high = middle - 1; 832 else if (cmp > 0) 833 low = middle + 1; 834 else 835 return regs[middle].value; 836 } 837 while (low <= high); 838 839 return -1; 840 } 841 842 /* 843 * Summary of register_name. 844 * 845 * in: Input_line_pointer points to 1st char of operand. 846 * 847 * out: A expressionS. 848 * The operand may have been a register: in this case, X_op == O_register, 849 * X_add_number is set to the register number, and truth is returned. 850 * Input_line_pointer->(next non-blank) char after operand, or is in its 851 * original state. 852 */ 853 854 static bfd_boolean 855 register_name (expressionS *expressionP) 856 { 857 int reg_number; 858 char *name; 859 char *start; 860 char c; 861 862 /* Find the spelling of the operand. */ 863 start = name = input_line_pointer; 864 if (name[0] == '%' && ISALPHA (name[1])) 865 name = ++input_line_pointer; 866 867 else if (!reg_names_p || !ISALPHA (name[0])) 868 return FALSE; 869 870 c = get_symbol_name (&name); 871 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); 872 873 /* Put back the delimiting char. */ 874 *input_line_pointer = c; 875 876 /* Look to see if it's in the register table. */ 877 if (reg_number >= 0) 878 { 879 expressionP->X_op = O_register; 880 expressionP->X_add_number = reg_number; 881 882 /* Make the rest nice. */ 883 expressionP->X_add_symbol = NULL; 884 expressionP->X_op_symbol = NULL; 885 return TRUE; 886 } 887 888 /* Reset the line as if we had not done anything. */ 889 input_line_pointer = start; 890 return FALSE; 891 } 892 893 /* This function is called for each symbol seen in an expression. It 895 handles the special parsing which PowerPC assemblers are supposed 896 to use for condition codes. */ 897 898 /* Whether to do the special parsing. */ 899 static bfd_boolean cr_operand; 900 901 /* Names to recognize in a condition code. This table is sorted. */ 902 static const struct pd_reg cr_names[] = 903 { 904 { "cr0", 0 }, 905 { "cr1", 1 }, 906 { "cr2", 2 }, 907 { "cr3", 3 }, 908 { "cr4", 4 }, 909 { "cr5", 5 }, 910 { "cr6", 6 }, 911 { "cr7", 7 }, 912 { "eq", 2 }, 913 { "gt", 1 }, 914 { "lt", 0 }, 915 { "so", 3 }, 916 { "un", 3 } 917 }; 918 919 /* Parsing function. This returns non-zero if it recognized an 920 expression. */ 921 922 int 923 ppc_parse_name (const char *name, expressionS *exp) 924 { 925 int val; 926 927 if (! cr_operand) 928 return 0; 929 930 if (*name == '%') 931 ++name; 932 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], 933 name); 934 if (val < 0) 935 return 0; 936 937 exp->X_op = O_constant; 938 exp->X_add_number = val; 939 940 return 1; 941 } 942 943 /* Local variables. */ 945 946 /* Whether to target xcoff64/elf64. */ 947 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; 948 949 /* Opcode hash table. */ 950 static struct hash_control *ppc_hash; 951 952 /* Macro hash table. */ 953 static struct hash_control *ppc_macro_hash; 954 955 #ifdef OBJ_ELF 956 /* What type of shared library support to use. */ 957 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; 958 959 /* Flags to set in the elf header. */ 960 static flagword ppc_flags = 0; 961 962 /* Whether this is Solaris or not. */ 963 #ifdef TARGET_SOLARIS_COMMENT 964 #define SOLARIS_P TRUE 965 #else 966 #define SOLARIS_P FALSE 967 #endif 968 969 static bfd_boolean msolaris = SOLARIS_P; 970 #endif 971 972 #ifdef OBJ_XCOFF 973 974 /* The RS/6000 assembler uses the .csect pseudo-op to generate code 975 using a bunch of different sections. These assembler sections, 976 however, are all encompassed within the .text or .data sections of 977 the final output file. We handle this by using different 978 subsegments within these main segments. */ 979 980 /* Next subsegment to allocate within the .text segment. */ 981 static subsegT ppc_text_subsegment = 2; 982 983 /* Linked list of csects in the text section. */ 984 static symbolS *ppc_text_csects; 985 986 /* Next subsegment to allocate within the .data segment. */ 987 static subsegT ppc_data_subsegment = 2; 988 989 /* Linked list of csects in the data section. */ 990 static symbolS *ppc_data_csects; 991 992 /* The current csect. */ 993 static symbolS *ppc_current_csect; 994 995 /* The RS/6000 assembler uses a TOC which holds addresses of functions 996 and variables. Symbols are put in the TOC with the .tc pseudo-op. 997 A special relocation is used when accessing TOC entries. We handle 998 the TOC as a subsegment within the .data segment. We set it up if 999 we see a .toc pseudo-op, and save the csect symbol here. */ 1000 static symbolS *ppc_toc_csect; 1001 1002 /* The first frag in the TOC subsegment. */ 1003 static fragS *ppc_toc_frag; 1004 1005 /* The first frag in the first subsegment after the TOC in the .data 1006 segment. NULL if there are no subsegments after the TOC. */ 1007 static fragS *ppc_after_toc_frag; 1008 1009 /* The current static block. */ 1010 static symbolS *ppc_current_block; 1011 1012 /* The COFF debugging section; set by md_begin. This is not the 1013 .debug section, but is instead the secret BFD section which will 1014 cause BFD to set the section number of a symbol to N_DEBUG. */ 1015 static asection *ppc_coff_debug_section; 1016 1017 /* Structure to set the length field of the dwarf sections. */ 1018 struct dw_subsection { 1019 /* Subsections are simply linked. */ 1020 struct dw_subsection *link; 1021 1022 /* The subsection number. */ 1023 subsegT subseg; 1024 1025 /* Expression to compute the length of the section. */ 1026 expressionS end_exp; 1027 }; 1028 1029 static struct dw_section { 1030 /* Corresponding section. */ 1031 segT sect; 1032 1033 /* Simply linked list of subsections with a label. */ 1034 struct dw_subsection *list_subseg; 1035 1036 /* The anonymous subsection. */ 1037 struct dw_subsection *anon_subseg; 1038 } dw_sections[XCOFF_DWSECT_NBR_NAMES]; 1039 #endif /* OBJ_XCOFF */ 1040 1041 #ifdef TE_PE 1042 1043 /* Various sections that we need for PE coff support. */ 1044 static segT ydata_section; 1045 static segT pdata_section; 1046 static segT reldata_section; 1047 static segT rdata_section; 1048 static segT tocdata_section; 1049 1050 /* The current section and the previous section. See ppc_previous. */ 1051 static segT ppc_previous_section; 1052 static segT ppc_current_section; 1053 1054 #endif /* TE_PE */ 1055 1056 #ifdef OBJ_ELF 1057 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ 1058 unsigned long *ppc_apuinfo_list; 1059 unsigned int ppc_apuinfo_num; 1060 unsigned int ppc_apuinfo_num_alloc; 1061 #endif /* OBJ_ELF */ 1062 1063 #ifdef OBJ_ELF 1065 const char *const md_shortopts = "b:l:usm:K:VQ:"; 1066 #else 1067 const char *const md_shortopts = "um:"; 1068 #endif 1069 #define OPTION_NOPS (OPTION_MD_BASE + 0) 1070 const struct option md_longopts[] = { 1071 {"nops", required_argument, NULL, OPTION_NOPS}, 1072 {"ppc476-workaround", no_argument, &warn_476, 1}, 1073 {"no-ppc476-workaround", no_argument, &warn_476, 0}, 1074 {NULL, no_argument, NULL, 0} 1075 }; 1076 const size_t md_longopts_size = sizeof (md_longopts); 1077 1078 int 1079 md_parse_option (int c, const char *arg) 1080 { 1081 ppc_cpu_t new_cpu; 1082 1083 switch (c) 1084 { 1085 case 'u': 1086 /* -u means that any undefined symbols should be treated as 1087 external, which is the default for gas anyhow. */ 1088 break; 1089 1090 #ifdef OBJ_ELF 1091 case 'l': 1092 /* Solaris as takes -le (presumably for little endian). For completeness 1093 sake, recognize -be also. */ 1094 if (strcmp (arg, "e") == 0) 1095 { 1096 target_big_endian = 0; 1097 set_target_endian = 1; 1098 if (ppc_cpu & PPC_OPCODE_VLE) 1099 as_bad (_("the use of -mvle requires big endian.")); 1100 } 1101 else 1102 return 0; 1103 1104 break; 1105 1106 case 'b': 1107 if (strcmp (arg, "e") == 0) 1108 { 1109 target_big_endian = 1; 1110 set_target_endian = 1; 1111 } 1112 else 1113 return 0; 1114 1115 break; 1116 1117 case 'K': 1118 /* Recognize -K PIC. */ 1119 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) 1120 { 1121 shlib = SHLIB_PIC; 1122 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1123 } 1124 else 1125 return 0; 1126 1127 break; 1128 #endif 1129 1130 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ 1131 case 'a': 1132 if (strcmp (arg, "64") == 0) 1133 { 1134 #ifdef BFD64 1135 ppc_obj64 = 1; 1136 if (ppc_cpu & PPC_OPCODE_VLE) 1137 as_bad (_("the use of -mvle requires -a32.")); 1138 #else 1139 as_fatal (_("%s unsupported"), "-a64"); 1140 #endif 1141 } 1142 else if (strcmp (arg, "32") == 0) 1143 ppc_obj64 = 0; 1144 else 1145 return 0; 1146 break; 1147 1148 case 'm': 1149 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg); 1150 if (new_cpu != 0) 1151 { 1152 ppc_cpu = new_cpu; 1153 if (strcmp (arg, "vle") == 0) 1154 { 1155 if (set_target_endian && target_big_endian == 0) 1156 as_bad (_("the use of -mvle requires big endian.")); 1157 if (ppc_obj64) 1158 as_bad (_("the use of -mvle requires -a32.")); 1159 } 1160 } 1161 1162 else if (strcmp (arg, "regnames") == 0) 1163 reg_names_p = TRUE; 1164 1165 else if (strcmp (arg, "no-regnames") == 0) 1166 reg_names_p = FALSE; 1167 1168 #ifdef OBJ_ELF 1169 /* -mrelocatable/-mrelocatable-lib -- warn about initializations 1170 that require relocation. */ 1171 else if (strcmp (arg, "relocatable") == 0) 1172 { 1173 shlib = SHLIB_MRELOCATABLE; 1174 ppc_flags |= EF_PPC_RELOCATABLE; 1175 } 1176 1177 else if (strcmp (arg, "relocatable-lib") == 0) 1178 { 1179 shlib = SHLIB_MRELOCATABLE; 1180 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1181 } 1182 1183 /* -memb, set embedded bit. */ 1184 else if (strcmp (arg, "emb") == 0) 1185 ppc_flags |= EF_PPC_EMB; 1186 1187 /* -mlittle/-mbig set the endianness. */ 1188 else if (strcmp (arg, "little") == 0 1189 || strcmp (arg, "little-endian") == 0) 1190 { 1191 target_big_endian = 0; 1192 set_target_endian = 1; 1193 if (ppc_cpu & PPC_OPCODE_VLE) 1194 as_bad (_("the use of -mvle requires big endian.")); 1195 } 1196 1197 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) 1198 { 1199 target_big_endian = 1; 1200 set_target_endian = 1; 1201 } 1202 1203 else if (strcmp (arg, "solaris") == 0) 1204 { 1205 msolaris = TRUE; 1206 ppc_comment_chars = ppc_solaris_comment_chars; 1207 } 1208 1209 else if (strcmp (arg, "no-solaris") == 0) 1210 { 1211 msolaris = FALSE; 1212 ppc_comment_chars = ppc_eabi_comment_chars; 1213 } 1214 #endif 1215 else 1216 { 1217 as_bad (_("invalid switch -m%s"), arg); 1218 return 0; 1219 } 1220 break; 1221 1222 #ifdef OBJ_ELF 1223 /* -V: SVR4 argument to print version ID. */ 1224 case 'V': 1225 print_version_id (); 1226 break; 1227 1228 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section 1229 should be emitted or not. FIXME: Not implemented. */ 1230 case 'Q': 1231 break; 1232 1233 /* Solaris takes -s to specify that .stabs go in a .stabs section, 1234 rather than .stabs.excl, which is ignored by the linker. 1235 FIXME: Not implemented. */ 1236 case 's': 1237 if (arg) 1238 return 0; 1239 1240 break; 1241 #endif 1242 1243 case OPTION_NOPS: 1244 { 1245 char *end; 1246 nop_limit = strtoul (optarg, &end, 0); 1247 if (*end) 1248 as_bad (_("--nops needs a numeric argument")); 1249 } 1250 break; 1251 1252 case 0: 1253 break; 1254 1255 default: 1256 return 0; 1257 } 1258 1259 return 1; 1260 } 1261 1262 void 1263 md_show_usage (FILE *stream) 1264 { 1265 fprintf (stream, _("\ 1266 PowerPC options:\n\ 1267 -a32 generate ELF32/XCOFF32\n\ 1268 -a64 generate ELF64/XCOFF64\n\ 1269 -u ignored\n\ 1270 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\ 1271 -mpwr generate code for POWER (RIOS1)\n\ 1272 -m601 generate code for PowerPC 601\n\ 1273 -mppc, -mppc32, -m603, -m604\n\ 1274 generate code for PowerPC 603/604\n\ 1275 -m403 generate code for PowerPC 403\n\ 1276 -m405 generate code for PowerPC 405\n\ 1277 -m440 generate code for PowerPC 440\n\ 1278 -m464 generate code for PowerPC 464\n\ 1279 -m476 generate code for PowerPC 476\n\ 1280 -m7400, -m7410, -m7450, -m7455\n\ 1281 generate code for PowerPC 7400/7410/7450/7455\n\ 1282 -m750cl generate code for PowerPC 750cl\n\ 1283 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n")); 1284 fprintf (stream, _("\ 1285 -mppc64, -m620 generate code for PowerPC 620/625/630\n\ 1286 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\ 1287 -mbooke generate code for 32-bit PowerPC BookE\n\ 1288 -ma2 generate code for A2 architecture\n\ 1289 -mpower4, -mpwr4 generate code for Power4 architecture\n\ 1290 -mpower5, -mpwr5, -mpwr5x\n\ 1291 generate code for Power5 architecture\n\ 1292 -mpower6, -mpwr6 generate code for Power6 architecture\n\ 1293 -mpower7, -mpwr7 generate code for Power7 architecture\n\ 1294 -mpower8, -mpwr8 generate code for Power8 architecture\n\ 1295 -mpower9, -mpwr9 generate code for Power9 architecture\n\ 1296 -mcell generate code for Cell Broadband Engine architecture\n\ 1297 -mcom generate code Power/PowerPC common instructions\n\ 1298 -many generate code for any architecture (PWR/PWRX/PPC)\n")); 1299 fprintf (stream, _("\ 1300 -maltivec generate code for AltiVec\n\ 1301 -mvsx generate code for Vector-Scalar (VSX) instructions\n\ 1302 -mhtm generate code for Hardware Transactional Memory\n\ 1303 -me300 generate code for PowerPC e300 family\n\ 1304 -me500, -me500x2 generate code for Motorola e500 core complex\n\ 1305 -me500mc, generate code for Freescale e500mc core complex\n\ 1306 -me500mc64, generate code for Freescale e500mc64 core complex\n\ 1307 -me5500, generate code for Freescale e5500 core complex\n\ 1308 -me6500, generate code for Freescale e6500 core complex\n\ 1309 -mspe generate code for Motorola SPE instructions\n\ 1310 -mvle generate code for Freescale VLE instructions\n\ 1311 -mtitan generate code for AppliedMicro Titan core complex\n\ 1312 -mregnames Allow symbolic names for registers\n\ 1313 -mno-regnames Do not allow symbolic names for registers\n")); 1314 #ifdef OBJ_ELF 1315 fprintf (stream, _("\ 1316 -mrelocatable support for GCC's -mrelocatble option\n\ 1317 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ 1318 -memb set PPC_EMB bit in ELF flags\n\ 1319 -mlittle, -mlittle-endian, -le\n\ 1320 generate code for a little endian machine\n\ 1321 -mbig, -mbig-endian, -be\n\ 1322 generate code for a big endian machine\n\ 1323 -msolaris generate code for Solaris\n\ 1324 -mno-solaris do not generate code for Solaris\n\ 1325 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\ 1326 -V print assembler version number\n\ 1327 -Qy, -Qn ignored\n")); 1328 #endif 1329 fprintf (stream, _("\ 1330 -nops=count when aligning, more than COUNT nops uses a branch\n\ 1331 -ppc476-workaround warn if emitting data to code sections\n")); 1332 } 1333 1334 /* Set ppc_cpu if it is not already set. */ 1336 1337 static void 1338 ppc_set_cpu (void) 1339 { 1340 const char *default_os = TARGET_OS; 1341 const char *default_cpu = TARGET_CPU; 1342 1343 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) 1344 { 1345 if (ppc_obj64) 1346 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; 1347 else if (strncmp (default_os, "aix", 3) == 0 1348 && default_os[3] >= '4' && default_os[3] <= '9') 1349 ppc_cpu |= PPC_OPCODE_COMMON; 1350 else if (strncmp (default_os, "aix3", 4) == 0) 1351 ppc_cpu |= PPC_OPCODE_POWER; 1352 else if (strcmp (default_cpu, "rs6000") == 0) 1353 ppc_cpu |= PPC_OPCODE_POWER; 1354 else if (strncmp (default_cpu, "powerpc", 7) == 0) 1355 ppc_cpu |= PPC_OPCODE_PPC; 1356 else 1357 as_fatal (_("unknown default cpu = %s, os = %s"), 1358 default_cpu, default_os); 1359 } 1360 } 1361 1362 /* Figure out the BFD architecture to use. This function and ppc_mach 1363 are called well before md_begin, when the output file is opened. */ 1364 1365 enum bfd_architecture 1366 ppc_arch (void) 1367 { 1368 const char *default_cpu = TARGET_CPU; 1369 ppc_set_cpu (); 1370 1371 if ((ppc_cpu & PPC_OPCODE_PPC) != 0) 1372 return bfd_arch_powerpc; 1373 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 1374 return bfd_arch_powerpc; 1375 if ((ppc_cpu & PPC_OPCODE_POWER) != 0) 1376 return bfd_arch_rs6000; 1377 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) 1378 { 1379 if (strcmp (default_cpu, "rs6000") == 0) 1380 return bfd_arch_rs6000; 1381 else if (strncmp (default_cpu, "powerpc", 7) == 0) 1382 return bfd_arch_powerpc; 1383 } 1384 1385 as_fatal (_("neither Power nor PowerPC opcodes were selected.")); 1386 return bfd_arch_unknown; 1387 } 1388 1389 unsigned long 1390 ppc_mach (void) 1391 { 1392 if (ppc_obj64) 1393 return bfd_mach_ppc64; 1394 else if (ppc_arch () == bfd_arch_rs6000) 1395 return bfd_mach_rs6k; 1396 else if (ppc_cpu & PPC_OPCODE_TITAN) 1397 return bfd_mach_ppc_titan; 1398 else if (ppc_cpu & PPC_OPCODE_VLE) 1399 return bfd_mach_ppc_vle; 1400 else 1401 return bfd_mach_ppc; 1402 } 1403 1404 extern const char* 1405 ppc_target_format (void) 1406 { 1407 #ifdef OBJ_COFF 1408 #ifdef TE_PE 1409 return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; 1410 #elif TE_POWERMAC 1411 return "xcoff-powermac"; 1412 #else 1413 # ifdef TE_AIX5 1414 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); 1415 # else 1416 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); 1417 # endif 1418 #endif 1419 #endif 1420 #ifdef OBJ_ELF 1421 # ifdef TE_FreeBSD 1422 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); 1423 # elif defined (TE_VXWORKS) 1424 return "elf32-powerpc-vxworks"; 1425 # else 1426 return (target_big_endian 1427 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") 1428 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); 1429 # endif 1430 #endif 1431 } 1432 1433 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. 1434 Return TRUE if there's a problem, otherwise FALSE. */ 1435 1436 static bfd_boolean 1437 insn_validate (const struct powerpc_opcode *op) 1438 { 1439 const unsigned char *o; 1440 unsigned long omask = op->mask; 1441 1442 /* The mask had better not trim off opcode bits. */ 1443 if ((op->opcode & omask) != op->opcode) 1444 { 1445 as_bad (_("mask trims opcode bits for %s"), op->name); 1446 return TRUE; 1447 } 1448 1449 /* The operands must not overlap the opcode or each other. */ 1450 for (o = op->operands; *o; ++o) 1451 { 1452 if (*o >= num_powerpc_operands) 1453 { 1454 as_bad (_("operand index error for %s"), op->name); 1455 return TRUE; 1456 } 1457 else 1458 { 1459 const struct powerpc_operand *operand = &powerpc_operands[*o]; 1460 if (operand->shift != (int) PPC_OPSHIFT_INV) 1461 { 1462 unsigned long mask; 1463 1464 if (operand->shift >= 0) 1465 mask = operand->bitm << operand->shift; 1466 else 1467 mask = operand->bitm >> -operand->shift; 1468 if (omask & mask) 1469 { 1470 as_bad (_("operand %d overlap in %s"), 1471 (int) (o - op->operands), op->name); 1472 return TRUE; 1473 } 1474 omask |= mask; 1475 } 1476 } 1477 } 1478 return FALSE; 1479 } 1480 1481 /* Insert opcodes and macros into hash tables. Called at startup and 1482 for .machine pseudo. */ 1483 1484 static void 1485 ppc_setup_opcodes (void) 1486 { 1487 const struct powerpc_opcode *op; 1488 const struct powerpc_opcode *op_end; 1489 const struct powerpc_macro *macro; 1490 const struct powerpc_macro *macro_end; 1491 bfd_boolean bad_insn = FALSE; 1492 1493 if (ppc_hash != NULL) 1494 hash_die (ppc_hash); 1495 if (ppc_macro_hash != NULL) 1496 hash_die (ppc_macro_hash); 1497 1498 /* Insert the opcodes into a hash table. */ 1499 ppc_hash = hash_new (); 1500 1501 if (ENABLE_CHECKING) 1502 { 1503 unsigned int i; 1504 1505 /* An index into powerpc_operands is stored in struct fix 1506 fx_pcrel_adjust which is 8 bits wide. */ 1507 gas_assert (num_powerpc_operands < 256); 1508 1509 /* Check operand masks. Code here and in the disassembler assumes 1510 all the 1's in the mask are contiguous. */ 1511 for (i = 0; i < num_powerpc_operands; ++i) 1512 { 1513 unsigned long mask = powerpc_operands[i].bitm; 1514 unsigned long right_bit; 1515 unsigned int j; 1516 1517 right_bit = mask & -mask; 1518 mask += right_bit; 1519 right_bit = mask & -mask; 1520 if (mask != right_bit) 1521 { 1522 as_bad (_("powerpc_operands[%d].bitm invalid"), i); 1523 bad_insn = TRUE; 1524 } 1525 for (j = i + 1; j < num_powerpc_operands; ++j) 1526 if (memcmp (&powerpc_operands[i], &powerpc_operands[j], 1527 sizeof (powerpc_operands[0])) == 0) 1528 { 1529 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), 1530 j, i); 1531 bad_insn = TRUE; 1532 } 1533 } 1534 } 1535 1536 op_end = powerpc_opcodes + powerpc_num_opcodes; 1537 for (op = powerpc_opcodes; op < op_end; op++) 1538 { 1539 if (ENABLE_CHECKING) 1540 { 1541 if (op != powerpc_opcodes) 1542 { 1543 int old_opcode = PPC_OP (op[-1].opcode); 1544 int new_opcode = PPC_OP (op[0].opcode); 1545 1546 #ifdef PRINT_OPCODE_TABLE 1547 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", 1548 op->name, (unsigned int) (op - powerpc_opcodes), 1549 (unsigned int) new_opcode, (unsigned int) op->opcode, 1550 (unsigned int) op->mask, (unsigned long long) op->flags); 1551 #endif 1552 1553 /* The major opcodes had better be sorted. Code in the 1554 disassembler assumes the insns are sorted according to 1555 major opcode. */ 1556 if (new_opcode < old_opcode) 1557 { 1558 as_bad (_("major opcode is not sorted for %s"), 1559 op->name); 1560 bad_insn = TRUE; 1561 } 1562 } 1563 if ((op->flags & PPC_OPCODE_VLE) != 0) 1564 { 1565 as_bad (_("%s is enabled by vle flag"), op->name); 1566 bad_insn = TRUE; 1567 } 1568 if (PPC_OP (op->opcode) != 4 1569 && PPC_OP (op->opcode) != 31 1570 && (op->deprecated & PPC_OPCODE_VLE) == 0) 1571 { 1572 as_bad (_("%s not disabled by vle flag"), op->name); 1573 bad_insn = TRUE; 1574 } 1575 bad_insn |= insn_validate (op); 1576 } 1577 1578 if ((ppc_cpu & op->flags) != 0 1579 && !(ppc_cpu & op->deprecated)) 1580 { 1581 const char *retval; 1582 1583 retval = hash_insert (ppc_hash, op->name, (void *) op); 1584 if (retval != NULL) 1585 { 1586 as_bad (_("duplicate instruction %s"), 1587 op->name); 1588 bad_insn = TRUE; 1589 } 1590 } 1591 } 1592 1593 if ((ppc_cpu & PPC_OPCODE_ANY) != 0) 1594 for (op = powerpc_opcodes; op < op_end; op++) 1595 hash_insert (ppc_hash, op->name, (void *) op); 1596 1597 op_end = vle_opcodes + vle_num_opcodes; 1598 for (op = vle_opcodes; op < op_end; op++) 1599 { 1600 if (ENABLE_CHECKING) 1601 { 1602 if (op != vle_opcodes) 1603 { 1604 unsigned old_seg, new_seg; 1605 1606 old_seg = VLE_OP (op[-1].opcode, op[-1].mask); 1607 old_seg = VLE_OP_TO_SEG (old_seg); 1608 new_seg = VLE_OP (op[0].opcode, op[0].mask); 1609 new_seg = VLE_OP_TO_SEG (new_seg); 1610 1611 #ifdef PRINT_OPCODE_TABLE 1612 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", 1613 op->name, (unsigned int) (op - powerpc_opcodes), 1614 (unsigned int) new_seg, (unsigned int) op->opcode, 1615 (unsigned int) op->mask, (unsigned long long) op->flags); 1616 #endif 1617 /* The major opcodes had better be sorted. Code in the 1618 disassembler assumes the insns are sorted according to 1619 major opcode. */ 1620 if (new_seg < old_seg) 1621 { 1622 as_bad (_("major opcode is not sorted for %s"), 1623 op->name); 1624 bad_insn = TRUE; 1625 } 1626 } 1627 1628 bad_insn |= insn_validate (op); 1629 } 1630 1631 if ((ppc_cpu & op->flags) != 0 1632 && !(ppc_cpu & op->deprecated)) 1633 { 1634 const char *retval; 1635 1636 retval = hash_insert (ppc_hash, op->name, (void *) op); 1637 if (retval != NULL) 1638 { 1639 as_bad (_("duplicate instruction %s"), 1640 op->name); 1641 bad_insn = TRUE; 1642 } 1643 } 1644 } 1645 1646 /* Insert the macros into a hash table. */ 1647 ppc_macro_hash = hash_new (); 1648 1649 macro_end = powerpc_macros + powerpc_num_macros; 1650 for (macro = powerpc_macros; macro < macro_end; macro++) 1651 { 1652 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0) 1653 { 1654 const char *retval; 1655 1656 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro); 1657 if (retval != (const char *) NULL) 1658 { 1659 as_bad (_("duplicate macro %s"), macro->name); 1660 bad_insn = TRUE; 1661 } 1662 } 1663 } 1664 1665 if (bad_insn) 1666 abort (); 1667 } 1668 1669 /* This function is called when the assembler starts up. It is called 1670 after the options have been parsed and the output file has been 1671 opened. */ 1672 1673 void 1674 md_begin (void) 1675 { 1676 ppc_set_cpu (); 1677 1678 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; 1679 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4; 1680 1681 #ifdef OBJ_ELF 1682 /* Set the ELF flags if desired. */ 1683 if (ppc_flags && !msolaris) 1684 bfd_set_private_flags (stdoutput, ppc_flags); 1685 #endif 1686 1687 ppc_setup_opcodes (); 1688 1689 /* Tell the main code what the endianness is if it is not overridden 1690 by the user. */ 1691 if (!set_target_endian) 1692 { 1693 set_target_endian = 1; 1694 target_big_endian = PPC_BIG_ENDIAN; 1695 } 1696 1697 #ifdef OBJ_XCOFF 1698 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); 1699 1700 /* Create dummy symbols to serve as initial csects. This forces the 1701 text csects to precede the data csects. These symbols will not 1702 be output. */ 1703 ppc_text_csects = symbol_make ("dummy\001"); 1704 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; 1705 ppc_data_csects = symbol_make ("dummy\001"); 1706 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; 1707 #endif 1708 1709 #ifdef TE_PE 1710 1711 ppc_current_section = text_section; 1712 ppc_previous_section = 0; 1713 1714 #endif 1715 } 1716 1717 void 1718 ppc_cleanup (void) 1719 { 1720 #ifdef OBJ_ELF 1721 if (ppc_apuinfo_list == NULL) 1722 return; 1723 1724 /* Ok, so write the section info out. We have this layout: 1725 1726 byte data what 1727 ---- ---- ---- 1728 0 8 length of "APUinfo\0" 1729 4 (n*4) number of APU's (4 bytes each) 1730 8 2 note type 2 1731 12 "APUinfo\0" name 1732 20 APU#1 first APU's info 1733 24 APU#2 second APU's info 1734 ... ... 1735 */ 1736 { 1737 char *p; 1738 asection *seg = now_seg; 1739 subsegT subseg = now_subseg; 1740 asection *apuinfo_secp = (asection *) NULL; 1741 unsigned int i; 1742 1743 /* Create the .PPC.EMB.apuinfo section. */ 1744 apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0); 1745 bfd_set_section_flags (stdoutput, 1746 apuinfo_secp, 1747 SEC_HAS_CONTENTS | SEC_READONLY); 1748 1749 p = frag_more (4); 1750 md_number_to_chars (p, (valueT) 8, 4); 1751 1752 p = frag_more (4); 1753 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); 1754 1755 p = frag_more (4); 1756 md_number_to_chars (p, (valueT) 2, 4); 1757 1758 p = frag_more (8); 1759 strcpy (p, APUINFO_LABEL); 1760 1761 for (i = 0; i < ppc_apuinfo_num; i++) 1762 { 1763 p = frag_more (4); 1764 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); 1765 } 1766 1767 frag_align (2, 0, 0); 1768 1769 /* We probably can't restore the current segment, for there likely 1770 isn't one yet... */ 1771 if (seg && subseg) 1772 subseg_set (seg, subseg); 1773 } 1774 #endif 1775 } 1776 1777 /* Insert an operand value into an instruction. */ 1778 1779 static unsigned long 1780 ppc_insert_operand (unsigned long insn, 1781 const struct powerpc_operand *operand, 1782 offsetT val, 1783 ppc_cpu_t cpu, 1784 const char *file, 1785 unsigned int line) 1786 { 1787 long min, max, right; 1788 1789 max = operand->bitm; 1790 right = max & -max; 1791 min = 0; 1792 1793 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0) 1794 { 1795 /* Extend the allowed range for addis to [-32768, 65535]. 1796 Similarly for cmpli and some VLE high part insns. For 64-bit 1797 it would be good to disable this for signed fields since the 1798 value is sign extended into the high 32 bits of the register. 1799 If the value is, say, an address, then we might care about 1800 the high bits. However, gcc as of 2014-06 uses unsigned 1801 values when loading the high part of 64-bit constants using 1802 lis. */ 1803 min = ~(max >> 1) & -right; 1804 } 1805 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 1806 { 1807 max = (max >> 1) & -right; 1808 min = ~max & -right; 1809 } 1810 1811 if ((operand->flags & PPC_OPERAND_PLUS1) != 0) 1812 max++; 1813 1814 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) 1815 { 1816 long tmp = min; 1817 min = -max; 1818 max = -tmp; 1819 } 1820 1821 if (min <= max) 1822 { 1823 /* Some people write constants with the sign extension done by 1824 hand but only up to 32 bits. This shouldn't really be valid, 1825 but, to permit this code to assemble on a 64-bit host, we 1826 sign extend the 32-bit value to 64 bits if so doing makes the 1827 value valid. */ 1828 if (val > max 1829 && (offsetT) (val - 0x80000000 - 0x80000000) >= min 1830 && (offsetT) (val - 0x80000000 - 0x80000000) <= max 1831 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0) 1832 val = val - 0x80000000 - 0x80000000; 1833 1834 /* Similarly, people write expressions like ~(1<<15), and expect 1835 this to be OK for a 32-bit unsigned value. */ 1836 else if (val < min 1837 && (offsetT) (val + 0x80000000 + 0x80000000) >= min 1838 && (offsetT) (val + 0x80000000 + 0x80000000) <= max 1839 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0) 1840 val = val + 0x80000000 + 0x80000000; 1841 1842 else if (val < min 1843 || val > max 1844 || (val & (right - 1)) != 0) 1845 as_bad_value_out_of_range (_("operand"), val, min, max, file, line); 1846 } 1847 1848 if (operand->insert) 1849 { 1850 const char *errmsg; 1851 1852 errmsg = NULL; 1853 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg); 1854 if (errmsg != (const char *) NULL) 1855 as_bad_where (file, line, "%s", errmsg); 1856 } 1857 else if (operand->shift >= 0) 1858 insn |= ((long) val & operand->bitm) << operand->shift; 1859 else 1860 insn |= ((long) val & operand->bitm) >> -operand->shift; 1861 1862 return insn; 1863 } 1864 1865 1866 #ifdef OBJ_ELF 1868 /* Parse @got, etc. and return the desired relocation. */ 1869 static bfd_reloc_code_real_type 1870 ppc_elf_suffix (char **str_p, expressionS *exp_p) 1871 { 1872 struct map_bfd { 1873 const char *string; 1874 unsigned int length : 8; 1875 unsigned int valid32 : 1; 1876 unsigned int valid64 : 1; 1877 unsigned int reloc; 1878 }; 1879 1880 char ident[20]; 1881 char *str = *str_p; 1882 char *str2; 1883 int ch; 1884 int len; 1885 const struct map_bfd *ptr; 1886 1887 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } 1888 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } 1889 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } 1890 1891 static const struct map_bfd mapping[] = { 1892 MAP ("l", BFD_RELOC_LO16), 1893 MAP ("h", BFD_RELOC_HI16), 1894 MAP ("ha", BFD_RELOC_HI16_S), 1895 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), 1896 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), 1897 MAP ("got", BFD_RELOC_16_GOTOFF), 1898 MAP ("got@l", BFD_RELOC_LO16_GOTOFF), 1899 MAP ("got@h", BFD_RELOC_HI16_GOTOFF), 1900 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), 1901 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), 1902 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), 1903 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), 1904 MAP ("copy", BFD_RELOC_PPC_COPY), 1905 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), 1906 MAP ("sectoff", BFD_RELOC_16_BASEREL), 1907 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), 1908 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), 1909 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), 1910 MAP ("tls", BFD_RELOC_PPC_TLS), 1911 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), 1912 MAP ("dtprel", BFD_RELOC_PPC_DTPREL), 1913 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), 1914 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), 1915 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), 1916 MAP ("tprel", BFD_RELOC_PPC_TPREL), 1917 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), 1918 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), 1919 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), 1920 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), 1921 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), 1922 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), 1923 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), 1924 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), 1925 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), 1926 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), 1927 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), 1928 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), 1929 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), 1930 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), 1931 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), 1932 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), 1933 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), 1934 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), 1935 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), 1936 MAP32 ("fixup", BFD_RELOC_CTOR), 1937 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), 1938 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), 1939 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), 1940 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), 1941 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), 1942 MAP32 ("sdarel", BFD_RELOC_GPREL16), 1943 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), 1944 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), 1945 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), 1946 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), 1947 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), 1948 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), 1949 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), 1950 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), 1951 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), 1952 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), 1953 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), 1954 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), 1955 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), 1956 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), 1957 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), 1958 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), 1959 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), 1960 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), 1961 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), 1962 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), 1963 MAP32 ("xgot", BFD_RELOC_PPC_TOC16), 1964 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH), 1965 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA), 1966 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), 1967 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), 1968 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), 1969 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), 1970 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), 1971 MAP64 ("toc", BFD_RELOC_PPC_TOC16), 1972 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), 1973 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), 1974 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), 1975 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH), 1976 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA), 1977 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), 1978 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), 1979 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), 1980 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), 1981 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL), 1982 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH), 1983 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA), 1984 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), 1985 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), 1986 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), 1987 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), 1988 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE } 1989 }; 1990 1991 if (*str++ != '@') 1992 return BFD_RELOC_NONE; 1993 1994 for (ch = *str, str2 = ident; 1995 (str2 < ident + sizeof (ident) - 1 1996 && (ISALNUM (ch) || ch == '@')); 1997 ch = *++str) 1998 { 1999 *str2++ = TOLOWER (ch); 2000 } 2001 2002 *str2 = '\0'; 2003 len = str2 - ident; 2004 2005 ch = ident[0]; 2006 for (ptr = &mapping[0]; ptr->length > 0; ptr++) 2007 if (ch == ptr->string[0] 2008 && len == ptr->length 2009 && memcmp (ident, ptr->string, ptr->length) == 0 2010 && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) 2011 { 2012 int reloc = ptr->reloc; 2013 2014 if (!ppc_obj64 && exp_p->X_add_number != 0) 2015 { 2016 switch (reloc) 2017 { 2018 case BFD_RELOC_16_GOTOFF: 2019 case BFD_RELOC_LO16_GOTOFF: 2020 case BFD_RELOC_HI16_GOTOFF: 2021 case BFD_RELOC_HI16_S_GOTOFF: 2022 as_warn (_("identifier+constant@got means " 2023 "identifier@got+constant")); 2024 break; 2025 2026 case BFD_RELOC_PPC_GOT_TLSGD16: 2027 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 2028 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 2029 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 2030 case BFD_RELOC_PPC_GOT_TLSLD16: 2031 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 2032 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 2033 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 2034 case BFD_RELOC_PPC_GOT_DTPREL16: 2035 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 2036 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 2037 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 2038 case BFD_RELOC_PPC_GOT_TPREL16: 2039 case BFD_RELOC_PPC_GOT_TPREL16_LO: 2040 case BFD_RELOC_PPC_GOT_TPREL16_HI: 2041 case BFD_RELOC_PPC_GOT_TPREL16_HA: 2042 as_bad (_("symbol+offset not supported for got tls")); 2043 break; 2044 } 2045 } 2046 2047 /* Now check for identifier@suffix+constant. */ 2048 if (*str == '-' || *str == '+') 2049 { 2050 char *orig_line = input_line_pointer; 2051 expressionS new_exp; 2052 2053 input_line_pointer = str; 2054 expression (&new_exp); 2055 if (new_exp.X_op == O_constant) 2056 { 2057 exp_p->X_add_number += new_exp.X_add_number; 2058 str = input_line_pointer; 2059 } 2060 2061 if (&input_line_pointer != str_p) 2062 input_line_pointer = orig_line; 2063 } 2064 *str_p = str; 2065 2066 if (reloc == (int) BFD_RELOC_PPC64_TOC 2067 && exp_p->X_op == O_symbol 2068 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) 2069 { 2070 /* Change the symbol so that the dummy .TOC. symbol can be 2071 omitted from the object file. */ 2072 exp_p->X_add_symbol = &abs_symbol; 2073 } 2074 2075 return (bfd_reloc_code_real_type) reloc; 2076 } 2077 2078 return BFD_RELOC_NONE; 2079 } 2080 2081 /* Support @got, etc. on constants emitted via .short, .int etc. */ 2082 2083 bfd_reloc_code_real_type 2084 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes) 2085 { 2086 expression (exp); 2087 if (nbytes >= 2 && *input_line_pointer == '@') 2088 return ppc_elf_suffix (&input_line_pointer, exp); 2089 return BFD_RELOC_NONE; 2090 } 2091 2092 /* Warn when emitting data to code sections, unless we are emitting 2093 a relocation that ld --ppc476-workaround uses to recognise data 2094 *and* there was an unconditional branch prior to the data. */ 2095 2096 void 2097 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED, 2098 unsigned int nbytes, fixS *fix) 2099 { 2100 if (warn_476 2101 && (now_seg->flags & SEC_CODE) != 0 2102 && (nbytes != 4 2103 || fix == NULL 2104 || !(fix->fx_r_type == BFD_RELOC_32 2105 || fix->fx_r_type == BFD_RELOC_CTOR 2106 || fix->fx_r_type == BFD_RELOC_32_PCREL) 2107 || !(last_seg == now_seg && last_subseg == now_subseg) 2108 || !((last_insn & (0x3f << 26)) == (18u << 26) 2109 || ((last_insn & (0x3f << 26)) == (16u << 26) 2110 && (last_insn & (0x14 << 21)) == (0x14 << 21)) 2111 || ((last_insn & (0x3f << 26)) == (19u << 26) 2112 && (last_insn & (0x3ff << 1)) == (16u << 1) 2113 && (last_insn & (0x14 << 21)) == (0x14 << 21))))) 2114 { 2115 /* Flag that we've warned. */ 2116 if (fix != NULL) 2117 fix->fx_tcbit = 1; 2118 2119 as_warn (_("data in executable section")); 2120 } 2121 } 2122 2123 /* Solaris pseduo op to change to the .rodata section. */ 2124 static void 2125 ppc_elf_rdata (int xxx) 2126 { 2127 char *save_line = input_line_pointer; 2128 static char section[] = ".rodata\n"; 2129 2130 /* Just pretend this is .section .rodata */ 2131 input_line_pointer = section; 2132 obj_elf_section (xxx); 2133 2134 input_line_pointer = save_line; 2135 } 2136 2137 /* Pseudo op to make file scope bss items. */ 2138 static void 2139 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) 2140 { 2141 char *name; 2142 char c; 2143 char *p; 2144 offsetT size; 2145 symbolS *symbolP; 2146 offsetT align; 2147 segT old_sec; 2148 int old_subsec; 2149 char *pfrag; 2150 int align2; 2151 2152 c = get_symbol_name (&name); 2153 2154 /* Just after name is now '\0'. */ 2155 p = input_line_pointer; 2156 *p = c; 2157 SKIP_WHITESPACE_AFTER_NAME (); 2158 if (*input_line_pointer != ',') 2159 { 2160 as_bad (_("expected comma after symbol-name: rest of line ignored.")); 2161 ignore_rest_of_line (); 2162 return; 2163 } 2164 2165 input_line_pointer++; /* skip ',' */ 2166 if ((size = get_absolute_expression ()) < 0) 2167 { 2168 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); 2169 ignore_rest_of_line (); 2170 return; 2171 } 2172 2173 /* The third argument to .lcomm is the alignment. */ 2174 if (*input_line_pointer != ',') 2175 align = 8; 2176 else 2177 { 2178 ++input_line_pointer; 2179 align = get_absolute_expression (); 2180 if (align <= 0) 2181 { 2182 as_warn (_("ignoring bad alignment")); 2183 align = 8; 2184 } 2185 } 2186 2187 *p = 0; 2188 symbolP = symbol_find_or_make (name); 2189 *p = c; 2190 2191 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 2192 { 2193 as_bad (_("ignoring attempt to re-define symbol `%s'."), 2194 S_GET_NAME (symbolP)); 2195 ignore_rest_of_line (); 2196 return; 2197 } 2198 2199 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) 2200 { 2201 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), 2202 S_GET_NAME (symbolP), 2203 (long) S_GET_VALUE (symbolP), 2204 (long) size); 2205 2206 ignore_rest_of_line (); 2207 return; 2208 } 2209 2210 /* Allocate_bss. */ 2211 old_sec = now_seg; 2212 old_subsec = now_subseg; 2213 if (align) 2214 { 2215 /* Convert to a power of 2 alignment. */ 2216 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); 2217 if (align != 1) 2218 { 2219 as_bad (_("common alignment not a power of 2")); 2220 ignore_rest_of_line (); 2221 return; 2222 } 2223 } 2224 else 2225 align2 = 0; 2226 2227 record_alignment (bss_section, align2); 2228 subseg_set (bss_section, 1); 2229 if (align2) 2230 frag_align (align2, 0, 0); 2231 if (S_GET_SEGMENT (symbolP) == bss_section) 2232 symbol_get_frag (symbolP)->fr_symbol = 0; 2233 symbol_set_frag (symbolP, frag_now); 2234 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, 2235 (char *) 0); 2236 *pfrag = 0; 2237 S_SET_SIZE (symbolP, size); 2238 S_SET_SEGMENT (symbolP, bss_section); 2239 subseg_set (old_sec, old_subsec); 2240 demand_empty_rest_of_line (); 2241 } 2242 2243 /* Pseudo op to set symbol local entry point. */ 2244 static void 2245 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED) 2246 { 2247 char *name; 2248 char c = get_symbol_name (&name); 2249 char *p; 2250 expressionS exp; 2251 symbolS *sym; 2252 asymbol *bfdsym; 2253 elf_symbol_type *elfsym; 2254 2255 p = input_line_pointer; 2256 *p = c; 2257 SKIP_WHITESPACE_AFTER_NAME (); 2258 if (*input_line_pointer != ',') 2259 { 2260 *p = 0; 2261 as_bad (_("expected comma after name `%s' in .localentry directive"), 2262 name); 2263 *p = c; 2264 ignore_rest_of_line (); 2265 return; 2266 } 2267 input_line_pointer++; 2268 expression (&exp); 2269 if (exp.X_op == O_absent) 2270 { 2271 as_bad (_("missing expression in .localentry directive")); 2272 exp.X_op = O_constant; 2273 exp.X_add_number = 0; 2274 } 2275 *p = 0; 2276 sym = symbol_find_or_make (name); 2277 *p = c; 2278 2279 if (resolve_expression (&exp) 2280 && exp.X_op == O_constant) 2281 { 2282 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number); 2283 2284 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded)) 2285 as_bad (_(".localentry expression for `%s' " 2286 "is not a valid power of 2"), S_GET_NAME (sym)); 2287 else 2288 { 2289 bfdsym = symbol_get_bfdsym (sym); 2290 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 2291 gas_assert (elfsym); 2292 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK; 2293 elfsym->internal_elf_sym.st_other |= encoded; 2294 if (ppc_abiversion == 0) 2295 ppc_abiversion = 2; 2296 } 2297 } 2298 else 2299 as_bad (_(".localentry expression for `%s' " 2300 "does not evaluate to a constant"), S_GET_NAME (sym)); 2301 2302 demand_empty_rest_of_line (); 2303 } 2304 2305 /* Pseudo op to set ABI version. */ 2306 static void 2307 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED) 2308 { 2309 expressionS exp; 2310 2311 expression (&exp); 2312 if (exp.X_op == O_absent) 2313 { 2314 as_bad (_("missing expression in .abiversion directive")); 2315 exp.X_op = O_constant; 2316 exp.X_add_number = 0; 2317 } 2318 2319 if (resolve_expression (&exp) 2320 && exp.X_op == O_constant) 2321 ppc_abiversion = exp.X_add_number; 2322 else 2323 as_bad (_(".abiversion expression does not evaluate to a constant")); 2324 demand_empty_rest_of_line (); 2325 } 2326 2327 /* Parse a .gnu_attribute directive. */ 2328 static void 2329 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED) 2330 { 2331 int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU); 2332 2333 /* Check validity of defined powerpc tags. */ 2334 if (tag == Tag_GNU_Power_ABI_FP 2335 || tag == Tag_GNU_Power_ABI_Vector 2336 || tag == Tag_GNU_Power_ABI_Struct_Return) 2337 { 2338 unsigned int val; 2339 2340 val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag); 2341 2342 if ((tag == Tag_GNU_Power_ABI_FP && val > 15) 2343 || (tag == Tag_GNU_Power_ABI_Vector && val > 3) 2344 || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2)) 2345 as_warn (_("unknown .gnu_attribute value")); 2346 } 2347 } 2348 2349 /* Set ABI version in output file. */ 2350 void 2351 ppc_elf_end (void) 2352 { 2353 if (ppc_obj64 && ppc_abiversion != 0) 2354 { 2355 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI; 2356 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI; 2357 } 2358 } 2359 2360 /* Validate any relocations emitted for -mrelocatable, possibly adding 2361 fixups for word relocations in writable segments, so we can adjust 2362 them at runtime. */ 2363 static void 2364 ppc_elf_validate_fix (fixS *fixp, segT seg) 2365 { 2366 if (fixp->fx_done || fixp->fx_pcrel) 2367 return; 2368 2369 switch (shlib) 2370 { 2371 case SHLIB_NONE: 2372 case SHLIB_PIC: 2373 return; 2374 2375 case SHLIB_MRELOCATABLE: 2376 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF 2377 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF 2378 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF 2379 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 2380 && fixp->fx_r_type != BFD_RELOC_16_BASEREL 2381 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL 2382 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL 2383 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL 2384 && (seg->flags & SEC_LOAD) != 0 2385 && strcmp (segment_name (seg), ".got2") != 0 2386 && strcmp (segment_name (seg), ".dtors") != 0 2387 && strcmp (segment_name (seg), ".ctors") != 0 2388 && strcmp (segment_name (seg), ".fixup") != 0 2389 && strcmp (segment_name (seg), ".gcc_except_table") != 0 2390 && strcmp (segment_name (seg), ".eh_frame") != 0 2391 && strcmp (segment_name (seg), ".ex_shared") != 0) 2392 { 2393 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 2394 || fixp->fx_r_type != BFD_RELOC_CTOR) 2395 { 2396 as_bad_where (fixp->fx_file, fixp->fx_line, 2397 _("relocation cannot be done when using -mrelocatable")); 2398 } 2399 } 2400 return; 2401 } 2402 } 2403 2404 /* Prevent elf_frob_file_before_adjust removing a weak undefined 2405 function descriptor sym if the corresponding code sym is used. */ 2406 2407 void 2408 ppc_frob_file_before_adjust (void) 2409 { 2410 symbolS *symp; 2411 asection *toc; 2412 2413 if (!ppc_obj64) 2414 return; 2415 2416 for (symp = symbol_rootP; symp; symp = symbol_next (symp)) 2417 { 2418 const char *name; 2419 char *dotname; 2420 symbolS *dotsym; 2421 2422 name = S_GET_NAME (symp); 2423 if (name[0] == '.') 2424 continue; 2425 2426 if (! S_IS_WEAK (symp) 2427 || S_IS_DEFINED (symp)) 2428 continue; 2429 2430 dotname = concat (".", name, (char *) NULL); 2431 dotsym = symbol_find_noref (dotname, 1); 2432 free (dotname); 2433 if (dotsym != NULL && (symbol_used_p (dotsym) 2434 || symbol_used_in_reloc_p (dotsym))) 2435 symbol_mark_used (symp); 2436 2437 } 2438 2439 toc = bfd_get_section_by_name (stdoutput, ".toc"); 2440 if (toc != NULL 2441 && toc_reloc_types != has_large_toc_reloc 2442 && bfd_section_size (stdoutput, toc) > 0x10000) 2443 as_warn (_("TOC section size exceeds 64k")); 2444 } 2445 2446 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be 2447 emitted. Other uses of .TOC. will cause the symbol to be marked 2448 with BSF_KEEP in md_apply_fix. */ 2449 2450 void 2451 ppc_elf_adjust_symtab (void) 2452 { 2453 if (ppc_obj64) 2454 { 2455 symbolS *symp; 2456 symp = symbol_find (".TOC."); 2457 if (symp != NULL) 2458 { 2459 asymbol *bsym = symbol_get_bfdsym (symp); 2460 if ((bsym->flags & BSF_KEEP) == 0) 2461 symbol_remove (symp, &symbol_rootP, &symbol_lastP); 2462 } 2463 } 2464 } 2465 #endif /* OBJ_ELF */ 2466 2467 #ifdef TE_PE 2469 2470 /* 2471 * Summary of parse_toc_entry. 2472 * 2473 * in: Input_line_pointer points to the '[' in one of: 2474 * 2475 * [toc] [tocv] [toc32] [toc64] 2476 * 2477 * Anything else is an error of one kind or another. 2478 * 2479 * out: 2480 * return value: success or failure 2481 * toc_kind: kind of toc reference 2482 * input_line_pointer: 2483 * success: first char after the ']' 2484 * failure: unchanged 2485 * 2486 * settings: 2487 * 2488 * [toc] - rv == success, toc_kind = default_toc 2489 * [tocv] - rv == success, toc_kind = data_in_toc 2490 * [toc32] - rv == success, toc_kind = must_be_32 2491 * [toc64] - rv == success, toc_kind = must_be_64 2492 * 2493 */ 2494 2495 enum toc_size_qualifier 2496 { 2497 default_toc, /* The toc cell constructed should be the system default size */ 2498 data_in_toc, /* This is a direct reference to a toc cell */ 2499 must_be_32, /* The toc cell constructed must be 32 bits wide */ 2500 must_be_64 /* The toc cell constructed must be 64 bits wide */ 2501 }; 2502 2503 static int 2504 parse_toc_entry (enum toc_size_qualifier *toc_kind) 2505 { 2506 char *start; 2507 char *toc_spec; 2508 char c; 2509 enum toc_size_qualifier t; 2510 2511 /* Save the input_line_pointer. */ 2512 start = input_line_pointer; 2513 2514 /* Skip over the '[' , and whitespace. */ 2515 ++input_line_pointer; 2516 SKIP_WHITESPACE (); 2517 2518 /* Find the spelling of the operand. */ 2519 c = get_symbol_name (&toc_spec); 2520 2521 if (strcmp (toc_spec, "toc") == 0) 2522 { 2523 t = default_toc; 2524 } 2525 else if (strcmp (toc_spec, "tocv") == 0) 2526 { 2527 t = data_in_toc; 2528 } 2529 else if (strcmp (toc_spec, "toc32") == 0) 2530 { 2531 t = must_be_32; 2532 } 2533 else if (strcmp (toc_spec, "toc64") == 0) 2534 { 2535 t = must_be_64; 2536 } 2537 else 2538 { 2539 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); 2540 *input_line_pointer = c; 2541 input_line_pointer = start; 2542 return 0; 2543 } 2544 2545 /* Now find the ']'. */ 2546 *input_line_pointer = c; 2547 2548 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */ 2549 c = *input_line_pointer++; /* input_line_pointer->past char in c. */ 2550 2551 if (c != ']') 2552 { 2553 as_bad (_("syntax error: expected `]', found `%c'"), c); 2554 input_line_pointer = start; 2555 return 0; 2556 } 2557 2558 *toc_kind = t; 2559 return 1; 2560 } 2561 #endif 2562 2563 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 2564 /* See whether a symbol is in the TOC section. */ 2565 2566 static int 2567 ppc_is_toc_sym (symbolS *sym) 2568 { 2569 #ifdef OBJ_XCOFF 2570 return (symbol_get_tc (sym)->symbol_class == XMC_TC 2571 || symbol_get_tc (sym)->symbol_class == XMC_TC0); 2572 #endif 2573 #ifdef OBJ_ELF 2574 const char *sname = segment_name (S_GET_SEGMENT (sym)); 2575 if (ppc_obj64) 2576 return strcmp (sname, ".toc") == 0; 2577 else 2578 return strcmp (sname, ".got") == 0; 2579 #endif 2580 } 2581 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 2582 2583 2585 #ifdef OBJ_ELF 2586 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) 2587 static void 2588 ppc_apuinfo_section_add (unsigned int apu, unsigned int version) 2589 { 2590 unsigned int i; 2591 2592 /* Check we don't already exist. */ 2593 for (i = 0; i < ppc_apuinfo_num; i++) 2594 if (ppc_apuinfo_list[i] == APUID (apu, version)) 2595 return; 2596 2597 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) 2598 { 2599 if (ppc_apuinfo_num_alloc == 0) 2600 { 2601 ppc_apuinfo_num_alloc = 4; 2602 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc); 2603 } 2604 else 2605 { 2606 ppc_apuinfo_num_alloc += 4; 2607 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list, 2608 ppc_apuinfo_num_alloc); 2609 } 2610 } 2611 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); 2612 } 2613 #undef APUID 2614 #endif 2615 2616 2618 /* We need to keep a list of fixups. We can't simply generate them as 2619 we go, because that would require us to first create the frag, and 2620 that would screw up references to ``.''. */ 2621 2622 struct ppc_fixup 2623 { 2624 expressionS exp; 2625 int opindex; 2626 bfd_reloc_code_real_type reloc; 2627 }; 2628 2629 #define MAX_INSN_FIXUPS (5) 2630 2631 /* Form I16L. */ 2632 #define E_OR2I_INSN 0x7000C000 2633 #define E_AND2I_DOT_INSN 0x7000C800 2634 #define E_OR2IS_INSN 0x7000D000 2635 #define E_LIS_INSN 0x7000E000 2636 #define E_AND2IS_DOT_INSN 0x7000E800 2637 2638 /* Form I16A. */ 2639 #define E_ADD2I_DOT_INSN 0x70008800 2640 #define E_ADD2IS_INSN 0x70009000 2641 #define E_CMP16I_INSN 0x70009800 2642 #define E_MULL2I_INSN 0x7000A000 2643 #define E_CMPL16I_INSN 0x7000A800 2644 #define E_CMPH16I_INSN 0x7000B000 2645 #define E_CMPHL16I_INSN 0x7000B800 2646 2647 /* This routine is called for each instruction to be assembled. */ 2648 2649 void 2650 md_assemble (char *str) 2651 { 2652 char *s; 2653 const struct powerpc_opcode *opcode; 2654 unsigned long insn; 2655 const unsigned char *opindex_ptr; 2656 int skip_optional; 2657 int need_paren; 2658 int next_opindex; 2659 struct ppc_fixup fixups[MAX_INSN_FIXUPS]; 2660 int fc; 2661 char *f; 2662 int addr_mod; 2663 int i; 2664 unsigned int insn_length; 2665 2666 /* Get the opcode. */ 2667 for (s = str; *s != '\0' && ! ISSPACE (*s); s++) 2668 ; 2669 if (*s != '\0') 2670 *s++ = '\0'; 2671 2672 /* Look up the opcode in the hash table. */ 2673 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); 2674 if (opcode == (const struct powerpc_opcode *) NULL) 2675 { 2676 const struct powerpc_macro *macro; 2677 2678 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); 2679 if (macro == (const struct powerpc_macro *) NULL) 2680 as_bad (_("unrecognized opcode: `%s'"), str); 2681 else 2682 ppc_macro (s, macro); 2683 2684 return; 2685 } 2686 2687 insn = opcode->opcode; 2688 2689 str = s; 2690 while (ISSPACE (*str)) 2691 ++str; 2692 2693 /* PowerPC operands are just expressions. The only real issue is 2694 that a few operand types are optional. All cases which might use 2695 an optional operand separate the operands only with commas (in some 2696 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never 2697 have optional operands). Most instructions with optional operands 2698 have only one. Those that have more than one optional operand can 2699 take either all their operands or none. So, before we start seriously 2700 parsing the operands, we check to see if we have optional operands, 2701 and if we do, we count the number of commas to see which operands 2702 have been omitted. */ 2703 skip_optional = 0; 2704 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 2705 { 2706 const struct powerpc_operand *operand; 2707 2708 operand = &powerpc_operands[*opindex_ptr]; 2709 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) 2710 { 2711 unsigned int opcount; 2712 unsigned int num_operands_expected; 2713 2714 /* There is an optional operand. Count the number of 2715 commas in the input line. */ 2716 if (*str == '\0') 2717 opcount = 0; 2718 else 2719 { 2720 opcount = 1; 2721 s = str; 2722 while ((s = strchr (s, ',')) != (char *) NULL) 2723 { 2724 ++opcount; 2725 ++s; 2726 } 2727 } 2728 2729 /* Compute the number of expected operands. 2730 Do not count fake operands. */ 2731 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++) 2732 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0) 2733 ++ num_operands_expected; 2734 2735 /* If there are fewer operands in the line then are called 2736 for by the instruction, we want to skip the optional 2737 operands. */ 2738 if (opcount < num_operands_expected) 2739 skip_optional = 1; 2740 2741 break; 2742 } 2743 } 2744 2745 /* Gather the operands. */ 2746 need_paren = 0; 2747 next_opindex = 0; 2748 fc = 0; 2749 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 2750 { 2751 const struct powerpc_operand *operand; 2752 const char *errmsg; 2753 char *hold; 2754 expressionS ex; 2755 char endc; 2756 2757 if (next_opindex == 0) 2758 operand = &powerpc_operands[*opindex_ptr]; 2759 else 2760 { 2761 operand = &powerpc_operands[next_opindex]; 2762 next_opindex = 0; 2763 } 2764 errmsg = NULL; 2765 2766 /* If this is a fake operand, then we do not expect anything 2767 from the input. */ 2768 if ((operand->flags & PPC_OPERAND_FAKE) != 0) 2769 { 2770 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); 2771 if (errmsg != (const char *) NULL) 2772 as_bad ("%s", errmsg); 2773 continue; 2774 } 2775 2776 /* If this is an optional operand, and we are skipping it, just 2777 insert a zero. */ 2778 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 2779 && skip_optional) 2780 { 2781 long val = ppc_optional_operand_value (operand); 2782 if (operand->insert) 2783 { 2784 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg); 2785 if (errmsg != (const char *) NULL) 2786 as_bad ("%s", errmsg); 2787 } 2788 else if (operand->shift >= 0) 2789 insn |= ((long) val & operand->bitm) << operand->shift; 2790 else 2791 insn |= ((long) val & operand->bitm) >> -operand->shift; 2792 2793 if ((operand->flags & PPC_OPERAND_NEXT) != 0) 2794 next_opindex = *opindex_ptr + 1; 2795 continue; 2796 } 2797 2798 /* Gather the operand. */ 2799 hold = input_line_pointer; 2800 input_line_pointer = str; 2801 2802 #ifdef TE_PE 2803 if (*input_line_pointer == '[') 2804 { 2805 /* We are expecting something like the second argument here: 2806 * 2807 * lwz r4,[toc].GS.0.static_int(rtoc) 2808 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ 2809 * The argument following the `]' must be a symbol name, and the 2810 * register must be the toc register: 'rtoc' or '2' 2811 * 2812 * The effect is to 0 as the displacement field 2813 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or 2814 * the appropriate variation) reloc against it based on the symbol. 2815 * The linker will build the toc, and insert the resolved toc offset. 2816 * 2817 * Note: 2818 * o The size of the toc entry is currently assumed to be 2819 * 32 bits. This should not be assumed to be a hard coded 2820 * number. 2821 * o In an effort to cope with a change from 32 to 64 bits, 2822 * there are also toc entries that are specified to be 2823 * either 32 or 64 bits: 2824 * lwz r4,[toc32].GS.0.static_int(rtoc) 2825 * lwz r4,[toc64].GS.0.static_int(rtoc) 2826 * These demand toc entries of the specified size, and the 2827 * instruction probably requires it. 2828 */ 2829 2830 int valid_toc; 2831 enum toc_size_qualifier toc_kind; 2832 bfd_reloc_code_real_type toc_reloc; 2833 2834 /* Go parse off the [tocXX] part. */ 2835 valid_toc = parse_toc_entry (&toc_kind); 2836 2837 if (!valid_toc) 2838 { 2839 ignore_rest_of_line (); 2840 break; 2841 } 2842 2843 /* Now get the symbol following the ']'. */ 2844 expression (&ex); 2845 2846 switch (toc_kind) 2847 { 2848 case default_toc: 2849 /* In this case, we may not have seen the symbol yet, 2850 since it is allowed to appear on a .extern or .globl 2851 or just be a label in the .data section. */ 2852 toc_reloc = BFD_RELOC_PPC_TOC16; 2853 break; 2854 case data_in_toc: 2855 /* 1. The symbol must be defined and either in the toc 2856 section, or a global. 2857 2. The reloc generated must have the TOCDEFN flag set 2858 in upper bit mess of the reloc type. 2859 FIXME: It's a little confusing what the tocv 2860 qualifier can be used for. At the very least, I've 2861 seen three uses, only one of which I'm sure I can 2862 explain. */ 2863 if (ex.X_op == O_symbol) 2864 { 2865 gas_assert (ex.X_add_symbol != NULL); 2866 if (symbol_get_bfdsym (ex.X_add_symbol)->section 2867 != tocdata_section) 2868 { 2869 as_bad (_("[tocv] symbol is not a toc symbol")); 2870 } 2871 } 2872 2873 toc_reloc = BFD_RELOC_PPC_TOC16; 2874 break; 2875 case must_be_32: 2876 /* FIXME: these next two specifically specify 32/64 bit 2877 toc entries. We don't support them today. Is this 2878 the right way to say that? */ 2879 toc_reloc = BFD_RELOC_NONE; 2880 as_bad (_("unimplemented toc32 expression modifier")); 2881 break; 2882 case must_be_64: 2883 /* FIXME: see above. */ 2884 toc_reloc = BFD_RELOC_NONE; 2885 as_bad (_("unimplemented toc64 expression modifier")); 2886 break; 2887 default: 2888 fprintf (stderr, 2889 _("Unexpected return value [%d] from parse_toc_entry!\n"), 2890 toc_kind); 2891 abort (); 2892 break; 2893 } 2894 2895 /* We need to generate a fixup for this expression. */ 2896 if (fc >= MAX_INSN_FIXUPS) 2897 as_fatal (_("too many fixups")); 2898 2899 fixups[fc].reloc = toc_reloc; 2900 fixups[fc].exp = ex; 2901 fixups[fc].opindex = *opindex_ptr; 2902 ++fc; 2903 2904 /* Ok. We've set up the fixup for the instruction. Now make it 2905 look like the constant 0 was found here. */ 2906 ex.X_unsigned = 1; 2907 ex.X_op = O_constant; 2908 ex.X_add_number = 0; 2909 ex.X_add_symbol = NULL; 2910 ex.X_op_symbol = NULL; 2911 } 2912 2913 else 2914 #endif /* TE_PE */ 2915 { 2916 if ((reg_names_p 2917 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0) 2918 || ((operand->flags & PPC_OPERAND_CR_REG) != 0))) 2919 || !register_name (&ex)) 2920 { 2921 char save_lex = lex_type['%']; 2922 2923 if (((operand->flags & PPC_OPERAND_CR_REG) != 0) 2924 || (operand->flags & PPC_OPERAND_CR_BIT) != 0) 2925 { 2926 cr_operand = TRUE; 2927 lex_type['%'] |= LEX_BEGIN_NAME; 2928 } 2929 expression (&ex); 2930 cr_operand = FALSE; 2931 lex_type['%'] = save_lex; 2932 } 2933 } 2934 2935 str = input_line_pointer; 2936 input_line_pointer = hold; 2937 2938 if (ex.X_op == O_illegal) 2939 as_bad (_("illegal operand")); 2940 else if (ex.X_op == O_absent) 2941 as_bad (_("missing operand")); 2942 else if (ex.X_op == O_register) 2943 { 2944 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 2945 ppc_cpu, (char *) NULL, 0); 2946 } 2947 else if (ex.X_op == O_constant) 2948 { 2949 #ifdef OBJ_ELF 2950 /* Allow @HA, @L, @H on constants. */ 2951 bfd_reloc_code_real_type reloc; 2952 char *orig_str = str; 2953 2954 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) 2955 switch (reloc) 2956 { 2957 default: 2958 str = orig_str; 2959 break; 2960 2961 case BFD_RELOC_LO16: 2962 ex.X_add_number &= 0xffff; 2963 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2964 ex.X_add_number = SEX16 (ex.X_add_number); 2965 break; 2966 2967 case BFD_RELOC_HI16: 2968 if (REPORT_OVERFLOW_HI && ppc_obj64) 2969 { 2970 /* PowerPC64 @h is tested for overflow. */ 2971 ex.X_add_number = (addressT) ex.X_add_number >> 16; 2972 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2973 { 2974 addressT sign = (((addressT) -1 >> 16) + 1) >> 1; 2975 ex.X_add_number 2976 = ((addressT) ex.X_add_number ^ sign) - sign; 2977 } 2978 break; 2979 } 2980 /* Fall thru */ 2981 2982 case BFD_RELOC_PPC64_ADDR16_HIGH: 2983 ex.X_add_number = PPC_HI (ex.X_add_number); 2984 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2985 ex.X_add_number = SEX16 (ex.X_add_number); 2986 break; 2987 2988 case BFD_RELOC_HI16_S: 2989 if (REPORT_OVERFLOW_HI && ppc_obj64) 2990 { 2991 /* PowerPC64 @ha is tested for overflow. */ 2992 ex.X_add_number 2993 = ((addressT) ex.X_add_number + 0x8000) >> 16; 2994 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2995 { 2996 addressT sign = (((addressT) -1 >> 16) + 1) >> 1; 2997 ex.X_add_number 2998 = ((addressT) ex.X_add_number ^ sign) - sign; 2999 } 3000 break; 3001 } 3002 /* Fall thru */ 3003 3004 case BFD_RELOC_PPC64_ADDR16_HIGHA: 3005 ex.X_add_number = PPC_HA (ex.X_add_number); 3006 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3007 ex.X_add_number = SEX16 (ex.X_add_number); 3008 break; 3009 3010 case BFD_RELOC_PPC64_HIGHER: 3011 ex.X_add_number = PPC_HIGHER (ex.X_add_number); 3012 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3013 ex.X_add_number = SEX16 (ex.X_add_number); 3014 break; 3015 3016 case BFD_RELOC_PPC64_HIGHER_S: 3017 ex.X_add_number = PPC_HIGHERA (ex.X_add_number); 3018 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3019 ex.X_add_number = SEX16 (ex.X_add_number); 3020 break; 3021 3022 case BFD_RELOC_PPC64_HIGHEST: 3023 ex.X_add_number = PPC_HIGHEST (ex.X_add_number); 3024 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3025 ex.X_add_number = SEX16 (ex.X_add_number); 3026 break; 3027 3028 case BFD_RELOC_PPC64_HIGHEST_S: 3029 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); 3030 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3031 ex.X_add_number = SEX16 (ex.X_add_number); 3032 break; 3033 } 3034 #endif /* OBJ_ELF */ 3035 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 3036 ppc_cpu, (char *) NULL, 0); 3037 } 3038 else 3039 { 3040 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE; 3041 #ifdef OBJ_ELF 3042 if (ex.X_op == O_symbol && str[0] == '(') 3043 { 3044 const char *sym_name = S_GET_NAME (ex.X_add_symbol); 3045 if (sym_name[0] == '.') 3046 ++sym_name; 3047 3048 if (strcasecmp (sym_name, "__tls_get_addr") == 0) 3049 { 3050 expressionS tls_exp; 3051 3052 hold = input_line_pointer; 3053 input_line_pointer = str + 1; 3054 expression (&tls_exp); 3055 if (tls_exp.X_op == O_symbol) 3056 { 3057 reloc = BFD_RELOC_NONE; 3058 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) 3059 { 3060 reloc = BFD_RELOC_PPC_TLSGD; 3061 input_line_pointer += 7; 3062 } 3063 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) 3064 { 3065 reloc = BFD_RELOC_PPC_TLSLD; 3066 input_line_pointer += 7; 3067 } 3068 if (reloc != BFD_RELOC_NONE) 3069 { 3070 SKIP_WHITESPACE (); 3071 str = input_line_pointer; 3072 3073 if (fc >= MAX_INSN_FIXUPS) 3074 as_fatal (_("too many fixups")); 3075 fixups[fc].exp = tls_exp; 3076 fixups[fc].opindex = *opindex_ptr; 3077 fixups[fc].reloc = reloc; 3078 ++fc; 3079 } 3080 } 3081 input_line_pointer = hold; 3082 } 3083 } 3084 3085 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) 3086 { 3087 /* Some TLS tweaks. */ 3088 switch (reloc) 3089 { 3090 default: 3091 break; 3092 3093 case BFD_RELOC_PPC_TLS: 3094 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) 3095 as_bad (_("@tls may not be used with \"%s\" operands"), 3096 opcode->name); 3097 else if (operand->shift != 11) 3098 as_bad (_("@tls may only be used in last operand")); 3099 else 3100 insn = ppc_insert_operand (insn, operand, 3101 ppc_obj64 ? 13 : 2, 3102 ppc_cpu, (char *) NULL, 0); 3103 break; 3104 3105 /* We'll only use the 32 (or 64) bit form of these relocations 3106 in constants. Instructions get the 16 bit form. */ 3107 case BFD_RELOC_PPC_DTPREL: 3108 reloc = BFD_RELOC_PPC_DTPREL16; 3109 break; 3110 case BFD_RELOC_PPC_TPREL: 3111 reloc = BFD_RELOC_PPC_TPREL16; 3112 break; 3113 } 3114 3115 /* addpcis. */ 3116 if (opcode->opcode == (19 << 26) + (2 << 1) 3117 && reloc == BFD_RELOC_HI16_S) 3118 reloc = BFD_RELOC_PPC_REL16DX_HA; 3119 3120 /* If VLE-mode convert LO/HI/HA relocations. */ 3121 if (opcode->flags & PPC_OPCODE_VLE) 3122 { 3123 int tmp_insn = insn & opcode->mask; 3124 3125 int use_d_reloc = (tmp_insn == E_OR2I_INSN 3126 || tmp_insn == E_AND2I_DOT_INSN 3127 || tmp_insn == E_OR2IS_INSN 3128 || tmp_insn == E_LIS_INSN 3129 || tmp_insn == E_AND2IS_DOT_INSN); 3130 3131 3132 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN 3133 || tmp_insn == E_ADD2IS_INSN 3134 || tmp_insn == E_CMP16I_INSN 3135 || tmp_insn == E_MULL2I_INSN 3136 || tmp_insn == E_CMPL16I_INSN 3137 || tmp_insn == E_CMPH16I_INSN 3138 || tmp_insn == E_CMPHL16I_INSN); 3139 3140 switch (reloc) 3141 { 3142 default: 3143 break; 3144 3145 case BFD_RELOC_PPC_EMB_SDA21: 3146 reloc = BFD_RELOC_PPC_VLE_SDA21; 3147 break; 3148 3149 case BFD_RELOC_LO16: 3150 if (use_d_reloc) 3151 reloc = BFD_RELOC_PPC_VLE_LO16D; 3152 else if (use_a_reloc) 3153 reloc = BFD_RELOC_PPC_VLE_LO16A; 3154 break; 3155 3156 case BFD_RELOC_HI16: 3157 if (use_d_reloc) 3158 reloc = BFD_RELOC_PPC_VLE_HI16D; 3159 else if (use_a_reloc) 3160 reloc = BFD_RELOC_PPC_VLE_HI16A; 3161 break; 3162 3163 case BFD_RELOC_HI16_S: 3164 if (use_d_reloc) 3165 reloc = BFD_RELOC_PPC_VLE_HA16D; 3166 else if (use_a_reloc) 3167 reloc = BFD_RELOC_PPC_VLE_HA16A; 3168 break; 3169 3170 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 3171 if (use_d_reloc) 3172 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; 3173 break; 3174 3175 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 3176 if (use_d_reloc) 3177 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; 3178 break; 3179 3180 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 3181 if (use_d_reloc) 3182 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; 3183 break; 3184 } 3185 } 3186 } 3187 #endif /* OBJ_ELF */ 3188 3189 if (reloc != BFD_RELOC_NONE) 3190 ; 3191 /* Determine a BFD reloc value based on the operand information. 3192 We are only prepared to turn a few of the operands into 3193 relocs. */ 3194 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3195 | PPC_OPERAND_ABSOLUTE)) != 0 3196 && operand->bitm == 0x3fffffc 3197 && operand->shift == 0) 3198 reloc = BFD_RELOC_PPC_B26; 3199 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3200 | PPC_OPERAND_ABSOLUTE)) != 0 3201 && operand->bitm == 0xfffc 3202 && operand->shift == 0) 3203 reloc = BFD_RELOC_PPC_B16; 3204 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3205 && operand->bitm == 0x1fe 3206 && operand->shift == -1) 3207 reloc = BFD_RELOC_PPC_VLE_REL8; 3208 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3209 && operand->bitm == 0xfffe 3210 && operand->shift == 0) 3211 reloc = BFD_RELOC_PPC_VLE_REL15; 3212 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3213 && operand->bitm == 0x1fffffe 3214 && operand->shift == 0) 3215 reloc = BFD_RELOC_PPC_VLE_REL24; 3216 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0 3217 && (operand->bitm & 0xfff0) == 0xfff0 3218 && operand->shift == 0) 3219 { 3220 reloc = BFD_RELOC_16; 3221 #if defined OBJ_XCOFF || defined OBJ_ELF 3222 /* Note: the symbol may be not yet defined. */ 3223 if ((operand->flags & PPC_OPERAND_PARENS) != 0 3224 && ppc_is_toc_sym (ex.X_add_symbol)) 3225 { 3226 reloc = BFD_RELOC_PPC_TOC16; 3227 #ifdef OBJ_ELF 3228 as_warn (_("assuming %s on symbol"), 3229 ppc_obj64 ? "@toc" : "@xgot"); 3230 #endif 3231 } 3232 #endif 3233 } 3234 3235 /* For the absolute forms of branches, convert the PC 3236 relative form back into the absolute. */ 3237 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) 3238 { 3239 switch (reloc) 3240 { 3241 case BFD_RELOC_PPC_B26: 3242 reloc = BFD_RELOC_PPC_BA26; 3243 break; 3244 case BFD_RELOC_PPC_B16: 3245 reloc = BFD_RELOC_PPC_BA16; 3246 break; 3247 #ifdef OBJ_ELF 3248 case BFD_RELOC_PPC_B16_BRTAKEN: 3249 reloc = BFD_RELOC_PPC_BA16_BRTAKEN; 3250 break; 3251 case BFD_RELOC_PPC_B16_BRNTAKEN: 3252 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; 3253 break; 3254 #endif 3255 default: 3256 break; 3257 } 3258 } 3259 3260 #ifdef OBJ_ELF 3261 switch (reloc) 3262 { 3263 case BFD_RELOC_PPC_TOC16: 3264 toc_reloc_types |= has_small_toc_reloc; 3265 break; 3266 case BFD_RELOC_PPC64_TOC16_LO: 3267 case BFD_RELOC_PPC64_TOC16_HI: 3268 case BFD_RELOC_PPC64_TOC16_HA: 3269 toc_reloc_types |= has_large_toc_reloc; 3270 break; 3271 default: 3272 break; 3273 } 3274 3275 if (ppc_obj64 3276 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) 3277 { 3278 switch (reloc) 3279 { 3280 case BFD_RELOC_16: 3281 reloc = BFD_RELOC_PPC64_ADDR16_DS; 3282 break; 3283 case BFD_RELOC_LO16: 3284 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; 3285 break; 3286 case BFD_RELOC_16_GOTOFF: 3287 reloc = BFD_RELOC_PPC64_GOT16_DS; 3288 break; 3289 case BFD_RELOC_LO16_GOTOFF: 3290 reloc = BFD_RELOC_PPC64_GOT16_LO_DS; 3291 break; 3292 case BFD_RELOC_LO16_PLTOFF: 3293 reloc = BFD_RELOC_PPC64_PLT16_LO_DS; 3294 break; 3295 case BFD_RELOC_16_BASEREL: 3296 reloc = BFD_RELOC_PPC64_SECTOFF_DS; 3297 break; 3298 case BFD_RELOC_LO16_BASEREL: 3299 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; 3300 break; 3301 case BFD_RELOC_PPC_TOC16: 3302 reloc = BFD_RELOC_PPC64_TOC16_DS; 3303 break; 3304 case BFD_RELOC_PPC64_TOC16_LO: 3305 reloc = BFD_RELOC_PPC64_TOC16_LO_DS; 3306 break; 3307 case BFD_RELOC_PPC64_PLTGOT16: 3308 reloc = BFD_RELOC_PPC64_PLTGOT16_DS; 3309 break; 3310 case BFD_RELOC_PPC64_PLTGOT16_LO: 3311 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; 3312 break; 3313 case BFD_RELOC_PPC_DTPREL16: 3314 reloc = BFD_RELOC_PPC64_DTPREL16_DS; 3315 break; 3316 case BFD_RELOC_PPC_DTPREL16_LO: 3317 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; 3318 break; 3319 case BFD_RELOC_PPC_TPREL16: 3320 reloc = BFD_RELOC_PPC64_TPREL16_DS; 3321 break; 3322 case BFD_RELOC_PPC_TPREL16_LO: 3323 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; 3324 break; 3325 case BFD_RELOC_PPC_GOT_DTPREL16: 3326 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 3327 case BFD_RELOC_PPC_GOT_TPREL16: 3328 case BFD_RELOC_PPC_GOT_TPREL16_LO: 3329 break; 3330 default: 3331 as_bad (_("unsupported relocation for DS offset field")); 3332 break; 3333 } 3334 } 3335 #endif 3336 3337 /* We need to generate a fixup for this expression. */ 3338 if (fc >= MAX_INSN_FIXUPS) 3339 as_fatal (_("too many fixups")); 3340 fixups[fc].exp = ex; 3341 fixups[fc].opindex = *opindex_ptr; 3342 fixups[fc].reloc = reloc; 3343 ++fc; 3344 } 3345 3346 if (need_paren) 3347 { 3348 endc = ')'; 3349 need_paren = 0; 3350 /* If expecting more operands, then we want to see "),". */ 3351 if (*str == endc && opindex_ptr[1] != 0) 3352 { 3353 do 3354 ++str; 3355 while (ISSPACE (*str)); 3356 endc = ','; 3357 } 3358 } 3359 else if ((operand->flags & PPC_OPERAND_PARENS) != 0) 3360 { 3361 endc = '('; 3362 need_paren = 1; 3363 } 3364 else 3365 endc = ','; 3366 3367 /* The call to expression should have advanced str past any 3368 whitespace. */ 3369 if (*str != endc 3370 && (endc != ',' || *str != '\0')) 3371 { 3372 if (*str == '\0') 3373 as_bad (_("syntax error; end of line, expected `%c'"), endc); 3374 else 3375 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); 3376 break; 3377 } 3378 3379 if (*str != '\0') 3380 ++str; 3381 } 3382 3383 while (ISSPACE (*str)) 3384 ++str; 3385 3386 if (*str != '\0') 3387 as_bad (_("junk at end of line: `%s'"), str); 3388 3389 #ifdef OBJ_ELF 3390 /* Do we need/want an APUinfo section? */ 3391 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0 3392 && !ppc_obj64) 3393 { 3394 /* These are all version "1". */ 3395 if (opcode->flags & PPC_OPCODE_SPE) 3396 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); 3397 if (opcode->flags & PPC_OPCODE_ISEL) 3398 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); 3399 if (opcode->flags & PPC_OPCODE_EFS) 3400 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); 3401 if (opcode->flags & PPC_OPCODE_BRLOCK) 3402 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); 3403 if (opcode->flags & PPC_OPCODE_PMR) 3404 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); 3405 if (opcode->flags & PPC_OPCODE_CACHELCK) 3406 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); 3407 if (opcode->flags & PPC_OPCODE_RFMCI) 3408 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); 3409 /* Only set the VLE flag if the instruction has been pulled via 3410 the VLE instruction set. This way the flag is guaranteed to 3411 be set for VLE-only instructions or for VLE-only processors, 3412 however it'll remain clear for dual-mode instructions on 3413 dual-mode and, more importantly, standard-mode processors. */ 3414 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE) 3415 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); 3416 } 3417 #endif 3418 3419 /* Write out the instruction. */ 3420 /* Differentiate between two and four byte insns. */ 3421 if (ppc_mach () == bfd_mach_ppc_vle) 3422 { 3423 if (PPC_OP_SE_VLE (insn)) 3424 insn_length = 2; 3425 else 3426 insn_length = 4; 3427 addr_mod = frag_now_fix () & 1; 3428 } 3429 else 3430 { 3431 insn_length = 4; 3432 addr_mod = frag_now_fix () & 3; 3433 } 3434 /* All instructions can start on a 2 byte boundary for VLE. */ 3435 f = frag_more (insn_length); 3436 if (frag_now->has_code && frag_now->insn_addr != addr_mod) 3437 { 3438 if (ppc_mach() == bfd_mach_ppc_vle) 3439 as_bad (_("instruction address is not a multiple of 2")); 3440 else 3441 as_bad (_("instruction address is not a multiple of 4")); 3442 } 3443 frag_now->insn_addr = addr_mod; 3444 frag_now->has_code = 1; 3445 md_number_to_chars (f, insn, insn_length); 3446 last_insn = insn; 3447 last_seg = now_seg; 3448 last_subseg = now_subseg; 3449 3450 #ifdef OBJ_ELF 3451 dwarf2_emit_insn (insn_length); 3452 #endif 3453 3454 /* Create any fixups. */ 3455 for (i = 0; i < fc; i++) 3456 { 3457 fixS *fixP; 3458 if (fixups[i].reloc != BFD_RELOC_NONE) 3459 { 3460 reloc_howto_type *reloc_howto; 3461 int size; 3462 int offset; 3463 3464 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); 3465 if (!reloc_howto) 3466 abort (); 3467 3468 size = bfd_get_reloc_size (reloc_howto); 3469 offset = target_big_endian ? (insn_length - size) : 0; 3470 3471 fixP = fix_new_exp (frag_now, 3472 f - frag_now->fr_literal + offset, 3473 size, 3474 &fixups[i].exp, 3475 reloc_howto->pc_relative, 3476 fixups[i].reloc); 3477 } 3478 else 3479 { 3480 const struct powerpc_operand *operand; 3481 3482 operand = &powerpc_operands[fixups[i].opindex]; 3483 fixP = fix_new_exp (frag_now, 3484 f - frag_now->fr_literal, 3485 insn_length, 3486 &fixups[i].exp, 3487 (operand->flags & PPC_OPERAND_RELATIVE) != 0, 3488 BFD_RELOC_NONE); 3489 } 3490 fixP->fx_pcrel_adjust = fixups[i].opindex; 3491 } 3492 } 3493 3494 /* Handle a macro. Gather all the operands, transform them as 3495 described by the macro, and call md_assemble recursively. All the 3496 operands are separated by commas; we don't accept parentheses 3497 around operands here. */ 3498 3499 static void 3500 ppc_macro (char *str, const struct powerpc_macro *macro) 3501 { 3502 char *operands[10]; 3503 unsigned int count; 3504 char *s; 3505 unsigned int len; 3506 const char *format; 3507 unsigned int arg; 3508 char *send; 3509 char *complete; 3510 3511 /* Gather the users operands into the operands array. */ 3512 count = 0; 3513 s = str; 3514 while (1) 3515 { 3516 if (count >= sizeof operands / sizeof operands[0]) 3517 break; 3518 operands[count++] = s; 3519 s = strchr (s, ','); 3520 if (s == (char *) NULL) 3521 break; 3522 *s++ = '\0'; 3523 } 3524 3525 if (count != macro->operands) 3526 { 3527 as_bad (_("wrong number of operands")); 3528 return; 3529 } 3530 3531 /* Work out how large the string must be (the size is unbounded 3532 because it includes user input). */ 3533 len = 0; 3534 format = macro->format; 3535 while (*format != '\0') 3536 { 3537 if (*format != '%') 3538 { 3539 ++len; 3540 ++format; 3541 } 3542 else 3543 { 3544 arg = strtol (format + 1, &send, 10); 3545 know (send != format && arg < count); 3546 len += strlen (operands[arg]); 3547 format = send; 3548 } 3549 } 3550 3551 /* Put the string together. */ 3552 complete = s = XNEWVEC (char, len + 1); 3553 format = macro->format; 3554 while (*format != '\0') 3555 { 3556 if (*format != '%') 3557 *s++ = *format++; 3558 else 3559 { 3560 arg = strtol (format + 1, &send, 10); 3561 strcpy (s, operands[arg]); 3562 s += strlen (s); 3563 format = send; 3564 } 3565 } 3566 *s = '\0'; 3567 3568 /* Assemble the constructed instruction. */ 3569 md_assemble (complete); 3570 free (complete); 3571 } 3572 3573 #ifdef OBJ_ELF 3575 /* For ELF, add support for SHT_ORDERED. */ 3576 3577 int 3578 ppc_section_type (char *str, size_t len) 3579 { 3580 if (len == 7 && strncmp (str, "ordered", 7) == 0) 3581 return SHT_ORDERED; 3582 3583 return -1; 3584 } 3585 3586 int 3587 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) 3588 { 3589 if (type == SHT_ORDERED) 3590 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; 3591 3592 return flags; 3593 } 3594 #endif /* OBJ_ELF */ 3595 3596 3597 /* Pseudo-op handling. */ 3599 3600 /* The .byte pseudo-op. This is similar to the normal .byte 3601 pseudo-op, but it can also take a single ASCII string. */ 3602 3603 static void 3604 ppc_byte (int ignore ATTRIBUTE_UNUSED) 3605 { 3606 int count = 0; 3607 3608 if (*input_line_pointer != '\"') 3609 { 3610 cons (1); 3611 return; 3612 } 3613 3614 /* Gather characters. A real double quote is doubled. Unusual 3615 characters are not permitted. */ 3616 ++input_line_pointer; 3617 while (1) 3618 { 3619 char c; 3620 3621 c = *input_line_pointer++; 3622 3623 if (c == '\"') 3624 { 3625 if (*input_line_pointer != '\"') 3626 break; 3627 ++input_line_pointer; 3628 } 3629 3630 FRAG_APPEND_1_CHAR (c); 3631 ++count; 3632 } 3633 3634 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0) 3635 as_warn (_("data in executable section")); 3636 demand_empty_rest_of_line (); 3637 } 3638 3639 #ifdef OBJ_XCOFF 3641 3642 /* XCOFF specific pseudo-op handling. */ 3643 3644 /* This is set if we are creating a .stabx symbol, since we don't want 3645 to handle symbol suffixes for such symbols. */ 3646 static bfd_boolean ppc_stab_symbol; 3647 3648 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common 3649 symbols in the .bss segment as though they were local common 3650 symbols, and uses a different smclas. The native Aix 4.3.3 assembler 3651 aligns .comm and .lcomm to 4 bytes. */ 3652 3653 static void 3654 ppc_comm (int lcomm) 3655 { 3656 asection *current_seg = now_seg; 3657 subsegT current_subseg = now_subseg; 3658 char *name; 3659 char endc; 3660 char *end_name; 3661 offsetT size; 3662 offsetT align; 3663 symbolS *lcomm_sym = NULL; 3664 symbolS *sym; 3665 char *pfrag; 3666 3667 endc = get_symbol_name (&name); 3668 end_name = input_line_pointer; 3669 (void) restore_line_pointer (endc); 3670 3671 if (*input_line_pointer != ',') 3672 { 3673 as_bad (_("missing size")); 3674 ignore_rest_of_line (); 3675 return; 3676 } 3677 ++input_line_pointer; 3678 3679 size = get_absolute_expression (); 3680 if (size < 0) 3681 { 3682 as_bad (_("negative size")); 3683 ignore_rest_of_line (); 3684 return; 3685 } 3686 3687 if (! lcomm) 3688 { 3689 /* The third argument to .comm is the alignment. */ 3690 if (*input_line_pointer != ',') 3691 align = 2; 3692 else 3693 { 3694 ++input_line_pointer; 3695 align = get_absolute_expression (); 3696 if (align <= 0) 3697 { 3698 as_warn (_("ignoring bad alignment")); 3699 align = 2; 3700 } 3701 } 3702 } 3703 else 3704 { 3705 char *lcomm_name; 3706 char lcomm_endc; 3707 3708 /* The third argument to .lcomm appears to be the real local 3709 common symbol to create. References to the symbol named in 3710 the first argument are turned into references to the third 3711 argument. */ 3712 if (*input_line_pointer != ',') 3713 { 3714 as_bad (_("missing real symbol name")); 3715 ignore_rest_of_line (); 3716 return; 3717 } 3718 ++input_line_pointer; 3719 3720 lcomm_endc = get_symbol_name (&lcomm_name); 3721 3722 lcomm_sym = symbol_find_or_make (lcomm_name); 3723 3724 (void) restore_line_pointer (lcomm_endc); 3725 3726 /* The fourth argument to .lcomm is the alignment. */ 3727 if (*input_line_pointer != ',') 3728 { 3729 if (size <= 4) 3730 align = 2; 3731 else 3732 align = 3; 3733 } 3734 else 3735 { 3736 ++input_line_pointer; 3737 align = get_absolute_expression (); 3738 if (align <= 0) 3739 { 3740 as_warn (_("ignoring bad alignment")); 3741 align = 2; 3742 } 3743 } 3744 } 3745 3746 *end_name = '\0'; 3747 sym = symbol_find_or_make (name); 3748 *end_name = endc; 3749 3750 if (S_IS_DEFINED (sym) 3751 || S_GET_VALUE (sym) != 0) 3752 { 3753 as_bad (_("attempt to redefine symbol")); 3754 ignore_rest_of_line (); 3755 return; 3756 } 3757 3758 record_alignment (bss_section, align); 3759 3760 if (! lcomm 3761 || ! S_IS_DEFINED (lcomm_sym)) 3762 { 3763 symbolS *def_sym; 3764 offsetT def_size; 3765 3766 if (! lcomm) 3767 { 3768 def_sym = sym; 3769 def_size = size; 3770 S_SET_EXTERNAL (sym); 3771 } 3772 else 3773 { 3774 symbol_get_tc (lcomm_sym)->output = 1; 3775 def_sym = lcomm_sym; 3776 def_size = 0; 3777 } 3778 3779 subseg_set (bss_section, 1); 3780 frag_align (align, 0, 0); 3781 3782 symbol_set_frag (def_sym, frag_now); 3783 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, 3784 def_size, (char *) NULL); 3785 *pfrag = 0; 3786 S_SET_SEGMENT (def_sym, bss_section); 3787 symbol_get_tc (def_sym)->align = align; 3788 } 3789 else if (lcomm) 3790 { 3791 /* Align the size of lcomm_sym. */ 3792 symbol_get_frag (lcomm_sym)->fr_offset = 3793 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) 3794 &~ ((1 << align) - 1)); 3795 if (align > symbol_get_tc (lcomm_sym)->align) 3796 symbol_get_tc (lcomm_sym)->align = align; 3797 } 3798 3799 if (lcomm) 3800 { 3801 /* Make sym an offset from lcomm_sym. */ 3802 S_SET_SEGMENT (sym, bss_section); 3803 symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); 3804 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); 3805 symbol_get_frag (lcomm_sym)->fr_offset += size; 3806 } 3807 3808 subseg_set (current_seg, current_subseg); 3809 3810 demand_empty_rest_of_line (); 3811 } 3812 3813 /* The .csect pseudo-op. This switches us into a different 3814 subsegment. The first argument is a symbol whose value is the 3815 start of the .csect. In COFF, csect symbols get special aux 3816 entries defined by the x_csect field of union internal_auxent. The 3817 optional second argument is the alignment (the default is 2). */ 3818 3819 static void 3820 ppc_csect (int ignore ATTRIBUTE_UNUSED) 3821 { 3822 char *name; 3823 char endc; 3824 symbolS *sym; 3825 offsetT align; 3826 3827 endc = get_symbol_name (&name); 3828 3829 sym = symbol_find_or_make (name); 3830 3831 (void) restore_line_pointer (endc); 3832 3833 if (S_GET_NAME (sym)[0] == '\0') 3834 { 3835 /* An unnamed csect is assumed to be [PR]. */ 3836 symbol_get_tc (sym)->symbol_class = XMC_PR; 3837 } 3838 3839 align = 2; 3840 if (*input_line_pointer == ',') 3841 { 3842 ++input_line_pointer; 3843 align = get_absolute_expression (); 3844 } 3845 3846 ppc_change_csect (sym, align); 3847 3848 demand_empty_rest_of_line (); 3849 } 3850 3851 /* Change to a different csect. */ 3852 3853 static void 3854 ppc_change_csect (symbolS *sym, offsetT align) 3855 { 3856 if (S_IS_DEFINED (sym)) 3857 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); 3858 else 3859 { 3860 symbolS **list_ptr; 3861 int after_toc; 3862 int hold_chunksize; 3863 symbolS *list; 3864 int is_code; 3865 segT sec; 3866 3867 /* This is a new csect. We need to look at the symbol class to 3868 figure out whether it should go in the text section or the 3869 data section. */ 3870 after_toc = 0; 3871 is_code = 0; 3872 switch (symbol_get_tc (sym)->symbol_class) 3873 { 3874 case XMC_PR: 3875 case XMC_RO: 3876 case XMC_DB: 3877 case XMC_GL: 3878 case XMC_XO: 3879 case XMC_SV: 3880 case XMC_TI: 3881 case XMC_TB: 3882 S_SET_SEGMENT (sym, text_section); 3883 symbol_get_tc (sym)->subseg = ppc_text_subsegment; 3884 ++ppc_text_subsegment; 3885 list_ptr = &ppc_text_csects; 3886 is_code = 1; 3887 break; 3888 case XMC_RW: 3889 case XMC_TC0: 3890 case XMC_TC: 3891 case XMC_DS: 3892 case XMC_UA: 3893 case XMC_BS: 3894 case XMC_UC: 3895 if (ppc_toc_csect != NULL 3896 && (symbol_get_tc (ppc_toc_csect)->subseg + 1 3897 == ppc_data_subsegment)) 3898 after_toc = 1; 3899 S_SET_SEGMENT (sym, data_section); 3900 symbol_get_tc (sym)->subseg = ppc_data_subsegment; 3901 ++ppc_data_subsegment; 3902 list_ptr = &ppc_data_csects; 3903 break; 3904 default: 3905 abort (); 3906 } 3907 3908 /* We set the obstack chunk size to a small value before 3909 changing subsegments, so that we don't use a lot of memory 3910 space for what may be a small section. */ 3911 hold_chunksize = chunksize; 3912 chunksize = 64; 3913 3914 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), 3915 symbol_get_tc (sym)->subseg); 3916 3917 chunksize = hold_chunksize; 3918 3919 if (after_toc) 3920 ppc_after_toc_frag = frag_now; 3921 3922 record_alignment (sec, align); 3923 if (is_code) 3924 frag_align_code (align, 0); 3925 else 3926 frag_align (align, 0, 0); 3927 3928 symbol_set_frag (sym, frag_now); 3929 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 3930 3931 symbol_get_tc (sym)->align = align; 3932 symbol_get_tc (sym)->output = 1; 3933 symbol_get_tc (sym)->within = sym; 3934 3935 for (list = *list_ptr; 3936 symbol_get_tc (list)->next != (symbolS *) NULL; 3937 list = symbol_get_tc (list)->next) 3938 ; 3939 symbol_get_tc (list)->next = sym; 3940 3941 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 3942 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 3943 &symbol_lastP); 3944 } 3945 3946 ppc_current_csect = sym; 3947 } 3948 3949 static void 3950 ppc_change_debug_section (unsigned int idx, subsegT subseg) 3951 { 3952 segT sec; 3953 flagword oldflags; 3954 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; 3955 3956 sec = subseg_new (dw->name, subseg); 3957 oldflags = bfd_get_section_flags (stdoutput, sec); 3958 if (oldflags == SEC_NO_FLAGS) 3959 { 3960 /* Just created section. */ 3961 gas_assert (dw_sections[idx].sect == NULL); 3962 3963 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING); 3964 bfd_set_section_alignment (stdoutput, sec, 0); 3965 dw_sections[idx].sect = sec; 3966 } 3967 3968 /* Not anymore in a csect. */ 3969 ppc_current_csect = NULL; 3970 } 3971 3972 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: 3973 .dwsect flag [, opt-label ] 3974 */ 3975 3976 static void 3977 ppc_dwsect (int ignore ATTRIBUTE_UNUSED) 3978 { 3979 offsetT flag; 3980 symbolS *opt_label; 3981 const struct xcoff_dwsect_name *dw; 3982 struct dw_subsection *subseg; 3983 struct dw_section *dws; 3984 int i; 3985 3986 /* Find section. */ 3987 flag = get_absolute_expression (); 3988 dw = NULL; 3989 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 3990 if (xcoff_dwsect_names[i].flag == flag) 3991 { 3992 dw = &xcoff_dwsect_names[i]; 3993 break; 3994 } 3995 3996 /* Parse opt-label. */ 3997 if (*input_line_pointer == ',') 3998 { 3999 char *label; 4000 char c; 4001 4002 ++input_line_pointer; 4003 4004 c = get_symbol_name (&label); 4005 opt_label = symbol_find_or_make (label); 4006 (void) restore_line_pointer (c); 4007 } 4008 else 4009 opt_label = NULL; 4010 4011 demand_empty_rest_of_line (); 4012 4013 /* Return now in case of unknown subsection. */ 4014 if (dw == NULL) 4015 { 4016 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), 4017 (unsigned)flag); 4018 return; 4019 } 4020 4021 /* Find the subsection. */ 4022 dws = &dw_sections[i]; 4023 subseg = NULL; 4024 if (opt_label != NULL && S_IS_DEFINED (opt_label)) 4025 { 4026 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ 4027 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) 4028 { 4029 as_bad (_("label %s was not defined in this dwarf section"), 4030 S_GET_NAME (opt_label)); 4031 subseg = dws->anon_subseg; 4032 opt_label = NULL; 4033 } 4034 else 4035 subseg = symbol_get_tc (opt_label)->u.dw; 4036 } 4037 4038 if (subseg != NULL) 4039 { 4040 /* Switch to the subsection. */ 4041 ppc_change_debug_section (i, subseg->subseg); 4042 } 4043 else 4044 { 4045 /* Create a new dw subsection. */ 4046 subseg = XNEW (struct dw_subsection); 4047 4048 if (opt_label == NULL) 4049 { 4050 /* The anonymous one. */ 4051 subseg->subseg = 0; 4052 subseg->link = NULL; 4053 dws->anon_subseg = subseg; 4054 } 4055 else 4056 { 4057 /* A named one. */ 4058 if (dws->list_subseg != NULL) 4059 subseg->subseg = dws->list_subseg->subseg + 1; 4060 else 4061 subseg->subseg = 1; 4062 4063 subseg->link = dws->list_subseg; 4064 dws->list_subseg = subseg; 4065 symbol_get_tc (opt_label)->u.dw = subseg; 4066 } 4067 4068 ppc_change_debug_section (i, subseg->subseg); 4069 4070 if (dw->def_size) 4071 { 4072 /* Add the length field. */ 4073 expressionS *exp = &subseg->end_exp; 4074 int sz; 4075 4076 if (opt_label != NULL) 4077 symbol_set_value_now (opt_label); 4078 4079 /* Add the length field. Note that according to the AIX assembler 4080 manual, the size of the length field is 4 for powerpc32 but 4081 12 for powerpc64. */ 4082 if (ppc_obj64) 4083 { 4084 /* Write the 64bit marker. */ 4085 md_number_to_chars (frag_more (4), -1, 4); 4086 } 4087 4088 exp->X_op = O_subtract; 4089 exp->X_op_symbol = symbol_temp_new_now (); 4090 exp->X_add_symbol = symbol_temp_make (); 4091 4092 sz = ppc_obj64 ? 8 : 4; 4093 exp->X_add_number = -sz; 4094 emit_expr (exp, sz); 4095 } 4096 } 4097 } 4098 4099 /* This function handles the .text and .data pseudo-ops. These 4100 pseudo-ops aren't really used by XCOFF; we implement them for the 4101 convenience of people who aren't used to XCOFF. */ 4102 4103 static void 4104 ppc_section (int type) 4105 { 4106 const char *name; 4107 symbolS *sym; 4108 4109 if (type == 't') 4110 name = ".text[PR]"; 4111 else if (type == 'd') 4112 name = ".data[RW]"; 4113 else 4114 abort (); 4115 4116 sym = symbol_find_or_make (name); 4117 4118 ppc_change_csect (sym, 2); 4119 4120 demand_empty_rest_of_line (); 4121 } 4122 4123 /* This function handles the .section pseudo-op. This is mostly to 4124 give an error, since XCOFF only supports .text, .data and .bss, but 4125 we do permit the user to name the text or data section. */ 4126 4127 static void 4128 ppc_named_section (int ignore ATTRIBUTE_UNUSED) 4129 { 4130 char *user_name; 4131 const char *real_name; 4132 char c; 4133 symbolS *sym; 4134 4135 c = get_symbol_name (&user_name); 4136 4137 if (strcmp (user_name, ".text") == 0) 4138 real_name = ".text[PR]"; 4139 else if (strcmp (user_name, ".data") == 0) 4140 real_name = ".data[RW]"; 4141 else 4142 { 4143 as_bad (_("the XCOFF file format does not support arbitrary sections")); 4144 (void) restore_line_pointer (c); 4145 ignore_rest_of_line (); 4146 return; 4147 } 4148 4149 (void) restore_line_pointer (c); 4150 4151 sym = symbol_find_or_make (real_name); 4152 4153 ppc_change_csect (sym, 2); 4154 4155 demand_empty_rest_of_line (); 4156 } 4157 4158 /* The .extern pseudo-op. We create an undefined symbol. */ 4159 4160 static void 4161 ppc_extern (int ignore ATTRIBUTE_UNUSED) 4162 { 4163 char *name; 4164 char endc; 4165 4166 endc = get_symbol_name (&name); 4167 4168 (void) symbol_find_or_make (name); 4169 4170 (void) restore_line_pointer (endc); 4171 4172 demand_empty_rest_of_line (); 4173 } 4174 4175 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ 4176 4177 static void 4178 ppc_lglobl (int ignore ATTRIBUTE_UNUSED) 4179 { 4180 char *name; 4181 char endc; 4182 symbolS *sym; 4183 4184 endc = get_symbol_name (&name); 4185 4186 sym = symbol_find_or_make (name); 4187 4188 (void) restore_line_pointer (endc); 4189 4190 symbol_get_tc (sym)->output = 1; 4191 4192 demand_empty_rest_of_line (); 4193 } 4194 4195 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF 4196 relocations at the beginning of the current csect. 4197 4198 (In principle, there's no reason why the relocations _have_ to be at 4199 the beginning. Anywhere in the csect would do. However, inserting 4200 at the beginning is what the native assmebler does, and it helps to 4201 deal with cases where the .ref statements follow the section contents.) 4202 4203 ??? .refs don't work for empty .csects. However, the native assembler 4204 doesn't report an error in this case, and neither yet do we. */ 4205 4206 static void 4207 ppc_ref (int ignore ATTRIBUTE_UNUSED) 4208 { 4209 char *name; 4210 char c; 4211 4212 if (ppc_current_csect == NULL) 4213 { 4214 as_bad (_(".ref outside .csect")); 4215 ignore_rest_of_line (); 4216 return; 4217 } 4218 4219 do 4220 { 4221 c = get_symbol_name (&name); 4222 4223 fix_at_start (symbol_get_frag (ppc_current_csect), 0, 4224 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE); 4225 4226 *input_line_pointer = c; 4227 SKIP_WHITESPACE_AFTER_NAME (); 4228 c = *input_line_pointer; 4229 if (c == ',') 4230 { 4231 input_line_pointer++; 4232 SKIP_WHITESPACE (); 4233 if (is_end_of_line[(unsigned char) *input_line_pointer]) 4234 { 4235 as_bad (_("missing symbol name")); 4236 ignore_rest_of_line (); 4237 return; 4238 } 4239 } 4240 } 4241 while (c == ','); 4242 4243 demand_empty_rest_of_line (); 4244 } 4245 4246 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, 4247 although I don't know why it bothers. */ 4248 4249 static void 4250 ppc_rename (int ignore ATTRIBUTE_UNUSED) 4251 { 4252 char *name; 4253 char endc; 4254 symbolS *sym; 4255 int len; 4256 4257 endc = get_symbol_name (&name); 4258 4259 sym = symbol_find_or_make (name); 4260 4261 (void) restore_line_pointer (endc); 4262 4263 if (*input_line_pointer != ',') 4264 { 4265 as_bad (_("missing rename string")); 4266 ignore_rest_of_line (); 4267 return; 4268 } 4269 ++input_line_pointer; 4270 4271 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); 4272 4273 demand_empty_rest_of_line (); 4274 } 4275 4276 /* The .stabx pseudo-op. This is similar to a normal .stabs 4277 pseudo-op, but slightly different. A sample is 4278 .stabx "main:F-1",.main,142,0 4279 The first argument is the symbol name to create. The second is the 4280 value, and the third is the storage class. The fourth seems to be 4281 always zero, and I am assuming it is the type. */ 4282 4283 static void 4284 ppc_stabx (int ignore ATTRIBUTE_UNUSED) 4285 { 4286 char *name; 4287 int len; 4288 symbolS *sym; 4289 expressionS exp; 4290 4291 name = demand_copy_C_string (&len); 4292 4293 if (*input_line_pointer != ',') 4294 { 4295 as_bad (_("missing value")); 4296 return; 4297 } 4298 ++input_line_pointer; 4299 4300 ppc_stab_symbol = TRUE; 4301 sym = symbol_make (name); 4302 ppc_stab_symbol = FALSE; 4303 4304 symbol_get_tc (sym)->real_name = name; 4305 4306 (void) expression (&exp); 4307 4308 switch (exp.X_op) 4309 { 4310 case O_illegal: 4311 case O_absent: 4312 case O_big: 4313 as_bad (_("illegal .stabx expression; zero assumed")); 4314 exp.X_add_number = 0; 4315 /* Fall through. */ 4316 case O_constant: 4317 S_SET_VALUE (sym, (valueT) exp.X_add_number); 4318 symbol_set_frag (sym, &zero_address_frag); 4319 break; 4320 4321 case O_symbol: 4322 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) 4323 symbol_set_value_expression (sym, &exp); 4324 else 4325 { 4326 S_SET_VALUE (sym, 4327 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); 4328 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); 4329 } 4330 break; 4331 4332 default: 4333 /* The value is some complex expression. This will probably 4334 fail at some later point, but this is probably the right 4335 thing to do here. */ 4336 symbol_set_value_expression (sym, &exp); 4337 break; 4338 } 4339 4340 S_SET_SEGMENT (sym, ppc_coff_debug_section); 4341 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4342 4343 if (*input_line_pointer != ',') 4344 { 4345 as_bad (_("missing class")); 4346 return; 4347 } 4348 ++input_line_pointer; 4349 4350 S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); 4351 4352 if (*input_line_pointer != ',') 4353 { 4354 as_bad (_("missing type")); 4355 return; 4356 } 4357 ++input_line_pointer; 4358 4359 S_SET_DATA_TYPE (sym, get_absolute_expression ()); 4360 4361 symbol_get_tc (sym)->output = 1; 4362 4363 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 4364 { 4365 /* In this case : 4366 4367 .bs name 4368 .stabx "z",arrays_,133,0 4369 .es 4370 4371 .comm arrays_,13768,3 4372 4373 resolve_symbol_value will copy the exp's "within" into sym's when the 4374 offset is 0. Since this seems to be corner case problem, 4375 only do the correction for storage class C_STSYM. A better solution 4376 would be to have the tc field updated in ppc_symbol_new_hook. */ 4377 4378 if (exp.X_op == O_symbol) 4379 { 4380 if (ppc_current_block == NULL) 4381 as_bad (_(".stabx of storage class stsym must be within .bs/.es")); 4382 4383 symbol_get_tc (sym)->within = ppc_current_block; 4384 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; 4385 } 4386 } 4387 4388 if (exp.X_op != O_symbol 4389 || ! S_IS_EXTERNAL (exp.X_add_symbol) 4390 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) 4391 ppc_frob_label (sym); 4392 else 4393 { 4394 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4395 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); 4396 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) 4397 symbol_get_tc (ppc_current_csect)->within = sym; 4398 } 4399 4400 demand_empty_rest_of_line (); 4401 } 4402 4403 /* The .function pseudo-op. This takes several arguments. The first 4404 argument seems to be the external name of the symbol. The second 4405 argument seems to be the label for the start of the function. gcc 4406 uses the same name for both. I have no idea what the third and 4407 fourth arguments are meant to be. The optional fifth argument is 4408 an expression for the size of the function. In COFF this symbol 4409 gets an aux entry like that used for a csect. */ 4410 4411 static void 4412 ppc_function (int ignore ATTRIBUTE_UNUSED) 4413 { 4414 char *name; 4415 char endc; 4416 char *s; 4417 symbolS *ext_sym; 4418 symbolS *lab_sym; 4419 4420 endc = get_symbol_name (&name); 4421 4422 /* Ignore any [PR] suffix. */ 4423 name = ppc_canonicalize_symbol_name (name); 4424 s = strchr (name, '['); 4425 if (s != (char *) NULL 4426 && strcmp (s + 1, "PR]") == 0) 4427 *s = '\0'; 4428 4429 ext_sym = symbol_find_or_make (name); 4430 4431 (void) restore_line_pointer (endc); 4432 4433 if (*input_line_pointer != ',') 4434 { 4435 as_bad (_("missing symbol name")); 4436 ignore_rest_of_line (); 4437 return; 4438 } 4439 ++input_line_pointer; 4440 4441 endc = get_symbol_name (&name); 4442 4443 lab_sym = symbol_find_or_make (name); 4444 4445 (void) restore_line_pointer (endc); 4446 4447 if (ext_sym != lab_sym) 4448 { 4449 expressionS exp; 4450 4451 exp.X_op = O_symbol; 4452 exp.X_add_symbol = lab_sym; 4453 exp.X_op_symbol = NULL; 4454 exp.X_add_number = 0; 4455 exp.X_unsigned = 0; 4456 symbol_set_value_expression (ext_sym, &exp); 4457 } 4458 4459 if (symbol_get_tc (ext_sym)->symbol_class == -1) 4460 symbol_get_tc (ext_sym)->symbol_class = XMC_PR; 4461 symbol_get_tc (ext_sym)->output = 1; 4462 4463 if (*input_line_pointer == ',') 4464 { 4465 expressionS exp; 4466 4467 /* Ignore the third argument. */ 4468 ++input_line_pointer; 4469 expression (& exp); 4470 if (*input_line_pointer == ',') 4471 { 4472 /* Ignore the fourth argument. */ 4473 ++input_line_pointer; 4474 expression (& exp); 4475 if (*input_line_pointer == ',') 4476 { 4477 /* The fifth argument is the function size. */ 4478 ++input_line_pointer; 4479 symbol_get_tc (ext_sym)->u.size = symbol_new 4480 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag); 4481 pseudo_set (symbol_get_tc (ext_sym)->u.size); 4482 } 4483 } 4484 } 4485 4486 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 4487 SF_SET_FUNCTION (ext_sym); 4488 SF_SET_PROCESS (ext_sym); 4489 coff_add_linesym (ext_sym); 4490 4491 demand_empty_rest_of_line (); 4492 } 4493 4494 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named 4495 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym 4496 with the correct line number */ 4497 4498 static symbolS *saved_bi_sym = 0; 4499 4500 static void 4501 ppc_bf (int ignore ATTRIBUTE_UNUSED) 4502 { 4503 symbolS *sym; 4504 4505 sym = symbol_make (".bf"); 4506 S_SET_SEGMENT (sym, text_section); 4507 symbol_set_frag (sym, frag_now); 4508 S_SET_VALUE (sym, frag_now_fix ()); 4509 S_SET_STORAGE_CLASS (sym, C_FCN); 4510 4511 coff_line_base = get_absolute_expression (); 4512 4513 S_SET_NUMBER_AUXILIARY (sym, 1); 4514 SA_SET_SYM_LNNO (sym, coff_line_base); 4515 4516 /* Line number for bi. */ 4517 if (saved_bi_sym) 4518 { 4519 S_SET_VALUE (saved_bi_sym, coff_n_line_nos); 4520 saved_bi_sym = 0; 4521 } 4522 4523 4524 symbol_get_tc (sym)->output = 1; 4525 4526 ppc_frob_label (sym); 4527 4528 demand_empty_rest_of_line (); 4529 } 4530 4531 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named 4532 ".ef", except that the line number is absolute, not relative to the 4533 most recent ".bf" symbol. */ 4534 4535 static void 4536 ppc_ef (int ignore ATTRIBUTE_UNUSED) 4537 { 4538 symbolS *sym; 4539 4540 sym = symbol_make (".ef"); 4541 S_SET_SEGMENT (sym, text_section); 4542 symbol_set_frag (sym, frag_now); 4543 S_SET_VALUE (sym, frag_now_fix ()); 4544 S_SET_STORAGE_CLASS (sym, C_FCN); 4545 S_SET_NUMBER_AUXILIARY (sym, 1); 4546 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 4547 symbol_get_tc (sym)->output = 1; 4548 4549 ppc_frob_label (sym); 4550 4551 demand_empty_rest_of_line (); 4552 } 4553 4554 /* The .bi and .ei pseudo-ops. These take a string argument and 4555 generates a C_BINCL or C_EINCL symbol, which goes at the start of 4556 the symbol list. The value of .bi will be know when the next .bf 4557 is encountered. */ 4558 4559 static void 4560 ppc_biei (int ei) 4561 { 4562 static symbolS *last_biei; 4563 4564 char *name; 4565 int len; 4566 symbolS *sym; 4567 symbolS *look; 4568 4569 name = demand_copy_C_string (&len); 4570 4571 /* The value of these symbols is actually file offset. Here we set 4572 the value to the index into the line number entries. In 4573 ppc_frob_symbols we set the fix_line field, which will cause BFD 4574 to do the right thing. */ 4575 4576 sym = symbol_make (name); 4577 /* obj-coff.c currently only handles line numbers correctly in the 4578 .text section. */ 4579 S_SET_SEGMENT (sym, text_section); 4580 S_SET_VALUE (sym, coff_n_line_nos); 4581 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4582 4583 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); 4584 symbol_get_tc (sym)->output = 1; 4585 4586 /* Save bi. */ 4587 if (ei) 4588 saved_bi_sym = 0; 4589 else 4590 saved_bi_sym = sym; 4591 4592 for (look = last_biei ? last_biei : symbol_rootP; 4593 (look != (symbolS *) NULL 4594 && (S_GET_STORAGE_CLASS (look) == C_FILE 4595 || S_GET_STORAGE_CLASS (look) == C_BINCL 4596 || S_GET_STORAGE_CLASS (look) == C_EINCL)); 4597 look = symbol_next (look)) 4598 ; 4599 if (look != (symbolS *) NULL) 4600 { 4601 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4602 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); 4603 last_biei = sym; 4604 } 4605 4606 demand_empty_rest_of_line (); 4607 } 4608 4609 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". 4610 There is one argument, which is a csect symbol. The value of the 4611 .bs symbol is the index of this csect symbol. */ 4612 4613 static void 4614 ppc_bs (int ignore ATTRIBUTE_UNUSED) 4615 { 4616 char *name; 4617 char endc; 4618 symbolS *csect; 4619 symbolS *sym; 4620 4621 if (ppc_current_block != NULL) 4622 as_bad (_("nested .bs blocks")); 4623 4624 endc = get_symbol_name (&name); 4625 4626 csect = symbol_find_or_make (name); 4627 4628 (void) restore_line_pointer (endc); 4629 4630 sym = symbol_make (".bs"); 4631 S_SET_SEGMENT (sym, now_seg); 4632 S_SET_STORAGE_CLASS (sym, C_BSTAT); 4633 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4634 symbol_get_tc (sym)->output = 1; 4635 4636 symbol_get_tc (sym)->within = csect; 4637 4638 ppc_frob_label (sym); 4639 4640 ppc_current_block = sym; 4641 4642 demand_empty_rest_of_line (); 4643 } 4644 4645 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ 4646 4647 static void 4648 ppc_es (int ignore ATTRIBUTE_UNUSED) 4649 { 4650 symbolS *sym; 4651 4652 if (ppc_current_block == NULL) 4653 as_bad (_(".es without preceding .bs")); 4654 4655 sym = symbol_make (".es"); 4656 S_SET_SEGMENT (sym, now_seg); 4657 S_SET_STORAGE_CLASS (sym, C_ESTAT); 4658 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4659 symbol_get_tc (sym)->output = 1; 4660 4661 ppc_frob_label (sym); 4662 4663 ppc_current_block = NULL; 4664 4665 demand_empty_rest_of_line (); 4666 } 4667 4668 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a 4669 line number. */ 4670 4671 static void 4672 ppc_bb (int ignore ATTRIBUTE_UNUSED) 4673 { 4674 symbolS *sym; 4675 4676 sym = symbol_make (".bb"); 4677 S_SET_SEGMENT (sym, text_section); 4678 symbol_set_frag (sym, frag_now); 4679 S_SET_VALUE (sym, frag_now_fix ()); 4680 S_SET_STORAGE_CLASS (sym, C_BLOCK); 4681 4682 S_SET_NUMBER_AUXILIARY (sym, 1); 4683 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 4684 4685 symbol_get_tc (sym)->output = 1; 4686 4687 SF_SET_PROCESS (sym); 4688 4689 ppc_frob_label (sym); 4690 4691 demand_empty_rest_of_line (); 4692 } 4693 4694 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a 4695 line number. */ 4696 4697 static void 4698 ppc_eb (int ignore ATTRIBUTE_UNUSED) 4699 { 4700 symbolS *sym; 4701 4702 sym = symbol_make (".eb"); 4703 S_SET_SEGMENT (sym, text_section); 4704 symbol_set_frag (sym, frag_now); 4705 S_SET_VALUE (sym, frag_now_fix ()); 4706 S_SET_STORAGE_CLASS (sym, C_BLOCK); 4707 S_SET_NUMBER_AUXILIARY (sym, 1); 4708 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 4709 symbol_get_tc (sym)->output = 1; 4710 4711 SF_SET_PROCESS (sym); 4712 4713 ppc_frob_label (sym); 4714 4715 demand_empty_rest_of_line (); 4716 } 4717 4718 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a 4719 specified name. */ 4720 4721 static void 4722 ppc_bc (int ignore ATTRIBUTE_UNUSED) 4723 { 4724 char *name; 4725 int len; 4726 symbolS *sym; 4727 4728 name = demand_copy_C_string (&len); 4729 sym = symbol_make (name); 4730 S_SET_SEGMENT (sym, ppc_coff_debug_section); 4731 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4732 S_SET_STORAGE_CLASS (sym, C_BCOMM); 4733 S_SET_VALUE (sym, 0); 4734 symbol_get_tc (sym)->output = 1; 4735 4736 ppc_frob_label (sym); 4737 4738 demand_empty_rest_of_line (); 4739 } 4740 4741 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ 4742 4743 static void 4744 ppc_ec (int ignore ATTRIBUTE_UNUSED) 4745 { 4746 symbolS *sym; 4747 4748 sym = symbol_make (".ec"); 4749 S_SET_SEGMENT (sym, ppc_coff_debug_section); 4750 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4751 S_SET_STORAGE_CLASS (sym, C_ECOMM); 4752 S_SET_VALUE (sym, 0); 4753 symbol_get_tc (sym)->output = 1; 4754 4755 ppc_frob_label (sym); 4756 4757 demand_empty_rest_of_line (); 4758 } 4759 4760 /* The .toc pseudo-op. Switch to the .toc subsegment. */ 4761 4762 static void 4763 ppc_toc (int ignore ATTRIBUTE_UNUSED) 4764 { 4765 if (ppc_toc_csect != (symbolS *) NULL) 4766 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); 4767 else 4768 { 4769 subsegT subseg; 4770 symbolS *sym; 4771 symbolS *list; 4772 4773 subseg = ppc_data_subsegment; 4774 ++ppc_data_subsegment; 4775 4776 subseg_new (segment_name (data_section), subseg); 4777 ppc_toc_frag = frag_now; 4778 4779 sym = symbol_find_or_make ("TOC[TC0]"); 4780 symbol_set_frag (sym, frag_now); 4781 S_SET_SEGMENT (sym, data_section); 4782 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 4783 symbol_get_tc (sym)->subseg = subseg; 4784 symbol_get_tc (sym)->output = 1; 4785 symbol_get_tc (sym)->within = sym; 4786 4787 ppc_toc_csect = sym; 4788 4789 for (list = ppc_data_csects; 4790 symbol_get_tc (list)->next != (symbolS *) NULL; 4791 list = symbol_get_tc (list)->next) 4792 ; 4793 symbol_get_tc (list)->next = sym; 4794 4795 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4796 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 4797 &symbol_lastP); 4798 } 4799 4800 ppc_current_csect = ppc_toc_csect; 4801 4802 demand_empty_rest_of_line (); 4803 } 4804 4805 /* The AIX assembler automatically aligns the operands of a .long or 4806 .short pseudo-op, and we want to be compatible. */ 4807 4808 static void 4809 ppc_xcoff_cons (int log_size) 4810 { 4811 frag_align (log_size, 0, 0); 4812 record_alignment (now_seg, log_size); 4813 cons (1 << log_size); 4814 } 4815 4816 static void 4817 ppc_vbyte (int dummy ATTRIBUTE_UNUSED) 4818 { 4819 expressionS exp; 4820 int byte_count; 4821 4822 (void) expression (&exp); 4823 4824 if (exp.X_op != O_constant) 4825 { 4826 as_bad (_("non-constant byte count")); 4827 return; 4828 } 4829 4830 byte_count = exp.X_add_number; 4831 4832 if (*input_line_pointer != ',') 4833 { 4834 as_bad (_("missing value")); 4835 return; 4836 } 4837 4838 ++input_line_pointer; 4839 cons (byte_count); 4840 } 4841 4842 void 4843 ppc_xcoff_end (void) 4844 { 4845 int i; 4846 4847 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 4848 { 4849 struct dw_section *dws = &dw_sections[i]; 4850 struct dw_subsection *dwss; 4851 4852 if (dws->anon_subseg) 4853 { 4854 dwss = dws->anon_subseg; 4855 dwss->link = dws->list_subseg; 4856 } 4857 else 4858 dwss = dws->list_subseg; 4859 4860 for (; dwss != NULL; dwss = dwss->link) 4861 if (dwss->end_exp.X_add_symbol != NULL) 4862 { 4863 subseg_set (dws->sect, dwss->subseg); 4864 symbol_set_value_now (dwss->end_exp.X_add_symbol); 4865 } 4866 } 4867 } 4868 4869 #endif /* OBJ_XCOFF */ 4870 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 4871 4872 /* The .tc pseudo-op. This is used when generating either XCOFF or 4874 ELF. This takes two or more arguments. 4875 4876 When generating XCOFF output, the first argument is the name to 4877 give to this location in the toc; this will be a symbol with class 4878 TC. The rest of the arguments are N-byte values to actually put at 4879 this location in the TOC; often there is just one more argument, a 4880 relocatable symbol reference. The size of the value to store 4881 depends on target word size. A 32-bit target uses 4-byte values, a 4882 64-bit target uses 8-byte values. 4883 4884 When not generating XCOFF output, the arguments are the same, but 4885 the first argument is simply ignored. */ 4886 4887 static void 4888 ppc_tc (int ignore ATTRIBUTE_UNUSED) 4889 { 4890 #ifdef OBJ_XCOFF 4891 4892 /* Define the TOC symbol name. */ 4893 { 4894 char *name; 4895 char endc; 4896 symbolS *sym; 4897 4898 if (ppc_toc_csect == (symbolS *) NULL 4899 || ppc_toc_csect != ppc_current_csect) 4900 { 4901 as_bad (_(".tc not in .toc section")); 4902 ignore_rest_of_line (); 4903 return; 4904 } 4905 4906 endc = get_symbol_name (&name); 4907 4908 sym = symbol_find_or_make (name); 4909 4910 (void) restore_line_pointer (endc); 4911 4912 if (S_IS_DEFINED (sym)) 4913 { 4914 symbolS *label; 4915 4916 label = symbol_get_tc (ppc_current_csect)->within; 4917 if (symbol_get_tc (label)->symbol_class != XMC_TC0) 4918 { 4919 as_bad (_(".tc with no label")); 4920 ignore_rest_of_line (); 4921 return; 4922 } 4923 4924 S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); 4925 symbol_set_frag (label, symbol_get_frag (sym)); 4926 S_SET_VALUE (label, S_GET_VALUE (sym)); 4927 4928 while (! is_end_of_line[(unsigned char) *input_line_pointer]) 4929 ++input_line_pointer; 4930 4931 return; 4932 } 4933 4934 S_SET_SEGMENT (sym, now_seg); 4935 symbol_set_frag (sym, frag_now); 4936 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 4937 symbol_get_tc (sym)->symbol_class = XMC_TC; 4938 symbol_get_tc (sym)->output = 1; 4939 4940 ppc_frob_label (sym); 4941 } 4942 4943 #endif /* OBJ_XCOFF */ 4944 #ifdef OBJ_ELF 4945 int align; 4946 4947 /* Skip the TOC symbol name. */ 4948 while (is_part_of_name (*input_line_pointer) 4949 || *input_line_pointer == ' ' 4950 || *input_line_pointer == '[' 4951 || *input_line_pointer == ']' 4952 || *input_line_pointer == '{' 4953 || *input_line_pointer == '}') 4954 ++input_line_pointer; 4955 4956 /* Align to a four/eight byte boundary. */ 4957 align = ppc_obj64 ? 3 : 2; 4958 frag_align (align, 0, 0); 4959 record_alignment (now_seg, align); 4960 #endif /* OBJ_ELF */ 4961 4962 if (*input_line_pointer != ',') 4963 demand_empty_rest_of_line (); 4964 else 4965 { 4966 ++input_line_pointer; 4967 cons (ppc_obj64 ? 8 : 4); 4968 } 4969 } 4970 4971 /* Pseudo-op .machine. */ 4972 4973 static void 4974 ppc_machine (int ignore ATTRIBUTE_UNUSED) 4975 { 4976 char c; 4977 char *cpu_string; 4978 #define MAX_HISTORY 100 4979 static ppc_cpu_t *cpu_history; 4980 static int curr_hist; 4981 4982 SKIP_WHITESPACE (); 4983 4984 c = get_symbol_name (&cpu_string); 4985 cpu_string = xstrdup (cpu_string); 4986 (void) restore_line_pointer (c); 4987 4988 if (cpu_string != NULL) 4989 { 4990 ppc_cpu_t old_cpu = ppc_cpu; 4991 ppc_cpu_t new_cpu; 4992 char *p; 4993 4994 for (p = cpu_string; *p != 0; p++) 4995 *p = TOLOWER (*p); 4996 4997 if (strcmp (cpu_string, "push") == 0) 4998 { 4999 if (cpu_history == NULL) 5000 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY); 5001 5002 if (curr_hist >= MAX_HISTORY) 5003 as_bad (_(".machine stack overflow")); 5004 else 5005 cpu_history[curr_hist++] = ppc_cpu; 5006 } 5007 else if (strcmp (cpu_string, "pop") == 0) 5008 { 5009 if (curr_hist <= 0) 5010 as_bad (_(".machine stack underflow")); 5011 else 5012 ppc_cpu = cpu_history[--curr_hist]; 5013 } 5014 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0) 5015 ppc_cpu = new_cpu; 5016 else 5017 as_bad (_("invalid machine `%s'"), cpu_string); 5018 5019 if (ppc_cpu != old_cpu) 5020 ppc_setup_opcodes (); 5021 } 5022 5023 demand_empty_rest_of_line (); 5024 } 5025 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 5026 5027 #ifdef TE_PE 5029 5030 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ 5031 5032 /* Set the current section. */ 5033 static void 5034 ppc_set_current_section (segT new) 5035 { 5036 ppc_previous_section = ppc_current_section; 5037 ppc_current_section = new; 5038 } 5039 5040 /* pseudo-op: .previous 5041 behaviour: toggles the current section with the previous section. 5042 errors: None 5043 warnings: "No previous section" */ 5044 5045 static void 5046 ppc_previous (int ignore ATTRIBUTE_UNUSED) 5047 { 5048 if (ppc_previous_section == NULL) 5049 { 5050 as_warn (_("no previous section to return to, ignored.")); 5051 return; 5052 } 5053 5054 subseg_set (ppc_previous_section, 0); 5055 5056 ppc_set_current_section (ppc_previous_section); 5057 } 5058 5059 /* pseudo-op: .pdata 5060 behaviour: predefined read only data section 5061 double word aligned 5062 errors: None 5063 warnings: None 5064 initial: .section .pdata "adr3" 5065 a - don't know -- maybe a misprint 5066 d - initialized data 5067 r - readable 5068 3 - double word aligned (that would be 4 byte boundary) 5069 5070 commentary: 5071 Tag index tables (also known as the function table) for exception 5072 handling, debugging, etc. */ 5073 5074 static void 5075 ppc_pdata (int ignore ATTRIBUTE_UNUSED) 5076 { 5077 if (pdata_section == 0) 5078 { 5079 pdata_section = subseg_new (".pdata", 0); 5080 5081 bfd_set_section_flags (stdoutput, pdata_section, 5082 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5083 | SEC_READONLY | SEC_DATA )); 5084 5085 bfd_set_section_alignment (stdoutput, pdata_section, 2); 5086 } 5087 else 5088 { 5089 pdata_section = subseg_new (".pdata", 0); 5090 } 5091 ppc_set_current_section (pdata_section); 5092 } 5093 5094 /* pseudo-op: .ydata 5095 behaviour: predefined read only data section 5096 double word aligned 5097 errors: None 5098 warnings: None 5099 initial: .section .ydata "drw3" 5100 a - don't know -- maybe a misprint 5101 d - initialized data 5102 r - readable 5103 3 - double word aligned (that would be 4 byte boundary) 5104 commentary: 5105 Tag tables (also known as the scope table) for exception handling, 5106 debugging, etc. */ 5107 5108 static void 5109 ppc_ydata (int ignore ATTRIBUTE_UNUSED) 5110 { 5111 if (ydata_section == 0) 5112 { 5113 ydata_section = subseg_new (".ydata", 0); 5114 bfd_set_section_flags (stdoutput, ydata_section, 5115 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5116 | SEC_READONLY | SEC_DATA )); 5117 5118 bfd_set_section_alignment (stdoutput, ydata_section, 3); 5119 } 5120 else 5121 { 5122 ydata_section = subseg_new (".ydata", 0); 5123 } 5124 ppc_set_current_section (ydata_section); 5125 } 5126 5127 /* pseudo-op: .reldata 5128 behaviour: predefined read write data section 5129 double word aligned (4-byte) 5130 FIXME: relocation is applied to it 5131 FIXME: what's the difference between this and .data? 5132 errors: None 5133 warnings: None 5134 initial: .section .reldata "drw3" 5135 d - initialized data 5136 r - readable 5137 w - writeable 5138 3 - double word aligned (that would be 8 byte boundary) 5139 5140 commentary: 5141 Like .data, but intended to hold data subject to relocation, such as 5142 function descriptors, etc. */ 5143 5144 static void 5145 ppc_reldata (int ignore ATTRIBUTE_UNUSED) 5146 { 5147 if (reldata_section == 0) 5148 { 5149 reldata_section = subseg_new (".reldata", 0); 5150 5151 bfd_set_section_flags (stdoutput, reldata_section, 5152 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5153 | SEC_DATA)); 5154 5155 bfd_set_section_alignment (stdoutput, reldata_section, 2); 5156 } 5157 else 5158 { 5159 reldata_section = subseg_new (".reldata", 0); 5160 } 5161 ppc_set_current_section (reldata_section); 5162 } 5163 5164 /* pseudo-op: .rdata 5165 behaviour: predefined read only data section 5166 double word aligned 5167 errors: None 5168 warnings: None 5169 initial: .section .rdata "dr3" 5170 d - initialized data 5171 r - readable 5172 3 - double word aligned (that would be 4 byte boundary) */ 5173 5174 static void 5175 ppc_rdata (int ignore ATTRIBUTE_UNUSED) 5176 { 5177 if (rdata_section == 0) 5178 { 5179 rdata_section = subseg_new (".rdata", 0); 5180 bfd_set_section_flags (stdoutput, rdata_section, 5181 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5182 | SEC_READONLY | SEC_DATA )); 5183 5184 bfd_set_section_alignment (stdoutput, rdata_section, 2); 5185 } 5186 else 5187 { 5188 rdata_section = subseg_new (".rdata", 0); 5189 } 5190 ppc_set_current_section (rdata_section); 5191 } 5192 5193 /* pseudo-op: .ualong 5194 behaviour: much like .int, with the exception that no alignment is 5195 performed. 5196 FIXME: test the alignment statement 5197 errors: None 5198 warnings: None */ 5199 5200 static void 5201 ppc_ualong (int ignore ATTRIBUTE_UNUSED) 5202 { 5203 /* Try for long. */ 5204 cons (4); 5205 } 5206 5207 /* pseudo-op: .znop <symbol name> 5208 behaviour: Issue a nop instruction 5209 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using 5210 the supplied symbol name. 5211 errors: None 5212 warnings: Missing symbol name */ 5213 5214 static void 5215 ppc_znop (int ignore ATTRIBUTE_UNUSED) 5216 { 5217 unsigned long insn; 5218 const struct powerpc_opcode *opcode; 5219 char *f; 5220 symbolS *sym; 5221 char *symbol_name; 5222 char c; 5223 char *name; 5224 5225 /* Strip out the symbol name. */ 5226 c = get_symbol_name (&symbol_name); 5227 5228 name = xstrdup (symbol_name); 5229 5230 sym = symbol_find_or_make (name); 5231 5232 *input_line_pointer = c; 5233 5234 SKIP_WHITESPACE_AFTER_NAME (); 5235 5236 /* Look up the opcode in the hash table. */ 5237 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); 5238 5239 /* Stick in the nop. */ 5240 insn = opcode->opcode; 5241 5242 /* Write out the instruction. */ 5243 f = frag_more (4); 5244 md_number_to_chars (f, insn, 4); 5245 fix_new (frag_now, 5246 f - frag_now->fr_literal, 5247 4, 5248 sym, 5249 0, 5250 0, 5251 BFD_RELOC_16_GOT_PCREL); 5252 5253 } 5254 5255 /* pseudo-op: 5256 behaviour: 5257 errors: 5258 warnings: */ 5259 5260 static void 5261 ppc_pe_comm (int lcomm) 5262 { 5263 char *name; 5264 char c; 5265 char *p; 5266 offsetT temp; 5267 symbolS *symbolP; 5268 offsetT align; 5269 5270 c = get_symbol_name (&name); 5271 5272 /* just after name is now '\0'. */ 5273 p = input_line_pointer; 5274 *p = c; 5275 SKIP_WHITESPACE_AFTER_NAME (); 5276 if (*input_line_pointer != ',') 5277 { 5278 as_bad (_("expected comma after symbol-name: rest of line ignored.")); 5279 ignore_rest_of_line (); 5280 return; 5281 } 5282 5283 input_line_pointer++; /* skip ',' */ 5284 if ((temp = get_absolute_expression ()) < 0) 5285 { 5286 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); 5287 ignore_rest_of_line (); 5288 return; 5289 } 5290 5291 if (! lcomm) 5292 { 5293 /* The third argument to .comm is the alignment. */ 5294 if (*input_line_pointer != ',') 5295 align = 3; 5296 else 5297 { 5298 ++input_line_pointer; 5299 align = get_absolute_expression (); 5300 if (align <= 0) 5301 { 5302 as_warn (_("ignoring bad alignment")); 5303 align = 3; 5304 } 5305 } 5306 } 5307 5308 *p = 0; 5309 symbolP = symbol_find_or_make (name); 5310 5311 *p = c; 5312 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 5313 { 5314 as_bad (_("ignoring attempt to re-define symbol `%s'."), 5315 S_GET_NAME (symbolP)); 5316 ignore_rest_of_line (); 5317 return; 5318 } 5319 5320 if (S_GET_VALUE (symbolP)) 5321 { 5322 if (S_GET_VALUE (symbolP) != (valueT) temp) 5323 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."), 5324 S_GET_NAME (symbolP), 5325 (long) S_GET_VALUE (symbolP), 5326 (long) temp); 5327 } 5328 else 5329 { 5330 S_SET_VALUE (symbolP, (valueT) temp); 5331 S_SET_EXTERNAL (symbolP); 5332 S_SET_SEGMENT (symbolP, bfd_com_section_ptr); 5333 } 5334 5335 demand_empty_rest_of_line (); 5336 } 5337 5338 /* 5339 * implement the .section pseudo op: 5340 * .section name {, "flags"} 5341 * ^ ^ 5342 * | +--- optional flags: 'b' for bss 5343 * | 'i' for info 5344 * +-- section name 'l' for lib 5345 * 'n' for noload 5346 * 'o' for over 5347 * 'w' for data 5348 * 'd' (apparently m88k for data) 5349 * 'x' for text 5350 * But if the argument is not a quoted string, treat it as a 5351 * subsegment number. 5352 * 5353 * FIXME: this is a copy of the section processing from obj-coff.c, with 5354 * additions/changes for the moto-pas assembler support. There are three 5355 * categories: 5356 * 5357 * FIXME: I just noticed this. This doesn't work at all really. It it 5358 * setting bits that bfd probably neither understands or uses. The 5359 * correct approach (?) will have to incorporate extra fields attached 5360 * to the section to hold the system specific stuff. (krk) 5361 * 5362 * Section Contents: 5363 * 'a' - unknown - referred to in documentation, but no definition supplied 5364 * 'c' - section has code 5365 * 'd' - section has initialized data 5366 * 'u' - section has uninitialized data 5367 * 'i' - section contains directives (info) 5368 * 'n' - section can be discarded 5369 * 'R' - remove section at link time 5370 * 5371 * Section Protection: 5372 * 'r' - section is readable 5373 * 'w' - section is writeable 5374 * 'x' - section is executable 5375 * 's' - section is sharable 5376 * 5377 * Section Alignment: 5378 * '0' - align to byte boundary 5379 * '1' - align to halfword undary 5380 * '2' - align to word boundary 5381 * '3' - align to doubleword boundary 5382 * '4' - align to quadword boundary 5383 * '5' - align to 32 byte boundary 5384 * '6' - align to 64 byte boundary 5385 * 5386 */ 5387 5388 void 5389 ppc_pe_section (int ignore ATTRIBUTE_UNUSED) 5390 { 5391 /* Strip out the section name. */ 5392 char *section_name; 5393 char c; 5394 char *name; 5395 unsigned int exp; 5396 flagword flags; 5397 segT sec; 5398 int align; 5399 5400 c = get_symbol_name (§ion_name); 5401 5402 name = xstrdup (section_name); 5403 5404 *input_line_pointer = c; 5405 5406 SKIP_WHITESPACE_AFTER_NAME (); 5407 5408 exp = 0; 5409 flags = SEC_NO_FLAGS; 5410 5411 if (strcmp (name, ".idata$2") == 0) 5412 { 5413 align = 0; 5414 } 5415 else if (strcmp (name, ".idata$3") == 0) 5416 { 5417 align = 0; 5418 } 5419 else if (strcmp (name, ".idata$4") == 0) 5420 { 5421 align = 2; 5422 } 5423 else if (strcmp (name, ".idata$5") == 0) 5424 { 5425 align = 2; 5426 } 5427 else if (strcmp (name, ".idata$6") == 0) 5428 { 5429 align = 1; 5430 } 5431 else 5432 /* Default alignment to 16 byte boundary. */ 5433 align = 4; 5434 5435 if (*input_line_pointer == ',') 5436 { 5437 ++input_line_pointer; 5438 SKIP_WHITESPACE (); 5439 if (*input_line_pointer != '"') 5440 exp = get_absolute_expression (); 5441 else 5442 { 5443 ++input_line_pointer; 5444 while (*input_line_pointer != '"' 5445 && ! is_end_of_line[(unsigned char) *input_line_pointer]) 5446 { 5447 switch (*input_line_pointer) 5448 { 5449 /* Section Contents */ 5450 case 'a': /* unknown */ 5451 as_bad (_("unsupported section attribute -- 'a'")); 5452 break; 5453 case 'c': /* code section */ 5454 flags |= SEC_CODE; 5455 break; 5456 case 'd': /* section has initialized data */ 5457 flags |= SEC_DATA; 5458 break; 5459 case 'u': /* section has uninitialized data */ 5460 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA 5461 in winnt.h */ 5462 flags |= SEC_ROM; 5463 break; 5464 case 'i': /* section contains directives (info) */ 5465 /* FIXME: This is IMAGE_SCN_LNK_INFO 5466 in winnt.h */ 5467 flags |= SEC_HAS_CONTENTS; 5468 break; 5469 case 'n': /* section can be discarded */ 5470 flags &=~ SEC_LOAD; 5471 break; 5472 case 'R': /* Remove section at link time */ 5473 flags |= SEC_NEVER_LOAD; 5474 break; 5475 #if IFLICT_BRAIN_DAMAGE 5476 /* Section Protection */ 5477 case 'r': /* section is readable */ 5478 flags |= IMAGE_SCN_MEM_READ; 5479 break; 5480 case 'w': /* section is writeable */ 5481 flags |= IMAGE_SCN_MEM_WRITE; 5482 break; 5483 case 'x': /* section is executable */ 5484 flags |= IMAGE_SCN_MEM_EXECUTE; 5485 break; 5486 case 's': /* section is sharable */ 5487 flags |= IMAGE_SCN_MEM_SHARED; 5488 break; 5489 5490 /* Section Alignment */ 5491 case '0': /* align to byte boundary */ 5492 flags |= IMAGE_SCN_ALIGN_1BYTES; 5493 align = 0; 5494 break; 5495 case '1': /* align to halfword boundary */ 5496 flags |= IMAGE_SCN_ALIGN_2BYTES; 5497 align = 1; 5498 break; 5499 case '2': /* align to word boundary */ 5500 flags |= IMAGE_SCN_ALIGN_4BYTES; 5501 align = 2; 5502 break; 5503 case '3': /* align to doubleword boundary */ 5504 flags |= IMAGE_SCN_ALIGN_8BYTES; 5505 align = 3; 5506 break; 5507 case '4': /* align to quadword boundary */ 5508 flags |= IMAGE_SCN_ALIGN_16BYTES; 5509 align = 4; 5510 break; 5511 case '5': /* align to 32 byte boundary */ 5512 flags |= IMAGE_SCN_ALIGN_32BYTES; 5513 align = 5; 5514 break; 5515 case '6': /* align to 64 byte boundary */ 5516 flags |= IMAGE_SCN_ALIGN_64BYTES; 5517 align = 6; 5518 break; 5519 #endif 5520 default: 5521 as_bad (_("unknown section attribute '%c'"), 5522 *input_line_pointer); 5523 break; 5524 } 5525 ++input_line_pointer; 5526 } 5527 if (*input_line_pointer == '"') 5528 ++input_line_pointer; 5529 } 5530 } 5531 5532 sec = subseg_new (name, (subsegT) exp); 5533 5534 ppc_set_current_section (sec); 5535 5536 if (flags != SEC_NO_FLAGS) 5537 { 5538 if (! bfd_set_section_flags (stdoutput, sec, flags)) 5539 as_bad (_("error setting flags for \"%s\": %s"), 5540 bfd_section_name (stdoutput, sec), 5541 bfd_errmsg (bfd_get_error ())); 5542 } 5543 5544 bfd_set_section_alignment (stdoutput, sec, align); 5545 } 5546 5547 static void 5548 ppc_pe_function (int ignore ATTRIBUTE_UNUSED) 5549 { 5550 char *name; 5551 char endc; 5552 symbolS *ext_sym; 5553 5554 endc = get_symbol_name (&name); 5555 5556 ext_sym = symbol_find_or_make (name); 5557 5558 (void) restore_line_pointer (endc); 5559 5560 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 5561 SF_SET_FUNCTION (ext_sym); 5562 SF_SET_PROCESS (ext_sym); 5563 coff_add_linesym (ext_sym); 5564 5565 demand_empty_rest_of_line (); 5566 } 5567 5568 static void 5569 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED) 5570 { 5571 if (tocdata_section == 0) 5572 { 5573 tocdata_section = subseg_new (".tocd", 0); 5574 /* FIXME: section flags won't work. */ 5575 bfd_set_section_flags (stdoutput, tocdata_section, 5576 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5577 | SEC_READONLY | SEC_DATA)); 5578 5579 bfd_set_section_alignment (stdoutput, tocdata_section, 2); 5580 } 5581 else 5582 { 5583 rdata_section = subseg_new (".tocd", 0); 5584 } 5585 5586 ppc_set_current_section (tocdata_section); 5587 5588 demand_empty_rest_of_line (); 5589 } 5590 5591 /* Don't adjust TOC relocs to use the section symbol. */ 5592 5593 int 5594 ppc_pe_fix_adjustable (fixS *fix) 5595 { 5596 return fix->fx_r_type != BFD_RELOC_PPC_TOC16; 5597 } 5598 5599 #endif 5600 5601 #ifdef OBJ_XCOFF 5603 5604 /* XCOFF specific symbol and file handling. */ 5605 5606 /* Canonicalize the symbol name. We use the to force the suffix, if 5607 any, to use square brackets, and to be in upper case. */ 5608 5609 char * 5610 ppc_canonicalize_symbol_name (char *name) 5611 { 5612 char *s; 5613 5614 if (ppc_stab_symbol) 5615 return name; 5616 5617 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) 5618 ; 5619 if (*s != '\0') 5620 { 5621 char brac; 5622 5623 if (*s == '[') 5624 brac = ']'; 5625 else 5626 { 5627 *s = '['; 5628 brac = '}'; 5629 } 5630 5631 for (s++; *s != '\0' && *s != brac; s++) 5632 *s = TOUPPER (*s); 5633 5634 if (*s == '\0' || s[1] != '\0') 5635 as_bad (_("bad symbol suffix")); 5636 5637 *s = ']'; 5638 } 5639 5640 return name; 5641 } 5642 5643 /* Set the class of a symbol based on the suffix, if any. This is 5644 called whenever a new symbol is created. */ 5645 5646 void 5647 ppc_symbol_new_hook (symbolS *sym) 5648 { 5649 struct ppc_tc_sy *tc; 5650 const char *s; 5651 5652 tc = symbol_get_tc (sym); 5653 tc->next = NULL; 5654 tc->output = 0; 5655 tc->symbol_class = -1; 5656 tc->real_name = NULL; 5657 tc->subseg = 0; 5658 tc->align = 0; 5659 tc->u.size = NULL; 5660 tc->u.dw = NULL; 5661 tc->within = NULL; 5662 5663 if (ppc_stab_symbol) 5664 return; 5665 5666 s = strchr (S_GET_NAME (sym), '['); 5667 if (s == (const char *) NULL) 5668 { 5669 /* There is no suffix. */ 5670 return; 5671 } 5672 5673 ++s; 5674 5675 switch (s[0]) 5676 { 5677 case 'B': 5678 if (strcmp (s, "BS]") == 0) 5679 tc->symbol_class = XMC_BS; 5680 break; 5681 case 'D': 5682 if (strcmp (s, "DB]") == 0) 5683 tc->symbol_class = XMC_DB; 5684 else if (strcmp (s, "DS]") == 0) 5685 tc->symbol_class = XMC_DS; 5686 break; 5687 case 'G': 5688 if (strcmp (s, "GL]") == 0) 5689 tc->symbol_class = XMC_GL; 5690 break; 5691 case 'P': 5692 if (strcmp (s, "PR]") == 0) 5693 tc->symbol_class = XMC_PR; 5694 break; 5695 case 'R': 5696 if (strcmp (s, "RO]") == 0) 5697 tc->symbol_class = XMC_RO; 5698 else if (strcmp (s, "RW]") == 0) 5699 tc->symbol_class = XMC_RW; 5700 break; 5701 case 'S': 5702 if (strcmp (s, "SV]") == 0) 5703 tc->symbol_class = XMC_SV; 5704 break; 5705 case 'T': 5706 if (strcmp (s, "TC]") == 0) 5707 tc->symbol_class = XMC_TC; 5708 else if (strcmp (s, "TI]") == 0) 5709 tc->symbol_class = XMC_TI; 5710 else if (strcmp (s, "TB]") == 0) 5711 tc->symbol_class = XMC_TB; 5712 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) 5713 tc->symbol_class = XMC_TC0; 5714 break; 5715 case 'U': 5716 if (strcmp (s, "UA]") == 0) 5717 tc->symbol_class = XMC_UA; 5718 else if (strcmp (s, "UC]") == 0) 5719 tc->symbol_class = XMC_UC; 5720 break; 5721 case 'X': 5722 if (strcmp (s, "XO]") == 0) 5723 tc->symbol_class = XMC_XO; 5724 break; 5725 } 5726 5727 if (tc->symbol_class == -1) 5728 as_bad (_("unrecognized symbol suffix")); 5729 } 5730 5731 /* Set the class of a label based on where it is defined. This 5732 handles symbols without suffixes. Also, move the symbol so that it 5733 follows the csect symbol. */ 5734 5735 void 5736 ppc_frob_label (symbolS *sym) 5737 { 5738 if (ppc_current_csect != (symbolS *) NULL) 5739 { 5740 if (symbol_get_tc (sym)->symbol_class == -1) 5741 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; 5742 5743 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5744 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, 5745 &symbol_rootP, &symbol_lastP); 5746 symbol_get_tc (ppc_current_csect)->within = sym; 5747 symbol_get_tc (sym)->within = ppc_current_csect; 5748 } 5749 5750 #ifdef OBJ_ELF 5751 dwarf2_emit_label (sym); 5752 #endif 5753 } 5754 5755 /* This variable is set by ppc_frob_symbol if any absolute symbols are 5756 seen. It tells ppc_adjust_symtab whether it needs to look through 5757 the symbols. */ 5758 5759 static bfd_boolean ppc_saw_abs; 5760 5761 /* Change the name of a symbol just before writing it out. Set the 5762 real name if the .rename pseudo-op was used. Otherwise, remove any 5763 class suffix. Return 1 if the symbol should not be included in the 5764 symbol table. */ 5765 5766 int 5767 ppc_frob_symbol (symbolS *sym) 5768 { 5769 static symbolS *ppc_last_function; 5770 static symbolS *set_end; 5771 5772 /* Discard symbols that should not be included in the output symbol 5773 table. */ 5774 if (! symbol_used_in_reloc_p (sym) 5775 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 5776 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 5777 && ! symbol_get_tc (sym)->output 5778 && S_GET_STORAGE_CLASS (sym) != C_FILE))) 5779 return 1; 5780 5781 /* This one will disappear anyway. Don't make a csect sym for it. */ 5782 if (sym == abs_section_sym) 5783 return 1; 5784 5785 if (symbol_get_tc (sym)->real_name != (char *) NULL) 5786 S_SET_NAME (sym, symbol_get_tc (sym)->real_name); 5787 else 5788 { 5789 const char *name; 5790 const char *s; 5791 5792 name = S_GET_NAME (sym); 5793 s = strchr (name, '['); 5794 if (s != (char *) NULL) 5795 { 5796 unsigned int len; 5797 char *snew; 5798 5799 len = s - name; 5800 snew = xstrndup (name, len); 5801 5802 S_SET_NAME (sym, snew); 5803 } 5804 } 5805 5806 if (set_end != (symbolS *) NULL) 5807 { 5808 SA_SET_SYM_ENDNDX (set_end, sym); 5809 set_end = NULL; 5810 } 5811 5812 if (SF_GET_FUNCTION (sym)) 5813 { 5814 if (ppc_last_function != (symbolS *) NULL) 5815 as_bad (_("two .function pseudo-ops with no intervening .ef")); 5816 ppc_last_function = sym; 5817 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) 5818 { 5819 resolve_symbol_value (symbol_get_tc (sym)->u.size); 5820 SA_SET_SYM_FSIZE (sym, 5821 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); 5822 } 5823 } 5824 else if (S_GET_STORAGE_CLASS (sym) == C_FCN 5825 && strcmp (S_GET_NAME (sym), ".ef") == 0) 5826 { 5827 if (ppc_last_function == (symbolS *) NULL) 5828 as_bad (_(".ef with no preceding .function")); 5829 else 5830 { 5831 set_end = ppc_last_function; 5832 ppc_last_function = NULL; 5833 5834 /* We don't have a C_EFCN symbol, but we need to force the 5835 COFF backend to believe that it has seen one. */ 5836 coff_last_function = NULL; 5837 } 5838 } 5839 5840 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 5841 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 5842 && S_GET_STORAGE_CLASS (sym) != C_FILE 5843 && S_GET_STORAGE_CLASS (sym) != C_FCN 5844 && S_GET_STORAGE_CLASS (sym) != C_BLOCK 5845 && S_GET_STORAGE_CLASS (sym) != C_BSTAT 5846 && S_GET_STORAGE_CLASS (sym) != C_ESTAT 5847 && S_GET_STORAGE_CLASS (sym) != C_BINCL 5848 && S_GET_STORAGE_CLASS (sym) != C_EINCL 5849 && S_GET_SEGMENT (sym) != ppc_coff_debug_section) 5850 S_SET_STORAGE_CLASS (sym, C_HIDEXT); 5851 5852 if (S_GET_STORAGE_CLASS (sym) == C_EXT 5853 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT 5854 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) 5855 { 5856 int i; 5857 union internal_auxent *a; 5858 5859 /* Create a csect aux. */ 5860 i = S_GET_NUMBER_AUXILIARY (sym); 5861 S_SET_NUMBER_AUXILIARY (sym, i + 1); 5862 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; 5863 if (symbol_get_tc (sym)->symbol_class == XMC_TC0) 5864 { 5865 /* This is the TOC table. */ 5866 know (strcmp (S_GET_NAME (sym), "TOC") == 0); 5867 a->x_csect.x_scnlen.l = 0; 5868 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 5869 } 5870 else if (symbol_get_tc (sym)->subseg != 0) 5871 { 5872 /* This is a csect symbol. x_scnlen is the size of the 5873 csect. */ 5874 if (symbol_get_tc (sym)->next == (symbolS *) NULL) 5875 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, 5876 S_GET_SEGMENT (sym)) 5877 - S_GET_VALUE (sym)); 5878 else 5879 { 5880 resolve_symbol_value (symbol_get_tc (sym)->next); 5881 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) 5882 - S_GET_VALUE (sym)); 5883 } 5884 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; 5885 } 5886 else if (S_GET_SEGMENT (sym) == bss_section) 5887 { 5888 /* This is a common symbol. */ 5889 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; 5890 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; 5891 if (S_IS_EXTERNAL (sym)) 5892 symbol_get_tc (sym)->symbol_class = XMC_RW; 5893 else 5894 symbol_get_tc (sym)->symbol_class = XMC_BS; 5895 } 5896 else if (S_GET_SEGMENT (sym) == absolute_section) 5897 { 5898 /* This is an absolute symbol. The csect will be created by 5899 ppc_adjust_symtab. */ 5900 ppc_saw_abs = TRUE; 5901 a->x_csect.x_smtyp = XTY_LD; 5902 if (symbol_get_tc (sym)->symbol_class == -1) 5903 symbol_get_tc (sym)->symbol_class = XMC_XO; 5904 } 5905 else if (! S_IS_DEFINED (sym)) 5906 { 5907 /* This is an external symbol. */ 5908 a->x_csect.x_scnlen.l = 0; 5909 a->x_csect.x_smtyp = XTY_ER; 5910 } 5911 else if (symbol_get_tc (sym)->symbol_class == XMC_TC) 5912 { 5913 symbolS *next; 5914 5915 /* This is a TOC definition. x_scnlen is the size of the 5916 TOC entry. */ 5917 next = symbol_next (sym); 5918 while (symbol_get_tc (next)->symbol_class == XMC_TC0) 5919 next = symbol_next (next); 5920 if (next == (symbolS *) NULL 5921 || symbol_get_tc (next)->symbol_class != XMC_TC) 5922 { 5923 if (ppc_after_toc_frag == (fragS *) NULL) 5924 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, 5925 data_section) 5926 - S_GET_VALUE (sym)); 5927 else 5928 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address 5929 - S_GET_VALUE (sym)); 5930 } 5931 else 5932 { 5933 resolve_symbol_value (next); 5934 a->x_csect.x_scnlen.l = (S_GET_VALUE (next) 5935 - S_GET_VALUE (sym)); 5936 } 5937 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 5938 } 5939 else 5940 { 5941 symbolS *csect; 5942 5943 /* This is a normal symbol definition. x_scnlen is the 5944 symbol index of the containing csect. */ 5945 if (S_GET_SEGMENT (sym) == text_section) 5946 csect = ppc_text_csects; 5947 else if (S_GET_SEGMENT (sym) == data_section) 5948 csect = ppc_data_csects; 5949 else 5950 abort (); 5951 5952 /* Skip the initial dummy symbol. */ 5953 csect = symbol_get_tc (csect)->next; 5954 5955 if (csect == (symbolS *) NULL) 5956 { 5957 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); 5958 a->x_csect.x_scnlen.l = 0; 5959 } 5960 else 5961 { 5962 while (symbol_get_tc (csect)->next != (symbolS *) NULL) 5963 { 5964 resolve_symbol_value (symbol_get_tc (csect)->next); 5965 if (S_GET_VALUE (symbol_get_tc (csect)->next) 5966 > S_GET_VALUE (sym)) 5967 break; 5968 csect = symbol_get_tc (csect)->next; 5969 } 5970 5971 a->x_csect.x_scnlen.p = 5972 coffsymbol (symbol_get_bfdsym (csect))->native; 5973 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = 5974 1; 5975 } 5976 a->x_csect.x_smtyp = XTY_LD; 5977 } 5978 5979 a->x_csect.x_parmhash = 0; 5980 a->x_csect.x_snhash = 0; 5981 if (symbol_get_tc (sym)->symbol_class == -1) 5982 a->x_csect.x_smclas = XMC_PR; 5983 else 5984 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; 5985 a->x_csect.x_stab = 0; 5986 a->x_csect.x_snstab = 0; 5987 5988 /* Don't let the COFF backend resort these symbols. */ 5989 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; 5990 } 5991 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) 5992 { 5993 /* We want the value to be the symbol index of the referenced 5994 csect symbol. BFD will do that for us if we set the right 5995 flags. */ 5996 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); 5997 combined_entry_type *c = coffsymbol (bsym)->native; 5998 5999 S_SET_VALUE (sym, (valueT) (size_t) c); 6000 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; 6001 } 6002 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 6003 { 6004 symbolS *block; 6005 valueT base; 6006 6007 block = symbol_get_tc (sym)->within; 6008 if (block) 6009 { 6010 /* The value is the offset from the enclosing csect. */ 6011 symbolS *csect; 6012 6013 csect = symbol_get_tc (block)->within; 6014 resolve_symbol_value (csect); 6015 base = S_GET_VALUE (csect); 6016 } 6017 else 6018 base = 0; 6019 6020 S_SET_VALUE (sym, S_GET_VALUE (sym) - base); 6021 } 6022 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL 6023 || S_GET_STORAGE_CLASS (sym) == C_EINCL) 6024 { 6025 /* We want the value to be a file offset into the line numbers. 6026 BFD will do that for us if we set the right flags. We have 6027 already set the value correctly. */ 6028 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; 6029 } 6030 6031 return 0; 6032 } 6033 6034 /* Adjust the symbol table. This creates csect symbols for all 6035 absolute symbols. */ 6036 6037 void 6038 ppc_adjust_symtab (void) 6039 { 6040 symbolS *sym; 6041 6042 if (! ppc_saw_abs) 6043 return; 6044 6045 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) 6046 { 6047 symbolS *csect; 6048 int i; 6049 union internal_auxent *a; 6050 6051 if (S_GET_SEGMENT (sym) != absolute_section) 6052 continue; 6053 6054 csect = symbol_create (".abs[XO]", absolute_section, 6055 S_GET_VALUE (sym), &zero_address_frag); 6056 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); 6057 S_SET_STORAGE_CLASS (csect, C_HIDEXT); 6058 i = S_GET_NUMBER_AUXILIARY (csect); 6059 S_SET_NUMBER_AUXILIARY (csect, i + 1); 6060 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; 6061 a->x_csect.x_scnlen.l = 0; 6062 a->x_csect.x_smtyp = XTY_SD; 6063 a->x_csect.x_parmhash = 0; 6064 a->x_csect.x_snhash = 0; 6065 a->x_csect.x_smclas = XMC_XO; 6066 a->x_csect.x_stab = 0; 6067 a->x_csect.x_snstab = 0; 6068 6069 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); 6070 6071 i = S_GET_NUMBER_AUXILIARY (sym); 6072 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; 6073 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; 6074 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; 6075 } 6076 6077 ppc_saw_abs = FALSE; 6078 } 6079 6080 /* Set the VMA for a section. This is called on all the sections in 6081 turn. */ 6082 6083 void 6084 ppc_frob_section (asection *sec) 6085 { 6086 static bfd_vma vma = 0; 6087 6088 /* Dwarf sections start at 0. */ 6089 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING) 6090 return; 6091 6092 vma = md_section_align (sec, vma); 6093 bfd_set_section_vma (stdoutput, sec, vma); 6094 vma += bfd_section_size (stdoutput, sec); 6095 } 6096 6097 #endif /* OBJ_XCOFF */ 6098 6099 const char * 6101 md_atof (int type, char *litp, int *sizep) 6102 { 6103 return ieee_md_atof (type, litp, sizep, target_big_endian); 6104 } 6105 6106 /* Write a value out to the object file, using the appropriate 6107 endianness. */ 6108 6109 void 6110 md_number_to_chars (char *buf, valueT val, int n) 6111 { 6112 if (target_big_endian) 6113 number_to_chars_bigendian (buf, val, n); 6114 else 6115 number_to_chars_littleendian (buf, val, n); 6116 } 6117 6118 /* Align a section (I don't know why this is machine dependent). */ 6119 6120 valueT 6121 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) 6122 { 6123 #ifdef OBJ_ELF 6124 return addr; 6125 #else 6126 int align = bfd_get_section_alignment (stdoutput, seg); 6127 6128 return ((addr + (1 << align) - 1) & -(1 << align)); 6129 #endif 6130 } 6131 6132 /* We don't have any form of relaxing. */ 6133 6134 int 6135 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, 6136 asection *seg ATTRIBUTE_UNUSED) 6137 { 6138 abort (); 6139 return 0; 6140 } 6141 6142 /* Convert a machine dependent frag. We never generate these. */ 6143 6144 void 6145 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 6146 asection *sec ATTRIBUTE_UNUSED, 6147 fragS *fragp ATTRIBUTE_UNUSED) 6148 { 6149 abort (); 6150 } 6151 6152 /* We have no need to default values of symbols. */ 6153 6154 symbolS * 6155 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 6156 { 6157 return 0; 6158 } 6159 6160 /* Functions concerning relocs. */ 6162 6163 /* The location from which a PC relative jump should be calculated, 6164 given a PC relative reloc. */ 6165 6166 long 6167 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) 6168 { 6169 return fixp->fx_frag->fr_address + fixp->fx_where; 6170 } 6171 6172 #ifdef OBJ_XCOFF 6173 6174 /* This is called to see whether a fixup should be adjusted to use a 6175 section symbol. We take the opportunity to change a fixup against 6176 a symbol in the TOC subsegment into a reloc against the 6177 corresponding .tc symbol. */ 6178 6179 int 6180 ppc_fix_adjustable (fixS *fix) 6181 { 6182 valueT val = resolve_symbol_value (fix->fx_addsy); 6183 segT symseg = S_GET_SEGMENT (fix->fx_addsy); 6184 TC_SYMFIELD_TYPE *tc; 6185 6186 if (symseg == absolute_section) 6187 return 0; 6188 6189 /* Always adjust symbols in debugging sections. */ 6190 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING) 6191 return 1; 6192 6193 if (ppc_toc_csect != (symbolS *) NULL 6194 && fix->fx_addsy != ppc_toc_csect 6195 && symseg == data_section 6196 && val >= ppc_toc_frag->fr_address 6197 && (ppc_after_toc_frag == (fragS *) NULL 6198 || val < ppc_after_toc_frag->fr_address)) 6199 { 6200 symbolS *sy; 6201 6202 for (sy = symbol_next (ppc_toc_csect); 6203 sy != (symbolS *) NULL; 6204 sy = symbol_next (sy)) 6205 { 6206 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); 6207 6208 if (sy_tc->symbol_class == XMC_TC0) 6209 continue; 6210 if (sy_tc->symbol_class != XMC_TC) 6211 break; 6212 if (val == resolve_symbol_value (sy)) 6213 { 6214 fix->fx_addsy = sy; 6215 fix->fx_addnumber = val - ppc_toc_frag->fr_address; 6216 return 0; 6217 } 6218 } 6219 6220 as_bad_where (fix->fx_file, fix->fx_line, 6221 _("symbol in .toc does not match any .tc")); 6222 } 6223 6224 /* Possibly adjust the reloc to be against the csect. */ 6225 tc = symbol_get_tc (fix->fx_addsy); 6226 if (tc->subseg == 0 6227 && tc->symbol_class != XMC_TC0 6228 && tc->symbol_class != XMC_TC 6229 && symseg != bss_section 6230 /* Don't adjust if this is a reloc in the toc section. */ 6231 && (symseg != data_section 6232 || ppc_toc_csect == NULL 6233 || val < ppc_toc_frag->fr_address 6234 || (ppc_after_toc_frag != NULL 6235 && val >= ppc_after_toc_frag->fr_address))) 6236 { 6237 symbolS *csect = tc->within; 6238 6239 /* If the symbol was not declared by a label (eg: a section symbol), 6240 use the section instead of the csect. This doesn't happen in 6241 normal AIX assembly code. */ 6242 if (csect == NULL) 6243 csect = seg_info (symseg)->sym; 6244 6245 fix->fx_offset += val - symbol_get_frag (csect)->fr_address; 6246 fix->fx_addsy = csect; 6247 6248 return 0; 6249 } 6250 6251 /* Adjust a reloc against a .lcomm symbol to be against the base 6252 .lcomm. */ 6253 if (symseg == bss_section 6254 && ! S_IS_EXTERNAL (fix->fx_addsy)) 6255 { 6256 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; 6257 6258 fix->fx_offset += val - resolve_symbol_value (sy); 6259 fix->fx_addsy = sy; 6260 } 6261 6262 return 0; 6263 } 6264 6265 /* A reloc from one csect to another must be kept. The assembler 6266 will, of course, keep relocs between sections, and it will keep 6267 absolute relocs, but we need to force it to keep PC relative relocs 6268 between two csects in the same section. */ 6269 6270 int 6271 ppc_force_relocation (fixS *fix) 6272 { 6273 /* At this point fix->fx_addsy should already have been converted to 6274 a csect symbol. If the csect does not include the fragment, then 6275 we need to force the relocation. */ 6276 if (fix->fx_pcrel 6277 && fix->fx_addsy != NULL 6278 && symbol_get_tc (fix->fx_addsy)->subseg != 0 6279 && ((symbol_get_frag (fix->fx_addsy)->fr_address 6280 > fix->fx_frag->fr_address) 6281 || (symbol_get_tc (fix->fx_addsy)->next != NULL 6282 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address 6283 <= fix->fx_frag->fr_address)))) 6284 return 1; 6285 6286 return generic_force_reloc (fix); 6287 } 6288 6289 void 6290 ppc_new_dot_label (symbolS *sym) 6291 { 6292 /* Anchor this label to the current csect for relocations. */ 6293 symbol_get_tc (sym)->within = ppc_current_csect; 6294 } 6295 6296 #endif /* OBJ_XCOFF */ 6297 6298 #ifdef OBJ_ELF 6299 /* If this function returns non-zero, it guarantees that a relocation 6300 will be emitted for a fixup. */ 6301 6302 int 6303 ppc_force_relocation (fixS *fix) 6304 { 6305 /* Branch prediction relocations must force a relocation, as must 6306 the vtable description relocs. */ 6307 switch (fix->fx_r_type) 6308 { 6309 case BFD_RELOC_PPC_B16_BRTAKEN: 6310 case BFD_RELOC_PPC_B16_BRNTAKEN: 6311 case BFD_RELOC_PPC_BA16_BRTAKEN: 6312 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6313 case BFD_RELOC_24_PLT_PCREL: 6314 case BFD_RELOC_PPC64_TOC: 6315 return 1; 6316 case BFD_RELOC_PPC_B26: 6317 case BFD_RELOC_PPC_BA26: 6318 case BFD_RELOC_PPC_B16: 6319 case BFD_RELOC_PPC_BA16: 6320 /* All branch fixups targeting a localentry symbol must 6321 force a relocation. */ 6322 if (fix->fx_addsy) 6323 { 6324 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 6325 elf_symbol_type *elfsym 6326 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 6327 gas_assert (elfsym); 6328 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 6329 return 1; 6330 } 6331 break; 6332 default: 6333 break; 6334 } 6335 6336 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS 6337 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA) 6338 return 1; 6339 6340 return generic_force_reloc (fix); 6341 } 6342 6343 int 6344 ppc_fix_adjustable (fixS *fix) 6345 { 6346 switch (fix->fx_r_type) 6347 { 6348 /* All branch fixups targeting a localentry symbol must 6349 continue using the symbol. */ 6350 case BFD_RELOC_PPC_B26: 6351 case BFD_RELOC_PPC_BA26: 6352 case BFD_RELOC_PPC_B16: 6353 case BFD_RELOC_PPC_BA16: 6354 case BFD_RELOC_PPC_B16_BRTAKEN: 6355 case BFD_RELOC_PPC_B16_BRNTAKEN: 6356 case BFD_RELOC_PPC_BA16_BRTAKEN: 6357 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6358 if (fix->fx_addsy) 6359 { 6360 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 6361 elf_symbol_type *elfsym 6362 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 6363 gas_assert (elfsym); 6364 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 6365 return 0; 6366 } 6367 break; 6368 default: 6369 break; 6370 } 6371 6372 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF 6373 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF 6374 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF 6375 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 6376 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS 6377 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS 6378 && fix->fx_r_type != BFD_RELOC_GPREL16 6379 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT 6380 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY 6381 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS 6382 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)); 6383 } 6384 #endif 6385 6386 void 6387 ppc_frag_check (struct frag *fragP) 6388 { 6389 if (!fragP->has_code) 6390 return; 6391 6392 if (ppc_mach() == bfd_mach_ppc_vle) 6393 { 6394 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0) 6395 as_bad (_("instruction address is not a multiple of 2")); 6396 } 6397 else 6398 { 6399 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0) 6400 as_bad (_("instruction address is not a multiple of 4")); 6401 } 6402 } 6403 6404 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an 6405 rs_align_code frag. */ 6406 6407 void 6408 ppc_handle_align (struct frag *fragP) 6409 { 6410 valueT count = (fragP->fr_next->fr_address 6411 - (fragP->fr_address + fragP->fr_fix)); 6412 6413 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0) 6414 { 6415 char *dest = fragP->fr_literal + fragP->fr_fix; 6416 6417 fragP->fr_var = 2; 6418 md_number_to_chars (dest, 0x4400, 2); 6419 } 6420 else if (count != 0 && (count & 3) == 0) 6421 { 6422 char *dest = fragP->fr_literal + fragP->fr_fix; 6423 6424 fragP->fr_var = 4; 6425 6426 if (count > 4 * nop_limit && count < 0x2000000) 6427 { 6428 struct frag *rest; 6429 6430 /* Make a branch, then follow with nops. Insert another 6431 frag to handle the nops. */ 6432 md_number_to_chars (dest, 0x48000000 + count, 4); 6433 count -= 4; 6434 if (count == 0) 6435 return; 6436 6437 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); 6438 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); 6439 fragP->fr_next = rest; 6440 fragP = rest; 6441 rest->fr_address += rest->fr_fix + 4; 6442 rest->fr_fix = 0; 6443 /* If we leave the next frag as rs_align_code we'll come here 6444 again, resulting in a bunch of branches rather than a 6445 branch followed by nops. */ 6446 rest->fr_type = rs_align; 6447 dest = rest->fr_literal; 6448 } 6449 6450 md_number_to_chars (dest, 0x60000000, 4); 6451 6452 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0 6453 || (ppc_cpu & PPC_OPCODE_POWER7) != 0 6454 || (ppc_cpu & PPC_OPCODE_POWER8) != 0 6455 || (ppc_cpu & PPC_OPCODE_POWER9) != 0) 6456 { 6457 /* For power6, power7, power8 and power9, we want the last nop to be 6458 a group terminating one. Do this by inserting an rs_fill frag 6459 immediately after this one, with its address set to the last nop 6460 location. This will automatically reduce the number of nops in 6461 the current frag by one. */ 6462 if (count > 4) 6463 { 6464 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); 6465 6466 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); 6467 group_nop->fr_address = group_nop->fr_next->fr_address - 4; 6468 group_nop->fr_fix = 0; 6469 group_nop->fr_offset = 1; 6470 group_nop->fr_type = rs_fill; 6471 fragP->fr_next = group_nop; 6472 dest = group_nop->fr_literal; 6473 } 6474 6475 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0 6476 || (ppc_cpu & PPC_OPCODE_POWER8) != 0 6477 || (ppc_cpu & PPC_OPCODE_POWER9) != 0) 6478 { 6479 if (ppc_cpu & PPC_OPCODE_E500MC) 6480 /* e500mc group terminating nop: "ori 0,0,0". */ 6481 md_number_to_chars (dest, 0x60000000, 4); 6482 else 6483 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */ 6484 md_number_to_chars (dest, 0x60420000, 4); 6485 } 6486 else 6487 /* power6 group terminating nop: "ori 1,1,0". */ 6488 md_number_to_chars (dest, 0x60210000, 4); 6489 } 6490 } 6491 } 6492 6493 /* Apply a fixup to the object code. This is called for all the 6494 fixups we generated by the calls to fix_new_exp, above. */ 6495 6496 void 6497 md_apply_fix (fixS *fixP, valueT *valP, segT seg) 6498 { 6499 valueT value = * valP; 6500 offsetT fieldval; 6501 const struct powerpc_operand *operand; 6502 6503 #ifdef OBJ_ELF 6504 if (fixP->fx_addsy != NULL) 6505 { 6506 /* Hack around bfd_install_relocation brain damage. */ 6507 if (fixP->fx_pcrel) 6508 value += fixP->fx_frag->fr_address + fixP->fx_where; 6509 6510 if (fixP->fx_addsy == abs_section_sym) 6511 fixP->fx_done = 1; 6512 } 6513 else 6514 fixP->fx_done = 1; 6515 #else 6516 /* FIXME FIXME FIXME: The value we are passed in *valP includes 6517 the symbol values. If we are doing this relocation the code in 6518 write.c is going to call bfd_install_relocation, which is also 6519 going to use the symbol value. That means that if the reloc is 6520 fully resolved we want to use *valP since bfd_install_relocation is 6521 not being used. 6522 However, if the reloc is not fully resolved we do not want to 6523 use *valP, and must use fx_offset instead. If the relocation 6524 is PC-relative, we then need to re-apply md_pcrel_from_section 6525 to this new relocation value. */ 6526 if (fixP->fx_addsy == (symbolS *) NULL) 6527 fixP->fx_done = 1; 6528 6529 else 6530 { 6531 value = fixP->fx_offset; 6532 if (fixP->fx_pcrel) 6533 value -= md_pcrel_from_section (fixP, seg); 6534 } 6535 #endif 6536 6537 if (fixP->fx_subsy != (symbolS *) NULL) 6538 { 6539 /* We can't actually support subtracting a symbol. */ 6540 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); 6541 } 6542 6543 operand = NULL; 6544 if (fixP->fx_pcrel_adjust != 0) 6545 { 6546 /* This is a fixup on an instruction. */ 6547 int opindex = fixP->fx_pcrel_adjust & 0xff; 6548 6549 operand = &powerpc_operands[opindex]; 6550 #ifdef OBJ_XCOFF 6551 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol 6552 does not generate a reloc. It uses the offset of `sym' within its 6553 csect. Other usages, such as `.long sym', generate relocs. This 6554 is the documented behaviour of non-TOC symbols. */ 6555 if ((operand->flags & PPC_OPERAND_PARENS) != 0 6556 && (operand->bitm & 0xfff0) == 0xfff0 6557 && operand->shift == 0 6558 && (operand->insert == NULL || ppc_obj64) 6559 && fixP->fx_addsy != NULL 6560 && symbol_get_tc (fixP->fx_addsy)->subseg != 0 6561 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC 6562 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0 6563 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) 6564 { 6565 value = fixP->fx_offset; 6566 fixP->fx_done = 1; 6567 } 6568 6569 /* During parsing of instructions, a TOC16 reloc is generated for 6570 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined 6571 in the toc. But at parse time, SYM may be not yet defined, so 6572 check again here. */ 6573 if (fixP->fx_r_type == BFD_RELOC_16 6574 && fixP->fx_addsy != NULL 6575 && ppc_is_toc_sym (fixP->fx_addsy)) 6576 fixP->fx_r_type = BFD_RELOC_PPC_TOC16; 6577 #endif 6578 } 6579 6580 /* Calculate value to be stored in field. */ 6581 fieldval = value; 6582 switch (fixP->fx_r_type) 6583 { 6584 #ifdef OBJ_ELF 6585 case BFD_RELOC_PPC64_ADDR16_LO_DS: 6586 case BFD_RELOC_PPC_VLE_LO16A: 6587 case BFD_RELOC_PPC_VLE_LO16D: 6588 #endif 6589 case BFD_RELOC_LO16: 6590 case BFD_RELOC_LO16_PCREL: 6591 fieldval = value & 0xffff; 6592 sign_extend_16: 6593 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 6594 fieldval = SEX16 (fieldval); 6595 fixP->fx_no_overflow = 1; 6596 break; 6597 6598 case BFD_RELOC_HI16: 6599 case BFD_RELOC_HI16_PCREL: 6600 #ifdef OBJ_ELF 6601 if (REPORT_OVERFLOW_HI && ppc_obj64) 6602 { 6603 fieldval = value >> 16; 6604 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 6605 { 6606 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 6607 fieldval = ((valueT) fieldval ^ sign) - sign; 6608 } 6609 break; 6610 } 6611 /* Fall thru */ 6612 6613 case BFD_RELOC_PPC_VLE_HI16A: 6614 case BFD_RELOC_PPC_VLE_HI16D: 6615 case BFD_RELOC_PPC64_ADDR16_HIGH: 6616 #endif 6617 fieldval = PPC_HI (value); 6618 goto sign_extend_16; 6619 6620 case BFD_RELOC_HI16_S: 6621 case BFD_RELOC_HI16_S_PCREL: 6622 case BFD_RELOC_PPC_REL16DX_HA: 6623 #ifdef OBJ_ELF 6624 if (REPORT_OVERFLOW_HI && ppc_obj64) 6625 { 6626 fieldval = (value + 0x8000) >> 16; 6627 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 6628 { 6629 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 6630 fieldval = ((valueT) fieldval ^ sign) - sign; 6631 } 6632 break; 6633 } 6634 /* Fall thru */ 6635 6636 case BFD_RELOC_PPC_VLE_HA16A: 6637 case BFD_RELOC_PPC_VLE_HA16D: 6638 case BFD_RELOC_PPC64_ADDR16_HIGHA: 6639 #endif 6640 fieldval = PPC_HA (value); 6641 goto sign_extend_16; 6642 6643 #ifdef OBJ_ELF 6644 case BFD_RELOC_PPC64_HIGHER: 6645 fieldval = PPC_HIGHER (value); 6646 goto sign_extend_16; 6647 6648 case BFD_RELOC_PPC64_HIGHER_S: 6649 fieldval = PPC_HIGHERA (value); 6650 goto sign_extend_16; 6651 6652 case BFD_RELOC_PPC64_HIGHEST: 6653 fieldval = PPC_HIGHEST (value); 6654 goto sign_extend_16; 6655 6656 case BFD_RELOC_PPC64_HIGHEST_S: 6657 fieldval = PPC_HIGHESTA (value); 6658 goto sign_extend_16; 6659 #endif 6660 6661 default: 6662 break; 6663 } 6664 6665 if (operand != NULL) 6666 { 6667 /* Handle relocs in an insn. */ 6668 switch (fixP->fx_r_type) 6669 { 6670 #ifdef OBJ_ELF 6671 /* The following relocs can't be calculated by the assembler. 6672 Leave the field zero. */ 6673 case BFD_RELOC_PPC_TPREL16: 6674 case BFD_RELOC_PPC_TPREL16_LO: 6675 case BFD_RELOC_PPC_TPREL16_HI: 6676 case BFD_RELOC_PPC_TPREL16_HA: 6677 case BFD_RELOC_PPC_DTPREL16: 6678 case BFD_RELOC_PPC_DTPREL16_LO: 6679 case BFD_RELOC_PPC_DTPREL16_HI: 6680 case BFD_RELOC_PPC_DTPREL16_HA: 6681 case BFD_RELOC_PPC_GOT_TLSGD16: 6682 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 6683 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 6684 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 6685 case BFD_RELOC_PPC_GOT_TLSLD16: 6686 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 6687 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 6688 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 6689 case BFD_RELOC_PPC_GOT_TPREL16: 6690 case BFD_RELOC_PPC_GOT_TPREL16_LO: 6691 case BFD_RELOC_PPC_GOT_TPREL16_HI: 6692 case BFD_RELOC_PPC_GOT_TPREL16_HA: 6693 case BFD_RELOC_PPC_GOT_DTPREL16: 6694 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 6695 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 6696 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 6697 case BFD_RELOC_PPC64_TPREL16_DS: 6698 case BFD_RELOC_PPC64_TPREL16_LO_DS: 6699 case BFD_RELOC_PPC64_TPREL16_HIGH: 6700 case BFD_RELOC_PPC64_TPREL16_HIGHA: 6701 case BFD_RELOC_PPC64_TPREL16_HIGHER: 6702 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 6703 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 6704 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 6705 case BFD_RELOC_PPC64_DTPREL16_HIGH: 6706 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 6707 case BFD_RELOC_PPC64_DTPREL16_DS: 6708 case BFD_RELOC_PPC64_DTPREL16_LO_DS: 6709 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 6710 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 6711 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 6712 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 6713 gas_assert (fixP->fx_addsy != NULL); 6714 S_SET_THREAD_LOCAL (fixP->fx_addsy); 6715 fieldval = 0; 6716 break; 6717 6718 /* These also should leave the field zero for the same 6719 reason. Note that older versions of gas wrote values 6720 here. If we want to go back to the old behaviour, then 6721 all _LO and _LO_DS cases will need to be treated like 6722 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */ 6723 case BFD_RELOC_16_GOTOFF: 6724 case BFD_RELOC_LO16_GOTOFF: 6725 case BFD_RELOC_HI16_GOTOFF: 6726 case BFD_RELOC_HI16_S_GOTOFF: 6727 case BFD_RELOC_LO16_PLTOFF: 6728 case BFD_RELOC_HI16_PLTOFF: 6729 case BFD_RELOC_HI16_S_PLTOFF: 6730 case BFD_RELOC_GPREL16: 6731 case BFD_RELOC_16_BASEREL: 6732 case BFD_RELOC_LO16_BASEREL: 6733 case BFD_RELOC_HI16_BASEREL: 6734 case BFD_RELOC_HI16_S_BASEREL: 6735 case BFD_RELOC_PPC_TOC16: 6736 case BFD_RELOC_PPC64_TOC16_LO: 6737 case BFD_RELOC_PPC64_TOC16_HI: 6738 case BFD_RELOC_PPC64_TOC16_HA: 6739 case BFD_RELOC_PPC64_PLTGOT16: 6740 case BFD_RELOC_PPC64_PLTGOT16_LO: 6741 case BFD_RELOC_PPC64_PLTGOT16_HI: 6742 case BFD_RELOC_PPC64_PLTGOT16_HA: 6743 case BFD_RELOC_PPC64_GOT16_DS: 6744 case BFD_RELOC_PPC64_GOT16_LO_DS: 6745 case BFD_RELOC_PPC64_PLT16_LO_DS: 6746 case BFD_RELOC_PPC64_SECTOFF_DS: 6747 case BFD_RELOC_PPC64_SECTOFF_LO_DS: 6748 case BFD_RELOC_PPC64_TOC16_DS: 6749 case BFD_RELOC_PPC64_TOC16_LO_DS: 6750 case BFD_RELOC_PPC64_PLTGOT16_DS: 6751 case BFD_RELOC_PPC64_PLTGOT16_LO_DS: 6752 case BFD_RELOC_PPC_EMB_NADDR16: 6753 case BFD_RELOC_PPC_EMB_NADDR16_LO: 6754 case BFD_RELOC_PPC_EMB_NADDR16_HI: 6755 case BFD_RELOC_PPC_EMB_NADDR16_HA: 6756 case BFD_RELOC_PPC_EMB_SDAI16: 6757 case BFD_RELOC_PPC_EMB_SDA2I16: 6758 case BFD_RELOC_PPC_EMB_SDA2REL: 6759 case BFD_RELOC_PPC_EMB_SDA21: 6760 case BFD_RELOC_PPC_EMB_MRKREF: 6761 case BFD_RELOC_PPC_EMB_RELSEC16: 6762 case BFD_RELOC_PPC_EMB_RELST_LO: 6763 case BFD_RELOC_PPC_EMB_RELST_HI: 6764 case BFD_RELOC_PPC_EMB_RELST_HA: 6765 case BFD_RELOC_PPC_EMB_BIT_FLD: 6766 case BFD_RELOC_PPC_EMB_RELSDA: 6767 case BFD_RELOC_PPC_VLE_SDA21: 6768 case BFD_RELOC_PPC_VLE_SDA21_LO: 6769 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 6770 case BFD_RELOC_PPC_VLE_SDAREL_LO16D: 6771 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 6772 case BFD_RELOC_PPC_VLE_SDAREL_HI16D: 6773 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 6774 case BFD_RELOC_PPC_VLE_SDAREL_HA16D: 6775 gas_assert (fixP->fx_addsy != NULL); 6776 /* Fall thru */ 6777 6778 case BFD_RELOC_PPC_TLS: 6779 case BFD_RELOC_PPC_TLSGD: 6780 case BFD_RELOC_PPC_TLSLD: 6781 fieldval = 0; 6782 break; 6783 #endif 6784 6785 #ifdef OBJ_XCOFF 6786 case BFD_RELOC_PPC_B16: 6787 /* Adjust the offset to the instruction boundary. */ 6788 fieldval += 2; 6789 break; 6790 #endif 6791 6792 case BFD_RELOC_VTABLE_INHERIT: 6793 case BFD_RELOC_VTABLE_ENTRY: 6794 case BFD_RELOC_PPC_DTPMOD: 6795 case BFD_RELOC_PPC_TPREL: 6796 case BFD_RELOC_PPC_DTPREL: 6797 case BFD_RELOC_PPC_COPY: 6798 case BFD_RELOC_PPC_GLOB_DAT: 6799 case BFD_RELOC_32_PLT_PCREL: 6800 case BFD_RELOC_PPC_EMB_NADDR32: 6801 case BFD_RELOC_PPC64_TOC: 6802 case BFD_RELOC_CTOR: 6803 case BFD_RELOC_32: 6804 case BFD_RELOC_32_PCREL: 6805 case BFD_RELOC_RVA: 6806 case BFD_RELOC_64: 6807 case BFD_RELOC_64_PCREL: 6808 case BFD_RELOC_PPC64_ADDR64_LOCAL: 6809 as_bad_where (fixP->fx_file, fixP->fx_line, 6810 _("%s unsupported as instruction fixup"), 6811 bfd_get_reloc_code_name (fixP->fx_r_type)); 6812 fixP->fx_done = 1; 6813 return; 6814 6815 default: 6816 break; 6817 } 6818 6819 #ifdef OBJ_ELF 6820 /* powerpc uses RELA style relocs, so if emitting a reloc the field 6821 contents can stay at zero. */ 6822 #define APPLY_RELOC fixP->fx_done 6823 #else 6824 #define APPLY_RELOC 1 6825 #endif 6826 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL) 6827 { 6828 unsigned long insn; 6829 unsigned char *where; 6830 6831 /* Fetch the instruction, insert the fully resolved operand 6832 value, and stuff the instruction back again. */ 6833 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; 6834 if (target_big_endian) 6835 { 6836 if (fixP->fx_size == 4) 6837 insn = bfd_getb32 (where); 6838 else 6839 insn = bfd_getb16 (where); 6840 } 6841 else 6842 { 6843 if (fixP->fx_size == 4) 6844 insn = bfd_getl32 (where); 6845 else 6846 insn = bfd_getl16 (where); 6847 } 6848 insn = ppc_insert_operand (insn, operand, fieldval, 6849 fixP->tc_fix_data.ppc_cpu, 6850 fixP->fx_file, fixP->fx_line); 6851 if (target_big_endian) 6852 { 6853 if (fixP->fx_size == 4) 6854 bfd_putb32 (insn, where); 6855 else 6856 bfd_putb16 (insn, where); 6857 } 6858 else 6859 { 6860 if (fixP->fx_size == 4) 6861 bfd_putl32 (insn, where); 6862 else 6863 bfd_putl16 (insn, where); 6864 } 6865 } 6866 6867 if (fixP->fx_done) 6868 /* Nothing else to do here. */ 6869 return; 6870 6871 gas_assert (fixP->fx_addsy != NULL); 6872 if (fixP->fx_r_type == BFD_RELOC_NONE) 6873 { 6874 const char *sfile; 6875 unsigned int sline; 6876 6877 /* Use expr_symbol_where to see if this is an expression 6878 symbol. */ 6879 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) 6880 as_bad_where (fixP->fx_file, fixP->fx_line, 6881 _("unresolved expression that must be resolved")); 6882 else 6883 as_bad_where (fixP->fx_file, fixP->fx_line, 6884 _("unsupported relocation against %s"), 6885 S_GET_NAME (fixP->fx_addsy)); 6886 fixP->fx_done = 1; 6887 return; 6888 } 6889 } 6890 else 6891 { 6892 /* Handle relocs in data. */ 6893 switch (fixP->fx_r_type) 6894 { 6895 case BFD_RELOC_VTABLE_INHERIT: 6896 if (fixP->fx_addsy 6897 && !S_IS_DEFINED (fixP->fx_addsy) 6898 && !S_IS_WEAK (fixP->fx_addsy)) 6899 S_SET_WEAK (fixP->fx_addsy); 6900 /* Fall thru */ 6901 6902 case BFD_RELOC_VTABLE_ENTRY: 6903 fixP->fx_done = 0; 6904 break; 6905 6906 #ifdef OBJ_ELF 6907 /* These can appear with @l etc. in data. */ 6908 case BFD_RELOC_LO16: 6909 case BFD_RELOC_LO16_PCREL: 6910 case BFD_RELOC_HI16: 6911 case BFD_RELOC_HI16_PCREL: 6912 case BFD_RELOC_HI16_S: 6913 case BFD_RELOC_HI16_S_PCREL: 6914 case BFD_RELOC_PPC64_HIGHER: 6915 case BFD_RELOC_PPC64_HIGHER_S: 6916 case BFD_RELOC_PPC64_HIGHEST: 6917 case BFD_RELOC_PPC64_HIGHEST_S: 6918 case BFD_RELOC_PPC64_ADDR16_HIGH: 6919 case BFD_RELOC_PPC64_ADDR16_HIGHA: 6920 case BFD_RELOC_PPC64_ADDR64_LOCAL: 6921 break; 6922 6923 case BFD_RELOC_PPC_DTPMOD: 6924 case BFD_RELOC_PPC_TPREL: 6925 case BFD_RELOC_PPC_DTPREL: 6926 S_SET_THREAD_LOCAL (fixP->fx_addsy); 6927 break; 6928 6929 /* Just punt all of these to the linker. */ 6930 case BFD_RELOC_PPC_B16_BRTAKEN: 6931 case BFD_RELOC_PPC_B16_BRNTAKEN: 6932 case BFD_RELOC_16_GOTOFF: 6933 case BFD_RELOC_LO16_GOTOFF: 6934 case BFD_RELOC_HI16_GOTOFF: 6935 case BFD_RELOC_HI16_S_GOTOFF: 6936 case BFD_RELOC_LO16_PLTOFF: 6937 case BFD_RELOC_HI16_PLTOFF: 6938 case BFD_RELOC_HI16_S_PLTOFF: 6939 case BFD_RELOC_PPC_COPY: 6940 case BFD_RELOC_PPC_GLOB_DAT: 6941 case BFD_RELOC_16_BASEREL: 6942 case BFD_RELOC_LO16_BASEREL: 6943 case BFD_RELOC_HI16_BASEREL: 6944 case BFD_RELOC_HI16_S_BASEREL: 6945 case BFD_RELOC_PPC_TLS: 6946 case BFD_RELOC_PPC_DTPREL16_LO: 6947 case BFD_RELOC_PPC_DTPREL16_HI: 6948 case BFD_RELOC_PPC_DTPREL16_HA: 6949 case BFD_RELOC_PPC_TPREL16_LO: 6950 case BFD_RELOC_PPC_TPREL16_HI: 6951 case BFD_RELOC_PPC_TPREL16_HA: 6952 case BFD_RELOC_PPC_GOT_TLSGD16: 6953 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 6954 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 6955 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 6956 case BFD_RELOC_PPC_GOT_TLSLD16: 6957 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 6958 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 6959 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 6960 case BFD_RELOC_PPC_GOT_DTPREL16: 6961 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 6962 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 6963 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 6964 case BFD_RELOC_PPC_GOT_TPREL16: 6965 case BFD_RELOC_PPC_GOT_TPREL16_LO: 6966 case BFD_RELOC_PPC_GOT_TPREL16_HI: 6967 case BFD_RELOC_PPC_GOT_TPREL16_HA: 6968 case BFD_RELOC_24_PLT_PCREL: 6969 case BFD_RELOC_PPC_LOCAL24PC: 6970 case BFD_RELOC_32_PLT_PCREL: 6971 case BFD_RELOC_GPREL16: 6972 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 6973 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 6974 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 6975 case BFD_RELOC_PPC_EMB_NADDR32: 6976 case BFD_RELOC_PPC_EMB_NADDR16: 6977 case BFD_RELOC_PPC_EMB_NADDR16_LO: 6978 case BFD_RELOC_PPC_EMB_NADDR16_HI: 6979 case BFD_RELOC_PPC_EMB_NADDR16_HA: 6980 case BFD_RELOC_PPC_EMB_SDAI16: 6981 case BFD_RELOC_PPC_EMB_SDA2REL: 6982 case BFD_RELOC_PPC_EMB_SDA2I16: 6983 case BFD_RELOC_PPC_EMB_SDA21: 6984 case BFD_RELOC_PPC_VLE_SDA21_LO: 6985 case BFD_RELOC_PPC_EMB_MRKREF: 6986 case BFD_RELOC_PPC_EMB_RELSEC16: 6987 case BFD_RELOC_PPC_EMB_RELST_LO: 6988 case BFD_RELOC_PPC_EMB_RELST_HI: 6989 case BFD_RELOC_PPC_EMB_RELST_HA: 6990 case BFD_RELOC_PPC_EMB_BIT_FLD: 6991 case BFD_RELOC_PPC_EMB_RELSDA: 6992 case BFD_RELOC_PPC64_TOC: 6993 case BFD_RELOC_PPC_TOC16: 6994 case BFD_RELOC_PPC64_TOC16_LO: 6995 case BFD_RELOC_PPC64_TOC16_HI: 6996 case BFD_RELOC_PPC64_TOC16_HA: 6997 case BFD_RELOC_PPC64_DTPREL16_HIGH: 6998 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 6999 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 7000 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 7001 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 7002 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 7003 case BFD_RELOC_PPC64_TPREL16_HIGH: 7004 case BFD_RELOC_PPC64_TPREL16_HIGHA: 7005 case BFD_RELOC_PPC64_TPREL16_HIGHER: 7006 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 7007 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 7008 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 7009 fixP->fx_done = 0; 7010 break; 7011 #endif 7012 7013 #ifdef OBJ_XCOFF 7014 case BFD_RELOC_NONE: 7015 #endif 7016 case BFD_RELOC_CTOR: 7017 case BFD_RELOC_32: 7018 case BFD_RELOC_32_PCREL: 7019 case BFD_RELOC_RVA: 7020 case BFD_RELOC_64: 7021 case BFD_RELOC_64_PCREL: 7022 case BFD_RELOC_16: 7023 case BFD_RELOC_16_PCREL: 7024 case BFD_RELOC_8: 7025 break; 7026 7027 default: 7028 fprintf (stderr, 7029 _("Gas failure, reloc value %d\n"), fixP->fx_r_type); 7030 fflush (stderr); 7031 abort (); 7032 } 7033 7034 if (fixP->fx_size && APPLY_RELOC) 7035 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 7036 fieldval, fixP->fx_size); 7037 if (warn_476 7038 && (seg->flags & SEC_CODE) != 0 7039 && fixP->fx_size == 4 7040 && fixP->fx_done 7041 && !fixP->fx_tcbit 7042 && (fixP->fx_r_type == BFD_RELOC_32 7043 || fixP->fx_r_type == BFD_RELOC_CTOR 7044 || fixP->fx_r_type == BFD_RELOC_32_PCREL)) 7045 as_warn_where (fixP->fx_file, fixP->fx_line, 7046 _("data in executable section")); 7047 } 7048 7049 /* We are only able to convert some relocs to pc-relative. */ 7050 if (!fixP->fx_done && fixP->fx_pcrel) 7051 { 7052 switch (fixP->fx_r_type) 7053 { 7054 case BFD_RELOC_LO16: 7055 fixP->fx_r_type = BFD_RELOC_LO16_PCREL; 7056 break; 7057 7058 case BFD_RELOC_HI16: 7059 fixP->fx_r_type = BFD_RELOC_HI16_PCREL; 7060 break; 7061 7062 case BFD_RELOC_HI16_S: 7063 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; 7064 break; 7065 7066 case BFD_RELOC_64: 7067 fixP->fx_r_type = BFD_RELOC_64_PCREL; 7068 break; 7069 7070 case BFD_RELOC_32: 7071 fixP->fx_r_type = BFD_RELOC_32_PCREL; 7072 break; 7073 7074 case BFD_RELOC_16: 7075 fixP->fx_r_type = BFD_RELOC_16_PCREL; 7076 break; 7077 7078 /* Some of course are already pc-relative. */ 7079 case BFD_RELOC_LO16_PCREL: 7080 case BFD_RELOC_HI16_PCREL: 7081 case BFD_RELOC_HI16_S_PCREL: 7082 case BFD_RELOC_PPC_REL16DX_HA: 7083 case BFD_RELOC_64_PCREL: 7084 case BFD_RELOC_32_PCREL: 7085 case BFD_RELOC_16_PCREL: 7086 case BFD_RELOC_PPC_B16: 7087 case BFD_RELOC_PPC_B16_BRTAKEN: 7088 case BFD_RELOC_PPC_B16_BRNTAKEN: 7089 case BFD_RELOC_PPC_B26: 7090 case BFD_RELOC_PPC_LOCAL24PC: 7091 case BFD_RELOC_24_PLT_PCREL: 7092 case BFD_RELOC_32_PLT_PCREL: 7093 case BFD_RELOC_64_PLT_PCREL: 7094 case BFD_RELOC_PPC_VLE_REL8: 7095 case BFD_RELOC_PPC_VLE_REL15: 7096 case BFD_RELOC_PPC_VLE_REL24: 7097 break; 7098 7099 default: 7100 if (fixP->fx_addsy) 7101 { 7102 const char *sfile; 7103 unsigned int sline; 7104 7105 /* Use expr_symbol_where to see if this is an 7106 expression symbol. */ 7107 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) 7108 as_bad_where (fixP->fx_file, fixP->fx_line, 7109 _("unresolved expression that must" 7110 " be resolved")); 7111 else 7112 as_bad_where (fixP->fx_file, fixP->fx_line, 7113 _("cannot emit PC relative %s relocation" 7114 " against %s"), 7115 bfd_get_reloc_code_name (fixP->fx_r_type), 7116 S_GET_NAME (fixP->fx_addsy)); 7117 } 7118 else 7119 as_bad_where (fixP->fx_file, fixP->fx_line, 7120 _("unable to resolve expression")); 7121 fixP->fx_done = 1; 7122 break; 7123 } 7124 } 7125 7126 #ifdef OBJ_ELF 7127 ppc_elf_validate_fix (fixP, seg); 7128 fixP->fx_addnumber = value; 7129 7130 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately 7131 from the section contents. If we are going to be emitting a reloc 7132 then the section contents are immaterial, so don't warn if they 7133 happen to overflow. Leave such warnings to ld. */ 7134 if (!fixP->fx_done) 7135 { 7136 fixP->fx_no_overflow = 1; 7137 7138 /* Arrange to emit .TOC. as a normal symbol if used in anything 7139 but .TOC.@tocbase. */ 7140 if (ppc_obj64 7141 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC 7142 && fixP->fx_addsy != NULL 7143 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0) 7144 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP; 7145 } 7146 #else 7147 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) 7148 fixP->fx_addnumber = 0; 7149 else 7150 { 7151 #ifdef TE_PE 7152 fixP->fx_addnumber = 0; 7153 #else 7154 /* We want to use the offset within the toc, not the actual VMA 7155 of the symbol. */ 7156 fixP->fx_addnumber = 7157 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)) 7158 - S_GET_VALUE (ppc_toc_csect); 7159 /* Set *valP to avoid errors. */ 7160 *valP = value; 7161 #endif 7162 } 7163 #endif 7164 } 7165 7166 /* Generate a reloc for a fixup. */ 7167 7168 arelent * 7169 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) 7170 { 7171 arelent *reloc; 7172 7173 reloc = XNEW (arelent); 7174 7175 reloc->sym_ptr_ptr = XNEW (asymbol *); 7176 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 7177 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 7178 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 7179 if (reloc->howto == (reloc_howto_type *) NULL) 7180 { 7181 as_bad_where (fixp->fx_file, fixp->fx_line, 7182 _("reloc %d not supported by object file format"), 7183 (int) fixp->fx_r_type); 7184 return NULL; 7185 } 7186 reloc->addend = fixp->fx_addnumber; 7187 7188 return reloc; 7189 } 7190 7191 void 7192 ppc_cfi_frame_initial_instructions (void) 7193 { 7194 cfi_add_CFA_def_cfa (1, 0); 7195 } 7196 7197 int 7198 tc_ppc_regname_to_dw2regnum (char *regname) 7199 { 7200 unsigned int regnum = -1; 7201 unsigned int i; 7202 const char *p; 7203 char *q; 7204 static struct { const char *name; int dw2regnum; } regnames[] = 7205 { 7206 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, 7207 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, 7208 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, 7209 { "spe_acc", 111 }, { "spefscr", 112 } 7210 }; 7211 7212 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 7213 if (strcmp (regnames[i].name, regname) == 0) 7214 return regnames[i].dw2regnum; 7215 7216 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') 7217 { 7218 p = regname + 1 + (regname[1] == '.'); 7219 regnum = strtoul (p, &q, 10); 7220 if (p == q || *q || regnum >= 32) 7221 return -1; 7222 if (regname[0] == 'f') 7223 regnum += 32; 7224 else if (regname[0] == 'v') 7225 regnum += 77; 7226 } 7227 else if (regname[0] == 'c' && regname[1] == 'r') 7228 { 7229 p = regname + 2 + (regname[2] == '.'); 7230 if (p[0] < '0' || p[0] > '7' || p[1]) 7231 return -1; 7232 regnum = p[0] - '0' + 68; 7233 } 7234 return regnum; 7235 } 7236
