1 /* 2 * Copyright 2014 Broadcom 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24 #ifndef VC4_DRV_H 25 #define VC4_DRV_H 26 27 #include "vc4_simulator_validate.h" 28 29 struct vc4_exec_info { 30 /* Sequence number for this bin/render job. */ 31 uint64_t seqno; 32 33 /* Kernel-space copy of the ioctl arguments */ 34 struct drm_vc4_submit_cl *args; 35 36 /* This is the array of BOs that were looked up at the start of exec. 37 * Command validation will use indices into this array. 38 */ 39 struct drm_gem_cma_object **bo; 40 uint32_t bo_count; 41 42 /* List of other BOs used in the job that need to be released 43 * once the job is complete. 44 */ 45 struct list_head unref_list; 46 47 /* Current unvalidated indices into @bo loaded by the non-hardware 48 * VC4_PACKET_GEM_HANDLES. 49 */ 50 uint32_t bo_index[2]; 51 52 /* This is the BO where we store the validated command lists, shader 53 * records, and uniforms. 54 */ 55 struct drm_gem_cma_object *exec_bo; 56 57 /** 58 * This tracks the per-shader-record state (packet 64) that 59 * determines the length of the shader record and the offset 60 * it's expected to be found at. It gets read in from the 61 * command lists. 62 */ 63 struct vc4_shader_state { 64 uint32_t addr; 65 /* Maximum vertex index referenced by any primitive using this 66 * shader state. 67 */ 68 uint32_t max_index; 69 } *shader_state; 70 71 /** How many shader states the user declared they were using. */ 72 uint32_t shader_state_size; 73 /** How many shader state records the validator has seen. */ 74 uint32_t shader_state_count; 75 76 bool found_tile_binning_mode_config_packet; 77 bool found_start_tile_binning_packet; 78 bool found_increment_semaphore_packet; 79 bool found_flush; 80 uint8_t bin_tiles_x, bin_tiles_y; 81 struct drm_gem_cma_object *tile_bo; 82 uint32_t tile_alloc_offset; 83 84 uint32_t tile_width, tile_height; 85 86 /** 87 * Computed addresses pointing into exec_bo where we start the 88 * bin thread (ct0) and render thread (ct1). 89 */ 90 uint32_t ct0ca, ct0ea; 91 uint32_t ct1ca, ct1ea; 92 93 /* Pointer to the unvalidated bin CL (if present). */ 94 void *bin_u; 95 96 /* Pointers to the shader recs. These paddr gets incremented as CL 97 * packets are relocated in validate_gl_shader_state, and the vaddrs 98 * (u and v) get incremented and size decremented as the shader recs 99 * themselves are validated. 100 */ 101 void *shader_rec_u; 102 void *shader_rec_v; 103 uint32_t shader_rec_p; 104 uint32_t shader_rec_size; 105 106 /* Pointers to the uniform data. These pointers are incremented, and 107 * size decremented, as each batch of uniforms is uploaded. 108 */ 109 void *uniforms_u; 110 void *uniforms_v; 111 uint32_t uniforms_p; 112 uint32_t uniforms_size; 113 }; 114 115 /** 116 * struct vc4_texture_sample_info - saves the offsets into the UBO for texture 117 * setup parameters. 118 * 119 * This will be used at draw time to relocate the reference to the texture 120 * contents in p0, and validate that the offset combined with 121 * width/height/stride/etc. from p1 and p2/p3 doesn't sample outside the BO. 122 * Note that the hardware treats unprovided config parameters as 0, so not all 123 * of them need to be set up for every texure sample, and we'll store ~0 as 124 * the offset to mark the unused ones. 125 * 126 * See the VC4 3D architecture guide page 41 ("Texture and Memory Lookup Unit 127 * Setup") for definitions of the texture parameters. 128 */ 129 struct vc4_texture_sample_info { 130 bool is_direct; 131 uint32_t p_offset[4]; 132 }; 133 134 /** 135 * struct vc4_validated_shader_info - information about validated shaders that 136 * needs to be used from command list validation. 137 * 138 * For a given shader, each time a shader state record references it, we need 139 * to verify that the shader doesn't read more uniforms than the shader state 140 * record's uniform BO pointer can provide, and we need to apply relocations 141 * and validate the shader state record's uniforms that define the texture 142 * samples. 143 */ 144 struct vc4_validated_shader_info 145 { 146 uint32_t uniforms_size; 147 uint32_t uniforms_src_size; 148 uint32_t num_texture_samples; 149 struct vc4_texture_sample_info *texture_samples; 150 151 uint32_t num_uniform_addr_offsets; 152 uint32_t *uniform_addr_offsets; 153 154 bool is_threaded; 155 }; 156 157 /* vc4_validate.c */ 158 int 159 vc4_validate_bin_cl(struct drm_device *dev, 160 void *validated, 161 void *unvalidated, 162 struct vc4_exec_info *exec); 163 164 int 165 vc4_validate_shader_recs(struct drm_device *dev, struct vc4_exec_info *exec); 166 167 struct vc4_validated_shader_info * 168 vc4_validate_shader(struct drm_gem_cma_object *shader_obj); 169 170 struct drm_gem_cma_object *vc4_use_bo(struct vc4_exec_info *exec, 171 uint32_t hindex); 172 173 int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec); 174 175 bool vc4_check_tex_size(struct vc4_exec_info *exec, 176 struct drm_gem_cma_object *fbo, 177 uint32_t offset, uint8_t tiling_format, 178 uint32_t width, uint32_t height, uint8_t cpp); 179 180 #endif /* VC4_DRV_H */ 181
