| /external/clang/test/Sema/ |
| variadic-promotion.c | 5 void test_floating_promotion(__fp16 *f16, float f32, double f64) {
6 variadic(3, *f16, f32, f64);
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| half-prec-vfpv3.s | 2 vcvtt.f32.f16 s0, s1
3 vcvtteq.f32.f16 s2, s3
4 vcvttne.f32.f16 s2, s3
5 vcvttcs.f32.f16 s2, s3
6 vcvttcc.f32.f16 s2, s3
7 vcvttmi.f32.f16 s2, s3
8 vcvttpl.f32.f16 s2, s3
9 vcvttvs.f32.f16 s2, s3
10 vcvttvc.f32.f16 s2, s3
11 vcvtthi.f32.f16 s2, s
[all...] |
| armv8-2-fp16-scalar.s | 2 .irp op, vdiv.f16, vfma.f16, vfms.f16, vfnma.f16, vfnms.f16, vmaxnm.f16, vminnm.f16, vmla.f16, vmls.f16, vmul.f16, vnmla.f16, vnmls.f16, vnmul.f16, vsub.f1
[all...] |
| half-prec-psyntax.s | 2 vcvt d0.f16, q1.f32
3 vcvt q5.f32, d6.f16
4 vcvtt s2.f32, s5.f16
5 vcvtb s2.f32, s5.f16
6 vcvtt s2.f16, s5.f32
7 vcvtb s2.f16, s5.f32
|
| armv8-2-fp16-simd.d | 12 0: f3342d0e vabd.f16 d2, d4, d14
13 4: f3384d6c vabd.f16 q2, q4, q14
14 8: f2142f0e vmax.f16 d2, d4, d14
15 c: f2184f6c vmax.f16 q2, q4, q14
16 10: f2342f0e vmin.f16 d2, d4, d14
17 14: f2384f6c vmin.f16 q2, q4, q14
18 18: f3300dec vabd.f16 q0, q8, q14
19 1c: f2100fec vmax.f16 q0, q8, q14
20 20: f2300fec vmin.f16 q0, q8, q14
21 24: f3331d0f vabd.f16 d1, d3, d1
[all...] |
| half-prec-vfpv3.d | 8 0+000 <[^>]*> eeb20ae0 vcvtt.f32.f16 s0, s1
9 0+004 <[^>]*> 0eb21ae1 vcvtteq.f32.f16 s2, s3
10 0+008 <[^>]*> 1eb21ae1 vcvttne.f32.f16 s2, s3
11 0+00c <[^>]*> 2eb21ae1 vcvttcs.f32.f16 s2, s3
12 0+010 <[^>]*> 3eb21ae1 vcvttcc.f32.f16 s2, s3
13 0+014 <[^>]*> 4eb21ae1 vcvttmi.f32.f16 s2, s3
14 0+018 <[^>]*> 5eb21ae1 vcvttpl.f32.f16 s2, s3
15 0+01c <[^>]*> 6eb21ae1 vcvttvs.f32.f16 s2, s3
16 0+020 <[^>]*> 7eb21ae1 vcvttvc.f32.f16 s2, s3
17 0+024 <[^>]*> 8eb21ae1 vcvtthi.f32.f16 s2, s
[all...] |
| armv8-2-fp16-scalar-bad.s | 3 .irp cond, eq.f16, ne.f16, ge.f16, lt.f16, gt.f16, le.f16
11 .irp cond, eq.f16, ne.f16, ge.f16, lt.f16, gt.f16, le.f1
[all...] |
| half-prec-neon.s | 3 vcvt.f16.f32 d0, q1
4 vcvt.f32.f16 q5, d6
|
| armv8-2-fp16-scalar-thumb.d | 11 0: ee00 1910 vmov.f16 s0, r1
12 4: ee10 0990 vmov.f16 r0, s1
13 8: eeb0 0900 vmov.f16 s0, #0 ; 0x40000000 2.0
24 2c: eec6 298c vdiv.f16 s5, s13, s24
25 30: eee6 298c vfma.f16 s5, s13, s24
26 34: eee6 29cc vfms.f16 s5, s13, s24
27 38: eed6 29cc vfnma.f16 s5, s13, s24
28 3c: eed6 298c vfnms.f16 s5, s13, s24
29 40: fec6 298c vmaxnm.f16 s5, s13, s24
30 44: fec6 29cc vminnm.f16 s5, s13, s2
[all...] |
| armv8-2-fp16-scalar.d | 11 0: ee001910 vmov.f16 s0, r1
12 4: ee100990 vmov.f16 r0, s1
13 8: eeb00900 vmov.f16 s0, #0 ; 0x40000000 2.0
24 2c: eec6298c vdiv.f16 s5, s13, s24
25 30: eee6298c vfma.f16 s5, s13, s24
26 34: eee629cc vfms.f16 s5, s13, s24
27 38: eed629cc vfnma.f16 s5, s13, s24
28 3c: eed6298c vfnms.f16 s5, s13, s24
29 40: fec6298c vmaxnm.f16 s5, s13, s24
30 44: fec629cc vminnm.f16 s5, s13, s2
[all...] |
| armv8-2-fp16-simd-thumb.d | 12 0: ff34 2d0e vabd.f16 d2, d4, d14
13 4: ff38 4d6c vabd.f16 q2, q4, q14
14 8: ef14 2f0e vmax.f16 d2, d4, d14
15 c: ef18 4f6c vmax.f16 q2, q4, q14
16 10: ef34 2f0e vmin.f16 d2, d4, d14
17 14: ef38 4f6c vmin.f16 q2, q4, q14
18 18: ff30 0dec vabd.f16 q0, q8, q14
19 1c: ef10 0fec vmax.f16 q0, q8, q14
20 20: ef30 0fec vmin.f16 q0, q8, q14
21 24: ff33 1d0f vabd.f16 d1, d3, d1
[all...] |
| armv8-2-fp16-simd.s | 2 .irp op, vabd.f16, vmax.f16, vmin.f16
9 .irp op, vabdq.f16, vmaxq.f16, vminq.f16
15 .irp op, vabs.f16, vneg.f16
22 .irp op, vabsq.f16, vnegq.f16
[all...] |
| armv8-2-fp16-simd-warning.l | 2 [^:]*:163: Error: selected processor does not support fp16 instruction -- `vabd.f16 d2,d4,d14'
3 [^:]*:163: Error: selected processor does not support fp16 instruction -- `vabd.f16 q2,q4,q14'
4 [^:]*:163: Error: selected processor does not support fp16 instruction -- `vmax.f16 d2,d4,d14'
5 [^:]*:163: Error: selected processor does not support fp16 instruction -- `vmax.f16 q2,q4,q14'
6 [^:]*:163: Error: selected processor does not support fp16 instruction -- `vmin.f16 d2,d4,d14'
7 [^:]*:163: Error: selected processor does not support fp16 instruction -- `vmin.f16 q2,q4,q14'
8 [^:]*:164: Error: selected processor does not support fp16 instruction -- `vabdq.f16 q0,q8,q14'
9 [^:]*:164: Error: selected processor does not support fp16 instruction -- `vmaxq.f16 q0,q8,q14'
10 [^:]*:164: Error: selected processor does not support fp16 instruction -- `vminq.f16 q0,q8,q14'
11 [^:]*:165: Error: selected processor does not support fp16 instruction -- `vabd.f16 d1,d3,d15
[all...] |
| half-prec-neon.d | 8 0+0 <[^>]*> f3b60602 vcvt\.f16\.f32 d0, q1
9 0+4 <[^>]*> f3b6a706 vcvt\.f32\.f16 q5, d6
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| reginfo-1.s | 3 add.d $f16,$f16,$f16
|
| /external/llvm/test/MC/ARM/ |
| fullfp16.s | 4 vadd.f16 s0, s1, s0
5 @ ARM: vadd.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x30,0xee]
6 @ THUMB: vadd.f16 s0, s1, s0 @ encoding: [0x30,0xee,0x80,0x09]
8 vsub.f16 s0, s1, s0
9 @ ARM: vsub.f16 s0, s1, s0 @ encoding: [0xc0,0x09,0x30,0xee]
10 @ THUMB: vsub.f16 s0, s1, s0 @ encoding: [0x30,0xee,0xc0,0x09]
12 vdiv.f16 s0, s1, s0
13 @ ARM: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x80,0xee]
14 @ THUMB: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0xee,0x80,0x09]
16 vmul.f16 s0, s1, s
[all...] |
| fullfp16-neon-neg.s | 6 vadd.f16 d0, d1, d2
7 vadd.f16 q0, q1, q2
11 vsub.f16 d0, d1, d2
12 vsub.f16 q0, q1, q2
16 vmul.f16 d0, d1, d2
17 vmul.f16 q0, q1, q2
21 vmul.f16 d1, d2, d3[2]
22 vmul.f16 q4, q5, d6[3]
26 vmla.f16 d0, d1, d2
27 vmla.f16 q0, q1, q
[all...] |
| fullfp16-neg.s | 4 vadd.f16 s0, s1, s0
7 vsub.f16 s0, s1, s0
10 vdiv.f16 s0, s1, s0
13 vmul.f16 s0, s1, s0
16 vnmul.f16 s0, s1, s0
19 vmla.f16 s1, s2, s0
22 vmls.f16 s1, s2, s0
25 vnmla.f16 s1, s2, s0
28 vnmls.f16 s1, s2, s0
31 vcmp.f16 s0, s
[all...] |
| fullfp16-neon.s | 4 vadd.f16 d0, d1, d2
5 vadd.f16 q0, q1, q2
6 @ ARM: vadd.f16 d0, d1, d2 @ encoding: [0x02,0x0d,0x11,0xf2]
7 @ ARM: vadd.f16 q0, q1, q2 @ encoding: [0x44,0x0d,0x12,0xf2]
8 @ THUMB: vadd.f16 d0, d1, d2 @ encoding: [0x11,0xef,0x02,0x0d]
9 @ THUMB: vadd.f16 q0, q1, q2 @ encoding: [0x12,0xef,0x44,0x0d]
11 vsub.f16 d0, d1, d2
12 vsub.f16 q0, q1, q2
13 @ ARM: vsub.f16 d0, d1, d2 @ encoding: [0x02,0x0d,0x31,0xf2]
14 @ ARM: vsub.f16 q0, q1, q2 @ encoding: [0x44,0x0d,0x32,0xf2
[all...] |
| neon-vcvt-fp16.s | 6 @ CHECK-FP16: vcvtt.f32.f16 s7, s1 @ encoding: [0xe0,0x3a,0xf2,0xee]
8 vcvtt.f32.f16 s7, s1
9 @ CHECK-FP16: vcvtt.f16.f32 s1, s7 @ encoding: [0xe3,0x0a,0xf3,0xee]
11 vcvtt.f16.f32 s1, s7
13 @ CHECK-FP16: vcvtb.f32.f16 s7, s1 @ encoding: [0x60,0x3a,0xf2,0xee]
15 vcvtb.f32.f16 s7, s1
16 @ CHECK-FP16: vcvtb.f16.f32 s1, s7 @ encoding: [0x63,0x0a,0xf3,0xee]
18 vcvtb.f16.f32 s1, s7
|
| /external/mesa3d/src/gallium/auxiliary/util/ |
| u_half.h | 56 uint16_t f16; local
68 f16 = 0x7c00;
71 f16 = 0x7e00;
79 * all f16 denorms get flushed to zero - hence when this is used
80 * for tgsi_exec in softpipe we won't get f16 denorms.
94 f16 = f32.ui >> 13;
98 f16 |= sign >> 16;
100 return f16;
104 util_half_to_float(uint16_t f16)
115 f32.ui = (f16 & 0x7fff) << 13
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i860/ |
| regress01.s | 5 fst.l %f16,-16(%sp)
9 fst.l %f16,-16(%sp)++
13 fst.q %f16,-16(%sp)
17 fst.q %f16,-16(%sp)++
|
| /external/valgrind/none/tests/ppc32/ |
| test_dfp3.c | 32 register double f16 __asm__ ("fr16");
91 __asm__ __volatile__ ("drintx 1, %0, %1, 0" : "=f" (f18) : "f" (f16));
93 __asm__ __volatile__ ("drintx 0, %0, %1, 0" : "=f" (f18) : "f" (f16));
97 __asm__ __volatile__ ("drintx 1, %0, %1, 1" : "=f" (f18) : "f" (f16));
99 __asm__ __volatile__ ("drintx 0, %0, %1, 1" : "=f" (f18) : "f" (f16));
103 __asm__ __volatile__ ("drintx 1, %0, %1, 2" : "=f" (f18) : "f" (f16));
105 __asm__ __volatile__ ("drintx 0, %0, %1, 2" : "=f" (f18) : "f" (f16));
109 __asm__ __volatile__ ("drintx 1, %0, %1, 3" : "=f" (f18) : "f" (f16));
111 __asm__ __volatile__ ("drintx 0, %0, %1, 3" : "=f" (f18) : "f" (f16));
127 __asm__ __volatile__ ("drintn 1, %0, %1, 0" : "=f" (f18) : "f" (f16));
[all...] |
| /external/valgrind/none/tests/ppc64/ |
| test_dfp3.c | 32 register double f16 __asm__ ("fr16");
91 __asm__ __volatile__ ("drintx 1, %0, %1, 0" : "=f" (f18) : "f" (f16));
93 __asm__ __volatile__ ("drintx 0, %0, %1, 0" : "=f" (f18) : "f" (f16));
97 __asm__ __volatile__ ("drintx 1, %0, %1, 1" : "=f" (f18) : "f" (f16));
99 __asm__ __volatile__ ("drintx 0, %0, %1, 1" : "=f" (f18) : "f" (f16));
103 __asm__ __volatile__ ("drintx 1, %0, %1, 2" : "=f" (f18) : "f" (f16));
105 __asm__ __volatile__ ("drintx 0, %0, %1, 2" : "=f" (f18) : "f" (f16));
109 __asm__ __volatile__ ("drintx 1, %0, %1, 3" : "=f" (f18) : "f" (f16));
111 __asm__ __volatile__ ("drintx 0, %0, %1, 3" : "=f" (f18) : "f" (f16));
127 __asm__ __volatile__ ("drintn 1, %0, %1, 0" : "=f" (f18) : "f" (f16));
[all...] |
| /external/clang/test/Index/ |
| linkage.c | 17 void f16(void) { function
|
