1 @ RUN: llvm-mc -mcpu=cortex-r7 -triple arm -show-encoding < %s 2>&1| \ 2 @ RUN: FileCheck %s --check-prefix=CHECK-FP16 3 @ RUN: not llvm-mc -mcpu=cortex-r5 -triple arm -show-encoding < %s 2>&1 | \ 4 @ RUN: FileCheck %s --check-prefix=CHECK-NOFP16 5 6 @ CHECK-FP16: vcvtt.f32.f16 s7, s1 @ encoding: [0xe0,0x3a,0xf2,0xee] 7 @ CHECK-NOFP16: instruction requires: half-float conversions 8 vcvtt.f32.f16 s7, s1 9 @ CHECK-FP16: vcvtt.f16.f32 s1, s7 @ encoding: [0xe3,0x0a,0xf3,0xee] 10 @ CHECK-NOFP16: instruction requires: half-float conversions 11 vcvtt.f16.f32 s1, s7 12 13 @ CHECK-FP16: vcvtb.f32.f16 s7, s1 @ encoding: [0x60,0x3a,0xf2,0xee] 14 @ CHECK-NOFP16: instruction requires: half-float conversions 15 vcvtb.f32.f16 s7, s1 16 @ CHECK-FP16: vcvtb.f16.f32 s1, s7 @ encoding: [0x63,0x0a,0xf3,0xee] 17 @ CHECK-NOFP16: instruction requires: half-float conversions 18 vcvtb.f16.f32 s1, s7 19
