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    Searched refs:ALL_SLICES_AT_EACH_LOD (Results 1 - 5 of 5) sorted by null

  /external/mesa3d/src/mesa/drivers/dri/i965/
gen6_depth_state.c 167 if (hiz_mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
193 if (stencil_mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
brw_tex_layout.c 341 if (mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
386 /* ALL_SLICES_AT_EACH_LOD isn't supported on Gen8+ but this code will
390 assert(mt->array_layout != ALL_SLICES_AT_EACH_LOD);
414 mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
496 if (mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
717 if (brw->gen == 6 && mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
723 /* On gen6, we use ALL_SLICES_AT_EACH_LOD for stencil/hiz because the
734 * ALL_SLICES_AT_EACH_LOD miptree layout.
741 * ALL_SLICES_AT_EACH_LOD miptree layout.
intel_mipmap_tree.h 238 * ALL_SLICES_AT_EACH_LOD would look somewhat like this:
253 ALL_SLICES_AT_EACH_LOD,
499 * or if we tightly pack array slices at each LOD (ALL_SLICES_AT_EACH_LOD).
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brw_blorp.c 115 assert(mt->array_layout == ALL_SLICES_AT_EACH_LOD);
174 mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
175 /* Sandy bridge stencil and HiZ use this ALL_SLICES_AT_EACH_LOD hack in
179 * crazy ALL_SLICES_AT_EACH_LOD layout and since we have to do a manual
251 hiz_mt->array_layout == ALL_SLICES_AT_EACH_LOD) {
    [all...]
intel_mipmap_tree.c 428 /* Set array_layout to ALL_SLICES_AT_EACH_LOD when array_spacing_lod0 can
448 mt->array_layout = ALL_SLICES_AT_EACH_LOD;
501 mt->array_layout = ALL_SLICES_AT_EACH_LOD;
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