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      1 /** @file
      2 *
      3 *  Copyright (c) 2011, ARM Limited. All rights reserved.
      4 *
      5 *  This program and the accompanying materials
      6 *  are licensed and made available under the terms and conditions of the BSD License
      7 *  which accompanies this distribution.  The full text of the license may be found at
      8 *  http://opensource.org/licenses/bsd-license.php
      9 *
     10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
     11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
     12 *
     13 **/
     14 
     15 #ifndef __ARM_MP_CORE_INFO_GUID_H_
     16 #define __ARM_MP_CORE_INFO_GUID_H_
     17 
     18 #define MAX_CPUS_PER_MPCORE_SYSTEM    0x04
     19 #define SCU_CONFIG_REG_OFFSET         0x04
     20 #define MPIDR_U_BIT_MASK              0x40000000
     21 
     22 typedef struct {
     23   UINT32                ClusterId;
     24   UINT32                CoreId;
     25 
     26   // MP Core Mailbox
     27   EFI_PHYSICAL_ADDRESS  MailboxSetAddress;
     28   EFI_PHYSICAL_ADDRESS  MailboxGetAddress;
     29   EFI_PHYSICAL_ADDRESS  MailboxClearAddress;
     30   UINT64                MailboxClearValue;
     31 } ARM_CORE_INFO;
     32 
     33 typedef struct{
     34         UINT64   Signature;
     35         UINT32   Length;
     36         UINT32   Revision;
     37         UINT64   OemId;
     38         UINT64   OemTableId;
     39         UINTN    OemRevision;
     40         UINTN    CreatorId;
     41         UINTN    CreatorRevision;
     42         EFI_GUID Identifier;
     43         UINTN    DataLen;
     44 } ARM_PROCESSOR_TABLE_HEADER;
     45 
     46 typedef struct {
     47         ARM_PROCESSOR_TABLE_HEADER   Header;
     48         UINTN                        NumberOfEntries;
     49         ARM_CORE_INFO                *ArmCpus;
     50 } ARM_PROCESSOR_TABLE;
     51 
     52 
     53 #define ARM_MP_CORE_INFO_GUID \
     54   { 0xa4ee0728, 0xe5d7, 0x4ac5,  {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} }
     55 
     56 #define EFI_ARM_PROCESSOR_TABLE_SIGNATURE        SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E')
     57 #define EFI_ARM_PROCESSOR_TABLE_REVISION         0x00010000 //1.0
     58 #define EFI_ARM_PROCESSOR_TABLE_OEM_ID           SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ')
     59 #define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID     SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L')
     60 #define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION     0x00000001
     61 #define EFI_ARM_PROCESSOR_TABLE_CREATOR_ID       0xA5A5A5A5
     62 #define EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION 0x01000001
     63 
     64 extern EFI_GUID gArmMpCoreInfoGuid;
     65 
     66 #endif /* MPCOREINFO_H_ */
     67