/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/ |
m0_ctl.c | 26 BITS_WITH_WMASK((M0_BINCODE_BASE >> 12) & 0xffff, 29 BITS_WITH_WMASK((M0_BINCODE_BASE >> 28) & 0xf, 44 BIT_WITH_WMSK(15) | BITS_WITH_WMASK(0x0, 0x1f, 8)); 53 BITS_WITH_WMASK(0x0, 0xf, 0)); 60 BITS_WITH_WMASK(0x0, 0x4, 0)); 65 BITS_WITH_WMASK(0x0, 0x20, 0)); 73 BITS_WITH_WMASK(0x24, 0x24, 0)); 77 BITS_WITH_WMASK(0xf, 0xf, 0));
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pmu.h | 50 #define GPIO0A0_SMT_ENABLE BITS_WITH_WMASK(1, 3, 0) 51 #define GPIO1A6_IOMUX BITS_WITH_WMASK(0, 3, 12)
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pmu.c | 919 BITS_WITH_WMASK(0, 0x07, PCLK_GPIO2_GATE_SHIFT)); 1039 BITS_WITH_WMASK(gpio_2_4_clk_gate, 0x07, [all...] |
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pwm/ |
pwm.c | 38 val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK, 47 val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK, 56 val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK, 65 val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK, 97 val = BITS_WITH_WMASK(PMUGRF_GPIO0A6_IOMUX_PWM, 104 val = BITS_WITH_WMASK(PMUGRF_GPIO1C3_IOMUX_PWM, 111 val = BITS_WITH_WMASK(GRF_GPIO4C6_IOMUX_PWM, 118 val = BITS_WITH_WMASK(GRF_GPIO4C2_IOMUX_PWM,
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/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/ |
soc.h | 53 #define PLL_BYPASS BITS_WITH_WMASK(1, 0x1, 15) 54 #define PLL_NO_BYPASS BITS_WITH_WMASK(0, 0x1, 15) 57 BITS_WITH_WMASK(0, 0x1, 1) : \ 58 BITS_WITH_WMASK(0, 0x1, ((id) * 4)) 60 BITS_WITH_WMASK(1, 0x1, 1) : \ 61 BITS_WITH_WMASK(1, 0x1, ((id) * 4))
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/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/gpio/ |
rk3399_gpio.c | 77 BITS_WITH_WMASK(0, CLK_GATE_MASK, 85 BITS_WITH_WMASK(0, CLK_GATE_MASK, 93 BITS_WITH_WMASK(0, CLK_GATE_MASK, 101 BITS_WITH_WMASK(0, CLK_GATE_MASK, 109 BITS_WITH_WMASK(0, CLK_GATE_MASK, 127 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK, 132 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK, 137 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK, 142 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK, 148 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK [all...] |
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/ |
pmu.c | 284 BITS_WITH_WMASK(1, 1, 15)); 287 BITS_WITH_WMASK(1, 1, 14)); 290 BITS_WITH_WMASK(0, 1, 14)); 305 BITS_WITH_WMASK(1, 1, 15)); 307 BITS_WITH_WMASK(1, 1, 14)); 315 BITS_WITH_WMASK(1, 1, 15)); 317 BITS_WITH_WMASK(0, 1, 14)); 381 BITS_WITH_WMASK(0, 0x1f, 0)); 385 BITS_WITH_WMASK(0, 0xf, 0)); 389 BITS_WITH_WMASK(0, 0x1f, 0)) [all...] |
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/include/ |
plat_private.h | 53 #ifndef BITS_WITH_WMASK 54 #define BITS_WITH_WMASK(bits, msk, shift)\
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/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/secure/ |
secure.c | 70 BITS_WITH_WMASK(st_mb, SGRF_DDR_RGN_0_16_WMSK, 0)); 74 BITS_WITH_WMASK((ed_mb - 1), SGRF_DDR_RGN_0_16_WMSK, 0));
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/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/soc/ |
soc.h | 35 #define PLL_SLOW_MODE BITS_WITH_WMASK(SLOW_MODE,\ 38 #define PLL_NOMAL_MODE BITS_WITH_WMASK(NORMAL_MODE,\
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