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Searched
refs:CTX_RB3D_ZSTENCILCNTL
(Results
1 - 6
of
6
) sorted by null
/external/mesa3d/src/mesa/drivers/dri/r200/
r200_state.c
331
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] &= ~R200_Z_TEST_MASK;
335
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= R200_Z_TEST_NEVER;
338
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= R200_Z_TEST_LESS;
341
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= R200_Z_TEST_EQUAL;
344
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= R200_Z_TEST_LEQUAL;
347
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= R200_Z_TEST_GREATER;
350
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= R200_Z_TEST_NEQUAL;
353
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= R200_Z_TEST_GEQUAL;
356
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= R200_Z_TEST_ALWAYS;
367
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= R200_Z_WRITE_ENABLE
[
all
...]
r200_context.h
104
#define
CTX_RB3D_ZSTENCILCNTL
7
r200_state_init.c
484
atom->cmd[
CTX_RB3D_ZSTENCILCNTL
] &= ~RADEON_DEPTH_FORMAT_MASK;
485
atom->cmd[
CTX_RB3D_ZSTENCILCNTL
] |= depth_fmt;
504
OUT_BATCH(atom->cmd[
CTX_RB3D_ZSTENCILCNTL
]);
[
all
...]
/external/mesa3d/src/mesa/drivers/dri/radeon/
radeon_state.c
270
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] &= ~RADEON_Z_TEST_MASK;
274
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_NEVER;
277
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_LESS;
280
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_EQUAL;
283
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_LEQUAL;
286
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_GREATER;
289
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_NEQUAL;
292
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_GEQUAL;
295
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_ALWAYS;
307
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_WRITE_ENABLE
[
all
...]
radeon_state_init.c
367
atom->cmd[
CTX_RB3D_ZSTENCILCNTL
] &= ~RADEON_DEPTH_FORMAT_MASK;
368
atom->cmd[
CTX_RB3D_ZSTENCILCNTL
] |= depth_fmt;
387
OUT_BATCH(atom->cmd[
CTX_RB3D_ZSTENCILCNTL
]);
685
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] = (RADEON_Z_TEST_LESS |
693
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_COMPRESSION_ENABLE |
697
/* rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_HIERARCHY_ENABLE;*/
699
rmesa->hw.ctx.cmd[
CTX_RB3D_ZSTENCILCNTL
] |= RADEON_FORCE_Z_DIRTY;
[
all
...]
radeon_context.h
95
#define
CTX_RB3D_ZSTENCILCNTL
7
Completed in 388 milliseconds