| /external/llvm/lib/Target/X86/ |
| X86PadShortFunction.cpp | 42 // Cycles - Number of cycles until return if HasReturn is true, otherwise
43 // number of cycles until end of the BB
44 unsigned int Cycles;
46 VisitedBBInfo() : HasReturn(false), Cycles(0) {}
47 VisitedBBInfo(bool HasReturn, unsigned int Cycles)
48 : HasReturn(HasReturn), Cycles(Cycles) {}
69 unsigned int Cycles = 0);
72 unsigned int &Cycles);
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/MC/ |
| MCSchedule.h | 41 // fixed number of cycles after dispatch. If a resource is unbuffered, then
54 /// scheduling class for the specified number of cycles.
57 unsigned Cycles;
60 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
64 /// Specify the latency in cpu cycles for a particular scheduling class and def
70 int Cycles;
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
78 /// Specify the number of cycles allowed after instruction issue before
[all...] |
| /external/dagger2/compiler/src/it/functional-tests/src/test/java/test/cycle/ |
| CycleTest.java | 21 import test.cycle.Cycles.A;
22 import test.cycle.Cycles.C;
23 import test.cycle.Cycles.ChildCycleComponent;
24 import test.cycle.Cycles.CycleComponent;
25 import test.cycle.Cycles.CycleMapComponent;
26 import test.cycle.Cycles.S;
27 import test.cycle.Cycles.SelfCycleComponent;
|
| /device/linaro/bootloader/edk2/BaseTools/Source/C/VfrCompile/Pccts/antlr/ |
| dumpcycles.c | 24 if (Cycles[k] == NULL) continue;
26 for (p = Cycles[k]->next; p!=NULL; p=p->next) {
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/bfin/ |
| stack.s | 8 [--sP] = Cycles;
|
| /external/llvm/lib/CodeGen/ |
| TargetSchedule.cpp | 95 static unsigned capLatency(int Cycles) {
96 return Cycles >= 0 ? Cycles : 1000;
194 unsigned Latency = capLatency(WLEntry->Cycles);
233 Latency = std::max(Latency, capLatency(WLEntry->Cycles));
|
| /external/dagger2/compiler/src/it/functional-tests/src/main/java/test/cycle/ |
| Cycles.java | 39 final class Cycles {
40 private Cycles() {}
|
| /external/llvm/utils/TableGen/ |
| SubtargetEmitter.cpp | 97 void ExpandProcResources(RecVec &PRVec, std::vector<int64_t> &Cycles,
287 // Form string as ,{ cycles, u1 | u2 | ... | un, timeinc, kind }
288 int Cycles = Stage->getValueAsInt("Cycles");
289 ItinString += " { " + itostr(Cycles) + ", ";
316 // number of operands that has cycles specified.
416 // operand cycles, and pipepine bypess tables. Then add the new Itinerary
464 // Emit as { cycles, u1 | u2 | ... | un, timeinc }, // indices
512 // Closing operand cycles
513 OperandCycleTable += " 0 // End operand cycles\n"
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineTraceMetrics.h | 36 // cycles required to execute the trace when execution is limited by data
38 // of cycles required to execute all instructions in the trace when ignoring
41 // Every instruction in the current block has a slack - the number of cycles
111 /// Get the scaled number of cycles used per processor resource in MBB.
207 /// Critical path length. This is the number of cycles in the longest data
229 /// Minimum number of cycles from this instruction is issued to the of the
253 /// This is the number of cycles required to execute all instructions from
259 /// Return the resource length of the trace. This is the number of cycles
280 return TE.Cycles.lookup(&MI);
283 /// Return the slack of MI. This is the number of cycles MI can be delaye
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| MachineTraceMetrics.h | 36 // cycles required to execute the trace when execution is limited by data
38 // of cycles required to execute all instructions in the trace when ignoring
41 // Every instruction in the current block has a slack - the number of cycles
116 /// Get the scaled number of cycles used per processor resource in MBB.
209 /// Critical path length. This is the number of cycles in the longest data
231 /// Minimum number of cycles from this instruction is issued to the of the
256 /// This is the number of cycles required to execute all instructions from
262 /// Return the resource length of the trace. This is the number of cycles
283 return TE.Cycles.lookup(&MI);
286 /// Return the slack of MI. This is the number of cycles MI can be delaye
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/CodeGen/ |
| MachineTraceMetrics.h | 36 // cycles required to execute the trace when execution is limited by data
38 // of cycles required to execute all instructions in the trace when ignoring
41 // Every instruction in the current block has a slack - the number of cycles
116 /// Get the scaled number of cycles used per processor resource in MBB.
209 /// Critical path length. This is the number of cycles in the longest data
231 /// Minimum number of cycles from this instruction is issued to the of the
256 /// This is the number of cycles required to execute all instructions from
262 /// Return the resource length of the trace. This is the number of cycles
283 return TE.Cycles.lookup(&MI);
286 /// Return the slack of MI. This is the number of cycles MI can be delaye
[all...] |
