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Searched
refs:DREG
(Results
1 - 11
of
11
) sorted by null
/toolchain/binutils/binutils-2.27/gas/
itbl-parse.y
129
type -> ['
dreg
' | 'creg' | 'greg' ] ; type of entry (register)
130
; '
dreg
', 'creg' or 'greg' specifies a data, control, or general
165
p1
dreg
d1 1 ; data register "d1" for COP1 has value 1
183
p3
dreg
d3 3 ; data register "d3" for COP3 has value 3
185
p3 func fee 0x1f:24-20
dreg
:17-13 creg:12-8 immed:7-0
197
COPz CO fun
dreg
creg immed
207
p3
dreg
d3 3 ; data register "d3" for COP3 has value 3
209
p3 func fuu 0x01f00001
dreg
:17-13 creg:12-8
219
COPz CO fun
dreg
creg
242
to recognize '
dreg
' etc. in context sensitive way
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...]
itbl-lex.l
47
"
dreg
"|"
DREG
" {
48
return
DREG
;
itbl-ops.c
56
* "p3 insn pig 0x1:24-21
dreg
:20-16 immed:15-0"
57
* "p3
dreg
d2 0x2"
121
e_type type; /*
dreg
/creg/greg/immed/symb */
134
e_type type; /*
dreg
/creg/greg/insn */
829
case
DREG
:
/system/core/libpixelflinger/arch-arm64/
t32cb16blend.S
37
* top or bottom 16 bits of
DREG
register with SRC 32 bit pixel value
40
* \
DREG
is a 32-bit register containing *two* original destination RGB565
49
* upper 16-bit pixels in
DREG
into FB
56
.macro pixel,
DREG
, SRC, FB, ODD
66
.if \ODD //Blending odd pixel present in top 16 bits of
DREG
register
69
lsr w16, \
DREG
, #(16 + 11)
79
and w6, \
DREG
, #(0x3F<<(16 + 5))
90
and w16, \
DREG
, #(0x1F << 16)
101
.else //Blending even pixel present in bottom 16 bits of
DREG
register
104
lsr w16, \
DREG
, #1
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...]
/system/core/libpixelflinger/
t32cb16blend.S
29
* \
DREG
is a 32-bit register containing *two* original destination RGB565
38
* upper 16-bit pixels in
DREG
into FB
45
.macro pixel,
DREG
, SRC, FB, ODD
57
mov lr, \
DREG
, lsr #(16 + 11)
67
and r6, \
DREG
, #(0x3F<<(16 + 5))
77
and lr, \
DREG
, #(0x1F << 16)
89
mov lr, \
DREG
, lsr #11
101
and r6, \
DREG
, #(0x3F<<5)
111
and lr, \
DREG
, #0x1F
/external/vixl/src/aarch64/
operands-aarch64.cc
174
#define
DREG
(n) d##n,
175
const VRegister VRegister::dregisters[] = {AARCH64_REGISTER_CODE_LIST(
DREG
)};
176
#undef
DREG
/toolchain/binutils/binutils-2.27/gas/config/
m68k-parse.h
306
DREG
,
tc-m68k.c
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...]
m68k-parse.y
154
op->mode =
DREG
;
622
plain register were a
DREG
/AREG/FPREG or a REGLST. */
/prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/config/i386/
i386.h
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/toolchain/binutils/binutils-2.27/opcodes/
bfin-dis.c
658
#define
DREG
(x) (saved_state.dpregs[x])
661
#define
DREG
(x) (saved_state.dpregs[x])
692
case 0: case 1: return &
DREG
(reg);
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